. This patch call
syscore_shutdown() a little later (after disable_nonboot_cpus()) to
avoid reboot failure.
Signed-off-by: Huacai Chen
Cc:
---
kernel/sys.c |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/kernel/sys.c b/kernel/sys.c
index b0003db..f879033dd 100644
--- a
tes since CONFIG_HOTPLUG is going away as an option.
3, Use dev_info() to print messages in fixup-loongson3.c.
4, Update the default config file.
5, Sync the code to upstream.
Huacai Chen(13):
MIPS: Loongson: Add basic Loongson-3 definition.
MIPS: Loongson: Add basic Loongson-3 CPU support.
on-3A(including so-called Loongson-2Gq), they are
64-bit multi-core MIPS CPUs.
Signed-off-by: Huacai Chen
Signed-off-by: Hongliang Tao
Signed-off-by: Hua Yan
---
arch/mips/include/asm/addrspace.h|6 ++
arch/mips/include/asm/cpu.h |5 +++--
Basic Loongson-3 CPU support include CPU probing and TLB/cache
initializing.
Signed-off-by: Huacai Chen
Signed-off-by: Hongliang Tao
Signed-off-by: Hua Yan
---
arch/mips/kernel/cpu-probe.c | 14 +++---
arch/mips/mm/c-r4k.c | 62 +-
arch
Loongson-3 maintains cache coherency by hardware. So we introduce a cpu
feature named cpu_has_coherent_cache and use it to modify MIPS's cache
flushing functions.
Signed-off-by: Huacai Chen
Signed-off-by: Hongliang Tao
Signed-off-by: Hua Yan
---
arch/mips/include/asm/cachefl
Add four Loongson-3 based machine types:
MACH_LEMOTE_A1004/MACH_LEMOTE_A1201 are laptops;
MACH_LEMOTE_A1101 is mini-itx;
MACH_LEMOTE_A1205 is all-in-one machine.
The most significant differrent between A1004/A1201 and A1101/A1205 is
the laptops have EC but others don't.
Signed-off-by: H
except 2E/2F series.
Signed-off-by: Huacai Chen
Signed-off-by: Hongliang Tao
Signed-off-by: Hua Yan
---
arch/mips/include/asm/mach-loongson/boot_param.h | 151 ++
arch/mips/include/asm/mach-loongson/loongson.h |4 +-
arch/mips/loongson/common/env.c
ion
registers of HT1 controller.
Signed-off-by: Huacai Chen
Signed-off-by: Hongliang Tao
Signed-off-by: Hua Yan
---
arch/mips/include/asm/mach-loongson/irq.h | 24 +++
arch/mips/include/asm/mach-loongson/loongson.h |9 +++
arch/mips/loongson/Makefile|6 ++
UARTs:
CPU UART: REG_BASE + OFFSET;
LPC UART: LIO1_BASE + OFFSET;
PCI UART: PCIIO_BASE + OFFSET.
Since LPC UART are linked in "Local Bus", both CPU UART and LPC UART
are called "CPU provided serial port".
Signed-off-by: Huacai Chen
Signed-off-by: Hongliang Tao
Signed-off-by: Hua
ide a
platform-specific dma_map_ops::set_dma_mask() to make sure each
driver's dma_mask and coherent_dma_mask is below 32-bit.
Signed-off-by: Huacai Chen
Signed-off-by: Hongliang Tao
Signed-off-by: Hua Yan
---
arch/mips/include/asm/dma-mapping.h|5 +
.../mips/include/asm/mac
Added Kconfig options include: Loongson-3 CPU and machine definition,
CPU cache features, UEFI-like firmware interface, HT-linked PCI, and
big memory support.
Signed-off-by: Huacai Chen
Signed-off-by: Hongliang Tao
Signed-off-by: Hua Yan
---
arch/mips/Kconfig | 28
this patch we make changes to avoid boot failure.
Signed-off-by: Huacai Chen
Signed-off-by: Hongliang Tao
Signed-off-by: Hua Yan
---
arch/mips/loongson/common/init.c |5 +
arch/mips/loongson/common/setup.c |8 +-
arch/mips/loongson/loongson-3/Makefile |2 +
arch
Loongson family machines use Hyper-Transport bus for inter-core
connection and device connection. The PCI bus is a subordinate
linked at HT1.
With UEFI-like firmware interface, We don't need fixup for PCI irq
routing.
Signed-off-by: Huacai Chen
Signed-off-by: Hongliang Tao
Signed-off-by
KSEG1 (both uncached and
unmmaped).
2, The default clocksource of Loongson is MIPS. Since clock source is a
global device, timekeeping need the CP0' Count registers of each core
be synchronous. Thus, when a core is up, we use a SMP_ASK_C0COUNT IPI
to ask Core-0's Count.
Signed
Signed-off-by: Huacai Chen
Signed-off-by: Hongliang Tao
Signed-off-by: Hua Yan
---
arch/mips/configs/loongson3_defconfig | 330 +
1 files changed, 330 insertions(+), 0 deletions(-)
create mode 100644 arch/mips/configs/loongson3_defconfig
diff --git a/arch
. one CPU is using clear_page() while another is
generating it in cpu_cache_init()).
For similar reasons we modify build_tlb_refill_handler()'s invocation.
V2:
1, Rework the code to make CPU#0 can be online/offline.
2, Introduce cpu_has_local_ebase feature since some types of MIPS CPU
need a
un on CPU#1, memory corruption (e.g.
segfault, bus error, etc.) will occur.
Signed-off-by: Huacai Chen
---
arch/mips/include/asm/mmu_context.h |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/arch/mips/include/asm/mmu_context.h
b/arch/mips/include/asm/mmu_context.h
type 'struct device *'
V2:
1, Add compilation error messages;
2, Make the From: address the same as Signed-off-by address.
V3:
1, Send to Alex Deucher since this is radeon specific;
2, Add Reviewed-by email addresses.
Signed-off-by: Huacai Chen
Signed-off-by: Hongliang Tao
Signed-o
, Increase the default boost of internal mic for Lemote A1004.
8, Fix a #ifdef issue in dma-coherence.h.
9, Some other small fixes.
V6 -> V7:
1, Fix boot failure when NR_CPUS is more than present cpus.
2, Fix error messages after poweroff & reboot.
3, Update the default config file.
4, Syn
on-3A(including so-called Loongson-2Gq), they are
64-bit multi-core MIPS CPUs.
Signed-off-by: Huacai Chen
Signed-off-by: Hongliang Tao
Signed-off-by: Hua Yan
---
arch/mips/include/asm/addrspace.h|6 ++
arch/mips/include/asm/cpu.h |5 +++--
Basic Loongson-3 CPU support include CPU probing and TLB/cache
initializing.
Signed-off-by: Huacai Chen
Signed-off-by: Hongliang Tao
Signed-off-by: Hua Yan
---
arch/mips/kernel/Makefile|1 +
arch/mips/kernel/cpu-probe.c | 14 +++---
arch/mips/lib/Makefile |1 +
arch
Loongson-3 maintains cache coherency by hardware. So we introduce a cpu
feature named cpu_has_coherent_cache and use it to modify MIPS's cache
flushing functions.
Signed-off-by: Huacai Chen
Signed-off-by: Hongliang Tao
Signed-off-by: Hua Yan
---
arch/mips/include/asm/cacheflush.h |
Add four Loongson-3 based machine types:
MACH_LEMOTE_A1004/MACH_LEMOTE_A1201 are laptops;
MACH_LEMOTE_A1101 is mini-itx;
MACH_LEMOTE_A1205 is all-in-one machine.
The most significant differrent between A1004/A1201 and A1101/A1205 is
the laptops have EC but others don't.
Signed-off-by: H
Loongson family machines use Hyper-Transport bus for inter-core
connection and device connection. The PCI bus is a subordinate
linked at HT1.
With UEFI-like firmware interface, We don't need fixup for PCI irq
routing.
Signed-off-by: Huacai Chen
Signed-off-by: Hongliang Tao
Signed-off-by
ion
registers of HT1 controller.
Signed-off-by: Huacai Chen
Signed-off-by: Hongliang Tao
Signed-off-by: Hua Yan
---
arch/mips/include/asm/mach-loongson/irq.h | 24 +++
arch/mips/include/asm/mach-loongson/loongson.h |9 +++
arch/mips/loongson/Makefile|6 ++
UARTs:
CPU UART: REG_BASE + OFFSET;
LPC UART: LIO1_BASE + OFFSET;
PCI UART: PCIIO_BASE + OFFSET.
Since LPC UART are linked in "Local Bus", both CPU UART and LPC UART
are called "CPU provided serial port".
Signed-off-by: Huacai Chen
Signed-off-by: Hongliang Tao
Signed-off-by: Hua
ide a
platform-specific dma_map_ops::set_dma_mask() to make sure each
driver's dma_mask and coherent_dma_mask is below 32-bit.
Signed-off-by: Huacai Chen
Signed-off-by: Hongliang Tao
Signed-off-by: Hua Yan
---
arch/mips/include/asm/dma-mapping.h|5 +
.../mips/include/asm/mac
Added Kconfig options include: Loongson-3 CPU and machine definition,
CPU cache features, UEFI-like firmware interface, HT-linked PCI, and
big memory support.
Signed-off-by: Huacai Chen
Signed-off-by: Hongliang Tao
Signed-off-by: Hua Yan
---
arch/mips/Kconfig | 26
Signed-off-by: Huacai Chen
Signed-off-by: Hongliang Tao
Signed-off-by: Hua Yan
Cc: dri-de...@lists.freedesktop.org
---
drivers/gpu/drm/drm_vm.c |2 +-
drivers/gpu/drm/ttm/ttm_bo_util.c |2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm
this patch we make changes to avoid boot failure.
Signed-off-by: Huacai Chen
Signed-off-by: Hongliang Tao
Signed-off-by: Hua Yan
---
arch/mips/loongson/common/init.c |5 +
arch/mips/loongson/common/setup.c |8 +-
arch/mips/loongson/loongson-3/Makefile |2 +
arch
KSEG1 (both uncached and
unmmaped).
2, The default clocksource of Loongson is MIPS. Since clock source is a
global device, timekeeping need the CP0' Count registers of each core
be synchronous. Thus, when a core is up, we use a SMP_ASK_C0COUNT IPI
to ask Core-0's Count.
Signed
Signed-off-by: Huacai Chen
Signed-off-by: Hongliang Tao
Signed-off-by: Hua Yan
---
arch/mips/configs/loongson3_defconfig | 317 +
1 files changed, 317 insertions(+), 0 deletions(-)
create mode 100644 arch/mips/configs/loongson3_defconfig
diff --git a/arch
Lemote A1004(Laptop) and A1205(All-In-One) use Conexant's hda codec,
this patch modify patch_conexant.c to add Lemote specific code.
Both A1004 and A1205 use the same pin configurations, but A1004 need
to increase the default boost of internal mic.
Signed-off-by: Jie Chen
Signed-off-by: H
except 2E/2F series.
Signed-off-by: Huacai Chen
Signed-off-by: Hongliang Tao
Signed-off-by: Hua Yan
---
arch/mips/include/asm/mach-loongson/boot_param.h | 151 ++
arch/mips/include/asm/mach-loongson/loongson.h |4 +-
arch/mips/loongson/common/env.c
406] [] kernel_thread_helper+0x10/0x18
Signed-off-by: Huacai Chen
---
kernel/sched/core.c |5 +++--
1 files changed, 3 insertions(+), 2 deletions(-)
diff --git a/kernel/sched/core.c b/kernel/sched/core.c
index 36e2666..703754a 100644
--- a/kernel/sched/core.c
+++ b/kernel/sched/core.c
@
Some devices (e.g. serial port) setup irq handler at dev open and free
it at dev close. So, sometimes there is no irqaction for a specific
irq. But some buggy devices may send irqs at any time. This patch avoid
the NULL OOPS when irqaction isn't registered.
Signed-off-by: Huacai Chen
---
k
n upstream code.
5, Remove the patch "ALSA: HDA: Make hda sound card usable for Loongson"
since it is already in upstream code.
6, Use LZMA compression and do some adjustment of config file to reduce
kernel size.
Huacai Chen(13):
MIPS: Loongson: Add basic Loongson-3 definition.
on-3A(including so-called Loongson-2Gq), they are
64-bit multi-core MIPS CPUs.
Signed-off-by: Huacai Chen
Signed-off-by: Hongliang Tao
Signed-off-by: Hua Yan
---
arch/mips/include/asm/addrspace.h|6 ++
arch/mips/include/asm/cpu.h |5 +++--
Basic Loongson-3 CPU support include CPU probing and TLB/cache
initializing.
Signed-off-by: Huacai Chen
Signed-off-by: Hongliang Tao
Signed-off-by: Hua Yan
---
arch/mips/kernel/cpu-probe.c | 14 +++---
arch/mips/mm/c-r4k.c | 62 +-
arch
Loongson-3 maintains cache coherency by hardware. So we introduce a cpu
feature named cpu_has_coherent_cache and use it to modify MIPS's cache
flushing functions.
Signed-off-by: Huacai Chen
Signed-off-by: Hongliang Tao
Signed-off-by: Hua Yan
---
arch/mips/include/asm/cacheflush.h |
Add four Loongson-3 based machine types:
MACH_LEMOTE_A1004/MACH_LEMOTE_A1201 are laptops;
MACH_LEMOTE_A1101 is mini-itx;
MACH_LEMOTE_A1205 is all-in-one machine.
The most significant differrent between A1004/A1201 and A1101/A1205 is
the laptops have EC but others don't.
Signed-off-by: H
except 2E/2F series.
Signed-off-by: Huacai Chen
Signed-off-by: Hongliang Tao
Signed-off-by: Hua Yan
---
arch/mips/include/asm/mach-loongson/boot_param.h | 151 ++
arch/mips/include/asm/mach-loongson/loongson.h |4 +-
arch/mips/loongson/common/env.c
Loongson family machines use Hyper-Transport bus for inter-core
connection and device connection. The PCI bus is a subordinate
linked at HT1.
With UEFI-like firmware interface, We don't need fixup for PCI irq
routing.
Signed-off-by: Huacai Chen
Signed-off-by: Hongliang Tao
Signed-off-by
ion
registers of HT1 controller.
Signed-off-by: Huacai Chen
Signed-off-by: Hongliang Tao
Signed-off-by: Hua Yan
---
arch/mips/include/asm/mach-loongson/irq.h | 24 +++
arch/mips/include/asm/mach-loongson/loongson.h |9 +++
arch/mips/loongson/Makefile|6 ++
UARTs:
CPU UART: REG_BASE + OFFSET;
LPC UART: LIO1_BASE + OFFSET;
PCI UART: PCIIO_BASE + OFFSET.
Since LPC UART are linked in "Local Bus", both CPU UART and LPC UART
are called "CPU provided serial port".
Signed-off-by: Huacai Chen
Signed-off-by: Hongliang Tao
Signed-off-by: Hua
ide a
platform-specific dma_map_ops::set_dma_mask() to make sure each
driver's dma_mask and coherent_dma_mask is below 32-bit.
Signed-off-by: Huacai Chen
Signed-off-by: Hongliang Tao
Signed-off-by: Hua Yan
---
arch/mips/include/asm/dma-mapping.h|5 +
.../mips/include/asm/mac
Added Kconfig options include: Loongson-3 CPU and machine definition,
CPU cache features, UEFI-like firmware interface, HT-linked PCI, and
big memory support.
Signed-off-by: Huacai Chen
Signed-off-by: Hongliang Tao
Signed-off-by: Hua Yan
---
arch/mips/Kconfig | 28
this patch we make changes to avoid boot failure.
Signed-off-by: Huacai Chen
Signed-off-by: Hongliang Tao
Signed-off-by: Hua Yan
---
arch/mips/loongson/common/init.c |5 +
arch/mips/loongson/common/setup.c |8 +-
arch/mips/loongson/loongson-3/Makefile |2 +
arch
KSEG1 (both uncached and
unmmaped).
2, The default clocksource of Loongson is MIPS. Since clock source is a
global device, timekeeping need the CP0' Count registers of each core
be synchronous. Thus, when a core is up, we use a SMP_ASK_C0COUNT IPI
to ask Core-0's Count.
Signed
Signed-off-by: Huacai Chen
Signed-off-by: Hongliang Tao
Signed-off-by: Hua Yan
---
arch/mips/configs/loongson3_defconfig | 328 +
1 files changed, 328 insertions(+), 0 deletions(-)
create mode 100644 arch/mips/configs/loongson3_defconfig
diff --git a/arch
Hi, Steven
Is the 3rd patch of V10 is OK to be accepted now? If so, could the
patchset of V10 be merged into 3.11?
Huacai
On Fri, Apr 12, 2013 at 11:07 AM, Huacai Chen wrote:
> Hi, Steven,
>
> Maybe you are misunderstand Loongson-3's "hardware-maintained cache".
On Thu, Mar 21, 2013 at 11:53 PM, David Daney wrote:
> On 03/20/2013 04:14 PM, David Daney wrote:
>>
>> On 03/17/2013 05:49 AM, Huacai Chen wrote:
>>>
>>> This and the next patch resolve memory corruption problems while CPU
>>> hotplug. Without thes
ation.
Signed-off-by: Huacai Chen
Signed-off-by: Hongbing Hu
---
arch/mips/mm/c-octeon.c|6 --
arch/mips/mm/c-r3k.c |6 --
arch/mips/mm/c-r4k.c |6 --
arch/mips/mm/c-tx39.c |6 --
arch/mips/mm/tlb-r3k.c |3 ++-
arch/mi
OK, I'm reworking...
On Tue, Mar 5, 2013 at 2:39 AM, David Daney wrote:
> On 03/04/2013 04:56 AM, Huacai Chen wrote:
>>
>> Currently, clear_page()/copy_page() are generated by Micro-assembler
>> dynamically. But they are unavailable until uasm_resolve_relocs() has
>&
.
V2:
1, Rework the code to make CPU#0 can be online/offline.
2, Introduce cpu_has_local_ebase feature since some types of MIPS CPU
need a per-CPU tlb_refill_handler().
Signed-off-by: Huacai Chen
Signed-off-by: Hongbing Hu
---
arch/mips/include/asm/cpu-features.h |3 +++
..
I'm sorry, this is the only patch, please ignore [01/14].
On Mon, Mar 4, 2013 at 8:56 PM, Huacai Chen wrote:
> Currently, clear_page()/copy_page() are generated by Micro-assembler
> dynamically. But they are unavailable until uasm_resolve_relocs() has
> finished because jump labe
I'm sorry, this is the only patch, please ignore [01/14].
On Tue, Mar 5, 2013 at 12:37 PM, Huacai Chen wrote:
> Currently, clear_page()/copy_page() are generated by Micro-assembler
> dynamically. But they are unavailable until uasm_resolve_relocs() has
> finished because jump labe
. This patch call
syscore_shutdown() a little later (after disable_nonboot_cpus()) to
avoid reboot failure, this is the same way as poweroff does.
BTW, add disable_nonboot_cpus() in kernel_halt() for consistency.
Signed-off-by: Huacai Chen
Cc:
---
kernel/sys.c |3 ++-
1 files changed, 2
found radeon with SWIOTLB can
already work after suspend/resume, so my next version of Loongson
patches will not modify radeon_ttm.c.
On Fri, Jun 22, 2012 at 1:59 PM, Huacai Chen wrote:
> On Fri, Jun 22, 2012 at 1:25 PM, Lucas Stach wrote:
>> Hello Huacai,
>>
>> Am Freitag
ngson-3A(including so-called Loongson-2Gq), they are
64-bit multi-core MIPS CPUs.
Signed-off-by: Huacai Chen
Signed-off-by: Hongliang Tao
Signed-off-by: Hua Yan
---
arch/mips/include/asm/addrspace.h|6 ++
arch/mips/include/asm/cpu.h |6 --
ion
registers of HT1 controller.
Signed-off-by: Huacai Chen
Signed-off-by: Hongliang Tao
Signed-off-by: Hua Yan
---
arch/mips/include/asm/mach-loongson/irq.h | 24 +++
arch/mips/include/asm/mach-loongson/loongson.h |9 +++
arch/mips/loongson/Makefile|6 ++
ide a
platform-specific dma_map_ops::set_dma_mask() to make sure each
driver's dma_mask and coherent_dma_mask is below 32-bit.
Signed-off-by: Huacai Chen
Signed-off-by: Hongliang Tao
Signed-off-by: Hua Yan
---
arch/mips/include/asm/dma-mapping.h|5 +
.../mips/include/asm/mac
1, Handle io prot correctly for MIPS.
2, Define SAREA_MAX as the size of one page.
3, Include swiotlb.h if SWIOTLB configured.
Signed-off-by: Huacai Chen
Signed-off-by: Hongliang Tao
Signed-off-by: Hua Yan
Cc: dri-de...@lists.freedesktop.org
---
drivers/gpu/drm/drm_vm.c|2
Lemote A1004(Laptop) and A1205(All-In-One) use Conexant's hda codec,
this patch modify patch_conexant.c to add Lemote specific code.
Signed-off-by: Huacai Chen
Signed-off-by: Hongliang Tao
Signed-off-by: Hua Yan
Cc: alsa-de...@alsa-project.org
---
include/linux/pci_ids.h|
KSEG1 (both uncached and
unmmaped).
2, The default clocksource of Loongson is MIPS. Since clock source is a
global device, timekeeping need the CP0' Count registers of each core
be synchronous. Thus, when a core is up, we use a SMP_ASK_C0COUNT IPI
to ask Core-0's Count.
Signed
Signed-off-by: Huacai Chen
Signed-off-by: Hongliang Tao
Signed-off-by: Hua Yan
---
arch/mips/configs/loongson3_defconfig | 283 +
1 files changed, 283 insertions(+), 0 deletions(-)
create mode 100644 arch/mips/configs/loongson3_defconfig
diff --git a/arch
thus
disable_nonboot_cpus() hangs. Therefore, we make this patch to avoid
poweroff failure.
Signed-off-by: Huacai Chen
Signed-off-by: Hongliang Tao
Signed-off-by: Hua Yan
Cc: sta...@vger.kernel.org
---
arch/mips/kernel/process.c |4 +---
1 files changed, 1 insertions(+), 3 deletions(-)
diff --git a
this patch we make changes to avoid boot failure.
Signed-off-by: Huacai Chen
Signed-off-by: Hongliang Tao
Signed-off-by: Hua Yan
---
arch/mips/loongson/common/init.c |5 +
arch/mips/loongson/common/setup.c |8 +-
arch/mips/loongson/loongson-3/Makefile |2 +
arch
Added Kconfig options include: Loongson-3 CPU and machine definition,
UEFI-like firmware interface, HT-linked PCI, big memory support, etc.
Signed-off-by: Huacai Chen
Signed-off-by: Hongliang Tao
Signed-off-by: Hua Yan
---
arch/mips/Kconfig | 22 ++
arch/mips
ch (this issue affect all MIPS CPU, not only Loongson).
5, Some other small fixes.
V3 -> V4:
1, Include swiotlb.h in radeon_ttm.c if SWIOTLB configured.
2, Remove "Reviewed-by" in patches which are added by mistake.
3, Sync the code to upstream.
Huacai Chen(16):
MIPS: Loongson: Add
Basic Loongson-3 CPU support include: CPU probing, TLB and cache
initializing, cache flushing method, etc.
Signed-off-by: Huacai Chen
Signed-off-by: Hongliang Tao
Signed-off-by: Hua Yan
---
arch/mips/kernel/Makefile|1 +
arch/mips/kernel/cpu-probe.c | 12 -
arch/mips/lib
Add four Loongson-3 based machine types:
MACH_LEMOTE_A1004/MACH_LEMOTE_A1201 are laptops;
MACH_LEMOTE_A1101 is mini-itx;
MACH_LEMOTE_A1205 is all-in-one machine.
The most significant differrent between A1004/A1201 and A1101/A1205 is
the laptops have EC but others don't.
Signed-off-by: H
Signed-off-by: Huacai Chen
Signed-off-by: Hongliang Tao
Signed-off-by: Hua Yan
---
arch/mips/include/asm/mach-loongson/mc146818rtc.h |4
1 files changed, 4 insertions(+), 0 deletions(-)
diff --git a/arch/mips/include/asm/mach-loongson/mc146818rtc.h
b/arch/mips/include/asm/mach
UARTs:
CPU UART: REG_BASE + OFFSET;
LPC UART: LIO1_BASE + OFFSET;
PCI UART: PCIIO_BASE + OFFSET.
Since LPC UART are linked in "Local Bus", both CPU UART and LPC UART
are called "CPU provided serial port".
Signed-off-by: Huacai Chen
Signed-off-by: Hongliang Tao
Signed-off-by: Hua
Loongson family machines use Hyper-Transport bus for inter-core
connection and device connection. The PCI bus is a subordinate
linked at HT1.
With UEFI-like firmware interface, We don't need fixup for PCI irq
routing.
Signed-off-by: Huacai Chen
Signed-off-by: Hongliang Tao
Signed-off-by
except 2E/2F series.
Signed-off-by: Huacai Chen
Signed-off-by: Hongliang Tao
Signed-off-by: Hua Yan
---
arch/mips/include/asm/mach-loongson/boot_param.h | 151 ++
arch/mips/include/asm/mach-loongson/loongson.h |4 +-
arch/mips/loongson/common/env.c
OK, I'll split it.
On Fri, Aug 3, 2012 at 4:01 PM, Michel Dänzer wrote:
> On Fre, 2012-08-03 at 15:06 +0800, Huacai Chen wrote:
>> 1, Handle io prot correctly for MIPS.
>> 2, Define SAREA_MAX as the size of one page.
>> 3, Include swiotlb.h if SWIOTLB configured.
>&g
5:06:07 +0800,
> Huacai Chen wrote:
>>
>> Lemote A1004(Laptop) and A1205(All-In-One) use Conexant's hda codec,
>> this patch modify patch_conexant.c to add Lemote specific code.
>>
>> Signed-off-by: Huacai Chen
>> Signed-off-by: Hongliang Tao
>
ree patches.
2, Use platform-specific pincfgs to replace old alsa quirks.
Huacai Chen(18):
MIPS: Loongson: Add basic Loongson-3 definition.
MIPS: Loongson: Add basic Loongson-3 CPU support.
MIPS: Loongson 3: Add Lemote-3A machtypes definition.
MIPS: Loongson: Make Loongson-3 to use BCD form
ngson-3A(including so-called Loongson-2Gq), they are
64-bit multi-core MIPS CPUs.
Signed-off-by: Huacai Chen
Signed-off-by: Hongliang Tao
Signed-off-by: Hua Yan
---
arch/mips/include/asm/addrspace.h|6 ++
arch/mips/include/asm/cpu.h |6 --
UARTs:
CPU UART: REG_BASE + OFFSET;
LPC UART: LIO1_BASE + OFFSET;
PCI UART: PCIIO_BASE + OFFSET.
Since LPC UART are linked in "Local Bus", both CPU UART and LPC UART
are called "CPU provided serial port".
Signed-off-by: Huacai Chen
Signed-off-by: Hongliang Tao
Signed-off-by: Hua
Basic Loongson-3 CPU support include: CPU probing, TLB and cache
initializing, cache flushing method, etc.
Signed-off-by: Huacai Chen
Signed-off-by: Hongliang Tao
Signed-off-by: Hua Yan
---
arch/mips/kernel/Makefile|1 +
arch/mips/kernel/cpu-probe.c | 12 -
arch/mips/lib
ide a
platform-specific dma_map_ops::set_dma_mask() to make sure each
driver's dma_mask and coherent_dma_mask is below 32-bit.
Signed-off-by: Huacai Chen
Signed-off-by: Hongliang Tao
Signed-off-by: Hua Yan
---
arch/mips/include/asm/dma-mapping.h|5 +
.../mips/include/asm/mac
Added Kconfig options include: Loongson-3 CPU and machine definition,
UEFI-like firmware interface, HT-linked PCI, big memory support, etc.
Signed-off-by: Huacai Chen
Signed-off-by: Hongliang Tao
Signed-off-by: Hua Yan
---
arch/mips/Kconfig | 22 ++
arch/mips
Loongson has SWIOTLB configured, if without this patch kernel
compilation fails.
Signed-off-by: Huacai Chen
Signed-off-by: Hongliang Tao
Signed-off-by: Hua Yan
Cc: dri-de...@lists.freedesktop.org
---
drivers/gpu/drm/radeon/radeon_ttm.c |4
1 files changed, 4 insertions(+), 0
Signed-off-by: Huacai Chen
Signed-off-by: Hongliang Tao
Signed-off-by: Hua Yan
Cc: dri-de...@lists.freedesktop.org
---
drivers/gpu/drm/drm_vm.c |2 +-
drivers/gpu/drm/ttm/ttm_bo_util.c |2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm
Signed-off-by: Huacai Chen
Signed-off-by: Hongliang Tao
Signed-off-by: Hua Yan
Cc: dri-de...@lists.freedesktop.org
---
include/drm/drm_sarea.h |2 ++
1 files changed, 2 insertions(+), 0 deletions(-)
diff --git a/include/drm/drm_sarea.h b/include/drm/drm_sarea.h
index ee5389d..1d1a858
Signed-off-by: Huacai Chen
Signed-off-by: Hongliang Tao
Signed-off-by: Hua Yan
---
arch/mips/configs/loongson3_defconfig | 283 +
1 files changed, 283 insertions(+), 0 deletions(-)
create mode 100644 arch/mips/configs/loongson3_defconfig
diff --git a/arch
Signed-off-by: Huacai Chen
Signed-off-by: Hongliang Tao
Signed-off-by: Hua Yan
---
arch/mips/include/asm/mach-loongson/mc146818rtc.h |4
1 files changed, 4 insertions(+), 0 deletions(-)
diff --git a/arch/mips/include/asm/mach-loongson/mc146818rtc.h
b/arch/mips/include/asm/mach
except 2E/2F series.
Signed-off-by: Huacai Chen
Signed-off-by: Hongliang Tao
Signed-off-by: Hua Yan
---
arch/mips/include/asm/mach-loongson/boot_param.h | 151 ++
arch/mips/include/asm/mach-loongson/loongson.h |4 +-
arch/mips/loongson/common/env.c
Loongson family machines use Hyper-Transport bus for inter-core
connection and device connection. The PCI bus is a subordinate
linked at HT1.
With UEFI-like firmware interface, We don't need fixup for PCI irq
routing.
Signed-off-by: Huacai Chen
Signed-off-by: Hongliang Tao
Signed-off-by
ion
registers of HT1 controller.
Signed-off-by: Huacai Chen
Signed-off-by: Hongliang Tao
Signed-off-by: Hua Yan
---
arch/mips/include/asm/mach-loongson/irq.h | 24 +++
arch/mips/include/asm/mach-loongson/loongson.h |9 +++
arch/mips/loongson/Makefile|6 ++
thus
disable_nonboot_cpus() hangs. Therefore, we make this patch to avoid
poweroff failure.
Signed-off-by: Huacai Chen
Signed-off-by: Hongliang Tao
Signed-off-by: Hua Yan
Cc: sta...@vger.kernel.org
---
arch/mips/kernel/process.c |4 +---
1 files changed, 1 insertions(+), 3 deletions(-)
diff --git a
KSEG1 (both uncached and
unmmaped).
2, The default clocksource of Loongson is MIPS. Since clock source is a
global device, timekeeping need the CP0' Count registers of each core
be synchronous. Thus, when a core is up, we use a SMP_ASK_C0COUNT IPI
to ask Core-0's Count.
Signed
Add four Loongson-3 based machine types:
MACH_LEMOTE_A1004/MACH_LEMOTE_A1201 are laptops;
MACH_LEMOTE_A1101 is mini-itx;
MACH_LEMOTE_A1205 is all-in-one machine.
The most significant differrent between A1004/A1201 and A1101/A1205 is
the laptops have EC but others don't.
Signed-off-by: H
this patch we make changes to avoid boot failure.
Signed-off-by: Huacai Chen
Signed-off-by: Hongliang Tao
Signed-off-by: Hua Yan
---
arch/mips/loongson/common/init.c |5 +
arch/mips/loongson/common/setup.c |8 +-
arch/mips/loongson/loongson-3/Makefile |2 +
arch
Lemote A1004(Laptop) and A1205(All-In-One) use Conexant's hda codec,
this patch modify patch_conexant.c to add Lemote specific code.
Signed-off-by: Jie Chen
Signed-off-by: Huacai Chen
Signed-off-by: Hongliang Tao
Signed-off-by: Hua Yan
Cc: alsa-de...@alsa-project.org
---
include/
ngson-3A(including so-called Loongson-2Gq), they are
64-bit multi-core MIPS CPUs.
Signed-off-by: Huacai Chen
Signed-off-by: Hongliang Tao
Signed-off-by: Hua Yan
---
arch/mips/include/asm/addrspace.h|6 ++
arch/mips/include/asm/cpu.h |6 --
Sorry, this is sent by mistake, please ignore it.
On Mon, Aug 13, 2012 at 10:04 AM, Huacai Chen wrote:
> Loongson-3 is a multi-core MIPS family CPU, it support MIPS64R2
> fully. Loongson-3 has the same IMP field (0x6300) as Loongson-2.
>
> Loongson-3 has a hardware-maintained c
thus
disable_nonboot_cpus() hangs. Therefore, we make this patch to avoid
poweroff failure.
Signed-off-by: Huacai Chen
Signed-off-by: Hongliang Tao
Signed-off-by: Hua Yan
Cc: Yong Zhang
Cc: sta...@vger.kernel.org
---
arch/mips/kernel/process.c |4 +---
1 files changed, 1 insertions(+), 3 deletions(-)
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