Mark
v2 -> v3
- Renamed the remaining ttyS into ttyMV: reported by Greg KH
- Fixed the order of the compatible in the example of the binding
documentation: pointed by Rob
- Fix a typo in Kconfig entry: pointed by Thomas Petazzoni
Gregory CLEMENT (9):
irqchip: armada-370-xp: do not enable it
This patch enables the configuration for the Armada 3700 family and for
the related driver it uses.
Signed-off-by: Gregory CLEMENT
Reviewed-by: Thomas Petazzoni
---
arch/arm64/configs/defconfig | 5 +
1 file changed, 5 insertions(+)
diff --git a/arch/arm64/configs/defconfig b/arch/arm64
From: Thomas Petazzoni
Instead of building the irq-armada-370-xp driver directly when
CONFIG_ARCH_MVEBU is enabled, this commit introduces an intermediate
CONFIG_ARMADA_370_XP_IRQ hidden Kconfig option.
This allows this option to select other interrupt-related Kconfig
options (which will be need
Now that we support Armada 37xx, let's add this family of SoC to the
Marvell documentation, and a reference to a link with more details about
those processors. As for Armda 39x, no datasheet is publicly
available at this time.
Signed-off-by: Gregory CLEMENT
---
Documentation/arm/Marvell/R
Extend the mvebu entry to ARM64 device tree sources.
Signed-off-by: Gregory CLEMENT
Reviewed-by: Thomas Petazzoni
---
MAINTAINERS | 1 +
1 file changed, 1 insertion(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 30aca4aa5467..ad49b62c5abc 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -1279,6
The Marvell Armada 3700 is a family of ARMv8 CA53 SoCs. This commit
introduces the Device Tree binding that documents the top-level
compatible strings for Armada 3700 based platforms.
Signed-off-by: Gregory CLEMENT
---
.../devicetree/bindings/arm/marvell/armada-37xx.txt | 16
Add initial dtsi files to support Marvell Armada 3700 SoC with Cortex-A53
CPUs. There are two members in this family: the Armada 3710 (Single CPU)
and the Armada 3720 (Dual CPUs).
It also adds a dts file for the Marvell Armada 3720 DB board.
Signed-off-by: Gregory CLEMENT
---
arch/arm64/boot
The AHCI interfaces used in the Armada 3700 has a few differences with
the one used in the Armada 38x, so it deserves its own compatible string.
Signed-off-by: Gregory CLEMENT
Reviewed-by: Thomas Petazzoni
Acked-by: Rob Herring
---
Documentation/devicetree/bindings/ata/ahci-platform.txt | 1
Over the last releases we have added more and more Marvell related binding
directly in the arm directory. It's time to have our proper directory
inside it, and move all the files in it.
Signed-off-by: Gregory CLEMENT
Reviewed-by: Thomas Petazzoni
Acked-by: Rob Herring
---
.../devic
: Gregory CLEMENT
---
drivers/ata/ahci_mvebu.c | 14 +-
1 file changed, 9 insertions(+), 5 deletions(-)
diff --git a/drivers/ata/ahci_mvebu.c b/drivers/ata/ahci_mvebu.c
index f7a7fa81740e..de7128d81e9c 100644
--- a/drivers/ata/ahci_mvebu.c
+++ b/drivers/ata/ahci_mvebu.c
@@ -112,12 +112,15
by default when ARCH_MEVBU is selected is no more needed.
This patch removes this dependency, thanks to this, a kernel for ARM64
mvebu SoC can be built without error due this driver.
Signed-off-by: Gregory CLEMENT
---
drivers/irqchip/Kconfig | 1 -
1 file changed, 1 deletion(-)
diff --git a/drive
The Armada 3700 is an mvebu ARM64 SoC using one or two Cortex-A53 cores
depending of the variant.
Signed-off-by: Gregory CLEMENT
Reviewed-by: Thomas Petazzoni
---
arch/arm64/Kconfig.platforms | 6 ++
1 file changed, 6 insertions(+)
diff --git a/arch/arm64/Kconfig.platforms b/arch/arm64
rate]
Signed-off-by: Wilson Ding
Signed-off-by: Nadav Haklai
Signed-off-by: Gregory CLEMENT
Acked-by: Rob Herring
---
.../devicetree/bindings/tty/serial/mvebu-uart.txt | 13 +
Documentation/kernel-parameters.txt| 6 +
drivers/tty/serial/Kconfig | 22 +
MTD_M25P80=y
> CONFIG_MTD_NAND=y
> CONFIG_MTD_NAND_PXA3xx=y
> CONFIG_MTD_SPI_NOR=y
> +CONFIG_SRAM=y
> CONFIG_EEPROM_AT24=y
> CONFIG_BLK_DEV_SD=y
> CONFIG_ATA=y
> --
> 1.8.3.1
>
--
Gregory Clement, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com
buffer
pointer ring residing in DRAM.
Pools - ports mapping, bm-bppi entry in 'soc' node's ranges and optional
parameters are supposed to be set in board files.
Signed-off-by: Marcin Wojtas
Signed-off-by: Gregory CLEMENT
---
arch/arm/boot/dts/armada-38x.dtsi | 18 +++
ry.clem...@free-electrons.com: add suppport for the ClearFog board]
Signed-off-by: Marcin Wojtas
Signed-off-by: Gregory CLEMENT
---
arch/arm/boot/dts/armada-385-db-ap.dts | 20 +++-
arch/arm/boot/dts/armada-388-clearfog.dts | 6 ++
arch/arm/boot/dts/armada
better if
you merge it in the same time as the 3 other ones.
Thanks,
Gregory
Gregory CLEMENT (2):
net: add a hardware buffer management helper API
net: mvneta: Use the new hwbm framework
Marcin Wojtas (6):
ARM: dts: armada-38x: add buffer manager nodes
ARM: dts: armada-38x: enable buffer
orts
This commit enables hardware buffer management operation cooperating with
existing mvneta driver. New device tree binding documentation is added and
the one of mvneta is updated accordingly.
[gregory.clem...@free-electrons.com: removed the suspend/resume part]
Signed-off-by: Marcin Wojtas
Now that the hardware buffer management framework had been introduced,
let's use it.
Signed-off-by: Gregory CLEMENT
---
drivers/net/ethernet/marvell/Kconfig | 1 +
drivers/net/ethernet/marvell/mvneta.c| 45 +++---
drivers/net/ethernet/marvell/mvneta_bm.c
This basic implementation allows to share code between driver using
hardware buffer management. As the code is hardware agnostic, there is
few helpers, most of the optimization brought by the an HW BM has to be
done at driver level.
Signed-off-by: Gregory CLEMENT
---
include/net/hwbm.h | 21
d
PnC configuration.
[gregory.clem...@free-electrons.com: Fix size test for
mvebu_mbus_get_dram_win_info]
Signed-off-by: Marcin Wojtas
[DRAM window information reference in LKv3.10]
Signed-off-by: Evan Wang
Signed-off-by: Gregory CLEMENT
---
drivers/bus/mvebu-mbus.c
buffer
pointer ring residing in DRAM.
Pools - ports mapping, bm-bppi entry in 'soc' node's ranges and optional
parameters are supposed to be set in board files.
Signed-off-by: Marcin Wojtas
Signed-off-by: Gregory CLEMENT
---
arch/arm/boot/dts/armada-xp.dtsi | 18 +++
, each port is
supposed to use single pool for all kind of packets.
Moreover appropriate entry is added to 'soc' node ranges, as well as "okay"
status for 'bm' and 'bm-bppi' (internal SRAM) nodes.
Signed-off-by: Marcin Wojtas
Signed-off-by: Gregory CLEMENT
Hi David,
On jeu., janv. 14 2016, David Laight wrote:
> From: Gregory CLEMENT
>> Sent: 12 January 2016 19:11
>> Signed-off-by: Gregory CLEMENT
>> ---
>> drivers/bus/mvebu-mbus.c | 2 +-
>> 1 file changed, 1 insertion(+), 1 deletion(-)
>>
>> di
hy in probe and then invoke
> platform_set_drvdata by passing *usb_cluster_phy. Then you can invoke
> platform_get_drvdata here to get *usb_cluster_phy.
>
> While fixing this also add yourself as Maintainer of this file.
I am taking into account your comment and I am going to send
Use PTR_ERR_OR_ZERO rather than if(IS_ERR(...)) + PTR_ERR
Generated by: coccinelle/api/ptr_ret.cocci
Signed-off-by: Gregory CLEMENT
---
drivers/phy/phy-berlin-sata.c | 5 +
drivers/phy/phy-hix5hd2-sata.c | 5 +
drivers/phy/phy-miphy365x.c| 5 +
drivers/phy/phy-stih41x-usb.c
On Armada 375, the USB cluster allows to control the cluster composed
of the USB2 and USB3 host controllers.
Acked-by: Kishon Vijay Abraham I
Signed-off-by: Gregory CLEMENT
---
arch/arm/boot/dts/armada-375.dtsi | 6 ++
1 file changed, 6 insertions(+)
diff --git a/arch/arm/boot/dts/armada
: Gregory CLEMENT
Signed-off-by: Thomas Petazzoni
---
drivers/phy/Kconfig | 6 ++
drivers/phy/Makefile | 1 +
drivers/phy/phy-armada375-usb2.c | 158 +++
include/dt-bindings/phy/phy.h| 1 +
4 files changed, 166 insertions
Add MAINTAINERS add entry for the Armada 375 USB cluster PHY driver.
Signed-off-by: Gregory CLEMENT
---
MAINTAINERS | 6 ++
1 file changed, 6 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index ea4d0058fd1b..ea35fa243502 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -1571,6 +1571,12
Armada 375 comes with an USB2 host and device controller and an USB3
controller. The USB cluster control register allows to manage common
features of both USB controllers. This commit adds the Device Tree
binding documentation for this piece of hardware.
Signed-off-by: Gregory CLEMENT
_get".
Andrew Lunn (1):
Phy: DT binding documentation for Marvell MVEBU SATA phy.
Gregory CLEMENT (6):
phy: Use PTR_ERR_OR_ZERO to fix warning raised by coccinelle
Phy: DT binding documentation for the Armada 375 USB cluster binding
phy: add support for USB cluster on the Armada 375 So
Now that the USB cluster node has been added, use it as a PHY provider
for the USB controller linked to it: the first EHCI and the xHCI.
Signed-off-by: Gregory CLEMENT
---
arch/arm/boot/dts/armada-375.dtsi | 5 +
1 file changed, 5 insertions(+)
diff --git a/arch/arm/boot/dts/armada-375
From: Andrew Lunn
Describe the binding for the Marvell MVEBU SATA phy. This driver
can be used at least with Kirkwood, Dove and maybe others.
Additionally, update the SATA binding with the properties to link
to the phy nodes.
Signed-off-by: Andrew Lunn
---
Documentation/devicetree/bindings/ata
Hi Jason,
On 30/10/2014 12:39, Gregory CLEMENT wrote:
> Hi,
>
> This patch set is the second version of the series adding the hot plug
> and also kexec support for the Armada 38x Socs.
>
> If nobody object we could push them in linux-next.
>
> The first patch was done i
//www.gossamer-threads.com/lists/linux/kernel/2044969
>>
>> Thanks
>> Kishon
>>> +
>>> +#endif /* __DT_BINDINGS_CLOCK_R8A7791_H__ */
>>>
> --
> To unsubscribe from this list: send the line "unsubscribe devicetree" in
> the body of a
Now that the USB cluster node has been added, use it as a PHY provider
for the USB controller linked to it: the first EHCI and the xHCI.
Signed-off-by: Gregory CLEMENT
---
arch/arm/boot/dts/armada-375.dtsi | 5 +
1 file changed, 5 insertions(+)
diff --git a/arch/arm/boot/dts/armada-375
: Gregory CLEMENT
Signed-off-by: Thomas Petazzoni
---
drivers/phy/Kconfig | 6 ++
drivers/phy/Makefile | 1 +
drivers/phy/phy-armada375-usb2.c | 145 +++
include/dt-bindings/phy/phy.h| 1 +
4 files changed, 153 insertions
Use PTR_ERR_OR_ZERO rather than if(IS_ERR(...)) + PTR_ERR
Generated by: coccinelle/api/ptr_ret.cocci
Signed-off-by: Gregory CLEMENT
---
drivers/phy/phy-berlin-sata.c | 5 +
drivers/phy/phy-hix5hd2-sata.c | 5 +
drivers/phy/phy-miphy365x.c| 5 +
drivers/phy/phy-stih41x-usb.c
On Armada 375, the USB cluster allows to control the cluster composed
of the USB2 and USB3 host controllers.
Acked-by: Kishon Vijay Abraham I
Signed-off-by: Gregory CLEMENT
---
arch/arm/boot/dts/armada-375.dtsi | 6 ++
1 file changed, 6 insertions(+)
diff --git a/arch/arm/boot/dts/armada
TA phy from Andrew Lunn
- Move the DT binding documentation of the Armada 375 USB cluster into
the phy-mvebu.txt file.
- Made the armada375_usb_phy_xlate more robust" if there is a phy_put
and then a phy_get".
Andrew Lunn (1):
Phy: DT binding documentation for Marvell MVEBU SA
Armada 375 comes with an USB2 host and device controller and an USB3
controller. The USB cluster control register allows to manage common
features of both USB controllers. This commit adds the Device Tree
binding documentation for this piece of hardware.
Signed-off-by: Gregory CLEMENT
From: Andrew Lunn
Describe the binding for the Marvell MVEBU SATA phy. This driver
can be used at least with Kirkwood, Dove and maybe others.
Additionally, update the SATA binding with the properties to link
to the phy nodes.
Signed-off-by: Andrew Lunn
---
Documentation/devicetree/bindings/ata
Hi Jason,
On 22/11/2014 03:08, Jason Cooper wrote:
> On Thu, Nov 13, 2014 at 12:47:48PM +0100, Gregory CLEMENT wrote:
>> Now that the USB cluster node has been added, use it as a PHY provider
>> for the USB controller linked to it: the first EHCI and the xHCI.
>>
>> Sig
};
>>>> +
>>>> +sata_r_power: regulator@2 {
>>>> +compatible = "regulator-fixed";
>>>> +reg = <2>;
>>>> +regulator-name = "SATA-R Power";
>>>> +regu
da 38x and Armada 39x SoCs the limitation is 50MHz and
for the Armada 375 it is tclk/15.
This patch introduces new compatible strings to handle all these
case. In order to be future proof a compatible was created for each
SoC even if currently some SoCs seem using the same IP.
Signed-off-by: Grego
m of 50MHz and tclk/4.
A proper solution is adding a compatible string for each SoC, but it
can't be done as a fix for compatibility reason (we can't modify
device tree that have been already released) and it will be part of a
separate patch.
Signed-off-by: Gregory CLEMENT
Reported-by: K
Use the new compatible introduced in rder to beneficiate of a wider
and more accurate range of baud rates to be used.
Signed-off-by: Gregory CLEMENT
---
arch/arm/boot/dts/armada-370-xp.dtsi | 2 --
arch/arm/boot/dts/armada-370.dtsi| 4
arch/arm/boot/dts/armada-375.dtsi| 6
I bus. The other ones allow using the best
maximum frequency available.
Thanks,
Gregory
Gregory CLEMENT (3):
spi: orion: Fix maximum baud rates for Armada 370/XP
spi: orion: Fix extended baud rates for each Armada SoCs
ARM: mvebu: use improved armada spi device tree compatible name for
0?
yes it is! :/
Mark do you want a new patch or do you prefer fixing the typo
yourself ? it should be
- "marvell,armada-390-spi", for the Armada 39x SoCs
instead of
- "marvell,armada-390-spi", for the Armada 38x SoCs
s/38x/39x/ on this line.
Thanks,
Gregory
Hi Mark,
On 26/05/2015 12:36, Mark Brown wrote:
> On Tue, May 26, 2015 at 11:44:42AM +0200, Gregory CLEMENT wrote:
>
>> Signed-off-by: Gregory CLEMENT
>> Reported-by: Kostya Porotchkin
>> Cc: #Fixes df59fa7f4bca
>
> Applied, but please format this stuff in a st
interfaces)
Signed-off-by: Nadav Haklai
Reviewed-by: Omri Itach
Signed-off-by: Gregory CLEMENT
Cc:
---
drivers/ata/ahci_mvebu.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/ata/ahci_mvebu.c b/drivers/ata/ahci_mvebu.c
index 23716dd8a7ec..5928d0746a27 100644
--- a/drivers
utility that speaks to weltrend mcu on ttyS1)
> It was working on 3.18.6, on 3.19 and up - it writes data to the port
> (and mcu acks it),
> but can't read any responses.
>
> Same thing happens to the python (pyserial inside) implementation of the
> fan-daemon:
> ht
418 insertions(+), 42 deletions(-)
> delete mode 100644 arch/arm/boot/dts/dove-cm-a510.dts
> create mode 100644 arch/arm/boot/dts/dove-cm-a510.dtsi
> create mode 100644 arch/arm/boot/dts/dove-sbc-a510.dts
>
> ---
> Cc: Jason Cooper
> Cc: Andrew Lunn
> Cc: Gregory
igned-off-by: Sebastian Hesselbarth
> ---
> Cc: Mike Turquette
> Cc: Stephen Boyd
> Cc: Jean-Francois Moine
> Cc: Michael Welling
> Cc: Russell King
> Cc: Jason Cooper
> Cc: Andrew Lunn
> Cc: Gregory Clement
> Cc: linux-...@vger.kernel.org
> Cc: linux-arm-
Hi Sebastian,
On 06/05/2015 15:13, Arnd Bergmann wrote:
> On Wednesday 06 May 2015 15:06:29 Gregory CLEMENT wrote:
>>
>> On 04/05/2015 22:08, Sebastian Hesselbarth wrote:
>>> This is v2 of the patch set to improve current mainline support for
>>> the Compulab C
Hi Mike, Sebastian,
On 08/05/2015 21:00, Michael Turquette wrote:
> Quoting Gregory CLEMENT (2015-05-06 06:14:22)
>> Hi Sebastian,
>>
>> On 04/05/2015 23:04, Sebastian Hesselbarth wrote:
>>> Si5351 clock generator on CuBox uses XTAL as clock reference, name the
or the driver patch is merged in mainline first is not important.
Thanks,
Gregory
>
> Thanks,
> Tyler
> --
> To unsubscribe from this list: send the line "unsubscribe devicetree" in
> the body of a message to majord...@vger.kernel.org
> More majordomo info at htt
; + .temp_mask = 0x1ff,
> + .coef_b = 315300UL,
> + .coef_m = 1000UL,
> + .coef_div = 13825,
> +};
> +
> static const struct armada_thermal_data armada370_data = {
> .is_valid = armada_is_valid,
> .init_sensor = armada370_init_sensor,
> @@ -236,6 +245,10 @@ stat
Hi Ezequiel,
On 25/02/2015 19:17, Ezequiel Garcia wrote:
> On 02/25/2015 02:04 PM, Gregory CLEMENT wrote:
>>>
>>> My conclusions about these registers are based on experimental data. The
>>> documentation is very sparse, but the Thermal Manager Control and Stat
Hi Joe,
On 08/03/2015 20:15, Joe Perches wrote:
> commit c6a95dbee793 ("MAINTAINERS: add the RTC driver for the Armada38x")
> typoed the pattern, fix it.
Indeed it was a typo that I though I had fixed, but maybe I didn't actually
send the patch.
So of course:
Acke
data);
> tty->disc_data = NULL;
> }
>
> @@ -1911,7 +1910,7 @@ static int n_tty_open(struct tty_struct *tty)
> struct n_tty_data *ldata;
>
> /* Currently a malloc failure here can panic */
> -ldata = vmalloc(sizeof(*ldata));
> +ldata = kmalloc(s
On 11/03/2015 16:01, Stas Sergeev wrote:
> 11.03.2015 16:14, Russell King - ARM Linux пишет:
>> On Wed, Mar 11, 2015 at 01:44:57PM +0100, Gregory CLEMENT wrote:
>>> Hi Stas,
>>>
>>> On 10/03/2015 17:54, Stas Sergeev wrote:
>>>> Hello, the patch be
;
>> Caused by commit a9e58557e99 ("ARM: Kirkwood: add DT description for
>> nas2big").
>> Yes, that file doesn't exist.
>
> Hi,
>
> This should be fixed quickly. I sent a patch this morning:
> http://www.spinics.net/lists/arm-kernel/msg404676.
current code, it seems that the specific work for standby is
done at machine level, how could you also doing it at device level?
Thanks,
Gregory
>
> Regards,
>
--
Gregory Clement, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and sup
h/arm/boot/dts/qcom-apq8074-dragonboard.dtb
>
>
> The values of the /chosen/dtb-info/ properties are also available in
> /proc/device-tree/chosen/dtb-info/
> --
> To unsubscribe from this list: send the line "unsubscribe devicetree" in
> the body of a message to majord...@vge
orted from 3.10 and added more
explanations(from Shimmer) in the commit log]
Signed-off-by: Guang Shen
Signed-off-by: Shimmer Huang
Signed-off-by: Nadav Haklai
Reviewed-by: Yehuda Yitschak
Signed-off-by: Gregory CLEMENT
Cc:
---
Hi,
usually I tried to add a kernel version for the stable tea
+ marvell,nand-enable-arbiter;
> + nand-on-flash-bbt;
> + };
> +
> usb3@f {
> status = "okay";
> usb-phy = <&usb3_phy>;
>
--
select ARM_GIC
> select ARMADA_375_CLK
> select HAVE_ARM_SCU
> @@ -52,7 +51,6 @@ config MACH_ARMADA_375
> config MACH_ARMADA_38X
> bool "Marvell Armada 380/385 boards" if ARCH_MULTI_V7
> select ARM_ERRATA_720789
> - select ARM_ERRATA_753970
&
devres gets
> to call ahci_platform_put_resources().
>
> Mixing managed and non-managed resources this way doesn't work, so I had
> to apply the attached patch to fix this.
>
> Tejun, preferably the attached patch should be squashed into commit
> c7d7ddee7e24 ("ata:
Hi Sebastian,
On 17/02/2015 19:52, Sebastian Hesselbarth wrote:
> We want to enforce the use of named flags in GPIO and interrupt
> specifiers, include the corresponding headers to Dove's SoC dtsi.
>
> Signed-off-by: Sebastian Hesselbarth
Acked-by: Gregory CLEMENT
Hi Sebastian,
On 17/02/2015 19:52, Sebastian Hesselbarth wrote:
> Fix Dove's register addresses of uart2 and uart3 nodes that seem to
> be broken since ages due to a copy-and-paste error.
>
> Signed-off-by: Sebastian Hesselbarth
Acked-by: Gregory CLEMENT
> ---
> Ple
Hi Sebastian,
On 17/02/2015 19:52, Sebastian Hesselbarth wrote:
> Add pcie[01] node labels to allow to reference them easily from
> board level.
>
> Signed-off-by: Sebastian Hesselbarth
Acked-by: Gregory CLEMENT
Thanks,
Gregory
> ---
> Cc: Jason Cooper
> Cc: Andre
board level.
>
> Signed-off-by: Sebastian Hesselbarth
Acked-by: Gregory CLEMENT
Thanks,
Gregory
> ---
> Cc: Jason Cooper
> Cc: Andrew Lunn
> Cc: Gregory Clement
> Cc: Gabriel Dobato
> Cc: linux-arm-ker...@lists.infradead.org
> Cc: linux-kernel@vger.kernel.org
&g
ault.
>
> Signed-off-by: Sebastian Hesselbarth
Acked-by: Gregory CLEMENT
Thanks,
Gregory
> ---
> Wolfram,
>
> Actually, I was hoping that default pin hog mechanism
> (pinctrl-names = "default") could also be used from i2c mux nodes
> and devices. Anyway, I h
create mode 100644 arch/arm/boot/dts/dove-cm-a510.dtsi
> create mode 100644 arch/arm/boot/dts/dove-sbc-a510.dts
>
> ---
> Cc: Jason Cooper
> Cc: Andrew Lunn
> Cc: Gregory Clement
> Cc: Gabriel Dobato
> Cc: Wolfram Sang
> Cc: Stephen Warren
> Cc: linux-...@vger.kern
l go through arm-soc.
Yes, now that you took the driver part, I will apply it on mvebu and then push
it
to arm-soc.
Thanks,
Gregory
>
> Brian
>
--
Gregory Clement, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http:/
Hi Jisheng,
On mer., mars 09 2016, Jisheng Zhang wrote:
> Dear Gregory,
>
> On Tue, 8 Mar 2016 13:57:04 +0100 Gregory CLEMENT wrote:
>
>> In the previous patch, the spinlock was not initialized. While it didn't
>> cause any trouble yet it could be a problem to use
d
PnC configuration.
[gregory.clem...@free-electrons.com: Fix size test for
mvebu_mbus_get_dram_win_info]
Signed-off-by: Marcin Wojtas
[DRAM window information reference in LKv3.10]
Signed-off-by: Evan Wang
Signed-off-by: Gregory CLEMENT
---
drivers/bus/mvebu-mbus.c
buffer
pointer ring residing in DRAM.
Pools - ports mapping, bm-bppi entry in 'soc' node's ranges and optional
parameters are supposed to be set in board files.
Signed-off-by: Marcin Wojtas
Signed-off-by: Gregory CLEMENT
---
arch/arm/boot/dts/armada-38x.dtsi | 19
This basic implementation allows to share code between driver using
hardware buffer management. As the code is hardware agnostic, there is
few helpers, most of the optimization brought by the an HW BM has to be
done at driver level.
Signed-off-by: Gregory CLEMENT
---
include/net/hwbm.h | 28
ry.clem...@free-electrons.com: add suppport for the ClearFog board]
Signed-off-by: Marcin Wojtas
Signed-off-by: Gregory CLEMENT
Acked-by: Russell King
---
arch/arm/boot/dts/armada-385-db-ap.dts | 20 +++-
arch/arm/boot/dts/armada-388-clearfog.dts | 6
orts
This commit enables hardware buffer management operation cooperating with
existing mvneta driver. New device tree binding documentation is added and
the one of mvneta is updated accordingly.
[gregory.clem...@free-electrons.com: removed the suspend/resume part]
Signed-off-by: Marcin Wojtas
, each port is
supposed to use single pool for all kind of packets.
Moreover appropriate entry is added to 'soc' node ranges, as well as "okay"
status for 'bm' and 'bm-bppi' (internal SRAM) nodes.
Signed-off-by: Marcin Wojtas
Signed-off-by: Gregory CLEMENT
Allow Openblock AX3 using hardware buffer management with mvneta.
Signed-off-by: Gregory CLEMENT
---
arch/arm/boot/dts/armada-xp-openblocks-ax3-4.dts | 19 ++-
1 file changed, 18 insertions(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/armada-xp-openblocks-ax3-4.dts
b/arch
buffer
pointer ring residing in DRAM.
Pools - ports mapping, bm-bppi entry in 'soc' node's ranges and optional
parameters are supposed to be set in board files.
Signed-off-by: Marcin Wojtas
Signed-off-by: Gregory CLEMENT
---
arch/arm/boot/dts/armada-xp.dtsi | 19
uot;
- Removed the patch "ARM: mvebu: enable SRAM support in
mvebu_v7_defconfig" of this series and already applied it
- Modified the order of the patches.
In order to ease the test the branch mvneta-BM-framework-v5 is
available at g...@github.com:MISL-EBU-System-SW/mainline-publ
Now that the hardware buffer management framework had been introduced,
let's use it.
Signed-off-by: Gregory CLEMENT
---
drivers/net/ethernet/marvell/Kconfig | 1 +
drivers/net/ethernet/marvell/mvneta.c| 18 +++--
drivers/net/ethernet/marvell/mvneta_bm.c
From: Marcin Wojtas
Some SRAM users may require non-bufferable access to the memory, which is
impossible, because devm_ioremap_wc() is used for setting sram->virt_base.
This commit adds optional flag 'no-memory-wc', which allow to choose remap
method, using DT property. Documentation is updated
800
> - MBUS_ID(0x09, 0x09) 0 0 0xf810 0x1
> - MBUS_ID(0x09, 0x05) 0 0 0xf811 0x1
> + MBUS_ID(0x01, 0x2f) 0 0 0xe800 0x800
> + MBUS_ID(0x09, 0x09) 0 0 0xf110 0x1
> - MBUS_ID(0x09, 0x05) 0 0 0xf111 0x1>;
> ++ MBUS_ID(0x09, 0x05) 0 0 0xf111 0x1
> + MBUS_ID(0x0c, 0x04) 0 0 0xd120 0x10>;
>
> devbus-bootcs {
> status = "okay";
--
Gregory Clement, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com
Hi Geert,
On ven., mars 18 2016, Geert Uytterhoeven wrote:
> Enabling support for the UART on Marvell EBU SoCs only make sense when
> compiling for Marvell EBU SoCs, unless compile-testing.
>
> Signed-off-by: Geert Uytterhoeven
Acked-by: Gregory CLEMENT
Thanks,
Gregory
>
Hi Andreas,
On ven., mars 25 2016, Gregory CLEMENT
wrote:
> Hi Andreas,
>
> On jeu., mars 24 2016, Andreas Färber wrote:
>
>> Hi Gregory,
>>
>> Am 24.03.2016 um 17:11 schrieb Gregory CLEMENT:
>>>> +/*
>>>> + * Exported on
t;>
>>> Signed-off-by: Bert Vermeulen
>>
>> Reviewed-by: Andrew Lunn
>
> Reviewed-by: Imre Kaloz
Applied on mvebu/dt with the reviewed-by flags and a fix on the comment
block style.
Thanks,
Gregory
>
>
> Thanks,
>
> Imre
--
Gregory Clement, Fr
Hi Arnd,
On mar., mars 29 2016, Arnd Bergmann wrote:
> On Tuesday 29 March 2016 18:04:47 Gregory CLEMENT wrote:
>>
>> What is the status of this patch?
>>
>> Do you plan to send a second version with the title fixed as suggested
>> by Joe Perches?
>>
25.dtb \
> kirkwood-openblocks_a6.dtb \
> kirkwood-openblocks_a7.dtb \
> --
> 2.1.4
>
>
> ___
> linux-arm-kernel mailing list
> linux-arm-ker...@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-ker
dtb \
> kirkwood-ds209.dtb \
> kirkwood-ds210.dtb \
> kirkwood-ds212.dtb \
> --
> 2.1.4
>
>
> ___
> linux-arm-kernel mailing list
> linux-arm-ker...@lists.infradead.org
> http://lists.infradead.org/mai
config
> +++ b/drivers/net/ethernet/marvell/Kconfig
> @@ -42,7 +42,7 @@ config MVMDIO
>
> config MVNETA_BM_ENABLE
> tristate "Marvell Armada 38x/XP network interface BM support"
> - depends on MVNETA
> + depends on MVNETA && !64BIT
> ---help---
> This driver supports auxiliary block of the network
> interface units in the Marvell ARMADA XP and ARMADA 38x SoC
> --
> 2.8.0.rc3
>
--
Gregory Clement, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com
From: Marcin Wojtas
Armada 3700 SoC comprise one dual-channel XOR engine and this
patch adds its according representation.
Signed-off-by: Marcin Wojtas
Signed-off-by: Gregory CLEMENT
---
arch/arm64/boot/dts/marvell/armada-37xx.dtsi | 13 +
1 file changed, 13 insertions(+)
diff
, and then depending to the type the engine setup will be
selected.
Signed-off-by: Gregory CLEMENT
---
drivers/dma/mv_xor.c | 40
drivers/dma/mv_xor.h | 1 +
2 files changed, 29 insertions(+), 12 deletions(-)
diff --git a/drivers/dma/mv_xor.c b/drivers
the different
family have been added.
Once the dmaengine part will be approved, I will apply the dts part
in the mvebu/dt64 tree.
Thanks,
Gregory
Gregory CLEMENT (3):
dmaengine: mv_xor: make the code 64 bits compliant
dmaengine: mv_xor: use SoC type instead of directly the operation mode
Fix two warnings which appear when building for 64 bits target.
Signed-off-by: Gregory CLEMENT
---
drivers/dma/mv_xor.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/dma/mv_xor.c b/drivers/dma/mv_xor.c
index 3922a5d56806..a6ec82776cbc 100644
--- a/drivers/dma
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