From: Andrew Lunn
Describe the binding for the Marvell MVEBU SATA phy. This driver
can be used at least with Kirkwood, Dove and maybe others.
Additionally, update the SATA binding with the properties to link
to the phy nodes.
Signed-off-by: Andrew Lunn
---
Documentation/devicetree/bindings/ata
Now that the USB cluster node has been added, use it as a PHY provider
for the USB controller linked to it: the first EHCI and the xHCI.
Signed-off-by: Gregory CLEMENT
---
arch/arm/boot/dts/armada-375.dtsi | 5 +
1 file changed, 5 insertions(+)
diff --git a/arch/arm/boot/dts/armada-375
On Armada 375, the USB cluster allows to control the cluster composed
of the USB2 and USB3 host controllers.
Signed-off-by: Gregory CLEMENT
---
arch/arm/boot/dts/armada-375.dtsi | 6 ++
1 file changed, 6 insertions(+)
diff --git a/arch/arm/boot/dts/armada-375.dtsi
b/arch/arm/boot/dts
Use PTR_ERR_OR_ZERO rather than if(IS_ERR(...)) + PTR_ERR
Generated by: coccinelle/api/ptr_ret.cocci
Signed-off-by: Gregory CLEMENT
---
drivers/phy/phy-berlin-sata.c | 5 +
drivers/phy/phy-hix5hd2-sata.c | 5 +
drivers/phy/phy-miphy365x.c| 5 +
drivers/phy/phy-stih41x-usb.c
: Gregory CLEMENT
Signed-off-by: Thomas Petazzoni
---
drivers/phy/Kconfig | 6 +
drivers/phy/Makefile | 1 +
drivers/phy/phy-armada375-usb2.c | 145 +++
include/dt-bindings/phy/armada-375-usb
Armada 375 comes with an USB2 host and device controller and an USB3
controller. The USB cluster control register allows to manage common
features of both USB controllers. This commit adds the Device Tree
binding documentation for this piece of hardware.
Signed-off-by: Gregory CLEMENT
ndrew Lunn (1):
Phy: DT binding documentation for Marvell MVEBU SATA phy.
Gregory CLEMENT (5):
phy: Use PTR_ERR_OR_ZERO to fix warning raised by coccinelle
Phy: DT binding documentation for the Armada 375 USB cluster binding
phy: add support for USB cluster on the Armada 375 SoC
ARM: mveb
Hi Jason,
On 01/11/2014 23:46, Jason Cooper wrote:
> Gregory,
>
> On Fri, Oct 24, 2014 at 05:24:08PM +0200, Gregory CLEMENT wrote:
>> Hello,
>>
>> this is the second version of a series I initially submitted in May:
>> https://lkml.org/lkml/2014/5/16/743
>&
/irq-armada-370-xp.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
Reviewed-by: Gregory CLEMENT
Thanks,
Gregory
--
Gregory Clement, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com
--
To unsubscr
ssigned to a still running CPU. Therefore, right
> before entering suspend, all interrupts are assigned to the boot CPU.
So what about /proc/irq/*/smp_affinity ?
Do this files still represent accurate information?
Thanks,
Gregory
--
Gregory Clement, Free Electrons
Kernel, drivers, real-ti
n't need to restore any other timer than the timer 0, but it
would worth mentioning that we save and restore only this one
by naming the variable timer0_ctrl_reg and timer0_local_ctrl_reg
Besides this and the typo:
Acked-by: Gregory CLEMENT
Thanks,
Gregory
--
Gregory Clement, Free
rnel.org
> ---
> drivers/clk/mvebu/common.c | 30 ++++++++++++--
> 1 file changed, 28 insertions(+), 2 deletions(-)
>
Acked-by: Gregory CLEMENT
Thanks,
Gregory
--
Gregory Clement, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting
return 0;
> }
> @@ -318,7 +317,7 @@ static int armada_370_xp_mpic_irq_map(struct irq_domain
> *h,
> irq_set_chip_and_handler(virq, &armada_370_xp_irq_chip,
> handle_level_irq);
> }
> - set_irq_flags(virq, IRQF_VAL
ce this driver has been merged.
Now that the driver has been merged do you plan submitting the DT support
soon?
Thanks,
Gregory
--
Gregory Clement, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com
--
To unsubs
Hi,
On 30/06/2015 19:18, Gregory CLEMENT wrote:
> Hi,
>
> Until now only few mvebu v7 based board supported suspend to ram. This
> suspend to ram mode was unusual because it involved shutting down the
> SoC and relied on a PIC to wake up the system.
>
> However, most of
Hi,
On 03/07/2015 13:55, Gregory CLEMENT wrote:
> On the Armada 375/38x/39x SoCs, in standby mode the SoCs stay powered
> and it is possible to wake-up from any interrupt sources. This patch
> adds flag to the GIC irqchip driver to let linux know this.
>
> Signed-off-by: Greg
Hi Sudeep,
On 27/07/2015 13:02, Sudeep Holla wrote:
> Hi Thomas/Gregory,
>
> On 01/07/15 16:54, Thomas Petazzoni wrote:
>> Dear Gregory CLEMENT,
>>
>> On Tue, 30 Jun 2015 19:18:59 +0200, Gregory CLEMENT wrote:
>>
>>> static void __in
gic_set_irqchip_flags")
>>
>> from the tip tree.
>>
>> I have applied the following merge fix patch for today:
>>
>
> Thanks for the fix, I was aware of this and asked Thomas Petazzoni
> and Gregory CLEMENT to revert the commit e6f134f8e30e if possi
Fix two warnings which appear when building for 64 bits target.
Signed-off-by: Gregory CLEMENT
---
drivers/dma/mv_xor.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/dma/mv_xor.c b/drivers/dma/mv_xor.c
index 3922a5d56806..a6ec82776cbc 100644
--- a/drivers/dma
o DRAM by opening default window to 4GB
space with specific attribute.
Signed-off-by: Marcin Wojtas
Signed-off-by: Gregory CLEMENT
Acked-by: Rob Herring
---
Documentation/devicetree/bindings/dma/mv-xor.txt | 5 ++-
drivers/dma/mv_xor.c | 56
Add COMPILE_TEST dependency
v1 ->v2:
- Fix typo in commit log of patch 3
- Reformatting to 1 compatible string per line in
Documentation/devicetree/bindings/dma/mv-xor.txt
- Added Acked-by from Rob in patch 3
Gregory CLEMENT (3):
dmaengine: mv_xor: make the code 64 bits compliant
dmaengine:
, and then depending to the type the engine setup will be
selected.
Signed-off-by: Gregory CLEMENT
---
drivers/dma/mv_xor.c | 40
drivers/dma/mv_xor.h | 1 +
2 files changed, 29 insertions(+), 12 deletions(-)
diff --git a/drivers/dma/mv_xor.c b/drivers
From: Marcin Wojtas
Armada 3700 SoC comprise one dual-channel XOR engine and this
patch adds its according representation.
Signed-off-by: Marcin Wojtas
Signed-off-by: Gregory CLEMENT
---
arch/arm64/boot/dts/marvell/armada-37xx.dtsi | 13 +
1 file changed, 13 insertions(+)
diff
_TEST dependency allowing a wider
test coverage.
Signed-off-by: Gregory CLEMENT
---
drivers/dma/Kconfig | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/dma/Kconfig b/drivers/dma/Kconfig
index d96d87c56f2e..67b37ce94143 100644
--- a/drivers/dma/Kconfig
+++ b/drivers/dma/Kc
When hwbm_pool_add exited in error the spinlock was not released. This
patch fixes this issue.
Fixes: 8cb2d8bf57e6 ("net: add a hardware buffer management helper API")
Reported-by: Jean-Jacques Hiblot
Cc:
Signed-off-by: Gregory CLEMENT
---
net/core/hwbm.c | 3 +++
1 file changed, 3
[]
(kernel_init_freeable+0x15c/0x1fc)
[] (kernel_init_freeable) from [] (kernel_init+0x8/0x114)
[] (kernel_init) from [] (ret_from_fork+0x14/0x24)
Fixes: baa11ebc0c76 ("net: mvneta: Use the new hwbm framework")
Reported-by: Russell King
Cc:
Signed-off-by: Gregory CLEMENT
---
drivers/ne
Hi,
these two patches fix spinlock related issues introduced in v4.6. They
have been reported by Russell King and Jean-Jacques Hiblot.
Thanks to them,
Gregory
Gregory CLEMENT (2):
net: mvneta: Fix lacking spinlock initialization
net: hwbm: Fix unbalanced spinlock in error case
drivers
_IS_ROOT,
> -get_tclk());
> + tclk = clk_register_fixed_rate(NULL, "tclk", NULL, 0, get_tclk());
>
> orion_clkdev_init(tclk);
> }
> --
> The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
> a Linux Fou
ed_rate(NULL, "tclk", NULL, 0, orion5x_tclk);
>
> orion_clkdev_init(tclk);
> }
> --
> The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
> a Linux Foundation Collaborative Project
>
--
Gregory Clement, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com
OCK_GATING_BIT_USB1);
> --
> The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
> a Linux Foundation Collaborative Project
>
--
Gregory Clement, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com
gt; Fixes: 019ded3aa7c9 ("net: mvneta: bm: clarify dependencies")
It looks ok for me.
Acked-by: Gregory CLEMENT
Thanks,
Gregory
> ---
> drivers/net/ethernet/marvell/Kconfig | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/net/ethernet/mar
.
Signed-off-by: Gregory CLEMENT
---
drivers/net/ethernet/marvell/mvneta.c | 150 ++
1 file changed, 115 insertions(+), 35 deletions(-)
diff --git a/drivers/net/ethernet/marvell/mvneta.c
b/drivers/net/ethernet/marvell/mvneta.c
index 1c7751917d58..8974ab084839 100644
ecause the mapping is
static.
Thanks,
Gregory
Gregory CLEMENT (4):
net: mvneta: Make the default queue related for each port
net: mvneta: Associate RX queues with each CPU
net: mvneta: Add naive RSS support
net: mvneta: Spread out the TX queues management on all CPUs
drivers/net/ethern
Instead of using the same default queue for all the port. Move it in the
port struct. It will allow have a different default queue for each port.
Signed-off-by: Gregory CLEMENT
---
drivers/net/ethernet/marvell/mvneta.c | 33 ++---
1 file changed, 18 insertions(+), 15
!), whereas with this patch it was around
0.7ms (and sometime it went to 1.2ms).
Suggested-by: Arnd Bergmann
Signed-off-by: Gregory CLEMENT
---
drivers/net/ethernet/marvell/mvneta.c | 48 ++-
1 file changed, 36 insertions(+), 12 deletions(-)
diff --git a/drivers/net
This patch adds the support for the RSS related ethtool
function. Currently it only uses one entry in the indirection table which
allows associating an mvneta interface to a given CPU.
Signed-off-by: Gregory CLEMENT
Tested-by: Marcin Wojtas
---
drivers/net/ethernet/marvell/mvneta.c | 127
Hi Felipe,
I am going back on this subject (again :) )
On mar., oct. 20 2015, Gregory CLEMENT
wrote:
> Hi Felipe,
>
> On lun., oct. 05 2015, Felipe Balbi wrote:
>
>
>>> So after many tests on different devices, 200ms is enough for most of
>>> them, bu
on5x/{include/mach => }/bridge-regs.h (92%)
> delete mode 100644 arch/arm/mach-orion5x/include/mach/entry-macro.S
> delete mode 100644 arch/arm/mach-orion5x/include/mach/hardware.h
> delete mode 100644 arch/arm/mach-orion5x/include/mach/uncompress.h
> rename arch/arm/mach-orion5x/{i
ernel creating a PHY device.
The patch introduces a new optional property "reset-gpios" at PHY level.
Signed-off-by: Gregory CLEMENT
---
Hi,
I agree with Sasha to start with a good binding and indeed the reset
is more related to the PHY than to the MAC even if currently we have
to manip
Hi Richard,
On mer., déc. 16 2015, Richard Cochran wrote:
> On Wed, Dec 16, 2015 at 07:31:30PM +0100, Gregory CLEMENT wrote:
>> +Optional properties for PHY child node:
>> +- reset-gpios : Should specify the gpio for phy reset
>
> reset-gpios plural or reset-gpio singula
Hi Arnd,
On mer., déc. 16 2015, Arnd Bergmann wrote:
> On Wednesday 16 December 2015 19:31:30 Gregory CLEMENT wrote:
>> diff --git a/drivers/net/ethernet/cadence/macb.c
>> b/drivers/net/ethernet/cadence/macb.c
>> index 88c1e1a..35661aa 100644
>> --- a/drivers/
: Gregory CLEMENT
---
Documentation/devicetree/bindings/net/macb.txt | 8 ++--
drivers/net/ethernet/cadence/macb.c| 15 ---
2 files changed, 18 insertions(+), 5 deletions(-)
diff --git a/Documentation/devicetree/bindings/net/macb.txt
b/Documentation/devicetree
proper device tree
bindinsg too:
http://marc.info/?l=linux-netdev&m=145034590619620&w=2
Thanks,
Gregory
>
> Fixes: 5833e0526820 ("net/macb: add support for resetting PHY using GPIO")
> Cc: Gregory CLEMENT
> Signed-off-by: Sudip Mukherjee
> ---
>
> b
reg = <0x7 0x4000>;
> interrupts-extended = <&mpic 8>;
> clocks = <&gateclk 4>;
> + tx-csum-limit = <9800>;
> status = "disabled";
>
name arch/arm/mach-orion5x/{include/mach => }/bridge-regs.h (92%)
> delete mode 100644 arch/arm/mach-orion5x/include/mach/entry-macro.S
> delete mode 100644 arch/arm/mach-orion5x/include/mach/hardware.h
> delete mode 100644 arch/arm/mach-orion5x/include/mach/uncompress.h
> ren
on as
>> the whole flash is already represented by the NAND device itself.
>>
>> Signed-off-by: Sebastian Hesselbarth
>
> Given Benoit comment
>
> Acked-by: Andrew Lunn
Applied on mvebu/dt
Thanks,
Gregory
>
> Andrew
--
Gregory Clement, Free E
e partitions node.
>
> Signed-off-by: Sebastian Hesselbarth
Applied on mvebu/dt
Thanks,
Gregory
> ---
> Cc: Jason Cooper
> Cc: Andrew Lunn
> Cc: Gregory Clement
> Cc: Rob Herring
> Cc: Pawel Moll
> Cc: Mark Rutland
> Cc: Ian Campbell
> Cc: Kumar Ga
;> offset and make some upper-case hex numbers lower-case.
>>
>> Signed-off-by: Sebastian Hesselbarth
>
> Acked-by: Andrew Lunn
Applied on mvebu/dt
Thanks,
Gregory
>
> Andrew
>
>> ---
>> Cc: Jason Cooper
>> Cc: Andrew Lunn
>> Cc
least it does not derive minimum ECC settings from it.
>
> I'll have to have a closer look at barebox' ONFI parsing capabilites
> and can live with this patch not applied even though it does no harm.
So for now, I don't apply it.
Thanks,
Gregory
--
Gregory Clement,
er?:)
If I got other review, then I can fix it in the next version. But if you
have a look on the otehr commet not all of them start by capital letter.
Thanks,
Greogry
>
> Best regards,
> Marcin
--
Gregory Clement, Free Electrons
Kernel, drivers, real-time and embedded Linux
develo
bm.h | 171 ++
> include/linux/mbus.h | 3 +
> 17 files changed, 1677 insertions(+), 64 deletions(-)
> create mode 100644 Documentation/devicetree/bindings/net/marvell-neta-bm.txt
> create mode 100644 drivers/net/ethernet/marvell/mvneta_bm.c
a] Attached SCSI disk
[1.909334] rtc-mv f1010300.rtc: setting system clock to 2001-01-20 07:57:42
UTC (979977462)
[1.918901] ALSA device list:
[1.921878] No soundcards found.
[2.222505] ata2: SATA link down (SStatus 0 SControl F300)
[2.230484] Freeing unused kernel memory
Hi David,
On mer., déc. 02 2015, David Miller wrote:
> From: Marcin Wojtas
> Date: Mon, 30 Nov 2015 13:27:40 +0100
>
>> I'm sending v4 with corrected commit log of the last patch, in order
>> to avoid possible conflicts between the branches as suggested by
>
Marcin
>
> 2015-12-01 22:40 GMT+01:00 Marcin Wojtas :
>> Hi Gregory,
>>
>> Thanks for the log. I think it may be an overall problem with 4GB size
>> representation in mvebu_mbus_dram_info structure? Maybe whole DRAM
>> space is associated to CS0, and the 4
Hi Andrew,
On mar., déc. 01 2015, Andrew Lunn wrote:
> On Mon, Nov 30, 2015 at 02:37:31PM +0100, Gregory CLEMENT wrote:
>> Hi Arnd,
>>
>> On mer., nov. 25 2015, Arnd Bergmann wrote:
>>
>> > I've posted these before and now gotten around to a re
for-next branch. Will git managed to automagically resolve the
conflict by getting the resolution you will do in your branch?
A another solution could be to have a separate patch for the
arch/arm/Kconfig file that you keep in arm-soc.
Grégory
--
Gregory Clement, Free Electrons
Kernel, drivers, real
Hi,
On mer., déc. 02 2015, Gregory CLEMENT
wrote:
>>
>> So far the issue may have been not noticed, because in every IO driver
>> using mvebu_mbus_dram_info for configuring MBUS windows, there's
>> following substraction:
>> (cs->size - 1) & 0xff
o the BM. However I did not
>> manage to use an ethernet interface. The udhcpc never managed to get an
>> IP and if I set the IP manually I could not ping.
>>
>> But on Armada 388 GP I didn't have any issue.
>>
>> Do you have some idea about waht I could check
Hi David,
On mer., déc. 02 2015, David Miller wrote:
> From: Gregory CLEMENT
> Date: Wed, 02 Dec 2015 09:16:06 +0100
>
>> Hi David,
>>
>> On mer., déc. 02 2015, David Miller wrote:
>>
>>> From: Marcin Wojtas
>>> Date: Mon, 30 N
n:sys";
>> +gpios = <&gpio0 28 GPIO_ACTIVE_HIGH>;
>> +};
>> +orange-sys {
>> +label = "nsa325:orange:sys";
>> +gpios = <&gpio0 29 GPIO_ACTIVE_HIGH>;
>> +};
>>
; is the new standard binding.
>>
>> This patch replaces the legacy "isil,irq2-can-wakeup-machine" with the
>> unified "wakeup-source" property in order to avoid any futher copy-paste
>> duplication.
>>
>> Cc: Jason Cooper
>> Cc: Andrew
Instead of using the same default queue for all the port. Move it in the
port struct. It will allow have a different default queue for each port.
Signed-off-by: Gregory CLEMENT
---
drivers/net/ethernet/marvell/mvneta.c | 33 ++---
1 file changed, 18 insertions(+), 15
The last patch introduces a first level of RSS support through the
ethtool functions. As explained in the introduction there is only one
entry in the RSS lookup table which permits at the end to associate an
mvneta port to a CPU through the RX queues because the mapping is
static.
Thanks,
Gregory
This patch add the support for the RSS related ethtool
function. Currently it only use one entry in the indirection table which
allows associating an mveneta interface to a given CPU.
Signed-off-by: Gregory CLEMENT
---
drivers/net/ethernet/marvell/mvneta.c | 125
.
Signed-off-by: Gregory CLEMENT
---
drivers/net/ethernet/marvell/mvneta.c | 150 ++
1 file changed, 115 insertions(+), 35 deletions(-)
diff --git a/drivers/net/ethernet/marvell/mvneta.c
b/drivers/net/ethernet/marvell/mvneta.c
index 1c7751917d58..8974ab084839 100644
Hi Thomas,
On mer., nov. 25 2015, Thomas Petazzoni
wrote:
> Gregory,
>
> On Wed, 25 Nov 2015 15:54:03 +0100, Gregory CLEMENT wrote:
>
>> pp->rxq_def = rxq_def;
>>
>> +pp->indir[0] = rxq_def;
>
> So now we have the RX queue in both pp-&g
ame
with a bug fix on the gpio driver used by this platform:
http://marc.info/?l=linux-arm-kernel&m=140639461108781&w=2
While he seemed interseted to use a mainline kernel we don't have any
news for one year:
http://marc.info/?l=linux-arm-kernel&m=141391779222342&w=2
G
of that the register contents were inherited from the bootloader.
It looks OK for me and at least after applying the driver continues
working :)
I guess you find it when you tested suspend to ram.
Reviewed-by: Gregory CLEMENT
Thanks,
Gregory
>
> Signed-off-by: Marcin Wojtas
> Cc: # v
Hi Marcin,
On dim., nov. 22 2015, Marcin Wojtas wrote:
> MVNETA_RXQ_HW_BUF_ALLOC bit which controls enabling hardware buffer
> allocation was mistakenly set as BIT(1). This commit fixes the
> assignment.
I confirm it from the datasheet I got:
Reviewed-by: Gregory CLEMENT
Thanks,
LEEP */
> +
> static const struct of_device_id mvneta_match[] = {
> { .compatible = "marvell,armada-370-neta" },
> { .compatible = "marvell,armada-xp-neta" },
> @@ -3452,6 +3518,10 @@ MODULE_DEVICE_TABLE(of, mvneta_match);
> static struct platform_driver
Hi Felipe,
On lun., déc. 07 2015, Felipe Balbi wrote:
> Hi,
>
> Gregory CLEMENT writes:
>> Hi Felipe,
>>
>> I am going back on this subject (again :) )
>>
>> On mar., oct. 20 2015, Gregory CLEMENT
>> wrote:
>>
>>> Hi F
.
Signed-off-by: Gregory CLEMENT
---
drivers/net/ethernet/marvell/mvneta.c | 150 ++
1 file changed, 115 insertions(+), 35 deletions(-)
diff --git a/drivers/net/ethernet/marvell/mvneta.c
b/drivers/net/ethernet/marvell/mvneta.c
index 1c7751917d58..8974ab084839 100644
,
Gregory
Gregory CLEMENT (4):
net: mvneta: Make the default queue related for each port
net: mvneta: Associate RX queues with each CPU
net: mvneta: Add naive RSS support
net: mvneta: Configure XPS support
drivers/net/ethernet/marvell/mvneta.c | 328 +-
1 fi
With this patch each CPU is associated with its own set of TX queues.
It also setup the XPS with an initial configuration which set the
affinity matching the hardware configuration.
Suggested-by: Arnd Bergmann
Signed-off-by: Gregory CLEMENT
---
drivers/net/ethernet/marvell/mvneta.c | 56
This patch adds the support for the RSS related ethtool
function. Currently it only uses one entry in the indirection table which
allows associating an mvneta interface to a given CPU.
Signed-off-by: Gregory CLEMENT
Tested-by: Marcin Wojtas
---
drivers/net/ethernet/marvell/mvneta.c | 127
Instead of using the same default queue for all the port. Move it in the
port struct. It will allow have a different default queue for each port.
Signed-off-by: Gregory CLEMENT
---
drivers/net/ethernet/marvell/mvneta.c | 33 ++---
1 file changed, 18 insertions(+), 15
ned-off-by: Gregory CLEMENT
---
Documentation/devicetree/bindings/net/macb.txt | 3 +++
drivers/net/ethernet/cadence/macb.c| 26 ++
drivers/net/ethernet/cadence/macb.h| 1 +
3 files changed, 30 insertions(+)
diff --git a/Documentation/devicetree/bi
ng it, avoiding a kernel crash.
Fixes: 4efb2f694114 ("usb: host: xhci-plat: add struct xhci_plat_priv")
Cc: sta...@vger.kernel.org
Signed-off-by: Gregory CLEMENT
---
drivers/usb/host/xhci-plat.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/usb/host/xhci-p
Hi Jisheng,
On mar., févr. 16 2016, Jisheng Zhang wrote:
> Dear Gregory,
> On Mon, 8 Feb 2016 18:14:17 +0100 Gregory CLEMENT wrote:
>
>> Add initial dtsi files to support Marvell Armada 3700 SoC with Cortex-A53
>> CPUs. There are two members in this family: the Armada 371
Hi Jisheng,
On mar., févr. 16 2016, Jisheng Zhang wrote:
> Dear Gregory,
>
> On Mon, 8 Feb 2016 18:14:13 +0100 Gregory CLEMENT wrote:
>
>> The Armada 3700 is an mvebu ARM64 SoC using one or two Cortex-A53 cores
>> depending of the variant.
>>
>> Signed-off
emoved marvell,armada3700 from the device tree binding and directly
used marvell,armada3710 for common feature: pointed by Rob
- Fix memory node with coorect size in armada-3720-db.dts: suggested
by Mark
Gregory CLEMENT (9):
irqchip: armada-370-xp: do not enable it by default when ARCH_MVEBU
Now that we support Armada 37xx, let's add this family of SoC to the
Marvell documentation, and a reference to a link with more details about
those processors. As for Armda 39x, no datasheet is publicly
available at this time.
Signed-off-by: Gregory CLEMENT
---
Documentation/arm/Marvell/R
Over the last releases we have added more and more Marvell related binding
directly in the arm directory. It's time to have our proper directory
inside it, and move all the files in it.
Signed-off-by: Gregory CLEMENT
Reviewed-by: Thomas Petazzoni
Acked-by: Rob Herring
---
.../devic
Add initial dtsi files to support Marvell Armada 3700 SoC with Cortex-A53
CPUs. There are two members in this family: the Armada 3710 (Single CPU)
and the Armada 3720 (Dual CPUs).
It also adds a dts file for the Marvell Armada 3720 DB board.
Signed-off-by: Gregory CLEMENT
---
arch/arm64/boot
This patch enables the configuration for the Armada 3700 family and for
the related driver it uses.
Signed-off-by: Gregory CLEMENT
Reviewed-by: Thomas Petazzoni
---
arch/arm64/configs/defconfig | 5 +
1 file changed, 5 insertions(+)
diff --git a/arch/arm64/configs/defconfig b/arch/arm64
Extend the mvebu entry to ARM64 device tree sources.
Signed-off-by: Gregory CLEMENT
Reviewed-by: Thomas Petazzoni
---
MAINTAINERS | 1 +
1 file changed, 1 insertion(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 30aca4aa5467..ad49b62c5abc 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -1279,6
From: Thomas Petazzoni
Instead of building the irq-armada-370-xp driver directly when
CONFIG_ARCH_MVEBU is enabled, this commit introduces an intermediate
CONFIG_ARMADA_370_XP_IRQ hidden Kconfig option.
This allows this option to select other interrupt-related Kconfig
options (which will be need
The Marvell Armada 3700 is a family of ARMv8 CA53 SoCs. This commit
introduces the Device Tree binding that documents the top-level
compatible strings for Armada 3700 based platforms.
Signed-off-by: Gregory CLEMENT
Acked-by: Rob Herring
---
.../devicetree/bindings/arm/marvell/armada-37xx.txt
The Armada 3700 is an mvebu ARM64 SoC using one or two Cortex-A53 cores
depending of the variant.
Signed-off-by: Gregory CLEMENT
Reviewed-by: Thomas Petazzoni
---
arch/arm64/Kconfig.platforms | 6 ++
1 file changed, 6 insertions(+)
diff --git a/arch/arm64/Kconfig.platforms b/arch/arm64
The AHCI interfaces used in the Armada 3700 has a few differences with
the one used in the Armada 38x, so it deserves its own compatible string.
Signed-off-by: Gregory CLEMENT
Reviewed-by: Thomas Petazzoni
Acked-by: Rob Herring
---
Documentation/devicetree/bindings/ata/ahci-platform.txt | 1
: Gregory CLEMENT
---
drivers/ata/ahci_mvebu.c | 14 +-
1 file changed, 9 insertions(+), 5 deletions(-)
diff --git a/drivers/ata/ahci_mvebu.c b/drivers/ata/ahci_mvebu.c
index f7a7fa81740e..de7128d81e9c 100644
--- a/drivers/ata/ahci_mvebu.c
+++ b/drivers/ata/ahci_mvebu.c
@@ -112,12 +112,15
rate]
Signed-off-by: Wilson Ding
Signed-off-by: Nadav Haklai
Signed-off-by: Gregory CLEMENT
Acked-by: Rob Herring
---
.../devicetree/bindings/tty/serial/mvebu-uart.txt | 13 +
Documentation/kernel-parameters.txt| 6 +
drivers/tty/serial/Kconfig | 22 +
by default when ARCH_MEVBU is selected is no more needed.
This patch removes this dependency, thanks to this, a kernel for ARM64
mvebu SoC can be built without error due this driver.
Signed-off-by: Gregory CLEMENT
---
drivers/irqchip/Kconfig | 1 -
1 file changed, 1 deletion(-)
diff --git a/drive
Hi Arnd,
On mar., févr. 16 2016, Arnd Bergmann wrote:
> On Tuesday 16 February 2016 19:14:50 Gregory CLEMENT wrote:
>> This series introduce the support of the Armada 3700 family: it is the
>> first ARM64 SoC of the mvebu family submitted to the mainline!
>>
>&
dency, as the new ARM64 platforms are going
> to need this driver anyway.
Actually the mvebu ARM64 platform we know about (Armada 3700, 7K and
8K), won't use the same controller. A7K/A8K will use a synopsis IP and
Armada 3700 a new Marvell IP.
So for me depending on ARM32 is enough.
Gr
Hi Willy,
On mer., févr. 17 2016, Willy Tarreau wrote:
> Hi Gregory,
>
> On Tue, Feb 16, 2016 at 04:33:35PM +0100, Gregory CLEMENT wrote:
>> Hello,
>>
>> A few weeks ago I sent a proposal for a API set for HW Buffer
>> management, to have a better view o
Hi Greg and Jiri
On mar., févr. 16 2016, Gregory CLEMENT
wrote:
> From: Wilson Ding
>
> Armada-3700's uart is a simple serial port, which doesn't
> support. Configuring the modem control lines. The uart port has a 32
> bytes Tx FIFO and a 64 bytes Rx FIFO
>
>
Hi Tejun and Hans,
On mar., févr. 16 2016, Gregory CLEMENT
wrote:
> From: Lior Amsalem
>
> The main difference in the new Armada 3700 is that no address
> decoding needs to take place in the driver probe.
>
> [gregory.clem...@free-electrons.com: reformulate the commit log]
ude "kirkwood-synology.dtsi"
>>
>> / {
>> -model = "Synology DS111";
>> +model = "Synology DS112";
>> compatible = "synology,ds111", "marvell,kirkwood";
>>
>> memory {
>> --
>> 2.1.4
>>
--
Gregory Clement, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com
r < 0)
> panic("Cannot get 'bootrom' node address");
>
> --
> 1.9.1
>
--
Gregory Clement, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com
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