Enabling the SCU standby is now done in smp_scu.c. We don't need
anymore to manipulate the SCU register outside of this file.
Signed-off-by: Gregory CLEMENT
---
arch/arm/mach-imx/platsmp.c | 7 +--
1 file changed, 1 insertion(+), 6 deletions(-)
diff --git a/arch/arm/mach-imx/platsm
instead of
implementing SCU specific feature at board level]
Signed-off-by: Nadav Haklai
Signed-off-by: Gregory CLEMENT
---
arch/arm/mach-mvebu/board-v7.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/mach-mvebu/board-v7.c b/arch/arm/mach-mvebu/board-v7.c
index 8bb742fdf5ca
ck is turned on when any processor leaves WFI mode,
or if there is a new request on the ACP."
This feature is currently used by imx6 SoC. This patch add this
operation inside smp_scu in order to centralized all the access to SCU
in the same place.
Signed-off-by: Gregory CLEMENT
---
arch/arm/i
The first bit of the SCU control register is actually the enable
it. So let's name it instead of using literal constant.
Signed-off-by: Gregory CLEMENT
---
arch/arm/kernel/smp_scu.c | 10 ++
1 file changed, 6 insertions(+), 4 deletions(-)
diff --git a/arch/arm/kernel/smp_scu.c b
On 27/06/2014 00:43, Gregory CLEMENT wrote:
> The first bit of the SCU control register is actually the enable
> it. So let's name it instead of using literal constant.
>
> Signed-off-by: Gregory CLEMENT
> ---
> arch/arm/kernel/smp_scu.c | 10 ++
> 1 file c
On 27/06/2014 00:56, Rob Herring wrote:
> On Thu, Jun 26, 2014 at 5:43 PM, Gregory CLEMENT
> wrote:
>> Hello,
>>
>> Following the feedback I go on the patch "ARM: mvebu: Enable SCU
>> Speculative linefills to L2 for Armada 375/38x" :
>> http://thread
s
> argument?
OK using a flag argument makes sens indeed. About setting it unconditionally,
I would prefer not taking the risk to break the other platforms.
Thanks,
Gregory
--
Gregory Clement, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
For the armada 38x SoCs which come with an xhci controller, specific
initialization must be done during probe, especially in relation with
the MBus windows initialization. This patch adds this support.
Signed-off-by: Gregory CLEMENT
---
drivers/usb/host/Kconfig | 7 +++
drivers/usb/host
The Marvell Armada 38x platform needs the xhci_mvebu driver enabled
for the xHCI USB hosts, so this commit enables the corresponding
Kconfig option in multi_v7_defconfig.
Signed-off-by: Gregory CLEMENT
---
arch/arm/configs/multi_v7_defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a
This patch add the selection of the config symbol to build the USB3
support for Armada 38x.
Signed-off-by: Gregory CLEMENT
---
arch/arm/mach-mvebu/Kconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/mach-mvebu/Kconfig b/arch/arm/mach-mvebu/Kconfig
index 3f73eecbcfb0
The Marvell Armada 38x platform needs the xhci_mvebu driver enabled
for the xHCI USB hosts, so this commit enables the corresponding
Kconfig option in mvebu_v7_defconfig.
Signed-off-by: Gregory CLEMENT
---
arch/arm/configs/mvebu_v7_defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a
The Marvell Armada 38x SoCs contain two xHCI host. This commit adds
the Device Tree description of those interfaces at the SoC level, and
also enables the two USB3 ports on the Armada 385 DB platform and one
USB3 port on the Armada 385 RD platforms.
Signed-off-by: Gregory CLEMENT
---
arch/arm
.
The rest of the series is more platform specific and should go through
the mvebu tree, except the last patch that should be taken directly by
the arm-soc maintainer.
The support for Armada 375 is coming soon.
Thanks,
Gregory
Gregory CLEMENT (8):
usb: host: xhci-plat: Allow to register glue code
Extend the compatible string list with xhci-armada-380. It is used to
describe xhci controller which is in the Armada 38x SoCs.
Signed-off-by: Gregory CLEMENT
---
Documentation/devicetree/bindings/usb/usb-xhci.txt | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a
The usb3-utmi registers allow to configure the internal USB PHY of the
Armada 380/385 SoCs. A small initialization is needed to be able to use
the USB3 ports.
Signed-off-by: Gregory CLEMENT
---
arch/arm/mach-mvebu/Makefile | 2 +-
arch/arm/mach-mvebu/usb-utmi.c | 64
string can then be associated to an instance of this
structure. In the non device tree case a default structure is used.
Signed-off-by: Gregory CLEMENT
---
drivers/usb/host/xhci-plat.c | 72 +---
drivers/usb/host/xhci.h | 4 +++
2 files changed, 72
Hi Sebastian,
[...]
>> @@ -0,0 +1,21 @@
>> +/*
>> + * Copyright (C) 2014 Marvell
>> + *
>> + * Gregory Clement
>> + *
>> + * This file is licensed under the terms of the GNU General Public
>> + * License version 2. This program is licensed
Hi Sebastian,
On 18/04/2014 13:23, Sebastian Hesselbarth wrote:
> On 04/18/2014 12:22 PM, Gregory CLEMENT wrote:
>> The Marvell Armada 38x SoCs contain two xHCI host. This commit adds
>> the Device Tree description of those interfaces at the SoC level, and
>> also enables the
Hi Sebastian,
On 18/04/2014 13:19, Sebastian Hesselbarth wrote:
> On 04/18/2014 12:22 PM, Gregory CLEMENT wrote:
>> The usb3-utmi registers allow to configure the internal USB PHY of the
>> Armada 380/385 SoCs. A small initialization is needed to be able to use
>> the USB3 po
using the
A0 version.
We have 3 options now:
- remove the check on the openblock AX3 board and always try to apply the
quirck for A0 version
- add a check for this new board in the mvebu_dt_init function
- let the compatible string marvell,mv78230-a0-i2c in this dts
I would prefer the option
al or the virtual address.
This patch add a check of the MMU bit to choose the accurate address,
then the calling function doesn't have to pass this information.
Signed-off-by: Gregory CLEMENT
---
arch/arm/mach-mvebu/coherency.c| 6 +++---
arch/arm/mach-mvebu/coherency
In order to have well encapsulated code, we use notifier callbacks for
CPU_PM_ENTER and CPU_PM_EXIT inside the mvebu power management code.
Signed-off-by: Gregory CLEMENT
---
arch/arm/mach-mvebu/pmsu.c | 18 ++
1 file changed, 18 insertions(+)
diff --git a/arch/arm/mach-mvebu
ranch of Thursday September 12
Gregory CLEMENT (11):
ARM: PJ4B: Add cpu_suspend/cpu_resume hooks for PJ4B
ARM: mvebu: remove the address parameter for ll_set_cpu_coherent
ARM: mvebu: ll_set_cpu_coherent always uses the current CPU
ARM: mvebu: Remove the unused argument of set_cpu_coherent()
sed on the work of Nadav Haklai.
Signed-off-by: Nadav Haklai
Signed-off-by: Gregory CLEMENT
---
drivers/cpuidle/Kconfig.arm | 5 ++
drivers/cpuidle/Makefile| 1 +
drivers/cpuidle/cpuidle-armada-370-xp.c | 93 +
3 files changed, 99
The cpuidle is a platform driver so we register the device just after
the initialization of the board in an arch_initcall.
Signed-off-by: Gregory CLEMENT
---
arch/arm/mach-mvebu/pmsu.c | 37 +
1 file changed, 37 insertions(+)
diff --git a/arch/arm/mach-mvebu
used by
the exposed functions (ll_add_cpu_to_smp_group and
ll_enable_coherency)
Signed-off-by: Gregory CLEMENT
---
arch/arm/mach-mvebu/coherency.c| 8 ++--
arch/arm/mach-mvebu/coherency_ll.S | 92 +-
arch/arm/mach-mvebu/headsmp.S | 6 ++-
3 files
The cpu idle support will need to access to Power Management Service
Unit. This commit adds the architecture related functions that will be
used in the idle path of the cpuidle driver.
Signed-off-by: Gregory CLEMENT
---
arch/arm/mach-mvebu/pmsu.c | 132
When going to deep idle we need to disable the SoC snooping (aka
hardware coherency support). Playing with the coherency fabric
requires to use assembly code to be sure that the compiler doesn't
reorder the instructions nor do wrong optimization.
Signed-off-by: Gregory CLEMENT
---
arch/arm
set_cpu_coherent() took the SMP group ID as parameter. But this
parameter was never used, and the CPU always uses the SMP group 0. So
we can remove this parameter.
Signed-off-by: Gregory CLEMENT
---
arch/arm/mach-mvebu/coherency.c | 4 ++--
arch/arm/mach-mvebu/coherency.h | 2 +-
arch/arm/mach
This commit adds a function which adjusts the PMSU configuration to
automatically power down the L2 and coherency fabric when we enter a
certain idle state.
This feature is part of the Power Management Service Unit of the
Armada 370 and Armada XP SoCs.
Signed-off-by: Gregory CLEMENT
---
arch
PJ4B needs extra instructions for suspend and resume, so instead of
using the armv7 version, this commit introduces specific versions for
PJ4B.
Cc: Russell King
Signed-off-by: Gregory CLEMENT
---
arch/arm/mm/proc-v7.S | 28 +---
1 file changed, 25 insertions(+), 3
ll_set_cpu_coherent is always used on the current CPU, so instead of
passing the CPU id as argument, ll_set_cpu_coherent() can find it by
itself.
Signed-off-by: Gregory CLEMENT
Acked-by: Thomas Petazzoni
---
arch/arm/mach-mvebu/coherency.c| 10 +-
arch/arm/mach-mvebu/coherency.h
On 19/05/2014 13:09, Paul Bolle wrote:
> On Fri, 2014-05-16 at 15:07 -0400, Jason Cooper wrote:
>> On Thu, May 15, 2014 at 12:17:35PM +0200, Gregory CLEMENT wrote:
>>> This patch adds the selection of the config symbol needed to build the
>>> USB3 support for Armada
is fix seems to be the good thing to do.
Thanks,
Gregory
>
>
> ___
> linux-arm-kernel mailing list
> linux-arm-ker...@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
>
--
Gregory Clement, Free Electrons
Kernel, drivers, real-tim
Hi Kishon,
On 23/05/2014 11:24, Kishon Vijay Abraham I wrote:
> Hi,
>
> On Friday 16 May 2014 09:52 PM, Gregory CLEMENT wrote:
>> Armada 375 comes with an USB2 host and device controller and an USB3
>> controller. The USB cluster control register allows to manage common
&g
et/lists/devicetree/msg17011.html into your tree.
>>>
>>> I can resend that one missing patch if you want.
>>
>> yes please. But it's already too late to go in the next merge window.
>
> Gregory, could you pick it up and append your 375 binding to i
On 23/05/2014 11:28, Kishon Vijay Abraham I wrote:
> Hi,
>
> On Friday 16 May 2014 09:52 PM, Gregory CLEMENT wrote:
>> This commit extends the xhci-plat so that it can optionally be passed
>> a reference to a PHY through the Device Tree. It will be useful for
>> the Ar
On 23/05/2014 11:20, Kishon Vijay Abraham I wrote:
> Hi,
>
> On Friday 16 May 2014 09:52 PM, Gregory CLEMENT wrote:
>> The Armada 375 SoC comes with an USB2 host and device controller and
>> an USB3 controller. The USB cluster control register allows to manage
>>
Sorting the headers in alphabetic order will help to reduce the conflict
when adding new headers later.
Signed-off-by: Gregory CLEMENT
Acked-by: Felipe Balbi
---
drivers/usb/host/xhci-plat.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/usb/host/xhci-plat.c
Extend the compatible string list with armada-380-xhci. It is used to
describe xhci controller which is in the Armada 38x SoCs.
Signed-off-by: Gregory CLEMENT
---
Documentation/devicetree/bindings/usb/usb-xhci.txt | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a
The Marvell Armada 375 SoCs contain a xHCI host. This commit adds the
Device Tree description of this interfaces at the SoC level, and also
enables the USB3 port on the Armada 375 DB platform.
Signed-off-by: Gregory CLEMENT
---
arch/arm/boot/dts/armada-375-db.dts | 4
arch/arm/boot/dts
On Armada 375, the USB cluster allows to control the cluster composed
of the USB2 and USB3 host controllers.
Signed-off-by: Gregory CLEMENT
---
arch/arm/boot/dts/armada-375.dtsi | 6 ++
1 file changed, 6 insertions(+)
diff --git a/arch/arm/boot/dts/armada-375.dtsi
b/arch/arm/boot/dts
The Marvell Armada 375 SoCs contains one EHCI host. This commit adds
the Device Tree description of this interfaces at the SoC level, and
also enables the USB2 port on the Armada 375 DB platform.
Signed-off-by: Gregory CLEMENT
---
arch/arm/boot/dts/armada-375-db.dts | 4
arch/arm/boot/dts
This patch add the selection of the config symbol to build the USB3
support for Armada 375.
Signed-off-by: Gregory CLEMENT
---
arch/arm/mach-mvebu/Kconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/mach-mvebu/Kconfig b/arch/arm/mach-mvebu/Kconfig
index 7960f218702b
Extend the compatible string list with armada-375-xhci. It is used to
describe xHCI controller which is in the Armada 375 SoC.
Signed-off-by: Gregory CLEMENT
---
Documentation/devicetree/bindings/usb/usb-xhci.txt | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a
The Armada 375 SoC comes with an USB2 host and device controller and
an USB3 controller. The USB cluster control register allows to manage
common features of both USB controllers. It uses the generic PHY
framework
Signed-off-by: Gregory CLEMENT
---
drivers/phy/Kconfig | 5
The Marvell Armada 38x platform needs the xhci_mvebu driver enabled
for the xHCI USB hosts, so this commit enables the corresponding
Kconfig option in mvebu_v7_defconfig.
Signed-off-by: Gregory CLEMENT
---
arch/arm/configs/mvebu_v7_defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a
For the Armada 375 SoC which comes with an xhci controller. Currently
the quirk is the same that the Armada 380/385 one, but by introducing
a new compatible string it will allow to make the driver evolve
seamless.
Signed-off-by: Gregory CLEMENT
---
drivers/usb/host/xhci-plat.c | 5 +
1 file
Armada 375 comes with an USB2 host and device controller and an USB3
controller. The USB cluster control register allows to manage common
features of both USB controllers.
Signed-off-by: Gregory CLEMENT
---
.../bindings/phy/armada-375-usb-phy-cluster.txt | 19 +++
1 file
The Marvell Armada 38x platform needs the xhci_mvebu driver enabled
for the xHCI USB hosts, so this commit enables the corresponding
Kconfig option in multi_v7_defconfig.
Signed-off-by: Gregory CLEMENT
---
arch/arm/configs/multi_v7_defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a
This patch add the selection of the config symbol to build the USB3
support for Armada 38x.
Signed-off-by: Gregory CLEMENT
---
arch/arm/mach-mvebu/Kconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/mach-mvebu/Kconfig b/arch/arm/mach-mvebu/Kconfig
index 3f73eecbcfb0
For the Armada 38x SoCs which come with an xhci controller, specific
initialization must be done during probe related to the MBus windows
configuration. This patch adds the support of this quirk.
Signed-off-by: Gregory CLEMENT
---
drivers/usb/host/Kconfig | 7 +
drivers/usb/host
The Marvell Armada 38x SoCs contains one EHCI host. This commit adds
the Device Tree description of this interface at the SoC level, and
also enables the USB2 port on the Armada 385 DB platform.
Signed-off-by: Gregory CLEMENT
---
arch/arm/boot/dts/armada-385-db.dts | 4
arch/arm/boot/dts
The Marvell Armada 38x SoCs contains two xHCI host. This commit adds
the Device Tree description of those interfaces at the SoC level, and
also enables the two USB3 ports on the Armada 385 DB platform and one
USB3 port on the Armada 385 RD platform.
Signed-off-by: Gregory CLEMENT
---
arch/arm
functions. Then if the clocks
are not supported we still can use the same calls, and there is no
Signed-off-by: Gregory CLEMENT
---
drivers/usb/host/xhci-plat.c | 57 +---
1 file changed, 54 insertions(+), 3 deletions(-)
diff --git a/drivers/usb/host/xhci
ther HCI.
Signed-off-by: Gregory CLEMENT
---
drivers/usb/host/xhci.h | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/usb/host/xhci.h b/drivers/usb/host/xhci.h
index d280e9213d08..054017f66246 100644
--- a/drivers/usb/host/xhci.h
+++ b/drivers/usb/host/xhci.h
@@ -1584,6 +1584,9 @
This commit allows to use the PHY provided through the device tree. It
will be useful for the Armada 375 SoCs. if no PHY is provided then the
behavior of the driver is unchanged.
Signed-off-by: Gregory CLEMENT
---
drivers/usb/host/ehci-orion.c | 25 +++--
1 file changed, 23
I
removed all the workaround related to the very earlier version of the
SoC, indeed there were very few boards with this version of the SoC.
This series is also available in
the branch USB-375-38x-3.15-rc1-V3
https://github.com/MISL-EBU-System-SW/mainline-public.git
Thanks,
Gregory CLEMENT (20
was introduced in v3.6, however the ehci framework allowing to
use the override mechanism have only been introduced in v3.8, so this
patch won't apply before it.
Fixes: 8c869edaee07c623066266827371235fb9c12e01 ('ARM: Orion: EHCI: Add support
for enabling clocks')
Cc: # v3.8+
Signed-
On 21/06/2014 01:57, Jason Cooper wrote:
> On Fri, Jun 20, 2014 at 05:33:06PM -0500, Rob Herring wrote:
>> On Fri, Jun 20, 2014 at 1:52 PM, Jason Cooper wrote:
>>> On Thu, Jun 19, 2014 at 06:40:43PM +0200, Gregory CLEMENT wrote:
>>>> For the Armada 380 and Armada 385
marvell,armada380" string.
Signed-off-by: Gregory CLEMENT
---
Hi,
This fix should be merged in 3.16 and maybe sent as a fix for 3.15
too.
The initial patch (ARM: mvebu: Fix missing binding documentation for
Armada 38x) was re-written after the review about the use of the
wildcards
Hi Jason,
>> This fix should be merged in 3.16 and maybe sent as a fix for 3.15
>> too.
[...]
> Applied to mvebu/dt with Andrew's Ack.
I think it should go mvebu/fixes as this patch modifies the binding,
sooner is better.
Thanks,
Gregory
--
Gregory Clement, F
+--
> 4 files changed, 44 insertions(+), 50 deletions(-)
>
> ---
> Cc: Mike Turquette
> Cc: Jason Cooper
> Cc: Andrew Lunn
> Cc: Gregory Clement
> Cc: Thomas Petazzoni
> Cc: Ezequiel Garcia
> Cc: linux-arm-ker...@lists.infradead.org
> C
On 04/02/2014 00:36, Sebastian Hesselbarth wrote:
> On 02/04/2014 12:16 AM, Willy Tarreau wrote:
>> On Thu, Jan 30, 2014 at 11:31:32AM +0100, Sebastian Hesselbarth wrote:
>>> On 01/30/14 11:24, Gregory CLEMENT wrote:
>>>> On 25/01/2014 19:19, Sebastian Hesselbarth wro
patch adds this work inside the framework itself.
Using the data of the device tree the of_clk_init function now delayed
the initialization of a clock provider if its parent provider was not
ready yet.
Signed-off-by: Gregory CLEMENT
---
Mike,
this patch could solve the issues we get on severals
ld go further by ensuring all the
parents are ready.
If I am right, there is more than one parent only for the muxer. In this
case is it really expected that all the parent are ready?
Thanks,
Gregory
> + }
> + }
> +
> + if (!found)
> +
On 05/02/2014 15:48, Gregory CLEMENT wrote:
> Hi Boris,
>
> On 05/02/2014 10:48, Boris BREZILLON wrote:
>> The parent dependency check is only available on the first parent of a given
>> clk.
>>
>> Add support for strict dependency check: all parents of a
ooper
> +L: linux-...@vger.kernel.org
> +L: linux-arm-ker...@lists.infradead.org (moderated for non-subscribers)
> +S: Maintained
> +F: drivers/pci/host/*mvebu*
I think that Thomas Petazzoni would be more appropriate, he worked
on the mvebu PCIe since 6 moths and now know very we
>>> diff --git a/drivers/clk/mvebu/common.c b/drivers/clk/mvebu/common.c
>>> index 25ceccf..6c63b43 100644
>>> --- a/drivers/clk/mvebu/common.c
>>> +++ b/drivers/clk/mvebu/common.c
>>> @@ -121,7 +121,7 @@ void __init mvebu_clk_gating_setup(struct
>>> device_no
On 07/02/2014 16:00, Emilio López wrote:
> El 07/02/14 11:49, Gregory CLEMENT escribió:
>> On 07/02/2014 15:43, Ezequiel Garcia wrote:
>>> On Fri, Feb 07, 2014 at 09:24:30AM -0500, Jason Cooper wrote:
>>>> On Fri, Feb 07, 2014 at 10:06:08AM -0300, Emilio López
On 07/02/2014 17:16, Emilio López wrote:
> Hi Gregory,
>
> El 07/02/14 12:12, Gregory CLEMENT escribió:
>> On 07/02/2014 16:00, Emilio López wrote:
>>> El 07/02/14 11:49, Gregory CLEMENT escribió:
>>>> On 07/02/2014 15:43, Ezequiel Garcia wrote:
>>&g
moving the redundant code.
Signed-off-by: Gregory CLEMENT
---
drivers/pci/host/pci-mvebu.c | 8
1 file changed, 8 deletions(-)
diff --git a/drivers/pci/host/pci-mvebu.c b/drivers/pci/host/pci-mvebu.c
index 2aa7b77c7c88..0b4b99fa1fb5 100644
--- a/drivers/pci/host/pci-mvebu.c
+++ b/drivers/pc
On 02/01/2014 11:46, Thomas Petazzoni wrote:
> Dear Gregory CLEMENT,
>
> On Thu, 2 Jan 2014 11:41:36 +0100, Gregory CLEMENT wrote:
>> In the commit b42285f66f871a989, Sebastian moved clock enable before
>> register access, but during the merge of the commit
>> 9f
fix it was reduced at around
50ppm (around 4s per day).
Signed-off-by: Gregory CLEMENT
---
drivers/clk/mvebu/armada-370.c | 7 +++
1 file changed, 7 insertions(+)
diff --git a/drivers/clk/mvebu/armada-370.c b/drivers/clk/mvebu/armada-370.c
index bef198a83863..b084a84d8fad 100644
--- a/d
For dealing with the code we use the SAR1 and not the SAR0. The code
was correct, and now the comments too.
Signed-off-by: Gregory CLEMENT
---
drivers/clk/mvebu/armada-375.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/clk/mvebu/armada-375.c b/drivers/clk
new optional function related to each
SoC: is_sscg_enabled(). If this function is not present then no
correction is done on the clock frequency.
Signed-off-by: Gregory CLEMENT
---
drivers/clk/mvebu/common.c | 74 ++
drivers/clk/mvebu/common.h | 1 +
2
The Armada 370 SoC has a Spread Spectrum Clock Generator. This commit
adds the description of this generator to the Device Tree describing
this SoC.
Signed-off-by: Gregory CLEMENT
---
arch/arm/boot/dts/armada-370.dtsi | 4
1 file changed, 4 insertions(+)
diff --git a/arch/arm/boot/dts
h the mvebu tree.
The last one is just to fix a typo I found while I was reading the clk
code.
Thanks,
Gregory CLEMENT (4):
clk: mvebu: Fix clk frequency value if SSCG is enabled
clk: mvebu: armada-370: Fix timer drift caused by the SSCG deviation
ARM: mvebu: add SSCG to Armada 370 Device
Hi Sebastian,
On 29/08/2014 14:48, Sebastian Hesselbarth wrote:
> On 08/29/2014 01:43 PM, Gregory CLEMENT wrote:
>> When the SSCG (Spread Spectrum Clock Generator) is enabled, it shifts
>> the frequency of the clock. The percentage is no more than 1% but when
>> the clock i
Hi Thomas,
On 29/08/2014 15:08, Thomas Petazzoni wrote:
> Dear Gregory CLEMENT,
>
> On Fri, 29 Aug 2014 13:43:38 +0200, Gregory CLEMENT wrote:
>
>> +bool a370_is_sscg_enabled(void __iomem *sar)
>
> Minor nit: "static" is missing here.
OK I will fix it in t
Hi Leigh,
On 01/09/2014 00:25, Leigh Brown wrote:
> Hi Gregory,
>
> On 2014-08-29 12:43, Gregory CLEMENT wrote:
>> When the SSCG (Spread Spectrum Clock Generator) is enabled, it shifts
>> the frequency of the clock. The percentage is no more than 1% but when
>> the c
fix it was reduced at around
50ppm (around 4s per day).
Signed-off-by: Gregory CLEMENT
---
drivers/clk/mvebu/armada-370.c | 8
1 file changed, 8 insertions(+)
diff --git a/drivers/clk/mvebu/armada-370.c b/drivers/clk/mvebu/armada-370.c
index bef198a83863..756f0f39d6a3 100644
--- a/d
The Armada 370 SoC has a Spread Spectrum Clock Generator. This commit
adds the description of this generator to the Device Tree describing
this SoC.
Signed-off-by: Gregory CLEMENT
---
arch/arm/boot/dts/armada-370.dtsi | 4
1 file changed, 4 insertions(+)
diff --git a/arch/arm/boot/dts
mment to make clear that the formula in datasheet is
erroneous
- added a fix_sscg_deviation() callback in order to be able to deal
with the Dove case which is different from the other mvebu SoCs
Gregory CLEMENT (4):
clk: mvebu: Fix clk frequency value if SSCG is enabled
clk: mvebu: armada-
new optional function related to each
SoC: is_sscg_enabled(). The fix is done with the other new optional
function related to each SoC: fix_sscg_deviation. If one these
functions are not present then no correction is done on the clock
frequency.
Signed-off-by: Gregory CLEMENT
---
drivers/clk/mvebu
For dealing with the code we use the SAR1 and not the SAR0. The code
was correct, and now the comments too.
Signed-off-by: Gregory CLEMENT
---
drivers/clk/mvebu/armada-375.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/clk/mvebu/armada-375.c b/drivers/clk
feature and managed to switch
to a new kernel using kexec.
Thanks,
Gregory
Gregory CLEMENT (4):
ARM: mvebu: Clean-up the Armada XP support
ARM: mvebu: Move SCU power up in a function
ARM: mvebu: Fix secondary startup for Cortex A9 SoC
ARM: mvebu: Implement CPU hotplug support for Armada 38x
During the secondary startup the SCU was assumed to be in normal
mode. It is not always the case, and especially after a kexec. This
commit adds the needed sequence to put the SCU in normal mode.
Signed-off-by: Gregory CLEMENT
---
arch/arm/mach-mvebu/headsmp-a9.S | 1 +
1 file changed, 1
This will allow reusing the same function in the secondary_startup
for the Cortex A9 SoC.
Signed-off-by: Gregory CLEMENT
---
arch/arm/mach-mvebu/pmsu_ll.S | 20 +---
1 file changed, 13 insertions(+), 7 deletions(-)
diff --git a/arch/arm/mach-mvebu/pmsu_ll.S b/arch/arm/mach
evice tree.
In a few releases, when the old device tree will be obsolete, we will be
able to remove the smp field and then the armada-370-xp.h header.
Signed-off-by: Gregory CLEMENT
---
arch/arm/mach-mvebu/armada-370-xp.h | 6 --
arch/arm/mach-mvebu/board-v7.c | 4
arch/arm/mach-
ate in the
->smp_secondary_init() hook.
This commit has been tested using CPU hotplug through sysfs
(/sys/devices/system/cpu/cpuX/online) and using kexec.
Signed-off-by: Gregory CLEMENT
---
arch/arm/mach-mvebu/platsmp-a9.c | 53 ++--
arch/arm/mach-mve
evice tree.
In a few releases, when the old device tree will be obsolete, we will be
able to remove the smp field and then the armada-370-xp.h header.
Signed-off-by: Gregory CLEMENT
---
arch/arm/mach-mvebu/armada-370-xp.h | 6 --
arch/arm/mach-mvebu/board-v7.c | 5 +
arch/arm/mach-
state in the
->smp_secondary_init() hook.
This commit has been tested using CPU hotplug through sysfs
(/sys/devices/system/cpu/cpuX/online) and using kexec.
Signed-off-by: Gregory CLEMENT
---
arch/arm/mach-mvebu/platsmp-a9.c | 53 ++--
arch/arm/m
d a prefix to the function power_up_scu function to keep it
private and not "pollute" the global namespace.
Gregory CLEMENT (4):
ARM: mvebu: Clean-up the Armada XP support
ARM: mvebu: Move SCU power up in a function
ARM: mvebu: Fix the secondary startup for Cortex A9 SoC
ARM: mvebu:
This will allow reusing the same function in the secondary_startup
for the Cortex A9 SoC.
Signed-off-by: Gregory CLEMENT
---
arch/arm/mach-mvebu/pmsu_ll.S | 20 +---
1 file changed, 13 insertions(+), 7 deletions(-)
diff --git a/arch/arm/mach-mvebu/pmsu_ll.S b/arch/arm/mach
During the secondary startup the SCU was assumed to be in normal
mode. It is not always the case, and especially after a kexec. This
commit adds the needed sequence to put the SCU in normal mode.
Signed-off-by: Gregory CLEMENT
---
arch/arm/mach-mvebu/headsmp-a9.S | 1 +
1 file changed, 1
Hi Sebastian,
> [...]
>> NR_IRQS:16 nr_irqs:16 16
>> L2C: device tree omits to specify unified cache
>
> Jason, Thomas, Gregory,
>
> we should add a "cache-unified" to the l2cc nodes for all SoCs.
Right,
I take care of it.
Thanks,
Gregory
--
G
e aurora l2cc is unified too, so a patch
is coming soon to update the dtsi for Armada 370 and Armada XP.
--
Gregory Clement, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com
--
To unsubscribe from this list: send
Hi Thomas,
On 24/10/2014 14:05, Thomas Petazzoni wrote:
> Dear Gregory CLEMENT,
>
> On Thu, 23 Oct 2014 20:14:28 +0200, Gregory CLEMENT wrote:
>
>> +ENTRY(power_up_scu)
>> +mrc p15, 4, r1, c15, c0 @ get SCU base address
>> +orr r1, r1, #0x8
Hi Thomas,
On 24/10/2014 14:19, Thomas Petazzoni wrote:
> Dear Gregory CLEMENT,
>
> On Fri, 24 Oct 2014 14:11:17 +0200, Gregory CLEMENT wrote:
>
>>> Since this function is not static, I think it might be a good idea to
>>> use a prefix that makes it more specif
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