nging up a new board. I fear that we will have many false bug report
about it.
For the second category, I think we should at least point this in the dtsi.
Thanks,
Gregory
>
> Right, makes perfect sense!
>
> So we can just keep the nodes address-ordered, without caring about the
less as well. We can
>> simply write the new mask as the bits in this register reflect one
>> core.
>>
>> Get rid of fiddling with the default_irq_affinity as well.
>>
>> Signed-off-by: Thomas Gleixner
>> Cc: Gregory CLEMENT
>> Cc: Jason Coope
The Armada 375 SoC comes with an USB2 host and device controller and
an USB3 controller. The USB cluster control register allows to manage
common features of both USB controllers.
Signed-off-by: Gregory CLEMENT
---
arch/arm/mach-mvebu/Makefile | 2 +-
arch/arm/mach-mvebu/usb-cluster.c
The Marvell Armada 375 SoC contains one EHCI host. This commit adds
the Device Tree description of this interface at the SoC level.
Signed-off-by: Gregory CLEMENT
---
arch/arm/boot/dts/armada-375.dtsi | 18 ++
1 file changed, 18 insertions(+)
diff --git a/arch/arm/boot/dts
In order to enable the USB3 host controller on the Armada 375 DB
platform, we need to create a ranges at the soc node level to describe
the special static window for USB3.
Signed-off-by: Gregory CLEMENT
---
arch/arm/boot/dts/armada-375-db.dts | 10 --
1 file changed, 8 insertions(+), 2
This patch add the selection of the config symbol to build the USB3
support for Armada 375.
Signed-off-by: Gregory CLEMENT
---
arch/arm/mach-mvebu/Kconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/mach-mvebu/Kconfig b/arch/arm/mach-mvebu/Kconfig
index 7960f218702b
Extend the compatible string list with armada-375-xhci. It is used to
describe xhci controller which is in the Armada 375 SoC.
Signed-off-by: Gregory CLEMENT
---
Documentation/devicetree/bindings/usb/usb-xhci.txt | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a
one ranges to describe the special
window to be created but it must be done at the board level in the
dts.
- The usb3-controller node has two entries in the reg property, the
first for XHCI, the second for the internal registers
Signed-off-by: Gregory CLEMENT
---
arch/arm/boot/dts
Armada 375 comes with an USB2 host and device controller and an USB3
controller. The USB cluster control register allows to manage common
features of both USB controllers.
Signed-off-by: Gregory CLEMENT
---
.../devicetree/bindings/arm/armada-375-usb-cluster.txt | 17 +
1 file
On Armada 375, the USB cluster allows to control the cluster composed
of the USB2 and USB3 host controllers.
Signed-off-by: Gregory CLEMENT
---
arch/arm/boot/dts/armada-375.dtsi | 5 +
1 file changed, 5 insertions(+)
diff --git a/arch/arm/boot/dts/armada-375.dtsi
b/arch/arm/boot/dts
The Marvell Armada 38x SoCs contain one EHCI host. This commit adds
the Device Tree description of this interface at the SoC level, and
also enables the USB2 port on the Armada 385 DB platform.
Signed-off-by: Gregory CLEMENT
---
arch/arm/boot/dts/armada-385-db.dts | 4
arch/arm/boot/dts
For the Armada 375 SoC which comes with an xhci controller. Currently
the quirk is the same that the Armada 380/385 one, but by introducing
a new compatible string it will allow to make the driver evolve
seamless.
Signed-off-by: Gregory CLEMENT
---
drivers/usb/host/xhci-plat.c | 4
1 file
The Marvell Armada 38x platform needs the xhci_mvebu driver enabled
for the xHCI USB hosts, so this commit enables the corresponding
Kconfig option in multi_v7_defconfig.
Signed-off-by: Gregory CLEMENT
---
arch/arm/configs/multi_v7_defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a
This patch add the selection of the config symbol to build the USB3
support for Armada 38x.
Signed-off-by: Gregory CLEMENT
---
arch/arm/mach-mvebu/Kconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/mach-mvebu/Kconfig b/arch/arm/mach-mvebu/Kconfig
index 3f73eecbcfb0
The Marvell Armada 38x platform needs the xhci_mvebu driver enabled
for the xHCI USB hosts, so this commit enables the corresponding
Kconfig option in mvebu_v7_defconfig.
Signed-off-by: Gregory CLEMENT
---
arch/arm/configs/mvebu_v7_defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a
functions. Then if the clocks
are not supported we still can use the same calls, and there is no
Signed-off-by: Gregory CLEMENT
---
drivers/usb/host/xhci-plat.c | 52 ++--
1 file changed, 50 insertions(+), 2 deletions(-)
diff --git a/drivers/usb/host/xhci
The Marvell Armada 38x SoCs contain two xHCI host. This commit adds
the Device Tree description of those interfaces at the SoC level, and
also enables the two USB3 ports on the Armada 385 DB platform and one
USB3 port on the Armada 385 RD platforms.
Signed-off-by: Gregory CLEMENT
---
arch/arm
Sorting the headers in alphabetic order will help to reduce the conflict
when adding new headers later.
Signed-off-by: Gregory CLEMENT
---
drivers/usb/host/xhci-plat.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/usb/host/xhci-plat.c b/drivers/usb/host/xhci
Extend the compatible string list with armada-380-xhci. It is used to
describe xhci controller which is in the Armada 38x SoCs.
Signed-off-by: Gregory CLEMENT
---
Documentation/devicetree/bindings/usb/usb-xhci.txt | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a
For the Armada 38x SoCs which come with an xhci controller, specific
initialization must be done during probe related to the MBus windows
configuration. This patch adds the support of this quirk.
Signed-off-by: Gregory CLEMENT
---
drivers/usb/host/Kconfig | 7 +
drivers/usb/host
Armada 375 binding.
This patches 1 to 4 and 10 to 11 should go through the xhci subsystem.
The rest of the series is more platform specific and should go through
the mvebu tree, except the patch 9 that should be taken directly by
the arm-soc maintainer.
Thanks,
Gregory CLEMENT (18):
usb: host
On 25/04/2014 16:15, Thomas Petazzoni wrote:
> Dear Gregory CLEMENT,
>
> On Fri, 25 Apr 2014 16:07:00 +0200, Gregory CLEMENT wrote:
>> Some platform (such as the Armada 38x ones) can gate the clock of
>> their USB controller. This patch add the support for the clock, by
&g
On 25/04/2014 16:44, Gregory CLEMENT wrote:
> On 25/04/2014 16:15, Thomas Petazzoni wrote:
>> Dear Gregory CLEMENT,
>>
>> On Fri, 25 Apr 2014 16:07:00 +0200, Gregory CLEMENT wrote:
>>> Some platform (such as the Armada 38x ones) can gate the clock of
>>> t
Armada 375 comes with an USB2 host and device controller and an USB3
controller. The USB cluster control register allows to manage common
features of both USB controllers. This commit adds the Device Tree
binding documentation for this piece of hardware.
Signed-off-by: Gregory CLEMENT
On Armada 375, the USB cluster allows to control the cluster composed
of the USB2 and USB3 host controllers.
Signed-off-by: Gregory CLEMENT
---
arch/arm/boot/dts/armada-375.dtsi | 6 ++
1 file changed, 6 insertions(+)
diff --git a/arch/arm/boot/dts/armada-375.dtsi
b/arch/arm/boot/dts
Now that the USB cluster node has been added, use it as a PHY provider
for the USB controller linked to it: the first EHCI and the xHCI.
Signed-off-by: Gregory CLEMENT
---
arch/arm/boot/dts/armada-375.dtsi | 5 +
1 file changed, 5 insertions(+)
diff --git a/arch/arm/boot/dts/armada-375
member in
xhci_hcd. While only used for now in xhci-plat, here again, it might
be used by other drivers in the future.
Signed-off-by: Gregory CLEMENT
---
drivers/usb/host/xhci-plat.c | 29 -
drivers/usb/host/xhci.h | 2 ++
2 files changed, 30 insertions(+),
: Gregory CLEMENT
Signed-off-by: Thomas Petazzoni
---
drivers/phy/Kconfig | 6 +
drivers/phy/Makefile | 1 +
drivers/phy/phy-armada375-usb2.c | 140 +++
include/dt-bindings/phy/armada-375-usb
o fix his dts.
During the debug I also noticed that xhci don't handle the PHY so I
also add the support for an optional phy. This patch is for Mathias
Nyman.
Thanks,
Gregory
Gregory CLEMENT (5):
phy: add support for USB cluster on the Armada 375 SoC
Documentation: dt-bindings: document
stances
(if there is no output-name, which is our default case) this proposal
just ignored the parent clock given by the device tree and this looked
more wrong.
>
> Sebastian fix works perfect, and it easy to understand. However, it has
> quite a large diffstat. When compared to Emil
homas Petazzoni wrote:
> Hello,
>
> On Mon, 10 Feb 2014 18:42:59 +0100, Gregory CLEMENT wrote:
>> Until now the clock providers were initialized in the order found in
>> the device tree. This led to have the dependencies between the clocks
>> not respected: children clocks c
example, the device tree indicates that
the parent
clock of the gating clock is the 2nd clock provided by the coreclk which is
currently
"cpuclk". As no clock-output-names is used, then this will be totally ignore
and instead
of using "cpuclk" as parent "tclk" w
On 17/02/2014 16:21, Ezequiel Garcia wrote:
> On Mon, Feb 17, 2014 at 03:25:22PM +0100, Gregory CLEMENT wrote:
>> On 17/02/2014 15:13, Ezequiel Garcia wrote:
>>> On Wed, Feb 05, 2014 at 01:34:57PM -0500, Jason Cooper wrote:
>>>> On Sat, Jan 25, 2014 at 07:19:06PM +010
On 17/02/2014 16:44, Ezequiel Garcia wrote:
> On Mon, Feb 17, 2014 at 04:28:41PM +0100, Gregory CLEMENT wrote:
>> On 17/02/2014 16:21, Ezequiel Garcia wrote:
>>> On Mon, Feb 17, 2014 at 03:25:22PM +0100, Gregory CLEMENT wrote:
>>>> On 17/02/2014 15:13, Ezequiel Garc
On 17/02/2014 19:19, Ezequiel Garcia wrote:
> On Mon, Feb 17, 2014 at 04:59:01PM +0100, Gregory CLEMENT wrote:
> [..]
>>>
>>> Right. If you think it adds a regression, then that's a perfectly valid
>>> reasons
>>> for nacking.
>>>
>>&g
1.html
the details of why it doesn't work). Instead, add a 'struct
clk*' field in xhci_hcd to support the clock in xhci-plat,
exactly like xhci_hcd has msix_count and msix_entries for
xhci-pci.
- Misc minor code style improvements.
Gregory CLEMENT (14
]
Fixes: 8c869edaee07c623066266827371235fb9c12e01 ('ARM: Orion: EHCI: Add support
for enabling clocks')
Cc: # v3.8+
Signed-off-by: Gregory CLEMENT
Signed-off-by: Thomas Petazzoni
Acked-by: Alan Stern
---
drivers/usb/host/ehci-orion.c | 45 ---
properly. Also call phy_power_off() when needed, and rename goto
labels.]
Signed-off-by: Gregory CLEMENT
Signed-off-by: Thomas Petazzoni
Acked-by: Alan Stern
---
drivers/usb/host/ehci-orion.c | 28
1 file changed, 28 insertions(+)
diff --git a/drivers/usb/host/ehci
From: Thomas Petazzoni
In preparation to the introduction of additional initialization steps
in ehci_orion_drv_probe(), we rename the error goto labels from err1,
err2 and err3 names to some more meaningful names.
Signed-off-by: Thomas Petazzoni
Acked-by: Alan Stern
---
drivers/usb/host/ehci-
Armada 375 and
Armada 38x XHCI controllers, and therefore enable the relevant quirk.
Signed-off-by: Gregory CLEMENT
Signed-off-by: Thomas Petazzoni
Acked-by: Mathias Nyman
---
drivers/usb/host/Kconfig | 8 +
drivers/usb/host/Makefile | 3 ++
drivers/usb/host/xhci-mvebu.c | 72
The Marvell Armada 38x platform needs the xhci_mvebu driver enabled
for the xHCI USB hosts, so this commit enables the corresponding
Kconfig option in multi_v7_defconfig.
Signed-off-by: Gregory CLEMENT
Signed-off-by: Thomas Petazzoni
Cc: a...@kernel.org
Cc: Kevin Hilman
Cc: Olof Johansson
Cc
This patch add the selection of the config symbol to build the USB3
support for Armada 375.
Signed-off-by: Gregory CLEMENT
---
arch/arm/mach-mvebu/Kconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/mach-mvebu/Kconfig b/arch/arm/mach-mvebu/Kconfig
index 7960f218702b
The Marvell Armada 38x SoCs contains one EHCI controller. This commit
adds the Device Tree description of this interface at the SoC level,
and also enables the USB2 port on the Armada 385 DB platform.
Signed-off-by: Gregory CLEMENT
---
arch/arm/boot/dts/armada-385-db.dts | 4
arch/arm/boot
The Marvell Armada 375 SoCs contain a xHCI controller. This commit
adds the Device Tree description of this interfaces at the SoC level,
and also enables the USB3 port on the Armada 375 DB platform.
Signed-off-by: Gregory CLEMENT
Signed-off-by: Thomas Petazzoni
---
arch/arm/boot/dts/armada-375
The Marvell Armada 38x platform needs the xhci_mvebu driver enabled
for the xHCI USB hosts, so this commit enables the corresponding
Kconfig option in mvebu_v7_defconfig.
Signed-off-by: Gregory CLEMENT
Signed-off-by: Thomas Petazzoni
---
arch/arm/configs/mvebu_v7_defconfig | 1 +
1 file
The Marvell Armada 375 SoCs contains one EHCI controller. This commit
adds the Device Tree description of this interfaces at the SoC level,
and also enables the USB2 port on the Armada 375 DB platform.
Signed-off-by: Gregory CLEMENT
Signed-off-by: Thomas Petazzoni
---
arch/arm/boot/dts/armada
al 'clocks' property is now supported.
Signed-off-by: Gregory CLEMENT
Signed-off-by: Thomas Petazzoni
Acked-by: Mathias Nyman
---
Documentation/devicetree/bindings/usb/usb-xhci.txt | 7 ++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetre
This patch adds the selection of the config symbol needed to build the
USB3 support for Armada 38x into mvebu_v7_defconfig.
Signed-off-by: Gregory CLEMENT
Signed-off-by: Thomas Petazzoni
---
arch/arm/mach-mvebu/Kconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/mach-mvebu
The Marvell Armada 38x SoCs contains two xHCI controllers. This commit
adds the Device Tree description of those interfaces at the SoC level,
and also enables the two USB3 ports on the Armada 385 DB platform and
one USB3 port on the Armada 385 RD platform.
Signed-off-by: Gregory CLEMENT
Signed
ow in xhci-plat, it might be used by other drivers in
the future. Moreover, the xhci_hcd structure already holds other
members such as msix_count and msix_entries, which are MSI-X specific,
and therefore only used by xhci-pci.
Signed-off-by: Gregory CLEMENT
Signed-off-by: Thomas Petazzoni
Acked-
From: Thomas Petazzoni
This commit updates the Device Tree binding documentation of
ehci-orion to take into account the fact that we can now optionally
pass a clock and a PHY reference.
Signed-off-by: Thomas Petazzoni
Acked-by: Alan Stern
---
Documentation/devicetree/bindings/usb/ehci-orion.t
Sorting the headers in alphabetic order will help to reduce the conflict
when adding new headers later.
Signed-off-by: Gregory CLEMENT
Acked-by: Felipe Balbi
---
drivers/usb/host/xhci-plat.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/usb/host/xhci-plat.c
From: Thomas Petazzoni
Commit 77dae54ab385033e488d8b07045bc7f8d931740f ('ARM: Kirkwood:
ehci-orion: Add device tree binding') added the Device Tree binding
for the ehci-orion driver. To achieve that with the irq, it used the
irq_of_parse_and_map() function when probed in DT-mode, and
platform_get
On 15/05/2014 15:34, Jason Cooper wrote:
> On Thu, May 15, 2014 at 05:26:36PM +0400, Sergei Shtylyov wrote:
>> Hello.
>>
>> On 05/15/2014 02:17 PM, Gregory CLEMENT wrote:
>>
>>> The Marvell Armada 375 SoCs contains one EHCI controller. This commit
>>
>
ugger
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License as published by
> + * the Free Software Foundation; either version 2 of the License, or
> + * (at your option) any later version.
> + *
>
senduart,rd,rx
> + strb\rd, [\rx, #0x0]
What about using a #define instead of numerical value?
> + .endm
> +
> + .macro waituart,rd,rx
> +1001:ldr \rd, [\rx, #0x14]
ditto
> + tst \rd, #0x40
ditto
> + beq 10
better to make the clocks mandatory and not their name
Thanks,
Gregory
> +
> +Examples:
> +
> + timer {
> + compatible = "mediatek,mtk6589-timer";
> + reg = <0x10008000 0x80>;
> + interrupts = ;
> + clocks = <&sy
nit(gpt_base + TIMER_CNT_REG(GPT_CLK_SRC), node->name,
> + rate, 300, 32, clocksource_mmio_readl_up);
> +
> + ticks_per_jiffy = DIV_ROUND_UP(rate, HZ);
> +
> + /* Configure clock event */
> + mtk_timer_reset(GPT_CLK_EVT);
> +
> + writel(TIMER_CLK_
On 10/04/2014 08:29, Matthias Brugger wrote:
> 2014-04-09 22:26 GMT+02:00 Gregory CLEMENT
> :
>> Hi Matthias,
>>
>> On 09/04/2014 19:45, Matthias Brugger wrote:
>>> This adds a generic devicetree board file and a dtsi for boards
>>> based on the MT6589
efconfig fails since two weeks because of it now.
I am ready to help if you need it.
Thanks!
--
Gregory Clement, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com
--
To unsubscribe from this list: send t
The cpu idle support will need to access to Power Management Service
Unit. This commit adds the architecture related functions that will be
used in the idle path of the cpuidle driver.
Signed-off-by: Gregory CLEMENT
---
arch/arm/mach-mvebu/pmsu.c | 132
sed on the work of Nadav Haklai.
Signed-off-by: Nadav Haklai
Signed-off-by: Gregory CLEMENT
---
drivers/cpuidle/Kconfig.arm | 5 ++
drivers/cpuidle/Makefile| 1 +
drivers/cpuidle/cpuidle-armada-370-xp.c | 93 +
3 files changed, 99
The cpuidle is a platform driver so we register the device just after
the initialization of the board in an arch_initcall.
Signed-off-by: Gregory CLEMENT
---
arch/arm/mach-mvebu/pmsu.c | 22 ++
1 file changed, 22 insertions(+)
diff --git a/arch/arm/mach-mvebu/pmsu.c b/arch
In order to have well encapsulated code, we use notifier callbacks for
CPU_PM_ENTER and CPU_PM_EXIT inside the mvebu power management code.
Signed-off-by: Gregory CLEMENT
---
arch/arm/mach-mvebu/pmsu.c | 19 +++
1 file changed, 19 insertions(+)
diff --git a/arch/arm/mach-mvebu
Setting the start (or boot) address of a CPU is no more used only
during SMP bring up, but it will also be used by the CPU idle
functions or later by the CPU hot plug ones.
This commit moves it in a separate function.
Signed-off-by: Gregory CLEMENT
---
arch/arm/mach-mvebu/pmsu.c | 9
used by
the exposed functions (ll_add_cpu_to_smp_group and
ll_enable_coherency)
Signed-off-by: Gregory CLEMENT
---
arch/arm/mach-mvebu/coherency.c| 8 ++--
arch/arm/mach-mvebu/coherency_ll.S | 94 +-
arch/arm/mach-mvebu/headsmp.S | 6 ++-
3 files
still continue to support it during a few
releases.
Cc: devicet...@vger.kernel.org
Signed-off-by: Gregory CLEMENT
---
.../devicetree/bindings/arm/armada-370-xp-pmsu.txt | 14 ++
arch/arm/boot/dts/armada-xp.dtsi | 11 ---
2 files changed, 14 inser
This commit adds a function which adjusts the PMSU configuration to
automatically power down the L2 and coherency fabric when we enter a
certain idle state.
This feature is part of the Power Management Service Unit of the
Armada 370 and Armada XP SoCs.
Signed-off-by: Gregory CLEMENT
---
arch
When going to deep idle we need to disable the SoC snooping (aka
hardware coherency support). Playing with the coherency fabric
requires to use assembly code to be sure that the compiler doesn't
reorder the instructions nor do wrong optimization.
Signed-off-by: Gregory CLEMENT
---
arch/arm
e old binding
This patch also adds warnings if one of the base registers set can't
be ioremapped.
Signed-off-by: Gregory CLEMENT
---
arch/arm/mach-mvebu/pmsu.c | 47 +-
1 file changed, 42 insertions(+), 5 deletions(-)
diff --git a/arch/arm/mach-mv
set_cpu_coherent() took the SMP group ID as parameter. But this
parameter was never used, and the CPU always uses the SMP group 0. So
we can remove this parameter.
Signed-off-by: Gregory CLEMENT
---
arch/arm/mach-mvebu/coherency.c | 4 ++--
arch/arm/mach-mvebu/coherency.h | 2 +-
arch/arm/mach
ll_set_cpu_coherent is always used on the current CPU, so instead of
passing the CPU id as argument, ll_set_cpu_coherent() can find it by
itself.
Signed-off-by: Gregory CLEMENT
Acked-by: Thomas Petazzoni
---
arch/arm/mach-mvebu/coherency.c| 10 +-
arch/arm/mach-mvebu/coherency.h
PJ4B needs extra instructions for suspend and resume, so instead of
using the armv7 version, this commit introduces specific versions for
PJ4B.
Cc: Russell King
Signed-off-by: Gregory CLEMENT
---
arch/arm/mm/proc-v7.S | 28 +---
1 file changed, 25 insertions(+), 3
al or the virtual address.
This patch add a check of the MMU bit to choose the accurate address,
then the calling function doesn't have to pass this information.
Signed-off-by: Gregory CLEMENT
---
arch/arm/mach-mvebu/coherency.c| 6 +++---
arch/arm/mach-mvebu/coherency
t;soc name"_CPUIDLE
* Moved the build rule under the new ARM SoC section in the Makefile
* Rebased on Linus Torvalds master branch of Thursday September 12
Gregory CLEMENT (14):
ARM: PJ4B: Add cpu_suspend/cpu_resume hooks for PJ4B
ARM: mvebu: remove the address parameter
Hi Jason,
On 26/03/2014 01:30, Jason Cooper wrote:
> On Tue, Mar 25, 2014 at 11:48:18PM +0100, Gregory CLEMENT wrote:
>> The initial binding for PMSU were wrong. It didn't take into account
>> all the registers from the PMSU and moreover it referred to registers
>>
On 26/03/2014 01:42, Jason Cooper wrote:
> Gregory,
>
> On Tue, Mar 25, 2014 at 11:48:11PM +0100, Gregory CLEMENT wrote:
> ...
>> The first patch should go through ARM subsystem and should be taken by
>> Russell King. I made few change on it following Lorenzo advice and
On 26/03/2014 11:31, Thomas Petazzoni wrote:
> Dear Gregory CLEMENT,
>
> On Tue, 25 Mar 2014 23:48:25 +0100, Gregory CLEMENT wrote:
>
>> +int __init armada_370_xp_cpu_pm_init(void)
>> +{
>> +if (!((of_find_compatible_node(NULL, NULL,
On 26/03/2014 12:52, Sebastian Hesselbarth wrote:
> On 03/25/2014 11:48 PM, Gregory CLEMENT wrote:
>> ll_set_cpu_coherent is always used on the current CPU, so instead of
>> passing the CPU id as argument, ll_set_cpu_coherent() can find it by
>> itself.
>>
>&g
On 26/03/2014 13:04, Sebastian Hesselbarth wrote:
> On 03/25/2014 11:48 PM, Gregory CLEMENT wrote:
>> The initial binding for PMSU were wrong. It didn't take into account
>> all the registers from the PMSU and moreover it referred to registers
>> which are not par
On 26/03/2014 16:19, Kevin Hilman wrote:
> [+ imx6 maintainers ]
>
> On Thu, Mar 20, 2014 at 8:52 PM, Mike Turquette wrote:
>> Quoting Gregory CLEMENT (2014-02-28 02:46:12)
>>> Hi Mike,
>>>
>>> On 24/02/2014 19:10, Gregory CLEMENT wrote:
>>>>
Hi Fabio,
On 26/03/2014 17:22, Fabio Estevam wrote:
> Hi Gregory,
>
> On Wed, Mar 26, 2014 at 1:02 PM, Gregory CLEMENT
> wrote:
>> I don't have any imx6 board, but should it be possible for you or the imx6
>> maintainer to add earlyprintk to see exactly what happe
d __init of_clk_init(const struct of_device_id
*matches)
* initialize all the remaining ones unconditionally
* in case the clock parent was not mandatory
*/
- if (!is_init_done)
+ if (!is_init_done) {
+
PJ4B needs extra instructions for suspend and resume, so instead of
using the armv7 version, this commit introduces specific versions for
PJ4B.
Cc: Russell King
Signed-off-by: Gregory CLEMENT
---
arch/arm/mm/proc-v7.S | 28 +---
1 file changed, 25 insertions(+), 3
The cpuidle is a platform driver so we register the device just after
the initialization of the board in an arch_initcall.
Signed-off-by: Gregory CLEMENT
---
arch/arm/mach-mvebu/pmsu.c | 37 +
1 file changed, 37 insertions(+)
diff --git a/arch/arm/mach-mvebu
sed on the work of Nadav Haklai.
Signed-off-by: Nadav Haklai
Signed-off-by: Gregory CLEMENT
Acked-by: Daniel Lezcano
---
drivers/cpuidle/Kconfig.arm | 5 ++
drivers/cpuidle/Makefile| 1 +
drivers/cpuidle/cpuidle-armada-370-xp.c | 93
In order to have well encapsulated code, we use notifier callbacks for
CPU_PM_ENTER and CPU_PM_EXIT inside the mvebu power management code.
Signed-off-by: Gregory CLEMENT
Acked-by: Daniel Lezcano
---
arch/arm/mach-mvebu/pmsu.c | 18 ++
1 file changed, 18 insertions(+)
diff
This commit adds a function which adjusts the PMSU configuration to
automatically power down the L2 and coherency fabric when we enter a
certain idle state.
This feature is part of the Power Management Service Unit of the
Armada 370 and Armada XP SoCs.
Signed-off-by: Gregory CLEMENT
---
arch
al or the virtual address.
This patch add a check of the MMU bit to choose the accurate address,
then the calling function doesn't have to pass this information.
Signed-off-by: Gregory CLEMENT
---
arch/arm/mach-mvebu/coherency.c| 6 +++---
arch/arm/mach-mvebu/coherency
used by
the exposed functions (ll_add_cpu_to_smp_group and
ll_enable_coherency)
Signed-off-by: Gregory CLEMENT
---
arch/arm/mach-mvebu/coherency.c| 8 ++--
arch/arm/mach-mvebu/coherency_ll.S | 92 +-
arch/arm/mach-mvebu/headsmp.S | 6 ++-
3 files
set_cpu_coherent() took the SMP group ID as parameter. But this
parameter was never used, and the CPU always uses the SMP group 0. So
we can remove this parameter.
Signed-off-by: Gregory CLEMENT
---
arch/arm/mach-mvebu/coherency.c | 4 ++--
arch/arm/mach-mvebu/coherency.h | 2 +-
arch/arm/mach
When going to deep idle we need to disable the SoC snooping (aka
hardware coherency support). Playing with the coherency fabric
requires to use assembly code to be sure that the compiler doesn't
reorder the instructions nor do wrong optimization.
Signed-off-by: Gregory CLEMENT
---
arch/arm
The cpu idle support will need to access to Power Management Service
Unit. This commit adds the architecture related functions that will be
used in the idle path of the cpuidle driver.
Signed-off-by: Gregory CLEMENT
---
arch/arm/mach-mvebu/pmsu.c | 132
ig entry in Kconfig.arm, and rename the config symbol
according the pattern used by other arm cpu: ARM_"soc name"_CPUIDLE
* Moved the build rule under the new ARM SoC section in the Makefile
* Rebased on Linus Torvalds master branch of Thursday September 12
Gregory CLEMENT (
ll_set_cpu_coherent is always used on the current CPU, so instead of
passing the CPU id as argument, ll_set_cpu_coherent() can find it by
itself.
Signed-off-by: Gregory CLEMENT
Acked-by: Thomas Petazzoni
---
arch/arm/mach-mvebu/coherency.c| 10 +-
arch/arm/mach-mvebu/coherency.h
For the Armada 380 and Armada 385 SoCs, the common bindings for those
2 SoCs, was forgotten. This patch add the documentation for the
marvell,aramda38x property.
Signed-off-by: Gregory CLEMENT
---
Hi,
This fix should be merged in 3.16. For 3.15 I am not sure as it is not
a regression.
Thanks
Hi Rob,
On 19/06/2014 16:54, Rob Herring wrote:
> On Thu, Jun 19, 2014 at 9:07 AM, Gregory CLEMENT
> wrote:
>> For the Armada 380 and Armada 385 SoCs, the common bindings for those
>> 2 SoCs, was forgotten. This patch add the documentation for the
>> marvell,aramda38x pr
For the Armada 380 and Armada 385 SoCs, the common bindings for those
2 SoCs, was forgotten. This patch add the documentation for the
marvell,aramda38x property.
Signed-off-by: Gregory CLEMENT
--
Hi,
This fix should be merged in 3.16. For 3.15 I am not sure as it is not
a regression.
Changelog
t it on an imx6 hardware.
Thanks,
Gregory CLEMENT (4):
ARM: smp_scu: Used defined value instead of literal constant
ARM: smp_scu: Add the enable speculative linefills operation
ARM: smp_scu: Add the enable standby operation
ARM: imx6q: Use the new function scu_standby_enable()
Nadav Haklai (1
ative request. "
Some SoC (such as the Armada 375/38x) can benefit of this feature. As
this is something related to the Cortex A9 and not specific to a SoC,
we can expose it in a common place.
Signed-off-by: Gregory CLEMENT
---
arch/arm/include/asm/smp_scu.h | 3 +++
arch/arm/kernel
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