ever
>>> up).
>>> I ensured that "ifconfig ethX up" always caused that.
>>>
>>> Does anyone succeed to boot openblocks-ax3 recently or hit same
>>> trouble?
>>
>> This is a known bug. Gregory Clement already has a fix and he
>>
On 03/19/2013 08:48 PM, Florian Fainelli wrote:
> On Tuesday 19 March 2013 17:43:49 Gregory CLEMENT wrote:
>>
>> Hi Masami,
>>
>> You can try this patch if you want.
>> I don't have the hardware today so I didn't test it.
>> If you (and also Florian
70-xp.h
> +++ b/include/linux/time-armada-370-xp.h
> @@ -11,8 +11,6 @@
> #ifndef __TIME_ARMADA_370_XPPRCMU_H
> #define __TIME_ARMADA_370_XPPRCMU_H
>
> -#include
> -
> -void __init armada_370_xp_timer_init(void);
> +void armada_370_xp_timer_init(void);
>
> #endif
>
e7deb7 cd5772dd fff5692e ed55f79e (7ed5a5f7)
---[ end trace 1b75b31a2719ed1d ]---
I am trying to figure out what happened.
>
> Cc: Gregory CLEMENT
> Signed-off-by: Stephen Boyd
> ---
> drivers/clocksource/time-armada-370-xp.c | 85
> ++--
>
On 03/20/2013 06:09 PM, Gregory CLEMENT wrote:
> On 03/13/2013 07:17 PM, Stephen Boyd wrote:
>> Separate the armada 370xp local timers from the local timer API.
>> This will allow us to remove ARM local timer support in the near
>> future and makes this driver multi-architect
On 03/20/2013 06:20 PM, Stephen Boyd wrote:
> On 03/20/13 10:09, Gregory CLEMENT wrote:
>> On 03/13/2013 07:17 PM, Stephen Boyd wrote:
>>> Separate the armada 370xp local timers from the local timer API.
>>> This will allow us to remove ARM local timer support in the nea
On 03/20/2013 06:26 PM, Gregory CLEMENT wrote:
> On 03/20/2013 06:20 PM, Stephen Boyd wrote:
>> On 03/20/13 10:09, Gregory CLEMENT wrote:
>>> On 03/13/2013 07:17 PM, Stephen Boyd wrote:
>>>> Separate the armada 370xp local timers from the local timer API.
>>
From: Lior Amsalem
For mvebu IOs are 32 bits and we have 40 bits memory due to LPAE so
make sure we give 32 bits addresses to the IOs.
Signed-off-by: Lior Amsalem
Tested-by: Franklin
Signed-off-by: Gregory CLEMENT
---
arch/arm/mach-mvebu/Kconfig |1 +
1 file changed, 1 insertion
don't support
LPAE)
This was heavily based on the work of Lior Amsalem.
Signed-off-by: Lior Amsalem
Signed-off-by: Gregory CLEMENT
---
arch/arm/boot/dts/armada-370-db.dts |2 +-
arch/arm/boot/dts/armada-370-mirabox.dts |2 +-
arch/arm/boot/dts/armada-370-r
. The
git branch called lpae is available at:
https://github.com/MISL-EBU-System-SW/mainline-public.git.
Thanks,
Gregory CLEMENT (1):
arm: dts: Convert mvebu device tree files to 64 bits
Lior Amsalem (4):
arm: mvebu: Aligne the internal registers virtual base to support
LPAE
arm: mvebu
From: Lior Amsalem
In order to be able to support he LPAE, the internal registers virtual
base must be aligned to 2MB.
Signed-off-by: Lior Amsalem
Signed-off-by: Gregory CLEMENT
---
arch/arm/include/debug/mvebu.S |2 +-
arch/arm/mach-mvebu/armada-370-xp.h |2 +-
2 files changed
From: Lior Amsalem
In order to be able to use more than 4GB address-cells and size-cells
have to be set to 2
Signed-off-by: Gregory CLEMENT
Signed-off-by: Lior Amsalem
---
arch/arm/boot/dts/skeleton64.dtsi | 13 +
1 file changed, 13 insertions(+)
create mode 100644 arch/arm
From: Lior Amsalem
pj4b cpus are LPAE capable so enable them on LPAE compilations
Signed-off-by: Lior Amsalem
Tested-by: Franklin
Signed-off-by: Gregory CLEMENT
---
arch/arm/mm/proc-v7.S |3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/arch/arm/mm/proc-v7.S b/arch
This conversion will allow to keep 32 bits addresses for the internal
registers whereas the memory of the system will be 64 bits.
Later it will also ease the move of the mvebu-mbus driver to the
device tree support.
Signed-off-by: Gregory CLEMENT
---
arch/arm/boot/dts/armada-370-db.dts
Signed-off-by: Gregory CLEMENT
---
arch/arm/boot/dts/armada-370-db.dts | 108 +-
arch/arm/boot/dts/armada-370-mirabox.dts | 78
arch/arm/boot/dts/armada-370-rd.dts |2 +
arch/arm/boot/dts/armada-370-xp.dtsi | 228
From: Thomas Petazzoni
Signed-off-by: Thomas Petazzoni
---
arch/arm/boot/dts/armada-xp-mv78230.dtsi | 28
arch/arm/boot/dts/armada-xp-mv78260.dtsi | 28
arch/arm/boot/dts/armada-xp-mv78460.dtsi | 54 +++---
3 files changed, 55 inse
l
the DMA transfer are restricted to the low 32 bits address space.
Gregory CLEMENT (4):
arm: mvebu: Limit the DMA zone when LPAE is selected
arm: dts: mvebu: Convert all the mvebu files to use the range
property
arm: dts: mvebu: introduce internal-regs node
arm: dts: mvebu: Convert mvebu
don't support LPAE)
This was heavily based on the work of Lior Amsalem.
Signed-off-by: Gregory CLEMENT
---
arch/arm/boot/dts/armada-370-db.dts |2 +-
arch/arm/boot/dts/armada-370-mirabox.dts |2 +-
arch/arm/boot/dts/armada-370-rd.dts |2 +-
arc
: Gregory CLEMENT
---
arch/arm/mach-mvebu/Kconfig |1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/mach-mvebu/Kconfig b/arch/arm/mach-mvebu/Kconfig
index 440b13e..db1bbc8 100644
--- a/arch/arm/mach-mvebu/Kconfig
+++ b/arch/arm/mach-mvebu/Kconfig
@@ -13,6 +13,7 @@ config ARCH_MVEBU
From: Lior Amsalem
pj4b cpus are LPAE capable so enable them on LPAE compilations
Signed-off-by: Lior Amsalem
Tested-by: Franklin
Signed-off-by: Gregory CLEMENT
---
arch/arm/mm/proc-v7.S |3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/arch/arm/mm/proc-v7.S b/arch
From: Lior Amsalem
In order to be able to support he LPAE, the internal registers virtual
base must be aligned to 2MB.
Signed-off-by: Lior Amsalem
Signed-off-by: Gregory CLEMENT
---
arch/arm/include/debug/mvebu.S |2 +-
arch/arm/mach-mvebu/armada-370-xp.h |2 +-
2 files changed
From: Thomas Petazzoni
Signed-off-by: Thomas Petazzoni
---
arch/arm/boot/dts/armada-370-xp.dtsi | 26 +-
arch/arm/boot/dts/armada-370.dtsi| 23 ---
arch/arm/boot/dts/armada-xp.dtsi | 32
3 files changed,
From: Lior Amsalem
In order to be able to use more than 4GB address-cells and size-cells
have to be set to 2
Signed-off-by: Gregory CLEMENT
Signed-off-by: Lior Amsalem
---
arch/arm/boot/dts/skeleton64.dtsi | 13 +
1 file changed, 13 insertions(+)
create mode 100644 arch/arm
On 04/05/2013 10:43 PM, Arnd Bergmann wrote:
> On Friday 05 April 2013, Gregory CLEMENT wrote:
>> Signed-off-by: Gregory CLEMENT
>
> The patch looks good but the description is a bit short.
>
It cannot be more brief! :)
I explained the purpose of this patch in the cover le
On 04/05/2013 10:41 PM, Arnd Bergmann wrote:
> On Friday 05 April 2013, Gregory CLEMENT wrote:
>> When LPAE is activated on Armada XP, all registers and IOs are still
>> 32bit, the 40bit extension is on the CPU to DRAM path (windows) only.
>> That means that all the DMA trans
On 04/05/2013 10:46 PM, Arnd Bergmann wrote:
> On Friday 05 April 2013, Gregory CLEMENT wrote:
>> The Armada XP SoCs have LPAE support. This is the second version patch
>> set whixh allow to run kernel on this SoCs with LPAE support.
>>
>> The biggest changes are the co
On 04/05/2013 10:50 PM, Arnd Bergmann wrote:
> On Friday 05 April 2013, Gregory CLEMENT wrote:
>> From: Lior Amsalem
>>
>> In order to be able to support he LPAE, the internal registers virtual
>> base must be aligned to 2MB.
>>
>> Signed-off-by: Lior Ams
On 01/25/2013 09:16 AM, Linus Walleij wrote:
> On Tue, Jan 22, 2013 at 10:10 PM, Gregory CLEMENT
> wrote:
>
>> Now that pca953x driver can handle GPIO expanders with more than 32
>> bits this patch adds the support for the pca9505 which cam with 40
>> GPIOs.
>>
rrupt on my board, I can't say it didn't break anything. Maybe
this time again Maxime will be willing to test it.
For the remaining improvement related to the PWA and MMP #ifdef, I
hope to be able to work on it this week-end.
Regards
Gregory CLEMENT (1):
gpio: pca953x: use simple irqdom
From: Linus Walleij
Using the devm_* managed resources the pca driver can be simplified
and cut down on boilerplate code.
[gcl: fixed a inccorect reference to a removed label, "goto fail_out"
became "return ret"]
Signed-off-by: Linus Walleij
Signed-off-by: Gregory CLEMEN
initialization of the driver.
Based on a initial patch from Linus Walleij
Signed-off-by: Gregory CLEMENT
---
drivers/gpio/gpio-pca953x.c | 65 +++
1 file changed, 28 insertions(+), 37 deletions(-)
diff --git a/drivers/gpio/gpio-pca953x.c b/drivers/gpio/gpio
On the SOCs Armada 370 and Armada XP, each CPU comes with two private
timers. This patch use the timer 0 of each CPU as local timer for the
clockevent if CONFIG_LOCAL_TIMER is selected. In the other case, use
only the private Timer 0 of CPU 0.
Signed-off-by: Gregory CLEMENT
---
drivers
MPIC allows the use of private interrupt for each CPUs. The 28th first
interrupts are per-cpu. This patch adds support to use them.
Signed-off-by: Gregory CLEMENT
---
arch/arm/mach-mvebu/irq-armada-370-xp.c | 15 +++
1 file changed, 11 insertions(+), 4 deletions(-)
diff --git a
Now that the time-armada-370-xp support local timers, updated the
device tree to take it into account.
Signed-off-by: Gregory CLEMENT
---
arch/arm/boot/dts/armada-370-xp.dtsi |5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/armada-370-xp.dtsi
b/arch
On 01/25/2013 09:51 AM, Linus Walleij wrote:
> On Fri, Jan 25, 2013 at 9:36 AM, Gregory CLEMENT
> wrote:
>
>> Well, at the beginning I thought adding support for pca9505 was just a matter
>> of a couple of lines to add. Then I realized that I need to handle the 40
>>
of this commit was to let the driver
find by itself the port type, but I didn't find yet how it managed to
do it and then why it failed in our case.
I will continue to investigate but any pointers are welcome.
Thanks,
--
Gregory Clement, Free Electrons
Kernel, drivers, real-time and embedd
On 02/27/2013 03:40 PM, Gregory CLEMENT wrote:
> Hello,
>
[ I have added linux-serial mailing list as I should added them
initially ]
> when I tried to use the linux-next git tree (next-20130226), I
> encountered a problem during boot: the serial port was no more
> initialized
Hi Heikki,
On 02/28/2013 10:26 AM, Heikki Krogerus wrote:
> Hi Gregory.
>
> On Wed, Feb 27, 2013 at 05:08:04PM +0100, Gregory CLEMENT wrote:
>> I found the root of the problem in drivers/tty/serial/8250/8250.c
>>
>> in the autoconfig() function, when the IIR registe
ency block, in other case transaction is driven
directly to DRAM.
Signed-off-by: Gregory CLEMENT
Reviewed-by: Yehuda Yitschak
---
arch/arm/plat-orion/addr-map.c |4
arch/arm/plat-orion/include/plat/addr-map.h |1 +
2 files changed, 5 insertions(+)
diff --git a/arch/arm/
early initialization of the platform.
Signed-off-by: Gregory CLEMENT
Reviewed-by: Yehuda Yitschak
---
arch/arm/boot/dts/armada-370-xp.dtsi |3 +-
arch/arm/mach-mvebu/addr-map.c |3 ++
arch/arm/mach-mvebu/armada-370-xp.c |1 +
arch/arm/mach-mvebu/coherency.c |
to be able to set the memory windows as
shared memory.
This series depend on the SMP patch set posted on Monday
(http://thread.gmane.org/gmane.linux.ports.arm.kernel/194901).
Regards,
Gregory
Gregory CLEMENT (2):
arm: plat-orion: Add coherency attribute when setup mbus target
arm: mvebu: Add
On 10/24/2012 01:36 PM, Arnd Bergmann wrote:
> On Wednesday 24 October 2012, Gregory CLEMENT wrote:
>> +void __init armada_370_xp_coherency_iocache_init(void)
>> +{
>> + /* When the coherency fabric is available, the Armada XP and
>> +* Aramada
On 10/24/2012 10:25 AM, Andrew Lunn wrote:
> On Wed, Oct 24, 2012 at 10:04:01AM +0200, Gregory CLEMENT wrote:
>> Armada 370 and XP come with an unit called coherency fabric. This unit
>> allows to use the Armada XP as a nearly coherent architecture. The
>> coherency mechanism
On 10/24/2012 01:48 PM, Gregory CLEMENT wrote:
> On 10/24/2012 01:36 PM, Arnd Bergmann wrote:
>> On Wednesday 24 October 2012, Gregory CLEMENT wrote:
>>> +void __init armada_370_xp_coherency_iocache_init(void)
>>> +{
>>> + /* When the coherency fa
flag"
Signed-off-by: Gregory CLEMENT
Cc: Marek Szyprowski
---
arch/arm/mach-mvebu/armada-370-xp.c | 12
1 file changed, 12 insertions(+)
diff --git a/arch/arm/mach-mvebu/armada-370-xp.c
b/arch/arm/mach-mvebu/armada-370-xp.c
index 2af6ce5..cbad821 100644
--- a/arch/arm/mach-mv
From: Lior Amsalem
Signed-off-by: Gregory CLEMENT
Signed-off-by: Lior Amsalem
---
arch/arm/boot/dts/armada-370-db.dts |3 +++
arch/arm/boot/dts/armada-370-xp.dtsi | 10 ++
arch/arm/boot/dts/armada-xp-db.dts |3 +++
arch/arm/configs/mvebu_defconfig |7 +++
4
/gmane.linux.kernel/1375701). The git branch
called mvebu-SATA-for-3.8 is also available at
https://github.com/MISL-EBU-System-SW/mainline-public.git.
Regards,
Gregory
Gregory CLEMENT (1):
arm: mvebu: increase atomic coherent pool size for armada 370/XP
Lior Amsalem (1):
arm: mvebu: adding
On 10/24/2012 02:24 PM, Arnd Bergmann wrote:
> On Wednesday 24 October 2012, Gregory CLEMENT wrote:
>> On 10/24/2012 01:48 PM, Gregory CLEMENT wrote:
>>> On 10/24/2012 01:36 PM, Arnd Bergmann wrote:
>>>>
>>>> I think it would be cleaner to statically
y care
> personally, it's really up to Jason/Andrew on this.
>
> Another comment below, though.
>
> On Wed, 24 Oct 2012 15:49:21 +0200, Gregory CLEMENT wrote:
>
>> diff --git a/arch/arm/boot/dts/armada-370-xp.dtsi
>> b/arch/arm/boot/dts/armada-370-xp.dtsi
On 10/24/2012 02:27 PM, Thomas Petazzoni wrote:
[...]
I will fixed the spelling and complete the comments as suggested
[...]
>> +struct dma_map_ops armada_xp_dma_ops;
>
> static
OK
>
>> +static inline void armada_xp_sync_io_barrier(void)
>> +{
>> +writel(0x1, coherency_cpu_base + IO_SYNC_
On 10/24/2012 04:08 PM, Andrew Lunn wrote:
> On Wed, Oct 24, 2012 at 03:49:21PM +0200, Gregory CLEMENT wrote:
>> From: Lior Amsalem
>>
>> Signed-off-by: Gregory CLEMENT
>> Signed-off-by: Lior Amsalem
>> ---
>> arch/arm/boot/dts/armada-370-db.dts |
bled SATA ports? Or maybe the
> SATA ports cannot be enabled/disabled on a per-port basis, in which
> case I'm obviously wrong here.
The actual implementation of mv_sata.c doesn't work like this. You can
only pass the number of ports supported not the list of the port you
want
On 10/25/2012 03:53 PM, Rob Herring wrote:
> On 10/25/2012 08:18 AM, Jason Cooper wrote:
>> On Wed, Oct 24, 2012 at 04:05:45PM +0200, Gregory CLEMENT wrote:
>>> On 10/24/2012 04:01 PM, Thomas Petazzoni wrote:
>>>> Hello,
>>>>
>>>> Shouldn
On 10/25/2012 03:57 PM, Rob Herring wrote:
> On 10/25/2012 08:34 AM, Gregory CLEMENT wrote:
>> On 10/25/2012 03:21 PM, Thomas Petazzoni wrote:
>>> Jason,
>>>
>>> On Thu, 25 Oct 2012 09:18:18 -0400, Jason Cooper wrote:
>>>
>>>>> J
the mvebu_defconfig file with only the necessary symbols.
- Updated also the multi_v7_defconfig file.
Regards,
Gregory
Gregory CLEMENT (4):
arm: mvebu: increase atomic coherent pool size for armada 370/XP
arm: mvebu: adding SATA support: dt binding for Armada 370/XP
arm: mvebu: adding SATA supp
flag"
Signed-off-by: Gregory CLEMENT
Acked-by: Marek Szyprowski
---
arch/arm/mach-mvebu/armada-370-xp.c | 12
1 file changed, 12 insertions(+)
diff --git a/arch/arm/mach-mvebu/armada-370-xp.c
b/arch/arm/mach-mvebu/armada-370-xp.c
index 2af6ce5..cbad821 100644
--- a/arch/arm/
Signed-off-by: Gregory CLEMENT
Signed-off-by: Lior Amsalem
---
arch/arm/configs/multi_v7_defconfig |2 ++
arch/arm/configs/mvebu_defconfig|3 +++
2 files changed, 5 insertions(+)
diff --git a/arch/arm/configs/multi_v7_defconfig
b/arch/arm/configs/multi_v7_defconfig
index 159f75f
Add the SATA device tree bindings for
- Armada XP evaluation board (DB-78460-BP)
- Armada 370 evaluation board (DB-88F6710-BP-DDR3)
Signed-off-by: Gregory CLEMENT
Signed-off-by: Lior Amsalem
---
arch/arm/boot/dts/armada-370-db.dts |4
arch/arm/boot/dts/armada-xp-db.dts |4
2
Signed-off-by: Gregory CLEMENT
Signed-off-by: Lior Amsalem
---
arch/arm/boot/dts/armada-370-xp.dtsi |9 +
1 file changed, 9 insertions(+)
diff --git a/arch/arm/boot/dts/armada-370-xp.dtsi
b/arch/arm/boot/dts/armada-370-xp.dtsi
index 94b4b9e..a911f7a 100644
--- a/arch/arm/boot/dts
On 10/26/2012 02:39 PM, Andrew Lunn wrote:
> On Fri, Oct 26, 2012 at 02:30:45PM +0200, Gregory CLEMENT wrote:
>> Hello,
>>
>> this patch set adds the SATA support for Armada 370 and Armada XP. Few
>> changes have been done since the first version by taking in account
&
On 10/26/2012 03:34 PM, Andrew Lunn wrote:
> On Fri, Oct 26, 2012 at 09:31:54AM -0400, Jason Cooper wrote:
>> On Fri, Oct 26, 2012 at 02:30:47PM +0200, Gregory CLEMENT wrote:
>>> Signed-off-by: Gregory CLEMENT
>>> Signed-off-by: Lior Amsalem
>>> ---
>&
On 10/26/2012 05:02 PM, Jason Cooper wrote:
> On Fri, Oct 26, 2012 at 04:57:59PM +0200, Thomas Petazzoni wrote:
>>
>> On Fri, 26 Oct 2012 15:52:25 +0200, Andrew Lunn wrote:
Now, about white spaces vs tab, I don't know what is the rule
for .dts file.
>>>
>>> I personally use tabs, but i do
This platform, available from Globalscale has an Armada 370. For now,
only the serial port is supported. Support for network, USB and other
peripherals will be added as drivers for them become available for
Armada 370 in mainline.
Signed-off-by: Gregory CLEMENT
---
arch/arm/boot/dts/Makefile
-> V2:
- Improved the spelling and the wording of the documentation and the
1st commit log
- Removed the "end_of_list" name which are unused here.
- Fix the cpu clock by using of_clk_src_onecell_get in the same way it
was used for the core clocks
Regards,
Gregory CLEMENT (3):
clk
Signed-off-by: Gregory CLEMENT
cc: John Stultz
---
arch/arm/boot/dts/armada-370-db.dts |4
arch/arm/boot/dts/armada-370-xp.dtsi |1 +
drivers/clocksource/time-armada-370-xp.c | 11 ++-
3 files changed, 7 insertions(+), 9 deletions(-)
diff --git a/arch/arm/boot
Signed-off-by: Gregory CLEMENT
---
arch/arm/boot/dts/armada-370.dtsi | 12 +
arch/arm/boot/dts/armada-xp.dtsi| 48 +++
arch/arm/mach-mvebu/Kconfig |5
arch/arm/mach-mvebu/armada-370-xp.c |8 +-
arch/arm/mach-mvebu
forward. For a new
SoC, only 3 binding have to be added:
- one to provide the tclk frequency
- one to provde the pclk frequency
- and one to provide the ratio between the pclk and the children
clocks
Signed-off-by: Gregory CLEMENT
---
.../devicetree/bindings/clock/mvebu-core-clock.txt | 40
off-by: Sebastian Hesselbarth
> ---
> Changelog:
> v1->v2:
> - only remove of_clk_init from custom timer hook, further cleanup
> will be carried out later (Reported by Gregory Clement)
>
> Cc: Gregory Clement
> Cc: Russell King
> Cc: Arnd Bergmann
> Cc: linux
; or "bugs" - call it whatever you want.
>
> I am not an l2cc expert, but basically I see two options:
> a) use (possibly) wrong existing compatible in current mv88de3100.dtsi
> now and fix later.
> b) add tauros3 compatible now and add (possible) quirks/marvell-specific
>
On 09/10/2013 10:50, Mark Rutland wrote:
> On Tue, Oct 08, 2013 at 05:33:23PM +0100, Gregory CLEMENT wrote:
>> On 08/10/2013 18:05, Sebastian Hesselbarth wrote:
>>> On 10/08/2013 03:41 PM, Mark Rutland wrote:
>>>> On Tue, Oct 08, 2013 at 01:24:28PM +0100, Sebastian
ings we have done for Aurora when we use
the "aurora-system-cache" compatible string.
[...]
Regards,
Gregory
--
Gregory Clement, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com
--
To unsubscribe from t
On 10/17/2012 05:39 PM, Jason Cooper wrote:
> Mike,
>
> On Mon, Oct 15, 2012 at 02:18:16PM +0200, Gregory CLEMENT wrote:
>> Hello Mike,
>>
>> The v3.7-rc1 was released yesterday. So here it is the updated version
>> of my patch set. The rebase was flawless. An I
for coherency fabric
Gregory CLEMENT (3):
arm: dma mapping: Export dma ops functions
arm: plat-orion: Add coherency attribute when setup mbus target
arm: mvebu: Add hardware I/O Coherency support
.../devicetree/bindings/arm/coherency-fabric.txt |9 ++-
arch/arm/boot/dts/armada-370-xp.d
-by: Gregory CLEMENT
---
arch/arm/include/asm/dma-mapping.h | 62
arch/arm/mm/dma-mapping.c | 36 +
2 files changed, 70 insertions(+), 28 deletions(-)
diff --git a/arch/arm/include/asm/dma-mapping.h
b/arch/arm/include/asm/dma
p_cfg struct filled during the early initialization of
the platform.
Signed-off-by: Gregory CLEMENT
Reviewed-by: Yehuda Yitschak
---
.../devicetree/bindings/arm/coherency-fabric.txt |9 ++-
arch/arm/boot/dts/armada-370-xp.dtsi |3 +-
arch/arm/mach-mvebu/addr-
ency block, in other case transaction is driven
directly to DRAM.
Signed-off-by: Gregory CLEMENT
Reviewed-by: Yehuda Yitschak
Acked-by: Thomas Petazzoni
---
arch/arm/plat-orion/addr-map.c |4
arch/arm/plat-orion/include/plat/addr-map.h |1 +
2 files changed, 5 insertion
Hi Andrew,
With this 2 patches I added clock gating support for Armada 370 and
Armada XP. I compiled and tested on the boards, and managed to see the
new clock using debugfs.
Feel free to squash them in your series if you want.
Regards,
Gregory CLEMENT (2):
clk: mvebu: armada 370/XP add
Signed-off-by: Gregory CLEMENT
---
.../bindings/clock/mvebu-gated-clock.txt | 43 ++
arch/arm/mach-mvebu/Kconfig|1 +
drivers/clk/mvebu/clk-gating-ctrl.c| 61
3 files changed, 105 insertions(+)
diff --git
Signed-off-by: Gregory CLEMENT
---
arch/arm/boot/dts/armada-370.dtsi |8
arch/arm/boot/dts/armada-xp.dtsi |7 +++
2 files changed, 15 insertions(+)
diff --git a/arch/arm/boot/dts/armada-370.dtsi
b/arch/arm/boot/dts/armada-370.dtsi
index dae966c..25524eb 100644
--- a/arch
Hi Andrew
On 11/17/2012 09:26 AM, Andrew Lunn wrote:
> Hi Gregory
>
> Nice work
Thanks!
>
> On Fri, Nov 16, 2012 at 07:01:59PM +0100, Gregory CLEMENT wrote:
>> Signed-off-by: Gregory CLEMENT
>> ---
>> .../bindings/clock/mvebu-gated-clock.txt | 43
On 11/19/2012 04:12 AM, Jason Cooper wrote:
> On Fri, Nov 16, 2012 at 10:46:15PM +0100, Gregory CLEMENT wrote:
>> On 11/14/2012 11:31 PM, Gregory CLEMENT wrote:
>>> Hello Russell,
>>>
>>> With the 2 changes I have done on according your comments
>>> do
think it is
something specific to ARM then I propose the patch in the following
email.
Any feedback on this issue would be welcome
Thanks,
Gregory CLEMENT (1):
ARM: don't allow to register the early_console twice
arch/arm/kernel/early_printk.c |6 +-
1 file changed, 5 insertions(+), 1
Richard Genoud), with and with CONFIG_SMP
selected.
This patch simply doesn't allow to call twice register_console() with
the early_console.
Signed-off-by: Gregory CLEMENT
---
arch/arm/kernel/early_printk.c |6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/arch/arm/kern
and commit "arm: delete __cpuinit/__CPUINIT usage from all ARM users"
> from the cpuinit tree.
>
> I fixed it up (see below) and can carry the fix as necessary (no action is
> required).
>
>From my point of view it looks good.
Thanks,
--
Gregory Clement, Free Electr
| 35 +-
>>> drivers/usb/gadget/at91_udc.c | 12 +-
>>> drivers/usb/gadget/atmel_usba_udc.c|2 +-
>>> drivers/usb/host/ehci-atmel.c |8 +-
>>> drivers/usb/host/ohci-at91.c | 12 +-
bigger for Armada XP and for this SoCs we add a new flag
for the i2c-bridge capability.
The Device Tree binding documentation is updated accordingly.
Signed-off-by: Gregory CLEMENT
---
Documentation/devicetree/bindings/i2c/i2c-mv64xxx.txt | 6 ++
arch/arm/boot/dts/armada-370-xp.dtsi
the the code modified by Russell King's fixes]
[gregory.clem...@free-electrons.com: Merge and split the commits to
push them to the accurate maintainer i2c and of]]
[gregory.clem...@free-electrons.com: Reword the commit log]
Signed-off-by: Piotr Ziecik
Signed-off-by: Gregory CLEMENT
---
dr
be able to use this new
feature and should go through mvebu subsystem.
The 2 patches are independents for building or even at runtime, but of
course we need both of them to be able to use the I2C Transaction
Generator on the Armada XP SoC.
Thanks
Gregory CLEMENT (1):
ARM: dts: mvebu: Add the
Hello,
This series contains a real fix for the I2C controller of the Armada
XP SoC and a patch closer to a improvement than a fix.
They are independent and are only in the same series because they are
kind of fixes.
They are based on 3.10-rc4, and they will be small conflicts if they
are applied
Hello,
This series contains a real fix for the I2C controller of the Armada
XP SoC and a patch closer to a improvement than a fix.
They are independent and are only in the same series because they are
kind of fixes.
They are based on 3.10-rc4, and they will be small conflicts if they
are applied
2.9us.
So this patch adds a 5us delay for the start case only if the
mv64xxx_i2c_errata_delay flag is set.
[gregory.clem...@free-electrons.com: Merge the incoming commits into
this single one]
[gregory.clem...@free-electrons.com: Reword the commit log]
Signed-off-by: Gregory CLEMENT
Signed-off-by
: Gregory CLEMENT
Signed-off-by: Zbigniew Bodek
---
drivers/i2c/busses/i2c-mv64xxx.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/i2c/busses/i2c-mv64xxx.c b/drivers/i2c/busses/i2c-mv64xxx.c
index 60cac9f..88c2dd0 100644
--- a/drivers/i2c/busses/i2c-mv64xxx.c
+++ b
the code look nicer and gets rid of the warning.
>
> Signed-off-by: Arnd Bergmann
> Acked-by: Jason Cooper
> Cc: Gregory CLEMENT
> ---
> drivers/clocksource/time-armada-370-xp.c | 2 --
> 1 file changed, 2 deletions(-)
>
> diff --git a/drivers/clocksource/time-ar
th
> ---
> Notes:
> - coherency, mbus, and cache init are moved to .init_machine hook
> - time-armada-370-xp is converted to clocksource_of_init compatible init
>
> Cc: Russell King
> Cc: Arnd Bergmann
> Cc: Gregory Clement
> Cc: linux-arm-ker...@lists.infr
On 23/08/2013 12:32, Sebastian Hesselbarth wrote:
> On 08/23/13 12:06, Gregory CLEMENT wrote:
>> On 20/08/2013 04:04, Sebastian Hesselbarth wrote:
>>> With arch/arm calling of_clk_init(NULL) from time_init(), we can now
>>> remove custom .init_time hooks.
>>
>&
On 23/08/2013 14:13, Sebastian Hesselbarth wrote:
> On 08/23/13 13:39, Gregory CLEMENT wrote:
>> On 23/08/2013 12:32, Sebastian Hesselbarth wrote:
>>> On 08/23/13 12:06, Gregory CLEMENT wrote:
>>>> On 20/08/2013 04:04, Sebastian Hesselbarth wrote:
>>>>>
On 23/08/2013 16:23, Gregory CLEMENT wrote:
> On 23/08/2013 14:13, Sebastian Hesselbarth wrote:
>> On 08/23/13 13:39, Gregory CLEMENT wrote:
>>> On 23/08/2013 12:32, Sebastian Hesselbarth wrote:
>>>> On 08/23/13 12:06, Gregory CLEMENT wrote:
>>>>> On
ng the DT helper, we can remove the devices tree parsing.
>>>>
>>>> This patch removes DT parsing by making use of of_get_cpu_node.
>>>>
>>>> Cc: Gregory Clement
>>>> Cc: Andrew Lunn
>>>> Cc: Jason Cooper
>>>> Sign
On 19/07/2013 01:21, Stephen Boyd wrote:
> The 32 bit sched_clock interface now supports 64 bits. Upgrade to
> the 64 bit function to allow us to remove the 32 bit registration
> interface.
Acked-by: Gregory CLEMENT
>
> Cc: Gregory CLEMENT
> Signed-off-by: Stephen Boyd
On 07/08/2013 03:33, Stepan Moskovchenko wrote:
> Update the reg property of the memory node in
> skeleton64.dtsi to reflect the fact that the root node uses
> address-cells=2 and size-cells=2.
Good catch
Acked-by: Gregory CLEMENT
>
> Change-Id: Ie9b61166143969e020ceebc51
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