state for the process, to be rescheduled. With the flag is set, there
is a head of wait-queue is associated with the process. The process
keeps rescheduling itself until the flag is cleared when page-ready
notification is received through (PPI) interrupt.
Signed-off-by: Gavin Shan
---
arch/arm64/i
ough SMCCC interface. Besides, the version of the asynchronous
page fault is validated when the feature is enabled on the guest.
* The feature is disabled on guest when boot parameter "no-kvmapf"
is specified.
Signed-off-by: Gavin Shan
---
arch/arm64/kernel/Makefile |
Hi Keqian,
On 3/15/21 8:42 PM, Gavin Shan wrote:
On 3/15/21 7:04 PM, Keqian Zhu wrote:
On 2021/3/15 12:18, Gavin Shan wrote:
find_vma_intersection() has been existing to search the intersected
vma. This uses the function where it's applicable, to simplify the
code.
Signed-off-by: Gavin
from 928ms to 864ms.
Signed-off-by: Gavin Shan
Reviewed-by: Keqian Zhu
---
arch/arm64/kvm/mmu.c | 9 +++--
1 file changed, 7 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/kvm/mmu.c b/arch/arm64/kvm/mmu.c
index 192e0df2fc8e..2491b40a294a 100644
--- a/arch/arm64/kvm/mmu.c
+++ b/arch/
We needn't expose the function as it's only used by mmu.c since it
was introduced by commit c64735554c0a ("KVM: arm: Add initial dirty
page locking support").
Signed-off-by: Gavin Shan
Reviewed-by: Keqian Zhu
---
arch/arm64/include/asm/kvm_host.h | 1 -
arch/arm64/kvm/mm
find_vma_intersection() has been existing to search the intersected
vma. This uses the function where it's applicable, to simplify the
code.
Signed-off-by: Gavin Shan
Reviewed-by: Keqian Zhu
---
arch/arm64/kvm/mmu.c | 10 ++
1 file changed, 6 insertions(+), 4 deletions(-)
diff --
eqian (Gavin)
* Drop patch to fix IPA limit boundary issue(Keqian)
* Comments on why we use __gfn_to_pfn_memslot() (Keqian)
Gavin Shan (3):
KVM: arm64: Hide kvm_mmu_wp_memory_region()
KVM: arm64: Use find_vma_intersection()
KVM: arm64: Don't retrieve memory slot again in
The series includes several minior improvements to stage-2 page fault
handler: PATCH[1/2] are cleaning up the code. PATCH[3] fixes the address
range check on adding new memory slot. PATCH[4] don't retrieve the memory
slot again in the page fault handler to save a bit CPU cycles.
Gavin Sh
find_vma_intersection() has been existing to search the intersected
vma. This uses the function where it's applicable, to simplify the
code.
Signed-off-by: Gavin Shan
---
arch/arm64/kvm/mmu.c | 10 ++
1 file changed, 6 insertions(+), 4 deletions(-)
diff --git a/arch/arm64/kvm/mm
We needn't expose the function as it's only used by mmu.c.
Signed-off-by: Gavin Shan
---
arch/arm64/include/asm/kvm_host.h | 1 -
arch/arm64/kvm/mmu.c | 2 +-
2 files changed, 1 insertion(+), 2 deletions(-)
diff --git a/arch/arm64/include/asm/kvm_host.h
b/arch/arm64/i
from 928ms to 864ms.
Signed-off-by: Gavin Shan
---
arch/arm64/kvm/mmu.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/kvm/mmu.c b/arch/arm64/kvm/mmu.c
index a5a8ade9fde4..4a4abcccfafb 100644
--- a/arch/arm64/kvm/mmu.c
+++ b/arch/arm64/kvm/mmu.c
@@ -846,7 +
ill usable.
struct kvm_userspace_memory_region {
__u32 slot; /* 1*/
__u32 flags; /* 0*/
__u64 guest_phys_addr;/* 0xfff000 */
__u64 memory_size;/* 0x1000 */
__u64 userspace_addr;
};
Signed-off
Hi Marc,
On 3/15/21 7:52 PM, Marc Zyngier wrote:
On Mon, 15 Mar 2021 04:18:42 +,
Gavin Shan wrote:
find_vma_intersection() has been existing to search the intersected
vma. This uses the function where it's applicable, to simplify the
code.
Signed-off-by: Gavin Shan
---
arch/arm6
Hi Keqian,
On 3/15/21 7:04 PM, Keqian Zhu wrote:
On 2021/3/15 12:18, Gavin Shan wrote:
find_vma_intersection() has been existing to search the intersected
vma. This uses the function where it's applicable, to simplify the
code.
Signed-off-by: Gavin Shan
---
arch/arm64/kvm/mmu.c
Hi Keqian,
On 3/15/21 6:33 PM, Keqian Zhu wrote:
FYI, this has been fixed by Marc in commit 262b003d059c.
Yeah, I didn't check 5.12.rc3 code where the issue has been
fixed. So please ignore this one and sorry for the noise.
Thanks,
Gavin
On 2021/3/15 12:18, Gavin Shan wrote:
The
Hi Keqian,
On 3/15/21 7:25 PM, Keqian Zhu wrote:
On 2021/3/15 12:18, Gavin Shan wrote:
We needn't retrieve the memory slot again in user_mem_abort() because
the corresponding memory slot has been passed from the caller. This
I think you are right, though fault_ipa will be adjusted when w
On Mon, Jul 21, 2014 at 07:30:43PM +0300, Tuomas Tynkkynen wrote:
I guess it's same issue and fix as:
http://patchwork.ozlabs.org/patch/370629/
Thanks,
Gavin
>Forward declaring struct pci_dev in aer.h avoids this warning:
>
>In file included from include/ras/ras_event.h:11:0,
>
On Thu, Sep 18, 2014 at 06:26:50PM +1000, Michael Neuling wrote:
>From: Ian Munsie
>
>Some of the MSI IRQ code in pnv_pci_ioda_msi_setup() is generically useful so
>split it out.
>
>This will be used by some of the cxl PCIe code later.
>
>Signed-off-by: Ian Munsie
>Signed-off-by: Michael Neuling
On Thu, Sep 18, 2014 at 06:26:52PM +1000, Michael Neuling wrote:
>From: Ian Munsie
>
>This adds a number of functions for allocating IRQs under powernv PCIe for cxl.
>
>Signed-off-by: Ian Munsie
>Signed-off-by: Michael Neuling
>---
> arch/powerpc/include/asm/pnv-pci.h| 27 +
> arch/p
On Mon, Sep 22, 2014 at 04:56:17PM +1000, Michael Ellerman wrote:
>On Sun, 2014-09-21 at 10:55 -0700, Joe Perches wrote:
>> printk calls should return void
>>
>> Joe Perches (2):
>> powerpc: pci-ioda: Remove unnecessary return value from printk
>> powerpc: pci-ioda: Use a single function to em
view patch. If anyone has any objections, please let me
>> >> know.
>> >>
>> >> --
>> >>
>> >> From: Gavin Shan
>> >>
>> >> commit d0b4cc4e32705ff00d90d32da7783c266c702c04 upstream.
>> >&
n
>Reported-by: Ben Hutchings
>Cc: sta...@vger.kernel.org
Acked-by: Gavin Shan
>---
> drivers/pci/pci.c |9 +++--
> 1 file changed, 7 insertions(+), 2 deletions(-)
>
>diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c
>index 759475e..81012ec 100644
>--- a/drivers
, DMA reads and writes to addresses not mapped by
>the IOMMU will cause an EEH, allowing us to debug such issues.
>
>Signed-off-by: Thadeu Lima de Souza Cascardo
Reviewed-by: Gavin Shan
Except minor things as below.
>---
> Documentation/kernel-parameters.txt |2 ++
&g
On Wed, May 18, 2016 at 08:51:59PM -0500, Rob Herring wrote:
>On Wed, May 18, 2016 at 7:23 PM, Rob Herring wrote:
>> On Wed, May 18, 2016 at 4:26 PM, Rhyland Klein wrote:
>>> On 5/18/2016 3:58 PM, Rhyland Klein wrote:
On 5/18/2016 3:36 PM, Rob Herring wrote:
> On Wed, May 18, 2016 at 10:
On Thu, May 19, 2016 at 07:48:18AM -0500, Rob Herring wrote:
>On Thu, May 19, 2016 at 6:19 AM, Gavin Shan wrote:
>> On Wed, May 18, 2016 at 08:51:59PM -0500, Rob Herring wrote:
>>>On Wed, May 18, 2016 at 7:23 PM, Rob Herring wrote:
>>>> On Wed, May 18, 2016 at
On Fri, Oct 17, 2014 at 02:44:43AM -0700, Eric W. Biederman wrote:
>"Li, Zhen-Hua" writes:
>
>> This is an update of the patch
>> https://lkml.org/lkml/2014/10/10/37
>>
>> This patch is doing the reset works before the kdump kernel boots.
>
>If I have said it once I have said it a thousand ti
dma_pe();
>- for virtual PE, the sysfs entries are not ready to create all symlinks
>so actual adding is happening in tce_iommu_bus_notifier.
>
>Signed-off-by: Alexey Kardashevskiy
Reviewed-by: Gavin Shan
>---
>Changes:
>v10:
>* new to the series
>
nse when we add TCE table sharing.
>
>Signed-off-by: Alexey Kardashevskiy
Reviewed-by: Gavin Shan
Thanks,
Gavin
>---
> arch/powerpc/platforms/powernv/pci-ioda.c | 28
> 1 file changed, 8 insertions(+), 20 deletions(-)
>
>diff --git a/arch/powerpc/p
ommu_free_table().
>
>This adds a iommu_pseries_free_table() helper which does
>iommu_group_put() and iommu_free_table(). Later it will be
>changed to receive a table_group and we will have to change less
>lines then.
>
>This should cause no behavioural change.
>
>Signed-off-by:
DMA windows, we will need to be able to release
>iommu_table even if it was used for VFIO in which case it_map is NULL
>so does the patch.
>
>Signed-off-by: Alexey Kardashevskiy
Reviewed-by: Gavin Shan
>---
> arch/powerpc/kernel/iommu.c | 3 +--
> 1 file changed, 1 insertion(+),
the rest of the patch is mechanical.
>
>Signed-off-by: Alexey Kardashevskiy
>[aw: for the vfio related changes]
>Acked-by: Alex Williamson
>Reviewed-by: David Gibson
Reviewed-by: Gavin Shan
>---
>Changes:
>v9:
>* added missing tce_iommu_clear call after iommu_release
related changes]
>Acked-by: Alex Williamson
>Reviewed-by: David Gibson
Reviewed-by: Gavin Shan
Thanks,
Gavin
>---
>Changes:
>v8: changed subject
>
>v6:
>* the helper is simplified to one line
>
>v4:
>* s/tce_check_page_size/tce_page_is_contained/
>---
> dr
do not include
>IOMMU_PAGE_SHIFT.
>
>Signed-off-by: Alexey Kardashevskiy
>Reviewed-by: David Gibson
>[aw: for the vfio related changes]
>Acked-by: Alex Williamson
Reviewed-by: Gavin Shan
Thanks,
Gavin
>---
> drivers/vfio/vfio_iommu_spapr_tce.c | 26 +--
for the vfio related changes]
>Acked-by: Alex Williamson
>Reviewed-by: David Gibson
Reviewed-by: Gavin Shan
>---
>Changes:
>v4:
>* new helpers do nothing if @npages == 0
>* tce_iommu_disable() now can decrement the counter if the group was
>detached (not possibl
hat the container is enabled, otherwise
>-EPERM is returned.
>
>Signed-off-by: Alexey Kardashevskiy
>[aw: for the vfio related changes]
>Acked-by: Alex Williamson
>Reviewed-by: David Gibson
Reviewed-by: Gavin Shan
Thanks,
Gavin
>---
> drivers/vfio/vfio_iommu_spapr_tce
r an IOMMU table which will accept/return
>physical addresses (unlike current tce_build()) which will eliminate
>redundant conversions.
>
>Signed-off-by: Alexey Kardashevskiy
>[aw: for the vfio related changes]
>Acked-by: Alex Williamson
>Reviewed-by: David Gibson
Revie
On Wed, May 13, 2015 at 02:51:36PM +0200, Thomas Huth wrote:
>On Wed, 13 May 2015 16:30:16 +1000
>Alexey Kardashevskiy wrote:
>
>> On 05/13/2015 03:33 PM, Gavin Shan wrote:
>> > On Tue, May 12, 2015 at 01:38:54AM +1000, Alexey Kardashevskiy wrote:
>> >> A
nges]
>Acked-by: Alex Williamson
>Reviewed-by: David Gibson
Reviewed-by: Gavin Shan
Thanks,
Gavin
>---
> drivers/vfio/vfio_iommu_spapr_tce.c | 40 ++---
> 1 file changed, 24 insertions(+), 16 deletions(-)
>
>diff --git a/drivers/vf
Signed-off-by: Alexey Kardashevskiy
>Reviewed-by: David Gibson
Reviewed-by: Gavin Shan
>---
>Changes:
>v9:
>* added comment why we must put only valid permission bits
>---
> arch/powerpc/include/asm/iommu.h | 1 +
> arch/powerpc/kernel/iommu.c | 15
U tables in the system and replace "multi" callbacks with single
>ones.
>
>For powernv, this defines _ops per PHB type which are P5IOC2/IODA1/IODA2.
>This makes the callbacks for them public. Later patches will extend
>callbacks for IODA1/2.
>
>No change in behaviour is
ate() to receives TCE index and
>number of pages which are PCI addresses shifted by IOMMU page shift.
>
>No change in behaviour is expected.
>
>Signed-off-by: Alexey Kardashevskiy
>Reviewed-by: David Gibson
Reviewed-by: Gavin Shan
>---
>Changes:
>v10:
>* moved before
_pci_ioda2_setup_dma_pe as this is where DMA is actually initialized.
>This change is here because those lines had to be changed anyway.
>
>This should cause no behavioural change.
>
>Signed-off-by: Alexey Kardashevskiy
Reviewed-by: Gavin Shan
>---
>Changes:
>v10:
>* new to
-off-by: Alexey Kardashevskiy
>[aw: for the vfio related changes]
>Acked-by: Alex Williamson
>Reviewed-by: David Gibson
Reviewed-by: Gavin Shan
Thanks,
Gavin
>---
>Changes:
>v10:
>* iommu_table is not embedded into iommu_table_group but allocated
>dynamically
&g
;more compared to pnv_pci_ioda2_set_bypass. This moves tce_bypass_base
>initialization to pnv_pci_ioda2_setup_dma_pe.
>
>Signed-off-by: Alexey Kardashevskiy
>[aw: for the vfio related changes]
>Acked-by: Alex Williamson
Reviewed-by: Gavin Shan
Thanks,
Gavin
>---
>Changes:
>v
table so no chache is used) but this is going
>to change with Dynamic DMA windows (DDW).
>
>Signed-off-by: Alexey Kardashevskiy
Reviewed-by: Gavin Shan
Thanks,
Gavin
>---
>Changes:
>v10:
>* fixed error from checkpatch.pl
>* removed comment at "ibm,opal-tce-kill" pa
On Tue, May 12, 2015 at 01:39:10AM +1000, Alexey Kardashevskiy wrote:
>The iommu_table struct keeps a list of IOMMU groups it is used for.
>At the moment there is just a single group attached but further
>patches will add TCE table sharing. When sharing is enabled, TCE cache
>in each PE needs to be
ior is expected.
>
>Signed-off-by: Alexey Kardashevskiy
>Reviewed-by: David Gibson
Reviewed-by: Gavin Shan
Thanks,
Gavin
>---
>Changes:
>v9:
>* new patch in the series to separate this mechanical change from
>functional changes; this is not right before
>"powerpc/powern
ng the it_map to the state it was in when we called
>iommu_take_ownership().
>
>Signed-off-by: Alexey Kardashevskiy
>Reviewed-by: David Gibson
Reviewed-by: Gavin Shan
Thanks,
Gavin
>---
>Changes:
>v9:
>* iommu_table_take_ownership() did not return @ret (and ignored EBUSY),
>now it do
Signed-off-by: Alexey Kardashevskiy
>Reviewed-by: David Gibson
Reviewed-by: Gavin Shan
Thanks,
Gavin
>---
>Changes:
>v9:
>* updated commit log and did minor cleanup
>---
> arch/powerpc/platforms/powernv/pci-ioda.c | 24
> 1 file changed, 12 i
s to helpers:
>pnv_pci_ioda2_table_alloc_pages() and pnv_pci_ioda2_table_free_pages().
>These do not allocate/free the iommu_table struct.
>
>This enforces window size to be a power of two.
>
>This should cause no behavioural change.
>
>Signed-off-by: Alexey Kardashevskiy
Reviewed-by: Gavin Sh
;Signed-off-by: Alexey Kardashevskiy
>Reviewed-by: David Gibson
Reviewed-by: Gavin Shan
>---
>Changes:
>v9:
>* initialize pe->table_group.tables[0] at the very end when
>tbl is fully initialized
>* moved pnv_pci_ioda2_tvt_invalidate() from earlier
n the table presence here, remove the workaround
>from pnv_pci_ioda2_set_bypass(); also remove the @add_to_iommu_group
>parameter from pnv_ioda_setup_bus_dma().
>
>Signed-off-by: Alexey Kardashevskiy
Acked-by: Gavin Shan
Thanks,
Gavin
>---
> arch/powerpc/kernel/eeh.c
On Tue, Apr 05, 2016 at 09:46:44PM +0800, Yongji Xie wrote:
>This patch enables mmapping MSI-X tables if
>hardware supports interrupt remapping which
>can ensure that a given pci device can only
>shoot the MSIs assigned for it.
>
>Signed-off-by: Yongji Xie
>---
> drivers/vfio/pci/vfio_pci.c
On Tue, Apr 05, 2016 at 09:46:43PM +0800, Yongji Xie wrote:
>I'm trying to find a proper way to indicate
>the capability of interrupt remapping on PPC64
>because we need this to determine whether it is
>safe to mmap MSI-X table in VFIO driver.
>
>There is a existing flag for this in the IOMMU
>spac
On Tue, Apr 05, 2016 at 09:43:29PM +0800, Yongji Xie wrote:
>The resource_alignment will releases memory
>resources allocated by firmware so that kernel
>can reassign new resources later on. But this
>will cause the problem that no resources can be
>allocated by kernel if PCI_PROBE_ONLY was set,
>e
On Tue, Apr 05, 2016 at 09:43:30PM +0800, Yongji Xie wrote:
>Now we use the IORESOURCE_STARTALIGN to identify
>bridge resources in __assign_resources_sorted().
>That's quite fragile. We can't make sure that
>the PCI devices' resources will not use
>IORESOURCE_STARTALIGN any more.
>
>In this patch,
On Tue, Apr 05, 2016 at 09:43:31PM +0800, Yongji Xie wrote:
>When using resource_alignment kernel parameter,
>the current implement reassigns the alignment by
>changing resources' size which can potentially
>break some drivers. For example, the driver uses
>the size to locate some register whose le
Hi Will,
On 4/28/20 5:25 PM, Will Deacon wrote:
On Tue, Apr 28, 2020 at 02:35:20PM +1000, Gavin Shan wrote:
On 4/28/20 1:09 PM, Steven Rostedt wrote:
[...]
Could this be a bug in the implementation of strncmp() in
arch/arm64/lib/strncmp.S. As I don't know arm64 assembly, I have no
On Wed, Jan 04, 2017 at 04:00:20PM +, Tantilov, Emil S wrote:
>>On Tue, Jan 03, 2017 at 04:48:31PM -0800, Emil Tantilov wrote:
>>>Enabling/disabling SRIOV via sysfs by echo-ing multiple values
>>>simultaneously:
>>>
>>>echo 63 > /sys/class/net/ethX/device/sriov_numvfs&
>>>echo 63 > /sys/class/n
On Fri, Jan 06, 2017 at 12:55:08AM +, Tantilov, Emil S wrote:
>>On Wed, Jan 04, 2017 at 04:00:20PM +, Tantilov, Emil S wrote:
On Tue, Jan 03, 2017 at 04:48:31PM -0800, Emil Tantilov wrote:
>Enabling/disabling SRIOV via sysfs by echo-ing multiple values
>simultaneously:
>
>>>
xgbe]
> [] sriov_numvfs_store+0xdc/0x130
>...
>RIP [] pci_iov_release+0x57/0x60
>
>Use the existing mutex lock to protect each enable/disable operation.
>
>-v2: move the existing lock from protecting the config of the IOV bus
>to protecting the writes to sriov_numvfs in sysfs
On Thu, Jun 30, 2016 at 06:53:07PM +0800, Yongji Xie wrote:
>PCI resources allocator will use firmware setup and not try to
>reassign resource when PCI_PROBE_ONLY or IORESOURCE_PCI_FIXED
>is set.
>
>The enforced alignment in pci_reassigndev_resource_alignment()
>should be ignored in this case. Othe
On Thu, Jun 30, 2016 at 06:53:08PM +0800, Yongji Xie wrote:
>VF BARs are read-only zeroes according to SRIOV spec,
>the normal way(writing BARs) of allocating resources wouldn't
>be applied to VFs. The VFs' resources would be allocated
>when we enable SR-IOV capability. So we should not try to
>rea
On Thu, Jun 30, 2016 at 06:53:09PM +0800, Yongji Xie wrote:
>We should not disable memory decoding when we reassign alignment
>in pci_reassigndev_resource_alignment(). It's meaningless and
>have some side effect. For example, some fixup functions such as
>quirk_e100_interrupt() read PCI_COMMAND_MEM
using the option "noresize" of parameter
>"pci=resource_alignment".
>
>In this patch, we try to use a more robust way to identify
>bridge resources.
>
>Signed-off-by: Yongji Xie
Reviewed-by: Gavin Shan
Yongji, I think this doesn't have to be part
me register whose length is related
>to the size.
>
>This patch adds a new option "noresize" for the parameter to
>solve this problem.
>
>Signed-off-by: Yongji Xie
Reviewed-by: Gavin Shan
>---
> Documentation/kernel-parameters.txt |5
On Fri, Jul 01, 2016 at 01:27:17PM +0800, Yongji Xie wrote:
>>On Thu, Jun 30, 2016 at 06:53:08PM +0800, Yongji Xie wrote:
>>>VF BARs are read-only zeroes according to SRIOV spec,
>>>the normal way(writing BARs) of allocating resources wouldn't
>>>be applied to VFs. The VFs' resources would be alloc
On Fri, Jul 01, 2016 at 02:40:16PM +0800, Yongji Xie wrote:
>Hi Gavin,
>
>On 2016/7/1 14:05, Gavin Shan wrote:
>
>>On Fri, Jul 01, 2016 at 01:27:17PM +0800, Yongji Xie wrote:
>>>>On Thu, Jun 30, 2016 at 06:53:08PM +0800, Yongji Xie wrote:
>>>>>VF BARs
On Fri, Jul 01, 2016 at 03:04:10PM +0800, Yongji Xie wrote:
>Hi Gavin,
>
>On 2016/7/1 10:34, Gavin Shan wrote:
>
>>On Thu, Jun 30, 2016 at 06:53:11PM +0800, Yongji Xie wrote:
>>>Now we use the IORESOURCE_STARTALIGN to identify bridge resources
>>>in __ass
On Tue, Jan 03, 2017 at 04:48:31PM -0800, Emil Tantilov wrote:
>Enabling/disabling SRIOV via sysfs by echo-ing multiple values
>simultaneously:
>
>echo 63 > /sys/class/net/ethX/device/sriov_numvfs&
>echo 63 > /sys/class/net/ethX/device/sriov_numvfs
>
>sleep 5
>
>echo 0 > /sys/class/net/ethX/device/
On Fri, Dec 09, 2016 at 05:50:17PM +1100, Andrew Donnellan wrote:
>On 09/12/16 17:24, Linas Vepstas wrote:
>>I suppose I'm confused, but I recall that link resets are non-fatal.
>>Fatal errors typically require that the the pci adapter be completely
>>reset, any adapter firmware to be reloaded from
iel Krisman Bertazi
>Signed-off-by: Guilherme G. Piccoli
>Cc: sta...@vger.kernel.org # v4.9+
>Cc: Christoph Hellwig
>Cc: linuxppc-...@lists.ozlabs.org
>Cc: linux-...@vger.kernel.org
>---
Reviewed-by: Gavin Shan
There is one picky comment as below, but you don't have to fix
On Tue, Mar 21, 2017 at 08:23:29AM -0600, Alex Williamson wrote:
>On Tue, 21 Mar 2017 20:25:18 +1100
>Gavin Shan wrote:
>> On Tue, Mar 21, 2017 at 12:01:58AM -0600, Alex Williamson wrote:
>> >On Tue, 21 Mar 2017 16:43:05 +1100
>> >Gavin Shan wrote:
>> &
On Tue, Mar 21, 2017 at 02:34:46PM +, Eli Cohen wrote:
>> If we want to talk about the ABI, I would suggest drawing from existing
>> ABIs. We already have
>> drivers_autoprobe as part of the standard sysfs ABI, so if we want a binary
>> switch, then
>>sriov_drivers_autoprobe might be a logi
ust be made before enabling VFs. The change
>will not take effect if VFs are already enabled. Simply, one can set
>sriov_numvfs to 0, choose whether to probe or not, and then resume
>sriov_numvfs.
>
>Signed-off-by: Bodong Wang
>Signed-off-by: Eli Cohen
Reviewed-by: Gavin Shan
On Mon, Mar 20, 2017 at 05:14:34PM +0200, bod...@mellanox.com wrote:
>From: Bodong Wang
>
>Sometimes it is not desirable to probe the virtual functions after
>SRIOV is enabled. This can save host side resource usage by VF
>instances which would be eventually probed to VMs.
>
>Added a new PCI sysfs
On Mon, Mar 20, 2017 at 06:34:23PM -0500, Bodong Wang wrote:
>On 3/20/2017 6:07 PM, Gavin Shan wrote:
>>On Mon, Mar 20, 2017 at 05:14:34PM +0200, bod...@mellanox.com wrote:
>>>From: Bodong Wang
>>>
>>>Sometimes it is not desirable to probe the virtual functions
On Mon, Mar 20, 2017 at 10:57:08PM -0600, Alex Williamson wrote:
>On Mon, 20 Mar 2017 18:34:23 -0500
>Bodong Wang wrote:
.../...
>> > Bodong, I'm not sure if there is a requirement to load driver for the
>> > specified number of VFs? That indicates no driver will be loaded for
>> > other VFs. If
On Tue, Mar 21, 2017 at 12:01:58AM -0600, Alex Williamson wrote:
>On Tue, 21 Mar 2017 16:43:05 +1100
>Gavin Shan wrote:
>> On Mon, Mar 20, 2017 at 10:57:08PM -0600, Alex Williamson wrote:
>> >On Mon, 20 Mar 2017 18:34:23 -0500
>> >Bodong Wang wrote:
>>
&g
ue the approach rather than the individual patches.
Yes, sure. I will do this in the future. Sorry about having taken you
too much to do the reverse-engineering. In next revision, I might put
more information in the cover letter and commit log to explain how things
are designed and working :)
On
Hi Mark,
On 5/26/20 8:42 PM, Mark Rutland wrote:
On Fri, May 08, 2020 at 01:29:13PM +1000, Gavin Shan wrote:
Since kvm/arm32 was removed, this renames kvm_vcpu_get_hsr() to
kvm_vcpu_get_esr() to it a bit more self-explaining because the
functions returns ESR instead of HSR on aarch64. This
Hi Mark,
On 5/26/20 8:51 PM, Mark Rutland wrote:
On Fri, May 08, 2020 at 01:29:14PM +1000, Gavin Shan wrote:
There are a set of inline functions defined in kvm_emulate.h. Those
functions reads ESR from vCPU fault information struct and then operate
on it. So it's tied with vCPU
Hi Mark,
On 5/26/20 8:45 PM, Mark Rutland wrote:
On Fri, May 08, 2020 at 01:29:15PM +1000, Gavin Shan wrote:
This replace the variable names to make them self-explaining. The
tracepoint isn't changed accordingly because they're part of ABI:
* @hsr to @esr
* @hsr_ec to @ec
Hi Mark,
On 5/26/20 8:58 PM, Mark Rutland wrote:
On Fri, May 08, 2020 at 01:29:16PM +1000, Gavin Shan wrote:
This renames user_mem_abort() to kvm_handle_user_mem_abort(), and
then export it. The function will be used in asynchronous page fault
to populate a page table entry once the
Hi Mark,
On 5/26/20 10:34 PM, Mark Rutland wrote:
On Fri, May 08, 2020 at 01:29:17PM +1000, Gavin Shan wrote:
There are two stages of fault pages and the stage one page fault is
handled by guest itself. The guest is trapped to host when the page
fault is caused by stage 2 page table, for
Hi Paolo,
On 5/27/20 4:48 PM, Paolo Bonzini wrote:
I definitely appreciate the work, but this is repeating most of the
mistakes done in the x86 implementation. In particular:
- the page ready signal can be done as an interrupt, rather than an
exception. This is because "page ready" can be han
Hi Marc,
On 5/27/20 5:37 PM, Marc Zyngier wrote:
On 2020-05-27 05:05, Gavin Shan wrote:
[...]
+struct kvm_vcpu_pv_apf_data {
+ __u32 reason;
+ __u8 pad[60];
+ __u32 enabled;
+};
What's all the padding for?
The padding is ensure the @reason and @enabled in diff
On 5/27/20 5:20 PM, Marc Zyngier wrote:
On 2020-05-27 03:43, Gavin Shan wrote:
Hi Mark,
On 5/26/20 8:42 PM, Mark Rutland wrote:
On Fri, May 08, 2020 at 01:29:13PM +1000, Gavin Shan wrote:
Since kvm/arm32 was removed, this renames kvm_vcpu_get_hsr() to
kvm_vcpu_get_esr() to it a bit more self
you get a chance for
respin.
Reviewed-by: Gavin Shan
diff --git a/arch/arm64/mm/mmu.c b/arch/arm64/mm/mmu.c
index 4e70f4fea06c..90a30f5ebfc0 100644
--- a/arch/arm64/mm/mmu.c
+++ b/arch/arm64/mm/mmu.c
@@ -1482,13 +1482,38 @@ static int prevent_bootmem_remove_notifier(struct
notifier_block *nb
Hi Anshuman,
On 9/29/20 11:54 PM, Anshuman Khandual wrote:
This adds a validation function that scans the entire boot memory and makes
sure that all early memory sections are online. This check is essential for
the memory notifier to work properly, as it cannot prevent any boot memory
from offli
deletions(-)
It looks good to me with Anshuman's comments fixed:
Reviewed-by: Gavin Shan
diff --git a/arch/arm64/mm/mmu.c b/arch/arm64/mm/mmu.c
index 75df62f..11f8639 100644
--- a/arch/arm64/mm/mmu.c
+++ b/arch/arm64/mm/mmu.c
@@ -1121,8 +1121,15 @@ int __meminit vmemmap_populate(unsigned
Hi Anshuman,
On 10/6/20 1:59 PM, Anshuman Khandual wrote:
On 10/01/2020 05:27 AM, Gavin Shan wrote:
On 9/29/20 11:54 PM, Anshuman Khandual wrote:
This enables MEM_OFFLINE memory event handling. It will help intercept any
possible error condition such as if boot memory some how still got
Hi Anshuman,
On 10/6/20 2:11 PM, Anshuman Khandual wrote:
On 10/01/2020 06:23 AM, Gavin Shan wrote:
On 9/29/20 11:54 PM, Anshuman Khandual wrote:
This adds a validation function that scans the entire boot memory and makes
sure that all early memory sections are online. This check is essential
, which is decoupled from the zero
page(s).
Signed-off-by: Gavin Shan
---
arch/arm64/include/asm/mmu_context.h | 6 +++---
arch/arm64/include/asm/pgtable.h | 2 ++
arch/arm64/kernel/setup.c| 2 +-
arch/arm64/kernel/vmlinux.lds.S | 4
arch/arm64/mm/proc.S | 2 +
er (Catalin)
Gavin Shan (2):
arm64/mm: Introduce zero PGD table
arm64/mm: Enable color zero pages
arch/arm64/include/asm/cache.h | 3 ++
arch/arm64/include/asm/mmu_context.h | 6 +--
arch/arm64/include/asm/pgtable.h | 11 -
arch/arm64/kernel/cac
L1/L2/L3 dCache
sets, to improve the overall performance. On other hand, it
isn't going to thrash same L1/L2/L3 dCache, which is beneficial
to overall load balance.
* Reworked ZERO_PAGE() and define __HAVE_COLOR_ZERO_PAGE.
Signed-off-by: Gavin Shan
---
arch/arm64/includ
Hi Catalin,
On 9/29/20 1:22 AM, Catalin Marinas wrote:
On Mon, Sep 28, 2020 at 05:22:54PM +1000, Gavin Shan wrote:
Testing
===
[1] The experiment reveals how heavily the (L1) data cache miss impacts
the overall application's performance. The machine where the test
is carrie
Hi Paolo,
On 5/28/20 8:48 PM, Paolo Bonzini wrote:
On 28/05/20 08:14, Gavin Shan wrote:
- for x86 we're also thinking of initiating the page fault from the
exception handler, rather than doing so from the hypervisor before
injecting the exception. If ARM leads the way here, we would d
On 5/8/20 1:29 PM, Gavin Shan wrote:
There are two stages of page faults and the stage one page fault is
handled by guest itself. The guest is trapped to host when the page
fault is caused by stage 2 page table, for example missing. The guest
is suspended until the requested page is populated
it.
Signed-off-by: Peter Xu
---
virt/kvm/kvm_main.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
Reviewed-by: Gavin Shan
diff --git a/virt/kvm/kvm_main.c b/virt/kvm/kvm_main.c
index 74bdb7bf3295..2da293885a67 100644
--- a/virt/kvm/kvm_main.c
+++ b/virt/kvm/kvm_main.c
@@ -242
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