On Thu, Aug 18, 2016 at 9:34 PM, Catalin Marinas
wrote:
> On Thu, Aug 18, 2016 at 09:09:26PM +0800, zhongjiang wrote:
>> At present, boot cpu will bound to a node from device tree when node_off
>> enable.
>> if the node is not initialization, it will lead to a following problem.
>>
>> next_zones
On Fri, Aug 19, 2016 at 9:30 AM, Ganapatrao Kulkarni
wrote:
> On Fri, Aug 19, 2016 at 7:28 AM, zhong jiang wrote:
>> On 2016/8/19 1:45, Ganapatrao Kulkarni wrote:
>>> On Thu, Aug 18, 2016 at 9:34 PM, Catalin Marinas
>>> wrote:
>>>> On Thu, Aug 18, 201
On Fri, Aug 19, 2016 at 7:28 AM, zhong jiang wrote:
> On 2016/8/19 1:45, Ganapatrao Kulkarni wrote:
>> On Thu, Aug 18, 2016 at 9:34 PM, Catalin Marinas
>> wrote:
>>> On Thu, Aug 18, 2016 at 09:09:26PM +0800, zhongjiang wrote:
>>>> At present, boot cpu will b
>> This is a complete rewrite of a previous patch by:
>>Ganapatrao Kulkarni
>>
>> Signed-off-by: David Daney
>> ---
>> drivers/of/Kconfig | 3 +
>> drivers/of/Makefile | 1 +
>> drivers/of/of_numa.c | 200
>> +
On Thu, Mar 3, 2016 at 9:55 AM, Ganapatrao Kulkarni
wrote:
> On Thu, Mar 3, 2016 at 9:04 AM, Rob Herring wrote:
>> On Wed, Mar 2, 2016 at 4:55 PM, David Daney wrote:
>>> From: David Daney
>>>
>>> Add device tree parsing for NUMA topology using device
>>
On Tue, Mar 8, 2016 at 1:17 AM, David Daney wrote:
> On 03/07/2016 11:22 AM, Robert Richter wrote:
>>
>> On 03.03.16 15:55:35, David Daney wrote:
>>>
>>> From: Ganapatrao Kulkarni
>>>
>>> Add DT bindings for numa mapping of memory, CPUs and I
72411
v4:
updated silicon-errata.txt
updated as per Robert Richter review comment.
v3:
updatated as per Marc Zyngier's review comments.
http://www.spinics.net/lists/arm-kernel/msg443462.html
v2:
updatated as per Marc Zyngier's review comments.
Reviewed-by: Robert Richter
Signed-off
Hi Ard,
On Thu, Feb 11, 2016 at 5:44 PM, Ard Biesheuvel
wrote:
> On 11 February 2016 at 12:42, Robert Richter
> wrote:
>> (+RobH and MarkR)
>>
>> On 09.02.16 15:35:42, Ard Biesheuvel wrote:
>>> (+ Grant)
>>>
>>> On 9 February 2016 at 14:53, Robert Richter
>>> wrote:
>>> > From: Robert Richter
adding RobH
(sorry, accidentally dropped Rob id in previous email)
On Thu, Feb 11, 2016 at 6:33 PM, Ganapatrao Kulkarni
wrote:
> Hi Ard,
>
> On Thu, Feb 11, 2016 at 5:44 PM, Ard Biesheuvel
> wrote:
>> On 11 February 2016 at 12:42, Robert Richter
>> wrote:
>>
Hi Rob,
On Thu, Feb 11, 2016 at 9:02 PM, Robert Richter
wrote:
> On 11.02.16 08:50:41, Rob Herring wrote:
>> On Tue, Feb 2, 2016 at 4:09 AM, Ganapatrao Kulkarni
>> wrote:
>> > dt node parsing for numa topology is done using device property
>> > numa-nod
workaround for gicv3 in a numa environment. It
>> is on top of my recent gicv3 errata patch submission v4 and Ganapat's
>> arm64 numa patches for devicetree v5.
>>
>> Please comment.
>>
>> Thanks,
>>
>> -Robert
>>
>>
>>
>>
On Mon, Aug 24, 2015 at 6:15 PM, Marc Zyngier wrote:
> On 24/08/15 13:30, Ganapatrao Kulkarni wrote:
>> Hi Marc,
>>
>> thanks for the review comments.
>>
>> On Mon, Aug 24, 2015 at 3:47 PM, Marc Zyngier wrote:
>>> Hi Robert,
>>>
>>> Ju
Hi Marc,
thanks for the suggestions.
On Mon, Aug 24, 2015 at 7:17 PM, Marc Zyngier wrote:
> On 24/08/15 14:27, Ganapatrao Kulkarni wrote:
>> On Mon, Aug 24, 2015 at 6:15 PM, Marc Zyngier wrote:
>
>>>>>> static void its_enable_cavium_thunderx(void *data)
>>
DT bindings for numa mapping of memory, cores and IOs.
Reviewed-by: Robert Richter
Signed-off-by: Ganapatrao Kulkarni
---
Documentation/devicetree/bindings/numa.txt | 272 +
1 file changed, 272 insertions(+)
create mode 100644 Documentation/devicetree/bindings
Adding numa support for arm64 based platforms.
This patch adds by default the dummy numa node and
maps all memory and cpus to node 0.
using this patch, numa can be simulated on single node arm64 platforms.
Tested-by: Shannon Zhao
Reviewed-by: Robert Richter
Signed-off-by: Ganapatrao Kulkarni
dt node parsing for numa topology is done using device property
numa-node-id and device node distance-map.
Reviewed-by: Robert Richter
Signed-off-by: Ganapatrao Kulkarni
---
drivers/of/Kconfig | 11 +++
drivers/of/Makefile | 1 +
drivers/of/of_numa.c | 207
At present cpumask_of_pcibus is defined for !CONFIG_NUMA and moving out
to common will allow to use for numa too. This also avoids
redefinition of this macro in respective architecture header files.
Reviewed-by: Robert Richter
Signed-off-by: Ganapatrao Kulkarni
---
arch/arm64/include/asm
Adding dt file for Cavium's Thunderx dual socket platform.
Signed-off-by: Ganapatrao Kulkarni
---
arch/arm64/boot/dts/cavium/Makefile | 2 +-
arch/arm64/boot/dts/cavium/thunder-88xx-2n.dts | 83 +++
arch/arm64/boot/dts/cavium/thunder-88xx-2n.dtsi
enabled numa balancing for arm64 platforms.
added pte, pmd protnone helpers for use by automatic NUMA balancing.
Reviewed-by: Robert Richter
Signed-off-by: Ganapatrao Kulkarni
---
arch/arm64/Kconfig | 1 +
arch/arm64/include/asm/pgtable.h | 18 ++
2 files changed
NODE_DATA is defined across multiple asm header files.
Moving generic definition to asm-generic/mmzone.h to
remove redundant definitions.
Reviewed-by: Robert Richter
Signed-off-by: Ganapatrao Kulkarni
---
arch/arm64/include/asm/mmzone.h | 4 +---
arch/m32r/include/asm/mmzone.h| 4
Adding numa dt binding support for arm64 based platforms.
Reviewed-by: Robert Richter
Signed-off-by: Ganapatrao Kulkarni
---
arch/arm64/include/asm/numa.h | 2 ++
arch/arm64/kernel/smp.c | 2 ++
arch/arm64/mm/numa.c | 17 +
3 files changed, 21 insertions
t/shortlog/refs/heads/arm64-uefi-early-fdt-handling
3. PATCH[7,8] are not tested for other architectures.
Ganapatrao Kulkarni (8):
arm64, numa: adding numa support for arm64 platforms.
Documentation, dt, numa: dt bindings for numa.
dt, numa: adding numa dt binding implementation.
a
Hi Will,
On Thu, Jan 28, 2016 at 8:09 PM, Will Deacon wrote:
> On Tue, Jan 26, 2016 at 02:36:04PM -0600, Bjorn Helgaas wrote:
>> Subject is "arm64/arm, numa, dt: adding ..." What is the significance
>> of the "arm" part? The other patches only mention "arm64".
>>
>> General comment: the code b
On Thu, Jan 28, 2016 at 11:38 PM, Will Deacon wrote:
> On Thu, Jan 28, 2016 at 10:42:17PM +0530, Ganapatrao Kulkarni wrote:
>> On Thu, Jan 28, 2016 at 8:09 PM, Will Deacon wrote:
>> > On Tue, Jan 26, 2016 at 02:36:04PM -0600, Bjorn Helgaas wrote:
>> >> Subject i
Adding helper functions and necessary code to make
pci driver(pci-host-generic) numa aware.
This patch is on top of arm64-numa v7.
http://www.spinics.net/lists/arm-kernel/msg460813.html
Signed-off-by: Ganapatrao Kulkarni
---
arch/arm64/include/asm/numa.h | 8 +---
arch/arm64/kernel
Hi Rob, Mark,
On Wed, Jan 20, 2016 at 7:48 PM, Rob Herring wrote:
> On Mon, Jan 18, 2016 at 10:06:01PM +0530, Ganapatrao Kulkarni wrote:
>> DT bindings for numa mapping of memory, cores and IOs.
>>
>> Reviewed-by: Robert Richter
>> Signed-off-by: Ganapatrao Kulkarn
Hi Rob,
On Wed, Feb 3, 2016 at 5:04 AM, Rob Herring wrote:
> On Tue, Feb 02, 2016 at 03:39:18PM +0530, Ganapatrao Kulkarni wrote:
>> dt node parsing for numa topology is done using device property
>> numa-node-id and device node distance-map.
>>
>> Reviewed-by: Rober
only exclude_kernel attribute when kernel is
running in HYP. Also adding sysfs file to notify the bhehaviour
of attribute exclude_hv.
Signed-off-by: Ganapatrao Kulkarni
---
Changelog:
V2:
- Changes as per Will Deacon's suggestion.
V1: Initial patch
arch/arm64/kernel/perf_event.c
Hi Mark,
On Thu, Apr 6, 2017 at 3:25 PM, Mark Rutland wrote:
> On Thu, Apr 06, 2017 at 09:50:33AM +0530, Ganapatrao Kulkarni wrote:
>> On Wed, Apr 5, 2017 at 3:35 PM, Mark Rutland wrote:
>> > On Wed, Apr 05, 2017 at 02:42:39PM +0530, Ganapatrao Kulkarni wrote:
>> >&g
On Thu, Apr 20, 2017 at 2:19 PM, Mark Rutland wrote:
> On Wed, Apr 19, 2017 at 11:14:06PM +0530, Ganapatrao Kulkarni wrote:
>> commit d98ecda (arm64: perf: Count EL2 events if the kernel is running in
>> HYP)
>> is returning error for perf syscall with mixed attribute set f
.
Signed-off-by: Ganapatrao Kulkarni
---
tools/perf/util/evsel.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/tools/perf/util/evsel.c b/tools/perf/util/evsel.c
index ac59710..0dc94d7 100644
--- a/tools/perf/util/evsel.c
+++ b/tools/perf/util/evsel.c
@@ -1489,7 +1489,9 @@ int
Hi Mark,
On Wed, Apr 26, 2017 at 10:42 PM, Mark Rutland wrote:
> On Wed, Apr 26, 2017 at 03:50:57PM +0100, Mark Rutland wrote:
>> Hi Ganapatrao,
>>
>> Thanks for tracking this down.
>>
>> On Wed, Apr 26, 2017 at 02:56:20PM +0530, Ganapatrao Kulkarni wrote:
&
On Thu, Apr 27, 2017 at 8:04 PM, Mark Rutland wrote:
> On Wed, Apr 26, 2017 at 11:49:46PM +0530, Ganapatrao Kulkarni wrote:
>> On Wed, Apr 26, 2017 at 10:42 PM, Mark Rutland wrote:
>> > diff --git a/tools/perf/builtin-stat.c b/tools/perf/builtin-stat.c
>> > in
On Thu, Apr 27, 2017 at 9:22 PM, Mark Rutland wrote:
> On Thu, Apr 27, 2017 at 09:16:41PM +0530, Ganapatrao Kulkarni wrote:
>> > Could you please give my diff a go?
>>
>> i tried your diff, and testing looks ok.
>
> Can I take that as a Tested-by when I post
itial patchset.
Ganapatrao Kulkarni (4):
perf utils: passing pmu as a parameter to function get_cpuid_str
perf tools arm64: Add support for get_cpuid_str function.
perf utils: Add helper function is_pmu_core to detect PMU CORE devices
perf vendor events arm64: Add implementation defined pmu
cpuid string will not be same on all CPUs on heterogeneous
platforms like ARM's big.LITTLE, adding provision(using pmu->cpus)
to find cpuid string from associated CPUs of PMU CORE device.
Signed-off-by: Ganapatrao Kulkarni
---
tools/perf/arch/powerpc/util/header.c | 3 ++-
tools/perf/
function get_cpuid_str returns MIDR string of the first online
cpu from the range of cpus associated with the pmu core device.
Signed-off-by: Ganapatrao Kulkarni
---
tools/perf/arch/arm64/util/Build| 1 +
tools/perf/arch/arm64/util/header.c | 41 +
2
This is not a full event list, but a short list of useful events.
Signed-off-by: Ganapatrao Kulkarni
---
tools/perf/pmu-events/arch/arm64/mapfile.csv | 14 +
.../arm64/thunderx2/implementation-defined.json| 62 ++
2 files changed, 76 insertions(+)
create mode
On some platforms, PMU core devices sysfs name is not cpu.
Adding function is_pmu_core to detect as core device using
core device specific hints in sysfs.
For arm64 platforms, all core devices have file "cpus" in sysfs.
Signed-off-by: Ganapatrao Kulkarni
---
tools/perf/util/
On Fri, Apr 28, 2017 at 2:38 PM, Jayachandran C
wrote:
> On Fri, Apr 28, 2017 at 10:23:44AM +0530, Ganapatrao Kulkarni wrote:
>> cpuid string will not be same on all CPUs on heterogeneous
>> platforms like ARM's big.LITTLE, adding provision(using pmu->cpus)
>> to find
jevents assumes core event devices are listed as cpu in
sysfs, however some architecture like arm64 have custom names.
Adding provision in json files to define CPU name and
required changes in jevents.c to parse.
Signed-off-by: Ganapatrao Kulkarni
---
tools/perf/pmu-events/jevents.c| 15
Extending json/jevent framework for parsing arm64 event files.
Adding jevents for ThunderX2 implementation defined PMU events.
Ganapatrao Kulkarni (3):
perf jevents: Add support to use core pmu name other than cpu
perf tools arm64: implement function get_cpuid_str
perf tool, arm64
function get_cpuid_str returns midr_el1 value from first
online cpu available.
Signed-off-by: Ganapatrao Kulkarni
---
tools/perf/arch/arm64/util/Build| 1 +
tools/perf/arch/arm64/util/header.c | 51 +
2 files changed, 52 insertions(+)
create mode 100644
This is not a full event list, but a short list of useful events.
Signed-off-by: Ganapatrao Kulkarni
---
tools/perf/pmu-events/arch/arm64/mapfile.csv | 2 +
.../arm64/thunderx2/implementation-defined.json| 72 ++
2 files changed, 74 insertions(+)
create mode
counting,
if either of or both of exclude_kernel and exlude_hv are not set.
Signed-off-by: Ganapatrao Kulkarni
---
arch/arm64/kernel/perf_event.c | 19 ---
1 file changed, 12 insertions(+), 7 deletions(-)
diff --git a/arch/arm64/kernel/perf_event.c b/arch/arm64/kernel
Hi Will,
On Tue, Apr 4, 2017 at 4:48 PM, Will Deacon wrote:
> On Tue, Apr 04, 2017 at 04:10:55PM +0530, Ganapatrao Kulkarni wrote:
>> commit d98ecda (arm64: perf: Count EL2 events if the kernel is running in
>> HYP)
>> is returning error for perf syscall with mi
On Tue, Apr 4, 2017 at 5:56 PM, Will Deacon wrote:
> On Tue, Apr 04, 2017 at 05:37:10PM +0530, Ganapatrao Kulkarni wrote:
>> On Tue, Apr 4, 2017 at 4:48 PM, Will Deacon wrote:
>> > On Tue, Apr 04, 2017 at 04:10:55PM +0530, Ganapatrao Kulkarni wrote:
>> >> commit d
On Tue, Apr 4, 2017 at 5:58 PM, Mark Rutland wrote:
> On Tue, Apr 04, 2017 at 01:06:43PM +0530, Ganapatrao Kulkarni wrote:
>> This is not a full event list, but a short list of useful events.
>>
>> Signed-off-by: Ganapatrao Kulkarni
>> ---
>> tools/perf/
On Tue, Apr 4, 2017 at 5:55 PM, Mark Rutland wrote:
> On Tue, Apr 04, 2017 at 01:06:42PM +0530, Ganapatrao Kulkarni wrote:
>> function get_cpuid_str returns midr_el1 value from first
>> online cpu available.
>
> This isn't globally the same (e.g. in big.LITTLE systems).
[Adding maintainers]
On Wed, Apr 5, 2017 at 2:01 PM, Will Deacon wrote:
> On Wed, Apr 05, 2017 at 09:29:32AM +0530, Ganapatrao Kulkarni wrote:
>> On Tue, Apr 4, 2017 at 5:56 PM, Will Deacon wrote:
>> > On Tue, Apr 04, 2017 at 05:37:10PM +0530, Ganapatrao Kulkarni wrote:
&
Hi Perf Maintainers,
your suggestion on below discussion is much appreciated!
On Wed, Apr 5, 2017 at 2:01 PM, Will Deacon wrote:
> On Wed, Apr 05, 2017 at 09:29:32AM +0530, Ganapatrao Kulkarni wrote:
>> On Tue, Apr 4, 2017 at 5:56 PM, Will Deacon wrote:
>> > On Tue, Apr 04,
On Wed, Apr 5, 2017 at 3:35 PM, Mark Rutland wrote:
> On Wed, Apr 05, 2017 at 02:42:39PM +0530, Ganapatrao Kulkarni wrote:
>> On Tue, Apr 4, 2017 at 5:58 PM, Mark Rutland wrote:
>> > On Tue, Apr 04, 2017 at 01:06:43PM +0530, Ganapatrao Kulkarni wrote:
>> >> This i
This adds PMU driver for Cavium's ThunderX2 SoC UNCORE devices.
The SoC has PMU support in its L3 cache controller (L3C) and in the
DDR4 Memory Controller (DMC).
Ganapatrao Kulkarni (2):
perf: uncore: Adding documentation for ThunderX2 pmu uncore driver
perf: ThunderX2: Add Cavium Thun
This patch adds a perf driver for the PMU UNCORE devices DDR4 Memory
Controller(DMC) and Level 3 Cache(L3C).
Signed-off-by: Ganapatrao Kulkarni
---
drivers/perf/Kconfig | 9 +
drivers/perf/Makefile| 1 +
drivers/perf/thunderx2_pmu.c | 965
Documentation for the UNCORE PMUs on Cavium's ThunderX2 SoC.
The SoC has PMU support in its L3 cache controller (L3C) and in the
DDR4 Memory Controller (DMC).
Signed-off-by: Ganapatrao Kulkarni
---
Documentation/perf/thunderx2-pmu.txt | 60
1 file ch
On Mon, Apr 24, 2017 at 9:15 PM, Will Deacon wrote:
> On Thu, Apr 20, 2017 at 02:56:50PM +0530, Ganapatrao Kulkarni wrote:
>> On Thu, Apr 20, 2017 at 2:19 PM, Mark Rutland wrote:
>> > On Wed, Apr 19, 2017 at 11:14:06PM +0530, Ganapatrao Kulkarni wrote:
>> >> comm
Hi Shanker,
On Sun, Jun 25, 2017 at 9:16 PM, Shanker Donthineni
wrote:
> The NUMA node information is visible to ITS driver but not being used
> other than handling errata. This patch allocates the memory for ITS
> tables from the corresponding NUMA node using the appropriate NUMA
> aware functio
On Fri, Jun 30, 2017 at 8:04 AM, Ganapatrao Kulkarni
wrote:
> Hi Shanker,
>
> On Sun, Jun 25, 2017 at 9:16 PM, Shanker Donthineni
> wrote:
>> The NUMA node information is visible to ITS driver but not being used
>> other than handling errata. This patch allocates the
Hi Marc,
On Mon, Jul 3, 2017 at 8:23 PM, Marc Zyngier wrote:
> Hi Shanker,
>
> On 03/07/17 15:24, Shanker Donthineni wrote:
>> Hi Marc,
>>
>> On 06/30/2017 03:51 AM, Marc Zyngier wrote:
>>> On 30/06/17 04:01, Ganapatrao Kulkarni wrote:
>>>> On F
On Mon, Jul 10, 2017 at 2:36 PM, Marc Zyngier wrote:
> On 10/07/17 09:48, Ganapatrao Kulkarni wrote:
>> Hi Marc,
>>
>> On Mon, Jul 3, 2017 at 8:23 PM, Marc Zyngier wrote:
>>> Hi Shanker,
>>>
>>> On 03/07/17 15:24, Shanker Donthineni wrote:
>
Hi Marc,
On Mon, Jul 10, 2017 at 2:53 PM, Marc Zyngier wrote:
> On 10/07/17 10:08, Ganapatrao Kulkarni wrote:
>> On Mon, Jul 10, 2017 at 2:36 PM, Marc Zyngier wrote:
>>> On 10/07/17 09:48, Ganapatrao Kulkarni wrote:
>>>> Hi Marc,
>>>>
>>>&g
p;id=0d79f8b93187c771b6971acfaba67f4e2f1e0710
[2]
https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux-stable.git/commit/?h=linux-4.11.y&id=0d79f8b93187c771b6971acfaba67f4e2f1e0710
On Fri, Jun 9, 2017 at 10:03 AM, Ganapatrao Kulkarni
wrote:
> ping?
>
> On Tue, May 23, 2017 at 8:44 PM, Ganapatrao Kulkarni
> w
x27;s suggestions.
- Added provision for get_cpuid_str to get cpu id string
from associated cpus of pmu core device.
v1: Initial patchset.
Ganapatrao Kulkarni (4):
perf utils: passing pmu as a parameter to function get_cpuid_str
perf tools arm64: Add support for get_cpuid_str function.
perf
This is not a full event list, but a short list of useful events.
Signed-off-by: Ganapatrao Kulkarni
---
tools/perf/pmu-events/arch/arm64/mapfile.csv | 15 ++
.../arm64/thunderx2/implementation-defined.json| 62 ++
2 files changed, 77 insertions(+)
create mode
function get_cpuid_str returns MIDR string of the first online
cpu from the range of cpus associated with the pmu core device.
Signed-off-by: Ganapatrao Kulkarni
---
tools/perf/arch/arm64/util/Build| 1 +
tools/perf/arch/arm64/util/header.c | 59 +
2
cpuid string will not be same on all CPUs on heterogeneous
platforms like ARM's big.LITTLE, adding provision(using pmu->cpus)
to find cpuid string from associated CPUs of PMU CORE device.
Signed-off-by: Ganapatrao Kulkarni
---
tools/perf/arch/powerpc/util/header.c | 2 +-
tools/perf/
On some platforms, PMU core devices sysfs name is not cpu.
Adding function is_pmu_core to detect as core device using
core device specific hints in sysfs.
For arm64 platforms, all core devices have file "cpus" in sysfs.
Signed-off-by: Ganapatrao Kulkarni
---
tools/perf/util/
Node 0
>>> [0.00] SRAT: PXM 1 -> ITS 3 -> Node 1
>>> [0.00] SRAT: PXM 2 -> ITS 4 -> Node 2
>>> [0.00] SRAT: PXM 2 -> ITS 5 -> Node 2
>>> [0.00] SRAT: PXM 2 -> ITS 6 -> Node 2
>>> [0.00] SRAT: PXM
On Sat, Jul 22, 2017 at 8:53 AM, Hanjun Guo wrote:
> Hi Ganapat,
>
> On 2017/6/8 12:44, Ganapatrao Kulkarni wrote:
>> Add code to parse proximity domain in SMMUv3 IORT table to
>> set numa node mapping for smmuv3 devices.
>>
>> Signed-off-by: Ganapatrao Kulkar
in acpi driver code and
let architecture code check for allowed memblocks count.
This check is already added in x86 and extending same to ia64.
Signed-off-by: Ganapatrao Kulkarni
---
arch/ia64/kernel/acpi.c | 5 +
drivers/acpi/numa.c | 3 +--
2 files changed, 6 insertions(+), 2 deletions
entries after cross node collection migration.
Signed-off-by: Ganapatrao Kulkarni
---
drivers/irqchip/irq-gic-v3-its.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/drivers/irqchip/irq-gic-v3-its.c b/drivers/irqchip/irq-gic-v3-its.c
index 4039e64..ea849a1 100644
--- a/drivers/irqchip
Hi Marc,
On Wed, Dec 20, 2017 at 2:56 PM, Marc Zyngier wrote:
> On 20/12/17 09:15, Ganapatrao Kulkarni wrote:
>> When an interrupt is moved, it is possible that an implementation that
>> supports caching might still have cached data for a previous
>> (no longer valid) map
On Wed, Dec 20, 2017 at 6:42 PM, Marc Zyngier wrote:
> On 20/12/17 09:34, Ganapatrao Kulkarni wrote:
>> Hi Marc,
>>
>> On Wed, Dec 20, 2017 at 2:56 PM, Marc Zyngier wrote:
>>> On 20/12/17 09:15, Ganapatrao Kulkarni wrote:
>>>> When an interrupt is mo
> With bisect checking, I locate to this patch.
>
> commit ad8737a08973f5dca632bdd63cf2abc99670e540
> Author: Ganapatrao Kulkarni
> Date: Tue Oct 17 00:02:20 2017 +0530
>
> perf pmu: Use pmu->is_uncore to detect UNCORE devices
>
> For example (on Intel sk
gt; > I applied the diff but it's failed.
>> >
>> > jinyao@skl:~/skl-ws/perf-dev/lck-4594/src$ patch -p1 < 1.pat
>> > patching file tools/perf/util/pmu.c
>> > patch: malformed patch at line 41: *head, struct perf_pmu *pmu)
>> >
>> >
On Tue, Nov 21, 2017 at 6:22 PM, Rafael J. Wysocki wrote:
> On Tue, Nov 21, 2017 at 5:16 AM, Ganapatrao Kulkarni
> wrote:
>> On Thu, Nov 16, 2017 at 12:16 AM, Luck, Tony wrote:
>>>> This check is already added in x86 and extending same to ia64.
>>>
>>
When an interrupt is moved across node collections on ThunderX2
multi Socket platform, an interrupt stops routed to new collection
and results in loss of interrupts.
Adding workaround to issue INV after MOVI for cross-node collection
move to flush out the cached entry.
Signed-off-by: Ganapatrao
Hi Marc,
On Wed, Jan 3, 2018 at 2:17 PM, Marc Zyngier wrote:
> On 03/01/18 06:32, Ganapatrao Kulkarni wrote:
>> When an interrupt is moved across node collections on ThunderX2
>
> node collections?
ok, i will rephrase it.
i was intended to say cross NUMA node collection/cpu
On Wed, Jan 3, 2018 at 3:43 PM, Marc Zyngier wrote:
> On 03/01/18 09:35, Ganapatrao Kulkarni wrote:
>> Hi Marc,
>>
>> On Wed, Jan 3, 2018 at 2:17 PM, Marc Zyngier wrote:
>>> On 03/01/18 06:32, Ganapatrao Kulkarni wrote:
>>>> When an interrupt is
On Wed, Jan 3, 2018 at 5:06 PM, Marc Zyngier wrote:
> On 03/01/18 11:20, Ganapatrao Kulkarni wrote:
>> On Wed, Jan 3, 2018 at 3:43 PM, Marc Zyngier wrote:
>>> On 03/01/18 09:35, Ganapatrao Kulkarni wrote:
>>>> Hi Marc,
>>>>
>>>> On Wed, Jan 3
Shaokun Zhang
>
> Thanks.
> Shaokun
>
> On 2017/7/20 13:56, Ganapatrao Kulkarni wrote:
>> Extending json/jevent framework for parsing arm64 event files.
>> Adding jevents for ThunderX2 implementation defined PMU events.
>>
>> v4:
>>- Rebased to 4.13-rc1
&
On Thu, Aug 10, 2017 at 11:39 PM, Arnaldo Carvalho de Melo
wrote:
> Em Thu, Aug 10, 2017 at 06:15:50PM +0100, Will Deacon escreveu:
>> On Thu, Jul 20, 2017 at 11:26:06AM +0530, Ganapatrao Kulkarni wrote:
>> > function get_cpuid_str returns MIDR string of the first online
>&
Hi John,
On Wed, Aug 23, 2017 at 2:52 PM, John Garry wrote:
> On 22/08/2017 05:21, Ganapatrao Kulkarni wrote:
>>
>> Hi Arnaldo, Will,
>>
>> are there any comments on this series?
>>
>
> Hi Ganapatrao,
>
> Is it possible to have vendor sub-folder in to
On Wed, Aug 23, 2017 at 3:47 PM, Will Deacon wrote:
> On Wed, Aug 16, 2017 at 12:40:46PM +0530, Ganapatrao Kulkarni wrote:
>> function get_cpuid_str returns MIDR string of the first online
>> cpu from the range of cpus associated with the pmu core device.
>>
>> Signed-
function get_cpuid_str returns MIDR string of the first online
cpu from the range of cpus associated with the pmu core device.
Signed-off-by: Ganapatrao Kulkarni
---
tools/perf/arch/arm64/util/Build| 1 +
tools/perf/arch/arm64/util/header.c | 60 +
2
On some platforms, PMU core devices sysfs name is not cpu.
Adding function is_pmu_core to detect PMU core devices using
core device specific hints in sysfs.
For arm64 platforms, all core devices have file "cpus" in sysfs.
Tested-by: Shaokun Zhang
Signed-off-by: Ganapatrao Kulkarni
core device.
v1: Initial patchset.
Ganapatrao Kulkarni (4):
perf utils: passing pmu as a parameter to function get_cpuid_str
perf tools arm64: Add support for get_cpuid_str function.
perf utils: Add helper function is_pmu_core to detect PMU CORE devices
perf vendor events arm64: Add Thun
This is not a full event list, but a short list of useful events.
Signed-off-by: Ganapatrao Kulkarni
---
tools/perf/pmu-events/arch/arm64/mapfile.csv | 15 ++
.../arm64/thunderx2/implementation-defined.json| 62 ++
2 files changed, 77 insertions(+)
create mode
cpuid string will not be same on all CPUs on heterogeneous
platforms like ARM's big.LITTLE, adding provision(using pmu->cpus)
to find cpuid string from associated CPUs of PMU CORE device.
Signed-off-by: Ganapatrao Kulkarni
---
tools/perf/arch/powerpc/util/header.c | 2 +-
tools/perf/
Hi Arnaldo, Will,
are there any comments on this series?
On Wed, Aug 16, 2017 at 12:40 PM, Ganapatrao Kulkarni
wrote:
> Extending json/jevent framework for parsing arm64 event files.
> Adding jevents for ThunderX2 implementation defined PMU events.
>
> v5:
>- Addresse
lto:lorenzo.pieral...@arm.com]
>> > Sent: Thursday, June 22, 2017 6:43 AM
>> > To: Ganapatrao Kulkarni ; Zheng, Lv
>> > ; Moore, Robert ; Rafael J.
>> > Wysocki
>> > Cc: linux-a...@vger.kernel.org; de...@acpica.org; linux-
>> > ker...@vger.ke
Hi Mark/Will,
any comments on this series?
this patch is required to use implementation defined perf events,
which are more refined events on ThunderX2.
On Mon, Jun 12, 2017 at 3:51 PM, Ganapatrao Kulkarni
wrote:
> Hi Shaokun,
>
> On Mon, Jun 12, 2017 at 3:19 PM, Zhangshaokun
>
mware.
v1: Initial patch
Ganapatrao Kulkarni (2):
perf: uncore: Adding documentation for ThunderX2 pmu uncore driver
perf: ThunderX2: Add Cavium Thunderx2 SoC UNCORE PMU driver
Documentation/perf/thunderx2-pmu.txt | 60 +++
drivers/perf/Kconfig | 9 +
drivers/perf/Mak
Documentation for the UNCORE PMUs on Cavium's ThunderX2 SoC.
The SoC has PMU support in its L3 cache controller (L3C) and in the
DDR4 Memory Controller (DMC).
Signed-off-by: Ganapatrao Kulkarni
---
Documentation/perf/thunderx2-pmu.txt | 60
1 file ch
This patch adds a perf driver for the PMU UNCORE devices DDR4 Memory
Controller(DMC) and Level 3 Cache(L3C).
Signed-off-by: Ganapatrao Kulkarni
---
drivers/perf/Kconfig | 9 +
drivers/perf/Makefile| 1 +
drivers/perf/thunderx2_pmu.c | 968
ARM IORT specification has provision to define Proximity domain
in SMMUv3 IORT table. Adding required code to parse Proximity domain of
SMMUv3 IORT table. Parsed Proximity domain is used to set numa_node
of SMMUv3 platform devices.
Signed-off-by: Ganapatrao Kulkarni
---
drivers/iommu/arm-smmu
This is not a full event list, but a short list of useful events.
Signed-off-by: Ganapatrao Kulkarni
---
tools/perf/pmu-events/arch/arm64/mapfile.csv | 15 ++
.../arm64/thunderx2/implementation-defined.json| 62 ++
2 files changed, 77 insertions(+)
create mode
n for get_cpuid_str to get cpu id string
from associated cpus of pmu core device.
v1: Initial patchset.
Ganapatrao Kulkarni (4):
perf utils: passing pmu as a parameter to function get_cpuid_str
perf tools arm64: Add support for get_cpuid_str function.
perf utils: Add helper function is_pmu
cpuid string will not be same on all CPUs on heterogeneous
platforms like ARM's big.LITTLE, adding provision(using pmu->cpus)
to find cpuid string from associated CPUs of PMU CORE device.
Signed-off-by: Ganapatrao Kulkarni
---
tools/perf/arch/powerpc/util/header.c | 2 +-
tools/perf/
On some platforms, PMU core devices sysfs name is not cpu.
Adding function is_pmu_core to detect as core device using
core device specific hints in sysfs.
For arm64 platforms, all core devices have file "cpus" in sysfs.
Signed-off-by: Ganapatrao Kulkarni
---
tools/perf/util/
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