|2 +-
> drivers/media/platform/soc_camera/rcar_vin.c |2 +-
> drivers/media/platform/soc_camera/sh_mobile_ceu_camera.c |2 +-
For this driver:
> drivers/media/platform/sti/bdisp/bdisp-v4l2.c|2 +-
Reviewed-by: Fabien Dessenne
> dri
with tcrypt / testmgr.
Changes since v3:
- update dt-bindings with Rob Herring remarks
Changes since v2:
- update dt-bindings (interrupts description)
- rebase on STM32 crypto patches (L. Debieve : update CRC32 + add HASH)
Fabien Dessenne (3):
crypto: engine - permit to enqueue aead_request
The current crypto engine allows ablkcipher_request and ahash_request to
be enqueued. Extend this to aead_request.
Signed-off-by: Fabien Dessenne
---
crypto/crypto_engine.c | 101
include/crypto/engine.h | 16
2 files changed, 117
Document device tree bindings for the STM32 CRYP.
Signed-off-by: Fabien Dessenne
Acked-by: Rob Herring
---
.../devicetree/bindings/crypto/st,stm32-cryp.txt | 19 +++
1 file changed, 19 insertions(+)
create mode 100644 Documentation/devicetree/bindings/crypto/st,stm32
This module registers block and AEAD cipher algorithms that make use of
the STMicroelectronics STM32 crypto "CRYP1" hardware.
The following algorithms are supported:
- aes: ecb, cbc, ctr, gcm, ccm
- des: ecb, cbc
- tdes: ecb, cbc
Signed-off-by: Fabien Dessenne
---
drivers/crypto/stm
list.lock);
>
> - ret = crypto_register_shashes(algs, ARRAY_SIZE(algs));
> + /* For F4 series only CRC32 algorithm will be used */
> + if (of_device_is_compatible(crc->dev->of_node, "st,stm32f4-crc"))
> + algs_size = 1;
> + else
> + algs_size = ARRAY_SIZE(algs);
> +
> + ret = crypto_register_shashes(algs, algs_size);
> if (ret) {
> dev_err(dev, "Failed to register\n");
> clk_disable_unprepare(crc->clk);
> @@ -304,6 +351,7 @@ static int stm32_crc_remove(struct platform_device *pdev)
>
> static const struct of_device_id stm32_dt_ids[] = {
> { .compatible = "st,stm32f7-crc", },
> + { .compatible = "st,stm32f4-crc", },
> {},
> };
> MODULE_DEVICE_TABLE(of, stm32_dt_ids);
Reviewed-by: Fabien Dessenne
Hi Herbert,
Can you check if this patchset (removed the AEAD part as you suggested +
libkcapi test OK as suggested by Corentin) can be applied now?
BR
Fabien
On 07/11/17 15:40, Fabien DESSENNE wrote:
>
> On 22/10/17 09:26, Corentin Labbe wrote:
>> On Thu, Oct 19, 2017 at 05:1
e clang warning:
>
> drivers/media/platform/sti/bdisp/bdisp-v4l2.c:726:26: warning: Value
> stored to 'pix' during its initialization is never read
>
> Signed-off-by: Colin Ian King
Reviewed-by: Fabien Dessenne
> ---
> drivers/media/platform/sti/bdisp/bdisp-v4l2.
This module registers block cipher algorithms that make use of the
STMicroelectronics STM32 crypto "CRYP1" hardware.
The following algorithms are supported:
- aes: ecb, cbc, ctr
- des: ecb, cbc
- tdes: ecb, cbc
Signed-off-by: Fabien Dessenne
---
drivers/crypto/stm32/Kconfig
upts description)
- rebase on STM32 crypto patches (L. Debieve : update CRC32 + add HASH)
Fabien Dessenne (3):
crypto: engine - permit to enqueue aead_request
dt-bindings: Document STM32 CRYP bindings
crypto: stm32 - Support for STM32 CRYP crypto module
Fabien Dessenne (2):
dt-bindings: Docu
Document device tree bindings for the STM32 CRYP.
Signed-off-by: Fabien Dessenne
Acked-by: Rob Herring
---
.../devicetree/bindings/crypto/st,stm32-cryp.txt | 19 +++
1 file changed, 19 insertions(+)
create mode 100644 Documentation/devicetree/bindings/crypto/st,stm32
Fabien
On 19/10/17 12:34, Corentin Labbe wrote:
> Hello
>
> I have some minor comment below
>
> On Thu, Oct 19, 2017 at 11:03:59AM +0200, Fabien Dessenne wrote:
>> This module registers block cipher algorithms that make use of the
>> STMicroelectronics STM32 crypto "C
This module registers block cipher algorithms that make use of the
STMicroelectronics STM32 crypto "CRYP1" hardware.
The following algorithms are supported:
- aes: ecb, cbc, ctr
- des: ecb, cbc
- tdes: ecb, cbc
Signed-off-by: Fabien Dessenne
---
drivers/crypto/stm32/Kconfig
CCM algorithms
Changes since v3:
- update dt-bindings with Rob Herring remarks
Changes since v2:
- update dt-bindings (interrupts description)
- rebase on STM32 crypto patches (L. Debieve : update CRC32 + add HASH)
Fabien Dessenne (2):
dt-bindings: Document STM32 CRYP bindings
crypto: s
Document device tree bindings for the STM32 CRYP.
Signed-off-by: Fabien Dessenne
Acked-by: Rob Herring
---
.../devicetree/bindings/crypto/st,stm32-cryp.txt | 19 +++
1 file changed, 19 insertions(+)
create mode 100644 Documentation/devicetree/bindings/crypto/st,stm32
(adding my tested my)
On 10/01/18 15:24, Fabien DESSENNE wrote:
>
> On 03/01/18 21:11, Corentin Labbe wrote:
>> This patch convert the stm32-hash driver to the new crypto engine API.
>>
>> Signed-off-by: Corentin Labbe
Tested-by: Fabien Dessenne
>> ---
>>
(adding my tested by)
On 10/01/18 15:19, Fabien DESSENNE wrote:
> On 03/01/18 21:11, Corentin Labbe wrote:
>> The crypto engine could actually only enqueue hash and ablkcipher request.
>> This patch permit it to enqueue any type of crypto_async_request.
>>
>> Si
(Adding my tested by)
On 10/01/18 15:25, Fabien DESSENNE wrote:
>
> On 03/01/18 21:11, Corentin Labbe wrote:
>> This patch convert the stm32-cryp driver to the new crypto engine API.
>> Signed-off-by: Corentin Labbe
Tested-by: Fabien Dessenne
>> ---
>>dri
Hi Corentin,
Thank you for this new version which I have testes successfully with the
stm32 hash & cryp drivers.
As a general comment on this patchset, I would say that it does not
cover all async requests: typically I need (for the pending stm32 cryp
driver uprade) to use CryptoEngine to pro
On 03/01/18 21:11, Corentin Labbe wrote:
> The crypto engine could actually only enqueue hash and ablkcipher request.
> This patch permit it to enqueue any type of crypto_async_request.
>
> Signed-off-by: Corentin Labbe
> ---
> crypto/crypto_engine.c | 230
> --
On 03/01/18 21:11, Corentin Labbe wrote:
> This patch convert the stm32-hash driver to the new crypto engine API.
>
> Signed-off-by: Corentin Labbe
> ---
> drivers/crypto/stm32/stm32-hash.c | 18 +-
> 1 file changed, 13 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/cr
On 03/01/18 21:11, Corentin Labbe wrote:
> This patch convert the stm32-cryp driver to the new crypto engine API.
> Signed-off-by: Corentin Labbe
> ---
> drivers/crypto/stm32/stm32-cryp.c | 21 -
> 1 file changed, 16 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/c
Rob's comments:
- change compatible property to "st,stm32mp1-ipcc"
- change "st,proc_id" property to "st,proc-id"
- define all interrupts as mandatory
Fabien Dessenne (2):
dt-bindings: mailbox: add STMicroelectronics STM32 IPCC binding
mailbox
Add a binding for the STMicroelectronics STM32 IPCC block exposing a
mailbox mechanism between two processors.
Signed-off-by: Fabien Dessenne
Signed-off-by: Ludovic Barre
---
.../devicetree/bindings/mailbox/stm32-ipcc.txt | 47 ++
1 file changed, 47 insertions
The STMicroelectronics STM32 Inter-Processor Communication Controller
(IPCC) is used for communicating data between two processors.
It provides a non blocking signaling mechanism to post and retrieve
communication data in an atomic way.
Signed-off-by: Fabien Dessenne
Signed-off-by: Ludovic Barre
Hi
On 05/04/18 11:38, Jassi Brar wrote:
> On Mon, Mar 12, 2018 at 4:28 PM, Fabien Dessenne
> wrote:
>
>> +
>> + /* irq */
>> + for (i = 0; i < IPCC_IRQ_NUM; i++) {
>> + ipcc->irqs[i] = of_irq_get_byname(dev->of_node,
On 06/04/18 14:56, Jassi Brar wrote:
> On Fri, Apr 6, 2018 at 5:59 PM, Fabien DESSENNE
> wrote:
>> Hi
>>
>>
>> On 05/04/18 11:38, Jassi Brar wrote:
>>> On Mon, Mar 12, 2018 at 4:28 PM, Fabien Dessenne
>>> wrote:
>>>
>>>&g
ot;st,proc-id"
- define all interrupts as mandatory
Fabien Dessenne (2):
dt-bindings: mailbox: add STMicroelectronics STM32 IPCC binding
mailbox: add STMicroelectronics STM32 IPCC driver
.../devicetree/bindings/mailbox/stm32-ipcc.txt | 47 +++
drivers/mailbox/Kconfig
The STMicroelectronics STM32 Inter-Processor Communication Controller
(IPCC) is used for communicating data between two processors.
It provides a non blocking signaling mechanism to post and retrieve
communication data in an atomic way.
Signed-off-by: Fabien Dessenne
Signed-off-by: Ludovic Barre
Add a binding for the STMicroelectronics STM32 IPCC block exposing a
mailbox mechanism between two processors.
Signed-off-by: Fabien Dessenne
Signed-off-by: Ludovic Barre
Reviewed-by: Rob Herring
---
.../devicetree/bindings/mailbox/stm32-ipcc.txt | 47 ++
1 file
On 06/04/18 18:20, Jassi Brar wrote:
> On Fri, Apr 6, 2018 at 8:35 PM, Fabien DESSENNE
> wrote:
>> On 06/04/18 14:56, Jassi Brar wrote:
>>> On Fri, Apr 6, 2018 at 5:59 PM, Fabien DESSENNE
>>> wrote:
>>>> Hi
>>>>
>>>>
>>
Add a binding for the STMicroelectronics STM32 IPCC block exposing a
mailbox mechanism between two processors.
Signed-off-by: Fabien Dessenne
Signed-off-by: Ludovic Barre
---
.../devicetree/bindings/mailbox/stm32-ipcc.txt | 47 ++
1 file changed, 47 insertions
'driver.owner'
Changes since v2:
- update bindings and driver according to Rob's comments:
- change compatible property to "st,stm32mp1-ipcc"
- change "st,proc_id" property to "st,proc-id"
- define all interrupts as mandatory
Fab
The STMicroelectronics STM32 Inter-Processor Communication Controller
(IPCC) is used for communicating data between two processors.
It provides a non blocking signaling mechanism to post and retrieve
communication data in an atomic way.
Signed-off-by: Fabien Dessenne
Signed-off-by: Ludovic Barre
On 07/05/18 17:19, Mauro Carvalho Chehab wrote:
> Em Mon, 07 May 2018 16:26:08 +0300
> Laurent Pinchart escreveu:
>
>> Hi Mauro,
>>
>> On Saturday, 5 May 2018 19:08:15 EEST Mauro Carvalho Chehab wrote:
>>> There was a recent discussion about the use/abuse of GFP_DMA flag when
>>> allocating memo
Hi Jassi,
Do you have any more comments or do you plan to have this patch part of
the 4.18 pull request ?
BR
Fabien
On 12/04/18 08:47, Fabien DESSENNE wrote:
> The STMicroelectronics STM32 Inter-Processor Communication Controller
> (IPCC) is used for communicating data between two proc
ot;st,proc-id"
- define all interrupts as mandatory
Fabien Dessenne (2):
dt-bindings: mailbox: add STMicroelectronics STM32 IPCC binding
mailbox: add STMicroelectronics STM32 IPCC driver
.../devicetree/bindings/mailbox/stm32-ipcc.txt | 47 +++
drivers/mailbox/Kconfig
The STMicroelectronics STM32 Inter-Processor Communication Controller
(IPCC) is used for communicating data between two processors.
It provides a non blocking signaling mechanism to post and retrieve
communication data in an atomic way.
Signed-off-by: Fabien Dessenne
Signed-off-by: Ludovic Barre
Add a binding for the STMicroelectronics STM32 IPCC block exposing a
mailbox mechanism between two processors.
Signed-off-by: Fabien Dessenne
Signed-off-by: Ludovic Barre
Reviewed-by: Rob Herring
---
.../devicetree/bindings/mailbox/stm32-ipcc.txt | 47 ++
1 file
-by: Yangtao Li
Reviewed-by: Fabien Dessenne
> ---
> .../media/platform/sti/bdisp/bdisp-debug.c| 34 ++
> drivers/media/platform/sti/hva/hva-debugfs.c | 36 +++
> 2 files changed, 23 insertions(+), 47 deletions(-)
>
> diff --git a/drive
Fix null pointer issue if resource_size is called with no ioresource.
Signed-off-by: Ludovic Barre
Signed-off-by: Fabien Dessenne
---
drivers/mailbox/mailbox-test.c | 14 --
1 file changed, 8 insertions(+), 6 deletions(-)
diff --git a/drivers/mailbox/mailbox-test.c b/drivers
By default do not enable the wakeup source.
This lets the userspace application decide whether the wakeup source
shall be enabled or not.
Signed-off-by: Fabien Dessenne
---
drivers/mailbox/stm32-ipcc.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/mailbox/stm32
If the "wakeup-source" property does not exist there is no need to call
device_init_wakeup("false") at probe.
Signed-off-by: Fabien Dessenne
---
drivers/mailbox/stm32-ipcc.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/drivers/mailbox/stm32-ipcc.c b/drivers/mailbo
Create one debug entry directory per instance to support the multi
instantiation.
Signed-off-by: Ludovic Barre
Signed-off-by: Fabien Dessenne
---
drivers/mailbox/mailbox-test.c | 12 ++--
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/drivers/mailbox/mailbox-test.c b
Add the bdisp (2D blitter for STMicroelectronics SoC) dt nodes for the
first of the two bdisp devices, defining register address, interrupt and
clock.
Signed-off-by: Fabien Dessenne
---
arch/arm/boot/dts/stih410.dtsi | 12
1 file changed, 12 insertions(+)
diff --git a/arch/arm
Hi Maxime,
> -Original Message-
> From: Maxime COQUELIN
> Sent: mercredi 17 juin 2015 14:13
> To: Fabien DESSENNE; Srinivas Kandagatla; Patrice CHOTARD; Rob Herring;
> Pawel Moll; Mark Rutland; Ian Campbell; Kumar Gala; Russell King; linux-arm-
> ker...@lists.
The STMicroelectronics STM32 Inter-Processor Communication Controller
(IPCC) is used for communicating data between two processors.
It provides a non blocking signaling mechanism to post and retrieve
communication data in an atomic way.
Fabien Dessenne (2):
dt-bindings: mailbox: add
The STMicroelectronics STM32 Inter-Processor Communication Controller
(IPCC) is used for communicating data between two processors.
It provides a non blocking signaling mechanism to post and retrieve
communication data in an atomic way.
Signed-off-by: Fabien Dessenne
Signed-off-by: Ludovic Barre
Add a binding for the STMicroelectronics STM32 IPCC block exposing a
mailbox mechanism between two processors.
Signed-off-by: Fabien Dessenne
Signed-off-by: Ludovic Barre
---
.../devicetree/bindings/mailbox/stm32-ipcc.txt | 48 ++
1 file changed, 48 insertions
If 'name' is not found in the "mbox-names" list, return an error
Signed-off-by: Fabien Dessenne
---
drivers/mailbox/mailbox.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/drivers/mailbox/mailbox.c b/drivers/mailbox/mailbox.c
index 674b35f..
oops! you can forget this patch, the original implementation is correct
BR
Fabien
On 01/03/18 11:16, Fabien DESSENNE wrote:
> If 'name' is not found in the "mbox-names" list, return an error
>
> Signed-off-by: Fabien Dessenne
> ---
> drivers/mailbox/mailbo
Just a gentle ping ... or have I missed out on a reply?
On 12/03/18 11:58, Fabien DESSENNE wrote:
> The STMicroelectronics STM32 Inter-Processor Communication Controller
> (IPCC) is used for communicating data between two processors.
> It provides a non blocking signaling mechanism to
>> platforms, which is accessed directly from both the modem remoteproc
>> and the application subsystem and requires an intricate lockstep
>> process when bringing the modem up and down.
>>
>> [el...@linaro.org: minor description and comment edits]
>>
&
t; On 05/29/2018 10:30 AM, Fabien DESSENNE wrote:
>> Hi,
>>
>> Adding my 'Tested-by'.
> Normally you would say:
>
> Tested-by: Fabien DESSENNE
>
> The reason it might be important is you might wish to indicate the
> name and/or e-mail as something
On 14/05/18 12:39, Mauro Carvalho Chehab wrote:
> Em Mon, 14 May 2018 07:35:03 -0300
> Mauro Carvalho Chehab escreveu:
>
>> Hi Fabien,
>>
>> Em Mon, 14 May 2018 08:00:37 +
>> Fabien DESSENNE escreveu:
>>
>>> On 07/05/18 17:19, Mauro Carvalho
Enable STM32 IPCC mailbox driver for STM32MP157c-ed1 board.
Signed-off-by: Fabien Dessenne
---
arch/arm/boot/dts/stm32mp157c-ed1.dts | 4
1 file changed, 4 insertions(+)
diff --git a/arch/arm/boot/dts/stm32mp157c-ed1.dts
b/arch/arm/boot/dts/stm32mp157c-ed1.dts
index 10dc7c0..626ceb3
Add configuration on DT for IPCC mailbox driver.
Signed-off-by: Fabien Dessenne
---
arch/arm/boot/dts/stm32mp157c.dtsi | 15 +++
1 file changed, 15 insertions(+)
diff --git a/arch/arm/boot/dts/stm32mp157c.dtsi
b/arch/arm/boot/dts/stm32mp157c.dtsi
index 10bf338..c664b55 100644
Enable STM32 IPCC mailbox driver for STM32MP157a-dk1 board.
Signed-off-by: Fabien Dessenne
---
arch/arm/boot/dts/stm32mp157a-dk1.dts | 4
1 file changed, 4 insertions(+)
diff --git a/arch/arm/boot/dts/stm32mp157a-dk1.dts
b/arch/arm/boot/dts/stm32mp157a-dk1.dts
index b229ab1..85a761a
Support IPCC mailbox on STM32MP157c-ed1 and STM32MP157a-dk1 boards.
Fabien Dessenne (3):
ARM: dts: stm32: add IPCC mailbox support on STM32MP157c
ARM: dts: stm32: enable IPCC mailbox support on STM32MP157c-ed1
ARM: dts: stm32: enable IPCC mailbox support on STM32MP157a-dk1
arch/arm/boot
Enable m4 coprocessor for STM32MP157c-ed1 board.
Signed-off-by: Fabien Dessenne
---
arch/arm/boot/dts/stm32mp157c-ed1.dts | 10 ++
1 file changed, 10 insertions(+)
diff --git a/arch/arm/boot/dts/stm32mp157c-ed1.dts
b/arch/arm/boot/dts/stm32mp157c-ed1.dts
index acfc5cd..e5a6f40 100644
Declare reserved memories shared by the processors for STM32MP157a-dk1
Signed-off-by: Fabien Dessenne
---
arch/arm/boot/dts/stm32mp157a-dk1.dts | 42 +++
1 file changed, 42 insertions(+)
diff --git a/arch/arm/boot/dts/stm32mp157a-dk1.dts
b/arch/arm/boot/dts
Enable m4 coprocessor for STM32MP157a-dk1 board.
Signed-off-by: Fabien Dessenne
---
arch/arm/boot/dts/stm32mp157a-dk1.dts | 10 ++
1 file changed, 10 insertions(+)
diff --git a/arch/arm/boot/dts/stm32mp157a-dk1.dts
b/arch/arm/boot/dts/stm32mp157a-dk1.dts
index 26ce8de..da64ee2 100644
Declare reserved memories shared by the processors for STM32MP157c-ed1
board.
Signed-off-by: Fabien Dessenne
---
arch/arm/boot/dts/stm32mp157c-ed1.dts | 42 +++
1 file changed, 42 insertions(+)
diff --git a/arch/arm/boot/dts/stm32mp157c-ed1.dts
b/arch/arm/boot
Document the ML-AHB interconnect for stm32 SoCs.
Signed-off-by: Fabien Dessenne
---
.../devicetree/bindings/arm/stm32/mlahb.txt| 37 ++
1 file changed, 37 insertions(+)
create mode 100644 Documentation/devicetree/bindings/arm/stm32/mlahb.txt
diff --git a
This patch introduces a new remoteproc driver to control Cortex-M4
co-processor of the STM32 family.
It provides with the following features:
- start and stop
- dedicated co-processor memory regions registration
- coredump and recovery
Signed-off-by: Fabien Dessenne
Signed-off-by: Ludovic Barre
Add the device tree bindings document for the stm32 remoteproc devices.
Signed-off-by: Fabien Dessenne
---
.../devicetree/bindings/remoteproc/stm32-rproc.txt | 64 ++
1 file changed, 64 insertions(+)
create mode 100644 Documentation/devicetree/bindings/remoteproc/stm32
instead of 'ranges'.
- Updated the 'compatible' property.
- Remove the 'recovery', 'reset-names' and 'interrupt-names' properties.
- Clarified why / when mailboxes are optional.
Fabien Dessenne (8):
dt-bindings: stm32: add bindings for ML-AHB in
Declare the M4 remote processor in a sub-node of the mlahb simple bus.
Signed-off-by: Fabien Dessenne
---
arch/arm/boot/dts/stm32mp157c.dtsi | 20
1 file changed, 20 insertions(+)
diff --git a/arch/arm/boot/dts/stm32mp157c.dtsi
b/arch/arm/boot/dts/stm32mp157c.dtsi
index
.
This applies only for the device which is "st,stm32mp1-exti" compatible,
the management of the other devices (st,stm32h7-exti / st,stm32-exti) is
kept unchanged (use IRQCHIP_DECLARE)
Signed-off-by: Fabien Dessenne
---
drivers/irqchip/irq-stm32-ex
It is not guaranteed that the IRQ controller driver is probed before
the pin controller driver gets probed.
Considering this, check for the irq domain availability during probe
and return EPROBE_DEFER if needed.
Signed-off-by: Fabien Dessenne
---
drivers/pinctrl/stm32/pinctrl-stm32.c | 37
platform_get_resource(pdev, IORESOURCE_IRQ) is not recommended for
requesting IRQ's resources, as they can be not ready yet. Using
platform_get_irq() instead is preferred for getting IRQ even if it was
not retrieved earlier.
Signed-off-by: Fabien Dessenne
---
drivers/dma/stm32-dma.c
Manage the -EPROBE_DEFER error case for the wake IRQ.
Signed-off-by: Fabien Dessenne
---
drivers/rtc/rtc-stm32.c | 9 ++---
1 file changed, 6 insertions(+), 3 deletions(-)
diff --git a/drivers/rtc/rtc-stm32.c b/drivers/rtc/rtc-stm32.c
index c5908cf..8e6c9b3 100644
--- a/drivers/rtc/rtc
During probe, return the "get_irq" error value instead of -ENOENT. This
allows the driver to be defer probed if needed.
Signed-off-by: Fabien Dessenne
---
drivers/spi/spi-stm32.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/drivers/spi/spi-stm32.c b/drive
During probe, check the "get_irq" error value.
Signed-off-by: Fabien Dessenne
---
drivers/iio/adc/stm32-dfsdm-adc.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/drivers/iio/adc/stm32-dfsdm-adc.c
b/drivers/iio/adc/stm32-dfsdm-adc.c
index 19adc2b..588907c 100644
--- a/d
This patchset adds some check of the returned error code in probe.
Fabien Dessenne (2):
iio: adc: stm32-dfsdm: manage the get_irq error case
iio: adc: stm32-dfsdm: missing error case during probe
drivers/iio/adc/stm32-dfsdm-adc.c | 6 ++
drivers/iio/adc/stm32-dfsdm-core.c | 8
During probe, check the devm_ioremap_resource() error value.
Also return the devm_clk_get() error value instead of -EINVAL.
Signed-off-by: Fabien Dessenne
---
drivers/iio/adc/stm32-dfsdm-core.c | 8 ++--
1 file changed, 6 insertions(+), 2 deletions(-)
diff --git a/drivers/iio/adc/stm32
During probe, check the "get_irq" error value.
Signed-off-by: Fabien Dessenne
---
drivers/mtd/nand/raw/stm32_fmc2_nand.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/drivers/mtd/nand/raw/stm32_fmc2_nand.c
b/drivers/mtd/nand/raw/stm32_fmc2_nand.c
index 999ca6a..4aabea2 10
During probe, check the "get_irq" error value.
Signed-off-by: Fabien Dessenne
---
drivers/spi/spi-stm32-qspi.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/drivers/spi/spi-stm32-qspi.c b/drivers/spi/spi-stm32-qspi.c
index 11a89aa..42f8e3c 100644
--- a/drivers/spi/spi-st
During probe, return the "get_irq" error value instead of -ENOENT. This
allows the driver to be deferred probed if needed.
Signed-off-by: Fabien Dessenne
---
sound/soc/stm/stm32_i2s.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/sound/soc/stm/stm32_i2s.c b
-off-by: Fabien Dessenne
---
drivers/mailbox/stm32-ipcc.c | 13 -
1 file changed, 8 insertions(+), 5 deletions(-)
diff --git a/drivers/mailbox/stm32-ipcc.c b/drivers/mailbox/stm32-ipcc.c
index 210fe50..f91dfb1 100644
--- a/drivers/mailbox/stm32-ipcc.c
+++ b/drivers/mailbox/stm32-ipcc.c
Use #hwlock-cells value to define whether the locks can be shared
by several users.
Signed-off-by: Fabien Dessenne
Reviewed-by: Rob Herring
---
.../devicetree/bindings/hwlock/hwlock.txt | 27 --
1 file changed, 20 insertions(+), 7 deletions(-)
diff --git a
same value : 1.
- the framework supports only one value : 1 (see implementation of
of_hwspin_lock_simple_xlate())
Hence, it shall not be a problem to restrict this value to 1 or 2 since
it won't break any driver.
Fabien Dessenne (6):
dt-bindings: hwlock: add support of shared locks
hwspinloc
es
whether an hwlock is requested for an exclusive or a shared usage.
If a device registers with #hwlock-cells = 1, then all the hwlocks are
for an exclusive usage.
Signed-off-by: Fabien Dessenne
---
Documentation/hwspinlock.txt | 10 ++--
drivers/hwspinlock/hwspinlock_core.
.
Signed-off-by: Fabien Dessenne
---
drivers/remoteproc/stm32_rproc.c | 11 +++
1 file changed, 11 insertions(+)
diff --git a/drivers/remoteproc/stm32_rproc.c b/drivers/remoteproc/stm32_rproc.c
index e2da719..1c95913 100644
--- a/drivers/remoteproc/stm32_rproc.c
+++ b/drivers/remoteproc
Manage the -EPROBE_DEFER error case for "wdg" IRQ.
Signed-off-by: Fabien Dessenne
---
drivers/remoteproc/stm32_rproc.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/remoteproc/stm32_rproc.c b/drivers/remoteproc/stm32_rproc.c
index 1c95913..2cf4b29 100644
---
Add the "wakeup-source" property: if the optional wdg interrupt is
defined, then this property may be defined too.
Signed-off-by: Fabien Dessenne
---
Documentation/devicetree/bindings/remoteproc/stm32-rproc.txt | 3 +++
1 file changed, 3 insertions(+)
diff --git a/Documentation/
If the device node defines the 'wakeup-source' property, use the WDG
exti IRQ as a wakeup source of the system.
Signed-off-by: Fabien Dessenne
---
drivers/remoteproc/stm32_rproc.c | 47
1 file changed, 47 insertions(+)
diff --git a/drivers/
The watchdog IRQ which notifies the remote processor crash is used by the
remoteproc framework to perform a recovery procedure.
Since this IRQ may be fired when the Linux system is suspended, this IRQ may
be configured to wake up the system.
Fabien Dessenne (2):
dt-bindings: remoteproc: stm32
If the rproc driver is probed before the mailbox driver and if the rproc
Device Tree node has some mailbox properties, the rproc driver probe
shall be deferred instead of being probed without mailbox support.
Signed-off-by: Fabien Dessenne
---
drivers/remoteproc/stm32_rproc.c | 12
If the rproc driver is probed before the mailbox driver and if the rproc
Device Tree node has some mailbox properties, the rproc driver probe
shall be deferred instead of being probed without mailbox support.
Signed-off-by: Fabien Dessenne
---
Changes since v1: test IS_ERR() before checking
Now that the hwspin_lock_timeout_in_atomic() API is available use it.
Signed-off-by: Fabien Dessenne
---
drivers/irqchip/irq-stm32-exti.c | 65 +---
1 file changed, 20 insertions(+), 45 deletions(-)
diff --git a/drivers/irqchip/irq-stm32-exti.c b/drivers
Hi
I Got Rob's Reviewed-by for the bindings. Any further comments for the driver
part?
Fabien
> -Original Message-
> From: Fabien DESSENNE
> Sent: lundi 26 août 2019 17:39
> To: Rob Herring ; Mark Rutland ;
> Maxime Coquelin ; Alexandre TORGUE
> ; Ohad Ben-Co
The wakeup specific IRQ management is no more needed to wake up the stm32
plaform.
Signed-off-by: Alexandre Torgue
Signed-off-by: Fabien Dessenne
---
Documentation/devicetree/bindings/mailbox/stm32-ipcc.txt | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/Documentation
Remove the dedicated wakeup IRQ as wakeup can be handled by the RX IRQ.
Fabien Dessenne (2):
dt-bindings: mailbox: stm32-ipcc: Updates for wakeup management
mailbox: stm32-ipcc: Update wakeup management
.../devicetree/bindings/mailbox/stm32-ipcc.txt | 4 +--
drivers/mailbox/stm32
The wakeup specific IRQ management is no more needed to wake up the stm32
plaform. A relationship has been established between the EXTI and
the RX IRQ, just need to declare the EXTI interrupt instead of the
IPCC RX IRQ.
Signed-off-by: Alexandre Torgue
Signed-off-by: Fabien Dessenne
---
drivers
esults in register
> corruptions.
>
> Signed-off-by: Arnaud Pouliquen
Reviewed-by: Fabien Dessenne
> ---
> drivers/mailbox/stm32-ipcc.c | 37 +++--
> 1 file changed, 27 insertions(+), 10 deletions(-)
>
> diff --git a/drivers/mailbox/stm
Hi Johan,
On 03/04/2019 10:44 AM, Johan Hovold wrote:
> On Thu, Mar 21, 2019 at 04:47:19PM +0100, Fabien Dessenne wrote:
>> This driver exposes a standard tty interface on top of the rpmsg
>> framework through the "rpmsg-tty-channel" rpmsg service.
>>
>>
Hi
Any further comments?
Fabien
On 08/03/2019 1:42 PM, Benjamin Gaignard wrote:
> Le jeu. 7 mars 2019 à 16:42, Fabien Dessenne a écrit
> :
>> Implement this optional ops, called by hwspinlock core while spinning on
>> a lock, between two successive invocations of trylock()
Hi
Gentle reminder
Fabien
On 08/03/2019 5:53 PM, Fabien Dessenne wrote:
> Do not wait for hwspinlock device registration if it is not available
> for use.
>
> Signed-off-by: Fabien Dessenne
> ---
> V2: use 'goto out' instead of 'return'
>
>
Hi
I Got Rob's Reviewed-by. Any further comments?
Fabien
On 25/04/2019 11:17 AM, Fabien Dessenne wrote:
> The current implementation does not allow two different devices to use
> a common hwspinlock. This patch set proposes to have, as an option, some
> hwspinlocks shared b
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