On 11/29/2012 01:04 PM, Alan Cooper wrote:
I've been doing some testing of the MIPS Function Tracer functionality
on the 3.3 kernel. I was surprised to find that the option to generate
frame pointers was required for tracing.
It is not really required for MIPS function tracing, but the Kconfigs
ature since some types of MIPS CPU
need a per-CPU tlb_refill_handler().
Signed-off-by: Huacai Chen
Signed-off-by: Hongbing Hu
We were seeing the same crashes, this patch set seems to fix the problem.
Acked-by: David Daney
---
arch/mips/include/asm/cpu-features.h |
being online;
5, Now, if both parent and child run on CPU#1, memory corruption (e.g.
segfault, bus error, etc.) will occur.
Signed-off-by: Huacai Chen
We were seeing the same crashes, this patch set seems to fix the problem.
Acked-by: David Daney
---
arch/mips/include/asm/mmu_cont
On 03/20/2013 04:14 PM, David Daney wrote:
On 03/17/2013 05:49 AM, Huacai Chen wrote:
This and the next patch resolve memory corruption problems while CPU
hotplug. Without these patches, memory corruption can triggered easily
as below:
[...]
We were seeing the same crashes, this patch set
From: David Daney
The Octeon SMI/MDIO interfaces can do clause 45 communications, so
implement this in the driver.
Signed-off-by: David Daney
---
drivers/net/phy/mdio-octeon.c | 89 +--
1 file changed, 86 insertions(+), 3 deletions(-)
diff --git a
From: David Daney
The Octeon SMI/MDIO interfaces can do clause 45 communications, so
implement this in the driver.
Also fix some comment formatting to make it consistent and to comply
with the netdev style.
Signed-off-by: David Daney
---
No code changes from v1, just fixed comment formatting
On 04/03/2013 12:08 PM, Ben Hutchings wrote:
On Wed, 2013-04-03 at 11:16 -0700, David Daney wrote:
From: David Daney
The Octeon SMI/MDIO interfaces can do clause 45 communications, so
implement this in the driver.
Signed-off-by: David Daney
---
drivers/net/phy/mdio-octeon.c | 89
From: David Daney
The Octeon SMI/MDIO interfaces can do clause 45 communications, so
implement this in the driver.
Also fix some comment formatting to make it consistent and to comply
with the netdev style.
Signed-off-by: David Daney
---
v3: Remove now bogus comment noted by Ben Huchings
v2
most people building the kernel, turn it off by default.
Signed-off-by: Arnd Bergmann
Cc: David Daney
Cc: "H. Peter Anvin"
Leaving that enabled was an oversight. Thanks for fixing it...
Acked-by: David Daney
---
scripts/sortextable.h | 2 +-
1 file changed, 1 insertion(+
move processing of the I2C protocol to a kernel
thread and communicate between the this thread and userspace via a
command queue mechanism, much like the way it is done in the mmc/host
driver infrastructure.
David Daney
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From: David Daney
The comments mention HRTIMER_ABS and HRTIMER_REL, these symbols don't
exist, the proper names are HRTIMER_MODE_ABS and HRTIMER_MODE_REL.
Signed-off-by: David Daney
---
kernel/hrtimer.c | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/kernel/hrti
patches), so this would just be churning the code.
David Daney
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Please read the FA
(or as soon as I send in the corresponding
patches), so this would just be churning the code.
David Daney
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From: David Daney
Syntax errors were introduced into include/linux/libfdt.h by the
offending commit, revert the changes made to this file. The kernel
again compiles, thus restoring harmony and balance to the universe.
Signed-off-by: David Daney
Cc: David Howells
Cc: Arnd Bergmann
Cc: Thomas
s/mm/dma-default.c and find
places missing a debug_dma_*().
Thanks,
David Daney
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Please rea
On 10/26/2012 10:06 AM, Shuah Khan wrote:
On Fri, 2012-10-26 at 09:45 -0700, David Daney wrote:
On 10/26/2012 09:01 AM, Shuah Khan wrote:
Add support for debug_dma_mapping_error() call to avoid warning from
debug_dma_unmap() interface when it checks for mapping error checked
status. Without
ardware that exhibits the problem.
How was the patch tested? How do you even know there is a problem?
David Daney
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On 10/31/2012 08:56 AM, Pantelis Antoniou wrote:
Various platforms need access to the EEPROM in other
places besides their platform registration callbacks.
Export the memory accessor to the i2c_client
i2c_clients are *not* intrinsically memory, so adding this to the
generic i2c_client structur
On 10/30/2012 11:51 AM, Pantelis Antoniou wrote:
Hi David,
On Oct 30, 2012, at 8:46 PM, David Daney wrote:
On 10/31/2012 08:56 AM, Pantelis Antoniou wrote:
Various platforms need access to the EEPROM in other
places besides their platform registration callbacks.
Export the memory accessor to
(0);
.
.
.
/* writing context */
atomic_inc(&is_contended);
down_write(&foo);
do_writing_action();
up_write(&foo);
atomic_dec(&is_contended);
/* reading context */
down_read(&foo);
while (!atomic_read(&is_contended))
do_reading_actions();
up
On 09/16/2013 05:37 PM, Peter Hurley wrote:
On 09/16/2013 08:29 PM, David Daney wrote:
On 09/16/2013 05:05 PM, Josef Bacik wrote:
On Mon, Sep 16, 2013 at 04:05:47PM -0700, Andrew Morton wrote:
On Fri, 30 Aug 2013 10:14:01 -0400 Josef Bacik
wrote:
Btrfs uses an rwsem to control access to
.
David Daney
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Please read the FAQ at http://www.tux.org/lkml/
g.
So I don't think the patch is really an improvement over the status quo.
David Daney
__builtin_unreachable() was introduce for GCC 4.5.0.
This means there'd be minor bloat for antique compilers - but probably
even better code generation for compilers supporting __builtin_unreacha
On 09/30/2013 10:15 AM, Pinski, Andrew wrote:
On Sep 30, 2013, at 9:20 AM, "David Daney" wrote:
On 09/30/2013 07:56 AM, Ralf Baechle wrote:
Lately I received several patches for build issues that only strike if
CONFIG_BUG is disabled. Here's a test case extracted f
On 09/30/2013 12:03 PM, Geert Uytterhoeven wrote:
On Mon, Sep 30, 2013 at 7:45 PM, David Daney wrote:
What about using __builtin_unreachable when we can but turn off warnings
and use do{}while(0) when __builtin_unreachable does not exist? This seems
the both worlds. Newer compilers produce
From: Chad Reese
The resource index for the mailboxes was incorrect.
Signed-off-by: Chad Reese
---
include/linux/rio.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/include/linux/rio.h b/include/linux/rio.h
index dc0c755..dd418d1 100644
--- a/include/linux/rio.h
+++ b/inc
From: David Daney
Problem:
1) Huge page mapping of anonymous memory is initially invalid. Will be
faulted in by copy-on-write mechanism.
2) Userspace attempts store at the end of the huge mapping.
3) TLB Refill exception handler fill TLB with a normal (4K sized)
invalid page at the end
-name \*.dts\*` to a top level dts/ directory.
David Daney
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Please read the FAQ at http://www.tux.org/lkml/
On 11/05/2012 01:06 AM, Jamie Iles wrote:
Building with a large config and -ffunction-sections results in a large
number of sections and sortextable needs to be able to handle that.
Implement support for > 64K sections as modpost does.
Cc: David Daney
Cc: H. Peter Anvin
Signed-off-by: Ja
What benefit do you enjoy by keeping the code out of the upstream kernel?
2) What are the benefits of having a driver for your hardware in the
upstream kernel?
If 2 > 1, then the course of action seems obvious.
Doing nothing because of some perceived impediment doesn't help anybody.
On 12/21/2012 03:51 PM, Rik van Riel wrote:
Subject: x86,smp: auto tune spinlock backoff delay factor
Nice work,
A couple of comments...
Many spinlocks are embedded in data structures; having many CPUs
pounce on the cache line the lock is in will slow down the lock
holder, and can cause sys
inite recursion. The fix disables
tracing in these functions by using "notrace" in the function
definition.
Signed-off-by: Al Cooper
Makes sense,
Reviewed-by: David Daney
---
arch/mips/lib/mips-atomic.c |8
1 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/arc
em to have
further modifications in your tree.
David, Above code is wrapped by #ifdef CONFIG_CAVIUM_DECODE_RSL but doesn't
seem to get defined anywhere. What shall we do about this?
It seems to be a vestige of the out-of-tree version. I was going to
send a patch to remove it all, and pe
From: David Daney
Thanks to commit f91eb62f71b (init: scream bloody murder if interrupts
are enabled too early), "bloody murder" is now being screamed.
With a MIPS OCTEON config, we use on_each_cpu() in our
irq_chip.irq_bus_sync_unlock() function. This gets called in early as
a res
ignals using hard-coded
numbers, but instead should always refer to real-time signals using
the notation SIGRTMIN+n, and include suitable (run-time) checks that
SIGRTMIN+n does not exceed SIGRTMAX."
As previously discussed, I think this is the way to go,
Acked-by: David Daney
On 06/13/2013 10:46 PM, Linus Torvalds wrote:
On Thu, Jun 13, 2013 at 6:07 PM, David Daney wrote:
Suggested fix: Do what we already do in the SMP version of
on_each_cpu(), and use local_irq_save/local_irq_restore.
I was going to apply this, but started looking a bit more.
Using "flag
On 06/14/2013 09:40 AM, Javier Martinez Canillas wrote:
Use irq_get_trigger_type() to get the IRQ trigger type flags
instead calling irqd_get_trigger_type(irq_desc_get_irq_data(irq))
Signed-off-by: Javier Martinez Canillas
Acked-by: David Daney
---
arch/mips/cavium-octeon/octeon-irq.c
From: David Daney
Thanks to commit f91eb62f71b (init: scream bloody murder if interrupts
are enabled too early), "bloody murder" is now being screamed.
With a MIPS OCTEON config, we use on_each_cpu() in our
irq_chip.irq_bus_sync_unlock() function. This gets called in early as
a res
_idle() code.
Is this changelog correct? It looks to me like you are enabling
interrupts down there.
David Daney
Reviewed-by: Srivatsa S. Bhat
Cc: sta...@vger.kernel.org
Signed-off-by: James Bottomley
---
Thomas, I'm getting a bit impatient: this is a clear bug in the cpu idle
code a
From: David Daney
The SOCs in the OCTEON family have 16 (or in some cases 20) on-chip
GPIO pins, this driver handles them all. Configuring the pins as
interrupt sources is handled elsewhere (OCTEON's irq handling code).
Signed-off-by: David Daney
---
This patch depends somewhat on patch
On 06/17/2013 03:12 AM, Geert Uytterhoeven wrote:
On Mon, Jun 17, 2013 at 9:07 AM, Geert Uytterhoeven
wrote:
On Sun, Jun 16, 2013 at 10:06 PM, wrote:
From: David Daney
We need to pick up the definition of raw_smp_processor_id() from
asm/smp.h. For the !SMP case, we need to supply a
3/6/17/422
Obviously, it is Linus' choice as to how best to handle the failure, but
I think it is important to know that there are two options (fixing ia64
and mn10300, or reverting the patch).
David Daney
Reported-by: Geert Uytterhoeven
Cc: David Daney
Cc: Ralf Baechle
Signed-off-by
On 06/17/2013 01:59 PM, Andrew Morton wrote:
On Mon, 17 Jun 2013 13:48:16 -0700 David Daney
wrote:
On 06/17/2013 01:30 PM, Andrew Morton wrote:
[...]
From: Andrew Morton
Subject: include/linux/smp.h:on_each_cpu(): switch back to a macro
f21afc25f9ed4 ("smp.h: Use local_irq_{save,re
On 06/17/2013 02:13 PM, Andrew Morton wrote:
On Mon, 17 Jun 2013 14:08:13 -0700 David Daney
wrote:
I think switch-back-to-a-macro is simplest and safest for now. Perhaps
you can queue a 3.11 patch which restores the C function and fixes up
mn10300 and ia64?
If the patch is reverted, I
From: David Daney
This reverts commit fc0fcde2ea9740944acf6134d2c84983d1297bc1.
---
arch/mips/cavium-octeon/Makefile | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/arch/mips/cavium-octeon/Makefile b/arch/mips/cavium-octeon/Makefile
index 643809f..e3fd50c 100644
--- a/arch
From: David Daney
Get rid of the custom OCTEON UART probe code and use 8250_dw instead.
The first patch just gets rid of Ralf's Kconfig workarounds for the
real problem, which is OCTEON's inclomplete serial support.
Then we just make minor patches to 8250_dw, and rip out all this
O
From: David Daney
The serial port changes make it advisable to enable the proper UART
drivers.
Signed-off-by: David Daney
---
arch/mips/configs/cavium_octeon_defconfig | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
diff --git a/arch/mips/configs/cavium_octeon_defconfig
b/arch/mips
From: David Daney
A few differences needed by OCTEON:
o These are DWC UARTS, but have USR at a different offset.
o OCTEON must have 64-bit wide register accesses, so we have OCTEON
specific register accessors.
o No UCV register, so we hard code some properties.
Signed-off-by: David Daney
From: David Daney
Following patch to use generic 8250 drivers will need proper clock
information. So when using the internal device tree, populate the
"clock-frequency" property with the correct value.
Signed-off-by: David Daney
---
arch/mips/cavium-octeon/octeon-platform.c | 9 ++
From: David Daney
We will use 8250_dw instead.
Signed-off-by: David Daney
---
arch/mips/cavium-octeon/Makefile | 2 +-
arch/mips/cavium-octeon/serial.c | 109 ---
2 files changed, 1 insertion(+), 110 deletions(-)
delete mode 100644 arch/mips/cavium
On 06/18/2013 12:36 PM, Ralf Baechle wrote:
On Tue, Jun 18, 2013 at 12:12:50PM -0700, David Daney wrote:
From: David Daney
Get rid of the custom OCTEON UART probe code and use 8250_dw instead.
The first patch just gets rid of Ralf's Kconfig workarounds for the
real problem, whi
On 06/19/2013 03:01 AM, Arnd Bergmann wrote:
On Tuesday 18 June 2013 12:12:53 David Daney wrote:
+static unsigned int dw8250_serial_inq(struct uart_port *p, int offset)
+{
+ offset <<= p->regshift;
+
+ return (u8)__raw_readq(p->membase + offset);
+}
+
+static void dw8250
On 06/19/2013 07:10 AM, Heikki Krogerus wrote:
On Tue, Jun 18, 2013 at 12:12:53PM -0700, David Daney wrote:
A few differences needed by OCTEON:
o These are DWC UARTS, but have USR at a different offset.
o OCTEON must have 64-bit wide register accesses, so we have OCTEON
specific register
On 06/17/2013 02:38 PM, Andrew Morton wrote:
On Mon, 17 Jun 2013 14:26:01 -0700 David Daney
wrote:
On 06/17/2013 02:13 PM, Andrew Morton wrote:
On Mon, 17 Jun 2013 14:08:13 -0700 David Daney
wrote:
I think switch-back-to-a-macro is simplest and safest for now. Perhaps
you can queue a
On 06/19/2013 11:52 AM, Arnd Bergmann wrote:
On Wednesday 19 June 2013, David Daney wrote:
On 06/19/2013 03:01 AM, Arnd Bergmann wrote:
It's also wrong to use the
__raw_* variant, which is not guaranteed to be atomic and is not
endian-safe.
We do runtime probing and only use this fun
From: David Daney
Following patch to use generic 8250 drivers will need proper clock
information. So when using the internal device tree, populate the
"clock-frequency" property with the correct value.
Signed-off-by: David Daney
---
arch/mips/cavium-octeon/octeon-platform.c | 9 ++
From: David Daney
We will use 8250_dw instead.
Signed-off-by: David Daney
---
arch/mips/cavium-octeon/Makefile | 2 +-
arch/mips/cavium-octeon/serial.c | 109 ---
2 files changed, 1 insertion(+), 110 deletions(-)
delete mode 100644 arch/mips/cavium
From: David Daney
A few differences needed by OCTEON:
o These are DWC UARTS, but have USR at a different offset.
o Internal SoC buses require reading back from registers to maintain
write ordering.
o 8250 on OCTEON appears with 64-bit wide registers, so when using
readb/writeb in big
From: David Daney
The serial port changes make it advisable to enable the proper UART
drivers.
Signed-off-by: David Daney
---
arch/mips/configs/cavium_octeon_defconfig | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
diff --git a/arch/mips/configs/cavium_octeon_defconfig
b/arch/mips
From: David Daney
Changes from v1: Fix breakage in non-OCTEON builds of 8250_dw.c
1) Fix OCTEON's UART clock rate.
2) Make minor patches to 8250_dw so it can be used by OCTEON
3) Rip out the OCTEON serial code.
4) Update defconfig so we default to having a usable serial port.
Sinc
Sorry for not responding earlier, but my e-mail system seems to have
malfunctioned with respect to this message...
On 06/17/2013 01:51 AM, Linus Walleij wrote:
On Sat, Jun 15, 2013 at 1:18 AM, David Daney wrote:
From: David Daney
The SOCs in the OCTEON family have 16 (or in some cases 20
On 06/20/2013 11:18 AM, Joe Perches wrote:
On Thu, 2013-06-20 at 11:10 -0700, David Daney wrote:
Sorry for not responding earlier, but my e-mail system seems to have
malfunctioned with respect to this message...
[]
On 06/17/2013 01:51 AM, Linus Walleij wrote:
+static int octeon_gpio_get
On 06/20/2013 11:43 AM, Joe Perches wrote:
On Thu, 2013-06-20 at 11:27 -0700, David Daney wrote:
On 06/20/2013 11:18 AM, Joe Perches wrote:
On Thu, 2013-06-20 at 11:10 -0700, David Daney wrote:
Sorry for not responding earlier, but my e-mail system seems to have
malfunctioned with respect to
On 05/29/2013 10:01 AM, James Hogan wrote:
MIPS has 128 signals, the highest of which has the number 128. The
I wonder if we should change the ABI and reduce the number of signals to
127 instead of this patch.
David Daney
following command causes get_signal_to_deliver() to pass this
hanged?
Think about it, any user space program using signal numbers 127 and 128
doesn't work correctly as things exist today, so removing those two will
be no great loss.
David Daney
Signed-off-by: James Hogan
Cc: Ralf Baechle
Cc: Al Viro
Cc: Andrew Morton
Cc: Oleg Nesterov
Cc: Kee
On 06/21/2013 01:22 PM, Oleg Nesterov wrote:
On 06/21, David Daney wrote:
On 06/21/2013 06:39 AM, James Hogan wrote:
Therefore add sig_to_exitcode() and exitcode_to_sig() functions which
map signal numbers > 126 to exit code 126 and puts the remainder (i.e.
sig - 126) in higher bits. T
e patch eliminates, is avoided?
I doubt it.
As far as the patch goes:
Acked-by: David Daney
David Daney
Honestly, I don't know. Let's CC the author of that code (David Daney).
I wonder why get_maintainer.pl didn't generate his name for this file,
even though the entire fil
Thanks for looking at this again.
I will be away from my office until the middle of July, so I will not be
able to generate and test a revised patch until then.
David Daney
On 06/24/2013 03:06 PM, Linus Walleij wrote:
On Thu, Jun 20, 2013 at 8:10 PM, David Daney wrote:
On 06/17/2013 01
From: David Daney
Signed-off-by: David Daney
---
arch/mips/include/asm/mipsregs.h | 2 ++
arch/mips/kernel/cpu-probe.c | 29 +
arch/mips/mm/tlbex.c | 20 +---
3 files changed, 32 insertions(+), 19 deletions(-)
diff --git a/arch/mips
From: David Daney
---
arch/mips/include/uapi/asm/inst.h | 23 ++-
1 file changed, 22 insertions(+), 1 deletion(-)
diff --git a/arch/mips/include/uapi/asm/inst.h
b/arch/mips/include/uapi/asm/inst.h
index 0f4aec2..133abc1 100644
--- a/arch/mips/include/uapi/asm/inst.h
+++ b
From: David Daney
Introduce __compute_return_epc_for_insn0() entry point.
Signed-off-by: David Daney
---
arch/mips/include/asm/branch.h | 7 +
arch/mips/kernel/branch.c | 63 +++---
2 files changed, 54 insertions(+), 16 deletions(-)
diff --git a
From: David Daney
Also let CPU_CAVIUM_OCTEON select KVM.
Signed-off-by: David Daney
---
arch/mips/Kconfig | 1 +
arch/mips/kvm/Kconfig | 9 +
arch/mips/kvm/Makefile | 1 +
3 files changed, 11 insertions(+)
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index 7a58ab9
From: David Daney
Only the trap-and-emulate KVM code needs a Special tlb flusher. All
other configurations should use the regular version.
Signed-off-by: David Daney
---
arch/mips/include/asm/mmu_context.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/mips/include
From: David Daney
The mipsvz implementation allows for SMP, so let's be able to create
all those vcpus.
Signed-off-by: David Daney
---
arch/mips/include/asm/kvm_host.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/mips/include/asm/kvm_host.h b/arch/mips/includ
From: David Daney
Create the symbol KVM_MIPSTE, and use it to select the trap and
emulate specific things.
Signed-off-by: David Daney
---
arch/mips/kvm/Kconfig | 14 +-
arch/mips/kvm/Makefile | 14 --
2 files changed, 17 insertions(+), 11 deletions(-)
diff --git a
From: David Daney
The MIPS VZ KVM code needs this to be able to manage the FPU.
Signed-off-by: David Daney
---
arch/mips/kernel/traps.c | 8
1 file changed, 8 insertions(+)
diff --git a/arch/mips/kernel/traps.c b/arch/mips/kernel/traps.c
index fca0a2f..2bdeb32 100644
--- a/arch/mips
From: David Daney
... and their accessors in asm-offsets.c
Signed-off-by: David Daney
---
arch/mips/include/asm/processor.h | 6 ++
arch/mips/kernel/asm-offsets.c| 5 +
2 files changed, 11 insertions(+)
diff --git a/arch/mips/include/asm/processor.h
b/arch/mips/include/asm
From: David Daney
Signed-off-by: David Daney
---
arch/mips/kernel/asm-offsets.c | 7 +++
1 file changed, 7 insertions(+)
diff --git a/arch/mips/kernel/asm-offsets.c b/arch/mips/kernel/asm-offsets.c
index 37fd9e2..db09376 100644
--- a/arch/mips/kernel/asm-offsets.c
+++ b/arch/mips/kernel
From: David Daney
The forthcoming MIPSVZ code doesn't currently use this, so it must
only be enabled for KVM_MIPSTE.
Signed-off-by: David Daney
---
arch/mips/include/asm/kvm_host.h | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/mips/include/asm/kvm_host.h b/arch/mips/includ
From: David Daney
These save the instruction word to be used by MIPSVZ code for
instruction emulation.
Signed-off-by: David Daney
---
arch/mips/include/asm/ptrace.h | 4
arch/mips/kernel/asm-offsets.c | 4
2 files changed, 8 insertions(+)
diff --git a/arch/mips/include/asm/ptrace.h
From: David Daney
Signed-off-by: David Daney
---
arch/mips/include/asm/kvm_mips_vz.h | 29 +
1 file changed, 29 insertions(+)
create mode 100644 arch/mips/include/asm/kvm_mips_vz.h
diff --git a/arch/mips/include/asm/kvm_mips_vz.h
b/arch/mips/include/asm
From: David Daney
If the CPU is operating in guest mode when a TLB related excpetion
occurs, give KVM a chance to do emulation.
Signed-off-by: David Daney
---
arch/mips/mm/fault.c | 8
arch/mips/mm/tlbex-fault.S | 6 ++
2 files changed, 14 insertions(+)
diff --git a/arch
From: David Daney
We need to move it out of __init so we don't have section mismatch problems.
Signed-off-by: David Daney
---
arch/mips/include/asm/uasm.h | 2 +-
arch/mips/kernel/traps.c | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/mips/include/asm/uas
From: David Daney
There are accessors for both the guest control registers as well as
guest CP0 context.
Signed-off-by: David Daney
---
arch/mips/include/asm/mipsregs.h | 260 +++
1 file changed, 260 insertions(+)
diff --git a/arch/mips/include/asm
From: David Daney
The new function (part) get_new_asid() can now be used from MIPSVZ code.
Signed-off-by: David Daney
---
arch/mips/include/asm/mmu_context.h | 10 --
1 file changed, 8 insertions(+), 2 deletions(-)
diff --git a/arch/mips/include/asm/mmu_context.h
b/arch/mips/include
From: David Daney
Signed-off-by: David Daney
---
arch/mips/include/asm/thread_info.h | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/mips/include/asm/thread_info.h
b/arch/mips/include/asm/thread_info.h
index 895320e..a7a894a 100644
--- a/arch/mips/include/asm/thread_info.h
+++ b
From: David Daney
Currently this is a little complex, here are the facts about how it works:
o When running in Guest mode we set the high bit of CP0_XCONTEXT. If
this bit is clear, we don't do anything special on an exception.
o If we are in guest mode, upon an exception we:
1) loa
From: David Daney
Signed-off-by: David Daney
---
arch/mips/kernel/genex.S | 3 +++
1 file changed, 3 insertions(+)
diff --git a/arch/mips/kernel/genex.S b/arch/mips/kernel/genex.S
index 163e299..ce0be96 100644
--- a/arch/mips/kernel/genex.S
+++ b/arch/mips/kernel/genex.S
@@ -486,6 +486,9
From: David Daney
The kernel's struct pt_regs has many fields conditional on various
Kconfig variables, we cannot be exporting this garbage to user-space.
Move the kernel's definition to asm/ptrace.h, and put a uapi only
version in uapi/asm/ptrace.h gated by #ifndef __KERNEL__
Sig
From: David Daney
It was a completely inconsistent mix of spaces and tabs.
Signed-off-by: David Daney
---
arch/mips/kvm/kvm_locore.S | 921 +++--
1 file changed, 464 insertions(+), 457 deletions(-)
diff --git a/arch/mips/kvm/kvm_locore.S b/arch/mips
From: David Daney
This makes it follow the pattern where the structure name is the
symbol name prefix.
Signed-off-by: David Daney
---
arch/mips/kernel/asm-offsets.c | 68 +++---
arch/mips/kvm/kvm_locore.S | 206 -
2 files changed, 137
From: David Daney
The current implementation does nothing with them, but future MIPSVZ
work need them. Also add the asm-offsets accessors for the fields.
Signed-off-by: David Daney
---
arch/mips/include/asm/kvm_host.h | 8
arch/mips/kernel/asm-offsets.c | 8
arch/mips
From: David Daney
These patches take a somewhat different approach to MIPS
virtualization via the MIPS-VZ extensions than the patches previously
sent by Sanjay Lal.
Several facts about the code:
o Existing exception handlers are modified to hook in to KVM instead
of intercepting all
From: David Daney
The proper MIPS name for this register is EPC, so use that.
Change the asm-offsets name to KVM_VCPU_ARCH_EPC, so that the symbol
name prefix matches the structure name.
Signed-off-by: David Daney
---
arch/mips/include/asm/kvm_host.h | 2 +-
arch/mips/kernel/asm-offsets.c
From: David Daney
For a warning free compile, we need to use the width aware PTR_LI and
PTR_LA macros. Use LI variant for immediate data and LA variant for
addresses.
Signed-off-by: David Daney
---
arch/mips/kvm/kvm_locore.S | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff
that uses a handful of
hypercalls, but mostly just uses virtio devices. It has no emulated
real hardware (no 8250 UART, no emulated legacy anything...)
David Daney
On 06/07/2013 04:03 PM, David Daney wrote:
From: David Daney
These patches take a somewhat different approach to MIPS
From: David Daney
We cannot clobber any registers on exceptions as any guest will need
them all.
Signed-off-by: David Daney
---
arch/mips/include/asm/mipsregs.h | 2 ++
arch/mips/include/asm/stackframe.h | 15 +++
arch/mips/kernel/cpu-probe.c | 7 ++-
arch/mips
From: David Daney
When building for 64-bits we need these cases to make it build.
Signed-off-by: David Daney
---
arch/mips/kvm/kvm_mips.c | 4 ++--
arch/mips/kvm/kvm_mips_dyntrans.c | 4 ++--
arch/mips/kvm/kvm_mips_emul.c | 2 +-
arch/mips/kvm/kvm_tlb.c | 4 ++--
4
From: David Daney
We don't know if we have the r4k specific functions available, so use
universally available __flush_cache_all() instead. This takes longer
as it flushes both i-cache and d-cache, but is available for all CPUs.
Signed-off-by: David Daney
---
arch/mips/kvm/kvm_mips_emul.
On 06/07/2013 04:34 PM, Sergei Shtylyov wrote:
Hello.
On 06/08/2013 03:03 AM, David Daney wrote:
From: David Daney
If the CPU is operating in guest mode when a TLB related excpetion
occurs, give KVM a chance to do emulation.
Signed-off-by: David Daney
---
arch/mips/mm/fault.c | 8
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