st 2012 00:35, Philip Rakity wrote:
>
> The interrupt source could be from a non-pci device. Say a gpio or whatever.
> Does it make sense to break this patch into two patches ?
>
> On Aug 17, 2012, at 2:14 AM, Daniel J Blueman wrote:
>
>> Allow module parameter 'enab
b=01 Prot=01 Driver=(none)
>> I: If#= 1 Alt= 0 #EPs= 2 Cls=e0(wlcon) Sub=01 Prot=01 Driver=(none)
>> I: If#= 2 Alt= 0 #EPs= 2 Cls=ff(vend.) Sub=ff Prot=ff Driver=(none)
>> I: If#= 3 Alt= 0 #EPs= 0 Cls=fe(app. ) Sub=01 Prot=01 Driver=(none)
>>
>> Patch originally wri
kernel MSI vector setup? I can see it only
being beneficial in certain specific circumstances (eg metro VoIP
router) and perhaps that's application dependent at that.
Thanks,
Daniel
[1] https://irqbalance.org/documentation.html
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On 12 February 2013 03:49, Rafael J. Wysocki wrote:
> On Monday, February 11, 2013 08:27:49 PM Rafael J. Wysocki wrote:
>> On Monday, February 11, 2013 12:01:37 PM Bjorn Helgaas wrote:
>> > [+cc Rafael]
>> >
>> > On Mon, Feb 11, 2013 at 10:08 AM, Daniel
3. run OpenMP NAS Parallel Benchmark dc.B against local disk (ie not
ramdisk)
4. observe hang O(30) mins later
--- [2]
[ 2675.587878] INFO: rcu_sched self-detected stall on CPU { 5} (t=24000
jiffies g=6313 c=6312 q=68)
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On 18/02/2013 19:42, Hillf Danton wrote:
On Mon, Feb 18, 2013 at 2:18 PM, Daniel J Blueman
wrote:
On Monday, 18 February 2013 06:10:02 UTC+8, Jiri Slaby wrote:
Hi,
You still feel the sour taste of the "kswapd craziness in v3.7" thread,
right? Welcome to the hell, part two :{.
On 10 October 2012 20:34, Takashi Iwai wrote:
> At Tue, 9 Oct 2012 22:26:40 +0800,
> Daniel J Blueman wrote:
>> On 9 October 2012 21:04, Takashi Iwai wrote:
>> > At Tue, 9 Oct 2012 19:23:56 +0800,
>> > Daniel J Blueman wrote:
>> >> On 9 October 2012 18:0
I'll rebase
on top of this tomorrow and present my change so far.
Thanks,
Daniel
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More majo
Add NumaChip-specific PCI access mechanism via MMCONFIG cycles, but
preventing access to AMD Northbridges which shouldn't respond.
v2: Use PCI_DEVFN in precomputed constant limit; drop unneeded includes
Signed-off-by: Daniel J Blueman
---
arch/x86/include/asm/numachip/numachip.h |
lable:
[1.650124] pci :00:14.0: can't derive routing for PCI INT A
[1.650126] pci :00:14.0: PCI INT A: no GSI
[1.650126]
[1.650180] pci :00:14.0: can't derive routing for PCI INT A
Fix this by making the newline explicit and removing the superfluous
one.
Signed-off-by: D
When booting on a federated multi-server system, the processor Northbridge
lookup returns NULL; add guards to prevent this causing an oops.
Signed-off-by: Daniel J Blueman
---
arch/x86/kernel/cpu/mcheck/mce_amd.c | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a
When an AMD IOMMU is detected, prevent printing unintended blank line.
Signed-off-by: Daniel J Blueman
---
drivers/iommu/amd_iommu_init.c |2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/iommu/amd_iommu_init.c b/drivers/iommu/amd_iommu_init.c
index 18a89b7..49d9d32
On 01/10/2012 18:06, Borislav Petkov wrote:
On Mon, Oct 01, 2012 at 02:42:05PM +0800, Daniel J Blueman wrote:
When booting on a federated multi-server system, the processor Northbridge
lookup returns NULL; add guards to prevent this causing an oops.
Interesting.
What does lspci say on those
This is on amd64, 2.6.23. I'm updating to 2.6.24.2 right
> now, on the off chance that whatever was causing the problem has been
> fixed.)
Daniel
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On Tue, Feb 19, 2008 at 5:37 PM, Kok, Auke <[EMAIL PROTECTED]> wrote:
> Andrew Morton wrote:
> > On Sun, 17 Feb 2008 13:20:59 + "Daniel J Blueman" <[EMAIL PROTECTED]>
> wrote:
> >> I'm still hitting this with e1000e on 2.6.25-rc2, 10 times a
index
freq-table: table entry 3: 120 kHz, 3 index
freq-table: table entry 4: 80 kHz, 4 index
--- [2]
cpufreq-core: CPU 0: _PPC is 3 - frequency limited
cpufreq-core: CPU 1: _PPC is 0 - frequency not limited
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On Mon, Feb 25, 2008 at 11:48 PM, Andrew Morton
<[EMAIL PROTECTED]> wrote:
> On Mon, 25 Feb 2008 21:29:24 +0000 "Daniel J Blueman" <[EMAIL PROTECTED]>
> wrote:
> > My 2.2GHz [1] Thinkpad T61 is unable to get past 1.2GHz, seemingly
> > because of the _PP
r Not tainted 2.6.13-rc2-git4-default
> RIP: 0010:[]
>
> After that the machines are totally freezed.
>
> With maxcpus=1 all (tested) versions >=2.6.12-rc3 are able to boot.
>
> Any hints/ideas/what ever?
>
> Regards,
>Oliver Weihe
>
> P.S. if you answe
comm: swapper Not tainted 2.6.13-rc2-git4-default
> RIP: 0010:[]
>
> After that the machines are totally freezed.
>
> With maxcpus=1 all (tested) versions >=2.6.12-rc3 are able to boot.
>
> Any hints/ideas/what ever?
>
> Regards,
>Oliver Weihe
>
> P.S. if you a
ry going from performance to ondemand).
>
> When ondemand appears to work properly, /proc/cpuinfo shows the speed
> jumping to 2 GHz, then falling back to 1.8 after the untar ends, then
> back to 1.0 GHz. In the problem cases, the speed remains at 1GHz.
>
> As far as I can see,
s to you & them. SATA has been working perfect in my system
> since I started using it 10 months ago !
>
> greetings,
> Rob van Nieuwkerk
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r driver to be GPL'd, and the
rt2x00 is a Linux-specific rewrite which is stabilising well.
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rdmsrl(MSR_IA32_CR_PAT, boot_pat_state);
> > + wrmsrl(MSR_IA32_CR_PAT, pat);
> > + __flush_tlb_all();
> > + asm volatile("wbinvd");
>
> Have you double checked this is the full procedure from the manual? iirc there
> were so
/0x80
[child_rip+10/18] child_rip+0xa/0x12
[kthread+0/128] kthread+0x0/0x80
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P
801HBM/HEM (ICH8M/ICH8M-E)
SATA IDE Controller (rev 03) (prog-if 80 [Master])
Subsystem: Intel Corporation 82801HBM/HEM (ICH8M/ICH8M-E) SATA
IDE Controller
# lspci -vns 00:1f.2
00:1f.2 0101: 8086:2828 (rev 03) (prog-if 80 [Master])
Subsystem: 8086:2828
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Daniel J Blueman
-
To u
On 06/09/07, Mark Lord <[EMAIL PROTECTED]> wrote:
> Alan Cox wrote:
> > On Tue, 4 Sep 2007 13:37:22 +0100
> > "Daniel J Blueman" <[EMAIL PROTECTED]> wrote:
> >
> >> We see that in ata_piix.c, there is a whitelist for (laptop) Intel ICH
> &g
On 02/08/07, Tejun Heo <[EMAIL PROTECTED]> wrote:
> Daniel J Blueman wrote:
> > I'll grab kernel logs from the legacy ATA boot; what else can help
> > debug this issue? No problem testing patches too.
>
> Yeap, please post the old log.
Not much actually - perhaps
On 02/08/07, Mark Lord <[EMAIL PROTECTED]> wrote:
> Daniel J Blueman wrote:
> > On 02/08/07, Tejun Heo <[EMAIL PROTECTED]> wrote:
> >> Daniel J Blueman wrote:
> >>> I'll grab kernel logs from the legacy ATA boot; what else can help
> >>>
Tejun,
On 03/08/07, Tejun Heo <[EMAIL PROTECTED]> wrote:
> Daniel J Blueman wrote:
> > The ICH8 south-bridge I have is the mobile variant and does come
> > equipped with native parallel IDE - see page 447:
> > http://download.intel.com/design/chipsets/datashts/3130560
s your patch
> we would have long done it already.
Perhaps this feature can be marked as WIP to allow this to move
forward while corner-cases are worked out. Adding such a go/no-go
barrier will hamper progress we do see, as it has done already for
years.
The PCI ordering config option years ago was
s not simple and nobody has done it properly yet.
Providing only UC and WC types and documenting aliasing problems is
what is required here.
> > The PCI ordering config option years ago was a similar case, since
> > various drivers didn't issue wmb()s until they were fixed up.
I'm experiencing timeouts with libata when reading from a compact
flash card connected to onboard IDE. Reproducible with 2.6.20, 2.6.22,
2.6.23-rc1, with both short cable and a on-mobo CF socket on a x86-64
Core2Duo.
Sometimes (~7%), we see some EH and the interface stablises, then the
system cont
perf UDP also, since this shows min, max,
avg UDP packet latency IIRC.
Thanks for your great work so far though!
Dan
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an boot with kernel parameter vmalloc=384M or so. I have
experienced problems with booting with other values, but YMMV.
Daniel
Thanks for any help,
Jon
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y 5i in the newer DL380 G3 (dual P4 2.8GHz, 512KB L2$) is
perhaps twice the read performance (PCI-X helps some) but still sucks.
I'd get the BBWC in or install another controller.
Daniel
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indle performance, it's still poor on RH EL4
(2.6.9) x86-64 with 64MB SmartArray 6i (w/o BBWC):
# swapoff -av
swapoff on /dev/cciss/c0d0p2
# time dd if=/dev/cciss/c0d0p2 of=/dev/null bs=1024k count=1000
real0m49.717s <-- 20MB/s
# time dd if=/dev/zero of=/dev/cciss/c0d0p2 bs=1024
scsi generic sg2 type 0
[ 4771.556000] Buffer I/O error on device sdb, logical block 30015200
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On 11/07/07, Chuck Ebbert <[EMAIL PROTECTED]> wrote:
On 07/08/2007 05:45 PM, Daniel J Blueman wrote:
> When plugging in a USB 2 mass-storage device which I've been seeing
> problems with, I caught a khubd oops [1]. Kernel is 2.6.22-rc7 on ia32
> built with Ubu
2 udma0 udma1 udma2 udma3 *udma4
Cycle time: min=120ns recommended=120ns
PIO: pio0 pio1 pio2 pio3 pio4
Cycle time: no flow control=120ns IORDY flow control=120ns
Commands/features:
Enabled Supported:
Write cache
*CFA feature set
On 30/05/07, Lee Revell <[EMAIL PROTECTED]> wrote:
On 5/30/07, Daniel J Blueman <[EMAIL PROTECTED]> wrote:
> I have a SanDisk Extreme IV 4GB CF card, capable of 40MB/s read, but
> am seeing 30MB/s read [1], connected directly to the IDE bus on my
> ICH8 controller.
How do
7da5
Daniel
On 31/05/07, Mark Lord <[EMAIL PROTECTED]> wrote:
Daniel J Blueman wrote:
> I have
On 31/05/07, Mark Lord <[EMAIL PROTECTED]> wrote:
Daniel J Blueman wrote:
> Hi Mark,
>
> Thanks for the reply; here is the raw identification data:
>
> # hdparm --Istdout /dev/sdb
>
> /dev/sdb:
[snip]
Ooops.. wrong drive. That's NOT a CF card. Try again?
W
On 31/05/07, Mark Lord <[EMAIL PROTECTED]> wrote:
Daniel J Blueman wrote:
> Whoops, yes. Here is the expected data:
[snip]
Thanks. I'll use that data to update/validate future versions of hdparm.
At UDMA66, it *should* be capable of the 40MByte/sec realm of readback perf,
ass
Hi Mark,
On 31/05/07, Mark Lord <[EMAIL PROTECTED]> wrote:
Daniel J Blueman wrote:
> On 31/05/07, Mark Lord <[EMAIL PROTECTED]> wrote:
>> Daniel J Blueman wrote:
>> > Whoops, yes. Here is the expected data:
> [snip]
>>
>> Thanks. I'll use that
pdate function to prevent soft lockup warning being generated.
Of course the best solution is to just get the driver into mainline.
Lee
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On 03/04/07, Zoltan Menyhart <[EMAIL PROTECTED]> wrote:
Daniel J Blueman wrote:
> On 13 Mar, 20:20, Zoltan Menyhart <[EMAIL PROTECTED]> wrote:
>
>> I had a look at copy_one_pte().
>> I cannot see any ioproc_update_page() call, not even for the COW pages.
>> I
On 02/06/07, Matt Fredrickson <[EMAIL PROTECTED]> wrote:
- "Daniel J Blueman" <[EMAIL PROTECTED]> wrote:
> On 1 Jun, 19:40, "Lee Revell" <[EMAIL PROTECTED]> wrote:
> > On 6/1/07, Matthew Fredrickson <[EMAIL PROTECTED]> wrote:
> >
>
esses get selected by the
OOM killer sooner. You may find 512MB to be more useful on large
untuned servers with lots of processes perhaps.
Daniel
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On 23/03/07, Shaohua Li <[EMAIL PROTECTED]> wrote:
On Thu, 2007-03-22 at 23:45 +, Daniel J Blueman wrote:
> Hi Shao-hua,
>
> Is the tool you mentioned last June [1] available for splitting up the
> old firmware files to the new format (eg
> /lib/firmware/intel-ucode/06-0
s dual-link.
Daniel
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e isn't installed per default in Ubuntu
7.04 ia32/x86-64...
Daniel
--- [1]
# dpkg-reconfigure microcode.ctl
Local microcode is old, you need an update.
Trying to download an new version of microcode.
Now attempting to download microcode.
microcode downloaded sucessfully
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-
To
ping- SERR- FastB2B-
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- SERR- TAbort- SERR-
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x27;s Manuals at intel.com.
Dan
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wered up all PCI express ports, but then this
would draw more power. Perhaps if just needs to do the hotplug
configuration correctly, but then older OSs may have problems?
Does Linux support hotswapping ExpressCards?
This is with Fedora Core 6 with all updates, kernel 2.6.20-1.2948.fc6.
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/
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4] default_idle+0x2a/0x40
kernel: [cpu_idle+62/96] cpu_idle+0x3e/0x60
kernel: [start_kernel+760/912] start_kernel+0x2f8/0x390
kernel: [unknown_bootoption+0/608] unknown_bootoption+0x0/0x260
kernel: ===========
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r a considerably long time.
How could the IO-PROC. know that a process-ID / user virt. addr. pair
refers to the same page?
The comment above ioproc_update_page() says that every time when a PTE
is created / modified...
Thanks,
ZoltanMenyhart
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mprove pagecache
scalability lately too, but I guess it all depends on what kind of
workload you have...
Thanks
Rajib
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On Fri, Oct 9, 2015 at 11:35 PM, Jiang Liu
wrote:
On 2015/10/3 3:12, Denys Vlasenko wrote:
From: Daniel J Blueman
The Intel x2APIC spec states the upper 16-bits of APIC ID is the
cluster ID [1, p2-12], intended for future distributed systems.
Beyond
the legacy 8-bit APIC ID, Numascale
81472 223640051553f65 vmlinux
182330341786168 2281472 223006741544802 vmlinux-patched
Works peachy on a 256-core system with a 20-bit APIC ID space, and on a
48-core legacy 8-bit APIC ID system. If we care, I can make
numa_cpu_node O(1) lookup for typical cases.
Signe
space, and on a
48-core legacy 8-bit APIC ID system with and without CONFIG_NUMA,
CONFIG_NUMA_EMU and CONFIG_AMD_NUMA.
v2: Improved readability by moving static variable out; integrated Denys's
numa emulation fix
Signed-off-by: Daniel J Blueman
CC: Denys Vlasenko
CC: Ingo Molnar
CC: Thom
It would be great if the patch "igb: do not re-init SR-IOV during
probe" [1] can be backported from 4.3-rc to stable kernels, since it
fixes the regression introduced by "igb: do a reset on SR-IOV re-init
if device is down" [2].
The regression was introduced in 3.16 and can isolate the IPMI
i
e+0x124/0x1a0
__setplane_internal+0x1f4/0x260
drm_mode_cursor_universal+0xf4/0x220
drm_mode_cursor_common+0x19c/0x218
drm_mode_cursor2_ioctl+0x34/0x48
drm_ioctl_kernel+0x70/0xd8
drm_ioctl+0x30c/0x438
do_vfs_ioctl+0xc4/0x880
SyS_ioctl+0x8c/0xa8
el0_svc_naked+0x30/0x34
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58
Code: b8 00 04 00 00 48 c7 c1 c3 91 28 ab 48 c7 c2 20 91 28 ab be of
04 00 00 bf 00 00 00 01 03 41 85 04 00 58 eb b0 b8 01 10 00 00 c3
Ob 90 Of if 44 00 00 80 3d 74 CO 97 01 00 41 54 55 53 Of 84
RIP: acpi_os_delete_semaphore+0x6d/0x70 RSP: b0ca80037be8
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Daniel J Blueman
st dereference of xprt?
I've raised the bug report into bugzilla, added other observations
from a second occurrence recently and disassembled xprt_reserve with
line numbers.
http://bugzilla.kernel.org/show_bug.cgi?id=9003
Ping me for any more detail/info and thanks!
Daniel
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Daniel
e Intel Architecture Software Design manuals, but
Linux's support is lacking in certain areas [discussions on LKML],
which a number of developers have been trying to move forward.
Quite a few significant graphics/HPC etc vendors are forced to use it
without this complete support, so it would
apping is
performed, so perhaps it's better without an elevator.
Clearly, benchmarks speak...but perhaps it would make sense to have
libata disable the elevator for the (compact) flash block device?
Daniel
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Hi Fengguang,
On 23/08/07, James Courtier-Dutton <[EMAIL PROTECTED]> wrote:
> Daniel J Blueman wrote:
> > On 23 Aug, 07:00, Jan Engelhardt <[EMAIL PROTECTED]> wrote:
> >> On Aug 23 2007 01:01, Richard Ballantyne wrote:
> >>
> >>> What file s
On 23/08/07, Fengguang Wu <[EMAIL PROTECTED]> wrote:
> On Thu, Aug 23, 2007 at 01:56:17PM +0100, Daniel J Blueman wrote:
> > Hi Fengguang,
> >
> > On 23/08/07, James Courtier-Dutton <[EMAIL PROTECTED]> wrote:
> > > Daniel J Blueman wrote:
> > > &
ong)fpu->state & 15);
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own as "FPU".
>
> On Wed, Dec 10, 2014 at 4:25 PM, Daniel J Blueman wrote:
>> With 3.18, I was seeing a significant number of allocation warnings
>> from load_elf_binary call paths [1].
>>
>> Allocating FPU state atomically [2] does prevent potentially sleep
24-31
physical_package_id:3
thread_siblings:,3000
thread_siblings_list:28-29
After fixing:
core_id:5
core_siblings:,
core_siblings_list:16-31
physical_package_id:1
thread_siblings:,3000
thread_siblings_list:28-29
Candidate for stable.
Signed-off-by: Daniel J Bl
From f822139736cab8434302693c635fa146b465273c Mon Sep 17 00:00:00 2001
From: Daniel J Blueman
Date: Thu, 23 Apr 2015 23:26:27 +0800
Subject: [RFC] Speedup PMD setup
Using non-temporal writes prevents read-modify-write cycles,
which are much slower over large topologies.
Adapt the existing memset() function into a _nocache va
g a lot of IPIs, is calling
stop_machine() via something like:
while :; do
echo "base=0x200 size=0x800 type=write-back" >/proc/mtrr
echo "disable=4" >| /proc/mtrr
done
Of course, ensure base is above DRAM and any 64-bit MMIO for no
side-effects and en
Quite a few platforms use ttyS2 for their serial-over-LAN, so fix early
printk support for ttyS2 and 3, avoiding the need to hard-code the IO port.
Signed-off-by: Daniel J Blueman
---
arch/x86/boot/early_serial_console.c | 9 +
1 file changed, 5 insertions(+), 4 deletions(-)
diff --git
On Tue, Apr 7, 2015 at 10:39 PM, Joe Perches wrote:
On Tue, 2015-04-07 at 22:29 +0800, Daniel J Blueman wrote:
Quite a few platforms use ttyS2 for their serial-over-LAN, so fix
early
printk support for ttyS2 and 3, avoiding the need to hard-code the
IO port.
[]
diff --git a/arch/x86/boot
On Wed, Apr 29, 2015 at 2:38 AM, nzimmer wrote:
On 04/28/2015 11:06 AM, Pekka Enberg wrote:
On Tue, Apr 28, 2015 at 5:36 PM, Mel Gorman wrote:
Struct page initialisation had been identified as one of the
reasons why
large machines take a long time to boot. Patches were posted a long
time ago
rrent family 10h microcode from
http://www.amd64.org/microcode/amd-ucode-latest.tar.bz2
Thanks,
Daniel
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On 14 June 2015 at 12:39, Christoph Fritz wrote:
> On Sun, 2015-06-14 at 11:13 +0800, Daniel J Blueman wrote:
>> On Sunday, June 14, 2015 at 4:00:06 AM UTC+8, Christoph Fritz wrote:
>> > Hi,
>> >
>> > on following computer configuration, I do get hard lockup u
On 14 June 2015 at 22:49, Christoph Fritz wrote:
> On Sun, 2015-06-14 at 15:54 +0800, Daniel J Blueman wrote:
>> As a workaround, you can probably just disable message triggered C1E
>> (see the BKDG p399 [1]):
>>
>> val=0x$(setpci -s 00:18.4 0xd4.l) # read D18F3xD4
>
Fix Intel IOMMU build failure in linux-next when CONFIG_INTEL_IOMMU is not
enabled.
Signed-off-by: Daniel J Blueman
---
drivers/iommu/intel_irq_remapping.c | 8
1 file changed, 8 insertions(+)
diff --git a/drivers/iommu/intel_irq_remapping.c
b/drivers/iommu/intel_irq_remapping.c
On 5 June 2018 at 05:47, wrote:
>> -Original Message-
>> From: Daniel J Blueman [mailto:dan...@quora.org]
>> Sent: Thursday, May 31, 2018 9:21 PM
>> To: Linux Kernel; linux-a...@vger.kernel.org
>> Cc: Limonciello, Mario; Dominguez, Jared
>> Subje
On 9 February 2014 02:57, Ilia Mirkin wrote:
> On Sat, Feb 8, 2014 at 10:38 AM, Daniel J Blueman wrote:
>> Interestingly, there was graphical failure booting 3.6.11, even
>> nvidia-current fails to initialise, but these two issues could be due
>> to running the Xorg stac
On 23 February 2014 11:48, Ilia Mirkin wrote:
> On Sat, Feb 22, 2014 at 10:45 PM, Daniel J Blueman wrote:
>> On 9 February 2014 02:57, Ilia Mirkin wrote:
>>> On Sat, Feb 8, 2014 at 10:38 AM, Daniel J Blueman wrote:
>>>> Interestingly, there was graphica
on most systems.
Tested on fam10h and fam15h single and multi-fabric systems and candidate
for stable.
Signed-off-by: Daniel J Blueman
Acked-by: Steffen Persvold
---
arch/x86/kernel/quirks.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/x86/kernel/quirks.c b/arch/x86
Hi Boris,
On 14/03/2014 17:06, Borislav Petkov wrote:
On Thu, Mar 13, 2014 at 07:43:01PM +0800, Daniel J Blueman wrote:
For systems with multiple servers and routed fabric, all northbridges get
assigned to the first server. Fix this by also using the node reported from
the PCI bus. For single
On 21/03/2014 06:07, Bjorn Helgaas wrote:
[+cc linux-pci, Myron, Suravee, Kim, Aravind]
On Thu, Mar 13, 2014 at 5:43 AM, Daniel J Blueman wrote:
For systems with multiple servers and routed fabric, all northbridges get
assigned to the first server. Fix this by also using the node reported
rote:
[+cc linux-pci, Myron, Suravee, Kim, Aravind]
On Thu, Mar 13, 2014 at 5:43 AM, Daniel J Blueman
wrote:
For systems with multiple servers and routed fabric, all northbridges
get
assigned to the first server. Fix this by also using the node
reported from
the PCI bus. For single-fabric systems, the
e filesystems reasonably don't need to scale with
core count. The filesystem I'm testing on and the rootfs (as it has
/tmp) are 50GB.
There must be a good rationale for this being dependent on the number of
cores rather than just the ratio of used space, right?
Thanks,
Dan
On 04/05/2014 04:56 AM, Theodore Ts'o wrote:
On Sat, Apr 05, 2014 at 01:00:55AM +0800, Daniel J Blueman wrote:
On a larger system 1728 cores/4.5TB memory and 3.13.9, I'm seeing very low
600KB/s cached write performance to a local ext4 filesystem:
> Thanks for the heads up. Most
.25 1920
2056 2256 2592 1200 1203 1209 1245 -hsync +vsync (74.6 kHz e)
My monitor is a Dell U2713HM; mobo uses an H87 chipset with i5-4670.
Thanks,
Daniel
--
Daniel J Blueman
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On 8 April 2014 15:14, Jani Nikula wrote:
> On Tue, 08 Apr 2014, Daniel J Blueman wrote:
>> Ville et al,
>>
>> It looks like commit e3ea8fa6beaf55fee64bf816f3b8a80ad733b2c2 (or
>> another commit in 3.13.7) broke modes which require DVI-D dual-link,
>> eg 2560x
I hit this on 3.13-rc7 while transferring data over an ASIX88179 USB 3
to gigabit ethernet adapter, transferring data at only 4MB/s.
What other debug options apart from SG debug would be useful here?
Thanks,
Daniel
On 30 December 2013 23:26, Daniel J Blueman wrote:
> When rsyncing data f
istationtm/hd-patu3s-ministation-thunderbolt-portable-ssd/
--
Daniel J Blueman
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Please read the FAQ at http://www.tux.org/lkml/
> + smp_store_release(&lock->cnts.writer, 0)
This will fail compilation, so probably needs further testing with
Peter's load_acquire/store_release barrier patches.
Thanks,
Daniel
--
Daniel J Blueman
Principal Software Engineer, Numascale
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On 14/01/2014 00:41, Waiman Long wrote:
On 01/12/2014 09:47 PM, Daniel J Blueman wrote:
On Thursday, 9 January 2014 01:10:03 UTC+8, Waiman Long wrote:
> This patch modifies the queue_write_unlock() function to use the
> new smp_store_release() function in another pending patch. I
On 01/15/2014 07:44 AM, Paul E. McKenney wrote:
On Tue, Jan 14, 2014 at 10:01:04AM -0800, Richard Henderson wrote:
On 01/14/2014 09:08 AM, Matt Turner wrote:
On Tue, Jan 14, 2014 at 3:03 AM, Peter Zijlstra wrote:
On Tue, Jan 14, 2014 at 10:28:23AM +0800, Daniel J Blueman wrote:
Peter,
I
I guess that wasn't expected to fail,
though it looks like there's this teardown issue.
Thanks,
Daniel
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On 2 December 2013 18:53, Andreas Noever wrote:
> On Mon, Dec 2, 2013 at 3:51 AM, Daniel J Blueman wrote:
>> On Friday, 29 November 2013 09:40:02 UTC+8, Andreas Noever wrote:
>>
>> Booting with 3.12.2, your patch series, with acpi_osi=Darwin and no
>> thunderbolt
On 07/25/2014 05:05 PM, Thomas Gleixner wrote:
On Fri, 25 Jul 2014, Daniel J Blueman wrote:
On a larger x86 system with 1728 cores, 3.15(.6) asserts on
smpboot_thread_fn's td->cpu != smp_processor_id() consistently after ~1500
cores are online.
Reverting the only directly related c
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