Fix get_node_id to match northbridge IDs from the array of detected ones,
allowing multi-server support such as with Numascale's NumaConnect, renaming
to 'amd_get_node_id' for consistency.
v7: Refactor patches grouping changes
Signed-off-by: Daniel J Blueman
---
arch/x86/inclu
Change amd_get_nb_id to return u16 to support >255 memory controllers,
and related consistency fixes.
v7: Refactor patches grouping changes
Signed-off-by: Daniel J Blueman
---
arch/x86/include/asm/processor.h |2 +-
arch/x86/kernel/cpu/amd.c|4 ++--
drivers/edac/amd64_eda
Fix locating sibling memory controller PCI functions by using the
correct PCI domain.
v7: Refactor patches grouping changes
Signed-off-by: Daniel J Blueman
---
drivers/edac/amd64_edac.c | 40 +---
1 file changed, 21 insertions(+), 19 deletions(-)
diff
Use appropriate types for northbridge IDs and memory ranges.
v7: Refactor patches grouping changes
Signed-off-by: Daniel J Blueman
---
arch/x86/include/asm/amd_nb.h |2 +-
drivers/edac/amd64_edac.c | 20 ++--
drivers/edac/amd64_edac.h |6 +++---
3 files
ec: out of range cmd 0:0:7:707:fffc
hda-codec: out of range cmd 0:0:7:707:ffbf
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Hi Bjorn,
On 29/11/2012 07:08, Bjorn Helgaas wrote:
On Wed, Nov 21, 2012 at 1:39 AM, Daniel J Blueman
wrote:
Add NumaChip-specific PCI access mechanism via MMCONFIG cycles, but
preventing access to AMD Northbridges which shouldn't respond.
v2: Use PCI_DEVFN in precomputed constant
Northbridge
only if found
Signed-off-by: Daniel J Blueman
---
drivers/edac/amd64_edac.c | 43 ---
1 file changed, 24 insertions(+), 19 deletions(-)
diff --git a/drivers/edac/amd64_edac.c b/drivers/edac/amd64_edac.c
index 60e93fa..6c1005f 100644
and static where appropriate
Signed-off-by: Daniel J Blueman
---
arch/x86/include/asm/amd_nb.h |2 +-
drivers/edac/amd64_edac.c | 26 +-
drivers/edac/amd64_edac.h |6 +++---
3 files changed, 17 insertions(+), 17 deletions(-)
diff --git a/arch/x86/include
[] cpu_idle+0x7a/0xf0
[] rest_init+0x144/0x150
[] ? csum_partial_copy_generic+0x170/0x170
[] ? efi_free_boot_services+0x53/0x58
[] start_kernel+0x359/0x366
[] ? repair_env_string+0x5e/0x5e
[] x86_64_start_reservations+0x131/0x135
[] ? early_idt_handlers+0x120/0x120
[] x86_64_start_kernel+0xd3/0xd7
--
AUXCH(1): begin idle timeout 0x
nouveau E[ I2C][:01:00.0] AUXCH(3): begin idle timeout 0x
nouveau E[ I2C][:01:00.0] AUXCH(2): begin idle timeout 0x
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Author: Takashi Iwai
Date: Thu Nov 8 17:12:10 2012 +0100
ALSA: hda - Apply a proper chmap for built-in 2.1 speakers
When 2.1 speakers are detected, use the corresponding channel map
instead of the standard map with front+rear surrounds.
Signed-off-by: Takashi Iwai
--
Daniel
On 6 February 2013 00:16, Takashi Iwai wrote:
> At Wed, 6 Feb 2013 00:10:30 +0800,
> Daniel J Blueman wrote:
>>
>> Hi Takashi,
>>
>> The v3.8-rc kernels have regressed from v3.7 with the quad-speaker
>> arrangement on my Macbook Pro 10,1 - only the higher-fr
On 6 February 2013 01:40, Takashi Iwai wrote:
> At Tue, 05 Feb 2013 17:34:15 +0100,
> Takashi Iwai wrote:
>>
>> At Wed, 6 Feb 2013 00:29:54 +0800,
>> Daniel J Blueman wrote:
>> >
>> > On 6 February 2013 00:16, Takashi Iwai wrote:
>> > > At W
derbolt Controller
[Cactus Ridge]
0a:00.0 Ethernet controller: Broadcom Corporation NetXtreme BCM57762
Gigabit Ethernet PCIe
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More major
On 11 February 2013 21:03, Daniel J Blueman wrote:
> With 3.8-rc7, when unplugging the Thunderbolt ethernet adapter (bus 0a
> [1]) on a Macbook Pro 10,1, we see the PCIe port correctly released:
>
> pciehp :06:03.0:pcie24: Card not present on Slot(3)
> tg3 :0a:00.0: tg3_abo
On 12 February 2013 03:49, Rafael J. Wysocki wrote:
> On Monday, February 11, 2013 08:27:49 PM Rafael J. Wysocki wrote:
>> On Monday, February 11, 2013 12:01:37 PM Bjorn Helgaas wrote:
>> > [+cc Rafael]
>> >
>> > On Mon, Feb 11, 2013 at 10:08 AM, Daniel
On platforms where all Northbridges may not be visible (due to routing, eg on
NumaConnect systems), prevent oopsing due to stale pointer access when
offlining cores.
Signed-off-by: Steffen Persvold
Signed-off-by: Daniel J Blueman
---
arch/x86/kernel/cpu/mcheck/mce_amd.c | 11 ++-
1
ci_virt_ep *ep = &dev->eps[ep_index];
if (stream_id == 0)
return ep->ring; // deref
if (!ep->stream_info)
return NULL;
if (stream_id > ep->stream_info->num_streams)
return NULL;
return e
if (hub->ports[i]->child)
1267usb_disconnect(&hub->ports[i]->child);
1268 }
1269 }
Signed-off-by: Daniel J Blueman
---
drivers/usb/core/hub.c |2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/
Hi Boris,
On 05/12/2012 00:01, Borislav Petkov wrote:
On Tue, Dec 04, 2012 at 05:24:16PM +0800, Daniel J Blueman wrote:
It works well on fam10h and fam15h boxes, with and without Numaconnect.
Good, thanks for testing.
I will send it upstream after the upcoming merge window closes since it
On 19/02/2013 22:59, Borislav Petkov wrote:
On Tue, Feb 19, 2013 at 10:40:26PM +0800, Daniel J Blueman wrote:
Alas your merges missed the v3.8 merge window, but it looks like your
v3.9 pull request has dropped these patches [1].
Any chance you can get them in during this merge window?
They
general...
Many thanks,
Daniel
--- [1]
[ 3939.010085] INFO: rcu_sched detected stalls on CPUs/tasks: {}
(detected by 1, t=29662 jiffies, g=3053, c=3052, q=598)
[ 3939.020008] INFO: Stall ended before state dump start
--
Daniel J Blueman
Principal Software Engineer, Numascale Asia
--
To
On 20/02/2013 02:16, Paul E. McKenney wrote:
On Wed, Feb 20, 2013 at 12:34:12AM +0800, Daniel J Blueman wrote:
Hi Paul,
On some of our larger servers with many hundreds of cores and when
under high duress, we can see scheduler RCU stall warnings [1], so
find we have to increase the hardcoded
Add missing newline to prevent the following kernel log line getting
appended to the currnet one.
Signed-off-by: Daniel J Blueman
---
drivers/gpu/drm/nouveau/nouveau_dp.c |2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/nouveau/nouveau_dp.c
b/drivers/gpu
On 02/10/2012 02:01, Borislav Petkov wrote:
On Tue, Oct 02, 2012 at 12:12:31AM +0800, Daniel J Blueman wrote:
On 01/10/2012 18:06, Borislav Petkov wrote:
On Mon, Oct 01, 2012 at 02:42:05PM +0800, Daniel J Blueman wrote:
When booting on a federated multi-server system, the processor
, using the upper bits for the PCI domain.
Signed-off-by: Daniel J Blueman
---
arch/x86/include/asm/amd_nb.h | 17 +++--
arch/x86/kernel/amd_nb.c | 15 ---
drivers/edac/amd64_edac.c | 18 +-
drivers/edac/amd64_edac.h |4 ++--
4 files
, using the upper bits for the PCI domain.
v2: Fix Northbridge entry initialisation
Tested on a single-socket system and 3-server federated system.
Signed-off-by: Daniel J Blueman
---
arch/x86/include/asm/amd_nb.h | 23 +--
arch/x86/kernel/amd_nb.c | 16
Fix build failure in Intel PIIX4 I2C driver.
Signed-off-by: Daniel J Blueman
---
drivers/i2c/busses/i2c-piix4.c |1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/i2c/busses/i2c-piix4.c b/drivers/i2c/busses/i2c-piix4.c
index ef511df..8bbd6ec 100644
--- a/drivers/i2c/busses/i2c-piix4
64_edac.c or add amd64_per_family_init/pci_get_related_function
forward declarations, based on feedback
Signed-off-by: Daniel J Blueman
---
arch/x86/include/asm/amd_nb.h| 63 +++-
arch/x86/include/asm/numachip/numachip.h | 22 ++
arch/x86/kernel/amd_gart_64.c
cp: 0
count: 102
high: 186
batch: 31
cpu: 1 pcp: 1
count: 65
high: 62
batch: 15
vm stats threshold: 16
all_unreclaimable: 0
prev_priority: 12
start_pfn: 4096
--
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Add NumaChip-specific PCI access mechanism via MMCONFIG cycles, but
preventing access to AMD Northbridges which shouldn't respond.
v2: Use PCI_DEVFN in precomputed constant limit; drop unneeded includes
Signed-off-by: Daniel J Blueman
---
arch/x86/include/asm/numachip/numachip.h |
blank+0x49/0x80 [drm_kms_helper]
[] fb_blank+0x56/0xc0
[] do_fb_ioctl+0x59b/0x5f0
[] ? vma_interval_tree_insert+0x83/0x90
[] fb_ioctl+0x45/0x50
[] do_vfs_ioctl+0x8a/0x340
[] sys_ioctl+0x91/0xb0
Signed-off-by: Daniel J Blueman
---
drivers/gpu/drm/nouveau/nvd0_display.c |4
1 file ch
Correctly enable the digital microphones with the right bits in the right
coeffecient
registers on Cirrus CS4206/7 codecs. It also prevents misconfiguring ADC1/2.
This fixes the digital mic on the Macbook Pro 10,1/Retina.
Based-on-patch-by: Alexander Stein
Signed-off-by: Daniel J Blueman
Mark structures that won't change const.
Signed-off-by: Daniel J Blueman
---
sound/pci/hda/patch_cirrus.c |5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
diff --git a/sound/pci/hda/patch_cirrus.c b/sound/pci/hda/patch_cirrus.c
index 859a119..d5f3a26 100644
--- a/sound/pc
order functions to prevent extra function declaration; merge 4th
patch; simplify Fam15h code; add detail to warning
Signed-off-by: Daniel J Blueman
---
arch/x86/include/asm/amd_nb.h | 13 +++
drivers/edac/amd64_edac.c | 49 ++---
drivers
As the AMD64 last-level-cache ID is 16-bits and federated systems
eg using Numascale's NumaConnect/NumaChip can have more than 255 memory
controllers, use 16-bits to store the ID.
v2: Avoid change to intlv_en variable
v3: Drop unneeded change to index
Signed-off-by: Daniel J Bl
As the Northbridge IDs are at most 16-bits, use the same type
consistently and cleanup some indexes to use smaller types.
v2: Drop unneeded changes and changes Boris will cleanup later
Signed-off-by: Daniel J Blueman
---
arch/x86/include/asm/amd_nb.h|2 +-
arch/x86/include/asm
When various USB3 devices with Etron XHCI controllers, we see a bunch of
warnings:
xhci_hcd :02:00.0: WARN Successful completion on short TX: needs
XHCI_TRUST_TX_LENGTH quirk?
Acknowledge the issue by adding the quirk.
Signed-off-by: Daniel J Blueman
---
drivers/usb/host/xhci-pci.c | 11
On 27 July 2012 14:14, Sarah Sharp wrote:
> On Fri, Jul 27, 2012 at 12:03:44PM +0800, Daniel J Blueman wrote:
>> When various USB3 devices with Etron XHCI controllers, we see a bunch of
>> warnings:
>> xhci_hcd :02:00.0: WARN Successful completion on short TX: needs
&g
On 28 July 2012 01:10, Sarah Sharp wrote:
> On Fri, Jul 27, 2012 at 02:40:56PM +0800, Daniel J Blueman wrote:
>> On 27 July 2012 14:14, Sarah Sharp wrote:
>> > On Fri, Jul 27, 2012 at 12:03:44PM +0800, Daniel J Blueman wrote:
>> >> When various USB3 devices with Et
>private_data;
2506bool disabled;
2507
2508if (chip->init_failed)
2509 return;
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More
On 25/10/2012 19:03, Borislav Petkov wrote:
On Thu, Oct 25, 2012 at 04:32:52PM +0800, Daniel J Blueman wrote:
The AMD Northbridge initialisation code and EDAC assume the Northbridge IDs
are contiguous, which no longer holds on federated systems with multiple
HyperTransport fabrics and multiple
On 29/10/2012 14:17, Daniel J Blueman wrote:
On 25/10/2012 19:03, Borislav Petkov wrote:
On Thu, Oct 25, 2012 at 04:32:52PM +0800, Daniel J Blueman wrote:
The AMD Northbridge initialisation code and EDAC assume the
Northbridge IDs
are contiguous, which no longer holds on federated systems with
On 29/10/2012 18:32, Borislav Petkov wrote:
+ Andreas.
Dude, look at this boot log below:
http://quora.org/2012/16-server-boot-2.txt
That's 192 F10h's!
We were booting 384 a while back, but I'll let you know when reach 4096!
On Mon, Oct 29, 2012 at 04:54:59PM +0800, Daniel
ff-by: Daniel J Blueman
---
arch/x86/include/asm/amd_nb.h | 12
drivers/edac/amd64_edac.c | 18 ++
drivers/edac/amd64_edac.h |6 --
3 files changed, 26 insertions(+), 10 deletions(-)
diff --git a/arch/x86/include/asm/amd_nb.h b/arch/x86/includ
As the AMD64 last-level-cache ID is 16-bits and federated systems
eg using Numascale's NumaConnect/NumaChip can have more than 255 memory
controllers, use 16-bits to store the ID.
Signed-off-by: Daniel J Blueman
---
drivers/edac/amd64_edac.c | 18 +-
1 file chang
As the Northbridge IDs are at most 16-bits, use the same type
consistently.
Signed-off-by: Daniel J Blueman
---
arch/x86/include/asm/amd_nb.h|2 +-
arch/x86/include/asm/processor.h |2 +-
arch/x86/kernel/cpu/amd.c|4 ++--
drivers/edac/amd64_edac.c| 26
Use the same 'amd' prefix as related functions for clarity.
Signed-off-by: Daniel J Blueman
---
arch/x86/include/asm/amd_nb.h |2 +-
drivers/edac/amd64_edac.c |6 +++---
2 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/x86/include/asm/amd_nb.h b/arch/x
On 31/10/2012 16:18, Torsten Kaiser wrote:
On Wed, Oct 31, 2012 at 6:55 AM, Daniel J Blueman
wrote:
As the AMD64 last-level-cache ID is 16-bits and federated systems
eg using Numascale's NumaConnect/NumaChip can have more than 255 memory
controllers, use 16-bits to store the ID.
Signed-o
As the AMD64 last-level-cache ID is 16-bits and federated systems
eg using Numascale's NumaConnect/NumaChip can have more than 255 memory
controllers, use 16-bits to store the ID.
v2: Avoid change to intlv_en variable
Signed-off-by: Daniel J Blueman
---
drivers/edac/amd64_edac.c |
Hi Len,
On 19/10/2012 09:21, Joe Perches wrote:
On Fri, 2012-10-19 at 08:33 +0800, Daniel J Blueman wrote:
Previously a new line is implicitly added in the no GSI case:
[7.185182] pci 0001:00:12.0: can't derive routing for PCI INT A
[7.191352] pci 0001:00:12.0: PCI INT A: n
+0x2a/0x2c
[] x86_64_start_kernel+0xf3/0x102
handlers:
[] sdhci_irq [sdhci]
Disabling IRQ #17
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y needs enough virtual memory to
use multiple split locks. Otherwise, this is very promising work!
[1] http://quora.org/2013/fft3d.c
--
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Principal Software Engineer, Numascale
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Please read the FAQ at http://www.tux.org/lkml/
On 3 September 2013 19:04, Chris Ball wrote:
> On Tue, Sep 03 2013, Daniel J Blueman wrote:
>> Please let me know if there's a better vector for reporting and
>> looking into this issue, if you can.
>
> Do you know whether it's ever worked on this hardware? If s
On 8 October 2012 20:58, Takashi Iwai wrote:
> At Tue, 25 Sep 2012 13:20:05 +0800,
> Daniel J Blueman wrote:
>> On my Macbook with a discrete Nvidia GPU, there is a race between
>> selecting the integrated GPU and putting the discrete GPU into D3 [1],
>> reliably
On 9 October 2012 18:07, Takashi Iwai wrote:
> At Tue, 09 Oct 2012 12:04:08 +0200,
> Takashi Iwai wrote:
>>
>> At Tue, 9 Oct 2012 00:34:09 +0800,
>> Daniel J Blueman wrote:
>> >
>> > On 8 October 2012 20:58, Takashi Iwai wrote:
>> > > At Tu
On 9 October 2012 21:04, Takashi Iwai wrote:
> At Tue, 9 Oct 2012 19:23:56 +0800,
> Daniel J Blueman wrote:
>> On 9 October 2012 18:07, Takashi Iwai wrote:
>> > At Tue, 09 Oct 2012 12:04:08 +0200,
>> > Takashi Iwai wrote:
>> >> At Tue, 9 Oct 2012 00
On 3 December 2012 19:17, Takashi Iwai wrote:
> At Wed, 28 Nov 2012 09:45:39 +0100,
> Takashi Iwai wrote:
>>
>> At Wed, 28 Nov 2012 11:45:07 +0800,
>> Daniel J Blueman wrote:
>> >
>> > Hi Seth, Dave, Takashi,
>> >
>> > If I power down th
On 3 December 2012 22:40, Takashi Iwai wrote:
> At Mon, 3 Dec 2012 22:25:52 +0800,
> Daniel J Blueman wrote:
>>
>> On 3 December 2012 19:17, Takashi Iwai wrote:
>> > At Wed, 28 Nov 2012 09:45:39 +0100,
>> > Takashi Iwai wrote:
>> >>
>>
On 4 December 2012 00:23, Takashi Iwai wrote:
> At Mon, 3 Dec 2012 23:08:28 +0800,
> Daniel J Blueman wrote:
>>
>> On 3 December 2012 22:40, Takashi Iwai wrote:
>> > At Mon, 3 Dec 2012 22:25:52 +0800,
>> > Daniel J Blueman wrote:
>> >>
>
On 01/12/2012 01:17, Borislav Petkov wrote:
On Fri, Nov 30, 2012 at 04:44:20PM +0800, Daniel J Blueman wrote:
Use appropriate types for northbridge IDs and memory ranges. Mark immutable
data const and keep within compilation unit on related structures. Tested on
multi-socket server and multi
Add NumaChip-specific PCI access mechanism via MMCONFIG cycles, but
preventing access to AMD Northbridges which shouldn't respond.
v2: Use PCI_DEVFN in precomputed constant limit; drop unneeded includes
v3: Express dependency on MMCONFIG
Signed-off-by: Daniel J Blueman
---
arch/x86/Kc
On 4 December 2012 01:10, Takashi Iwai wrote:
> At Tue, 4 Dec 2012 00:50:56 +0800,
> Daniel J Blueman wrote:
>>
>> On 4 December 2012 00:23, Takashi Iwai wrote:
>> > At Mon, 3 Dec 2012 23:08:28 +0800,
>> > Daniel J Blueman wrote:
>> >>
>
When printing, use a prefix of the PCI domain, bus, device and function
as in other drivers, to differentiate multiple devices.
Important for reporting and debugging.
Signed-off-by: Daniel J Blueman
---
sound/pci/hda/hda_intel.c | 110 +++--
1 file
On 4 December 2012 21:55, Takashi Iwai wrote:
> At Tue, 04 Dec 2012 14:23:05 +0100,
> Takashi Iwai wrote:
>>
>> At Tue, 4 Dec 2012 20:58:55 +0800,
>> Daniel J Blueman wrote:
>> >
>> > On 4 December 2012 01:10, Takashi Iwai wrote:
>> > > At T
Signed-off-by: Daniel J Blueman
---
sound/pci/hda/hda_intel.c | 134 +++--
1 file changed, 69 insertions(+), 65 deletions(-)
diff --git a/sound/pci/hda/hda_intel.c b/sound/pci/hda/hda_intel.c
index f9d870e..eb92ab4 100644
--- a/sound/pci/hda/hda_intel.c
On 4 December 2012 23:03, Takashi Iwai wrote:
> At Tue, 4 Dec 2012 22:46:47 +0800,
> Daniel J Blueman wrote:
>>
>> On 4 December 2012 21:55, Takashi Iwai wrote:
>> > At Tue, 04 Dec 2012 14:23:05 +0100,
>> > Takashi Iwai wrote:
>> >>
>> >&g
On 5 December 2012 00:04, Takashi Iwai wrote:
> At Tue, 4 Dec 2012 23:54:39 +0800,
> Daniel J Blueman wrote:
>>
>> On 4 December 2012 23:03, Takashi Iwai wrote:
>> > At Tue, 4 Dec 2012 22:46:47 +0800,
>> > Daniel J Blueman wrote:
>> >>
>
: Refactor for Takashi's for-next branch
Signed-off-by: Daniel J Blueman
---
sound/pci/hda/hda_intel.c | 125 +++--
1 file changed, 64 insertions(+), 61 deletions(-)
diff --git a/sound/pci/hda/hda_intel.c b/sound/pci/hda/hda_intel.c
index 22ecadc..eb
lable:
[1.650124] pci :00:14.0: can't derive routing for PCI INT A
[1.650126] pci :00:14.0: PCI INT A: no GSI
[1.650126]
[1.650180] pci :00:14.0: can't derive routing for PCI INT A
Fix this by making the newline explicit and removing the superfluous
one.
Signed-off-by: D
On 01/12/2012 00:45, Bjorn Helgaas wrote:
On Thu, Nov 29, 2012 at 10:28 PM, Daniel J Blueman
On 29/11/2012 07:08, Bjorn Helgaas wrote:
On Wed, Nov 21, 2012 at 1:39 AM, Daniel J Blueman
wrote:
Add NumaChip-specific PCI access mechanism via MMCONFIG cycles, but
preventing access to AMD
-crash.txt
Xorg.log is at: http://quora.org/2012/nouveau/Xorg.0.log-crash.txt
Kernel log after fix is at: http://quora.org/2012/nouveau/dmesg-fix.txt
Signed-off-by: Daniel J Blueman
---
drivers/gpu/drm/nouveau/core/core/object.c | 10 +++---
1 file changed, 7 insertions(+), 3 deletions
On 3.7-rc4, add missing newline to to prevent the following kernel log
line getting appended to the current one after switching the integrated
GPU and suspending the discrete GPU.
Signed-off-by: Daniel J Blueman
---
drivers/gpu/drm/nouveau/core/subdev/i2c/aux.c |2 +-
1 file changed, 1
TX and on for RX
nouveau E[ I2C][:01:00.0] AUXCH(3): begin idle timeout 0x
nouveau E[ I2C][:01:00.0] AUXCH(2): begin idle timeout 0x
nouveau E[ I2C][:01:00.0] AUXCH(1): begin idle timeout 0xffff
--
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On 3 January 2013 21:11, Alan Cox wrote:
> On Thu, 3 Jan 2013 20:56:30 +0800
> Daniel J Blueman wrote:
>
>> On 3.8-rc2 with lockdep enabled and dual-GPU setup (Macbook Pro
>> Retina), I see two releated lock inversion issues with the EFI
>> framebuffer, leading to poss
gt;
> Untested by me, feel free to test.
>
> Maybe some of the i915 and/or fb driver experts can comment on the problem.
The structure array from alloc_apertures is just used for the PCI base
address registers, so it's important here.
I'll take a look at the efifb locking later
_thread+0x210/0x210
[] kthread+0xd6/0xe0
[] ? _raw_spin_unlock_irq+0x2b/0x50
[] ? __init_kthread_worker+0x70/0x70
[] ret_from_fork+0x7c/0xb0
[] ? __init_kthread_worker+0x70/0x70
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the body
On 3 January 2013 23:41, Jiang Liu wrote:
> On 01/03/2013 11:11 PM, Daniel J Blueman wrote:
>> When the Apple thunderbolt ethernet adapter comes loose on my Macbook
>> Pro Retina (Intel DSL3510), we see pci_slot_name return
>> non-deterministic data (ie varying each boot),
Resuming a switcheroo'd HDA controller hangs since the completion
is one-shot (thus works the first time). Fix by using completions
that explictly need rearming, so remain fired before.
Signed-off-by: Daniel J Blueman
---
sound/pci/hda/hda_intel.c |4 ++--
1 file changed, 2 insertions(
On 12/11/2012 21:24, Borislav Petkov wrote:
On Mon, Nov 05, 2012 at 02:05:24PM +0800, Daniel J Blueman wrote:
Fix the handling of memory controller detection to index the array
of detected Northbridges, allowing memory controllers over multiple
PCI domains in federated systems eg using
Change the conditional around ahci_suspend/resume to the same as the
SIMPLE_DEV_PM_OPS macro that uses these functions, fixing an unused build
warning.
Signed-off-by: Daniel J Blueman
---
drivers/ata/ahci_platform.c |2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers
order functions to prevent extra function declaration; merge 4th
patch; simplify Fam15h code; add detail to warning
v6: Remove unused variable after simplification
Signed-off-by: Daniel J Blueman
---
arch/x86/include/asm/amd_nb.h | 13 +++
drivers/edac/amd64_edac.c |
As the AMD64 last-level-cache ID is 16-bits and federated systems
eg using Numascale's NumaConnect/NumaChip can have more than 255 memory
controllers, use 16-bits to store the ID.
v2: Avoid change to intlv_en variable
v3: Drop unneeded change to index
Signed-off-by: Daniel J Bl
As the Northbridge IDs are at most 16-bits, use the same type
consistently and cleanup some indexes to use smaller types.
v2: Drop changes for later cleanups
v3: Further changes suggested by Boris
Signed-off-by: Daniel J Blueman
---
arch/x86/include/asm/amd_nb.h|2 +-
arch/x86/include
On 16 April 2013 15:37, Daniel J Blueman wrote:
> When using e4defrag on a ext4 filesystem created a month ago, I ran
> into this fatal page fault [1]
> while running e4defrag on 3.9-rc6 (Ubuntu mainline).
>
> e2fsdump output is at http://quora.org/2012/e2fsdump.txt ; let me kno
entries: 134217728 (order: 18, 1073741824 bytes)
Inode-cache hash table entries: 67108864 (order: 17, 536870912 bytes)
4.5TB
Dentry cache hash table entries: 1073741824 (order: 21, 8589934592 bytes)
Inode-cache hash table entries: 536870912 (order: 20, 4294967296 bytes)
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Daniel J Blueman
Principal
ites would eliminate the cache line fetch and give a
massive increase in bandwidth. We wouldn't even need a store-fence as
the initialising core is the only one online.
Daniel
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Daniel J Blueman
Principal Software Engineer, Numascale Asia
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On 25/06/2013 17:48, Eric Dumazet wrote:
On Tue, 2013-06-25 at 16:56 +0800, Daniel J Blueman wrote:
As memory capacity increases, we see the dentry and inode cache hash
tables grow to wild sizes [1], eg 13GB is consumed on a 4.5TB system.
Perhaps a better approach adds a linear component to an
=1/1 Maskable- 64bit+
Capabilities: [ac] Express Endpoint, MSI 00
Capabilities: [100] Advanced Error Reporting
Capabilities: [150] Power Budgeting
Capabilities: [160] Virtual Channel
Kernel driver in use: sdhci-pci
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On 02/26/2013 12:32 AM, Paul E. McKenney wrote:
On Wed, Feb 20, 2013 at 11:35:57AM +0800, Daniel J Blueman wrote:
On 20/02/2013 02:16, Paul E. McKenney wrote:
On Wed, Feb 20, 2013 at 12:34:12AM +0800, Daniel J Blueman wrote:
Hi Paul,
On some of our larger servers with many hundreds of cores
]---
Fixing recursive fault but reboot is needed!
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s -ef | grep rts5139
root 691 2 0 Aug03 ?00:00:36 [rts5139-control]
root 693 2 0 Aug03 ?00:25:36 [rts5139-polling]
The kernel is stock 3.5.0 without debug; would it help if I log a bug
report or eg collect further detail?
Thanks,
Daniel
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Daniel J Blueman
k+0x11a/0x480
[] worker_thread+0x165/0x370
[] ? manage_workers.isra.29+0x130/0x130
[] kthread+0x93/0xa0
[] kernel_thread_helper+0x4/0x10
[] ? kthread_freezable_should_stop+0x70/0x70
[] ? gs_change+0x13/0x13
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250.822786] 5448 reserved pages
[ 1250.822786] 55715 pages shared
[ 1250.822786] 1 pages swap cached
On Feb 14, 2008 8:40 PM, Daniel J Blueman <[EMAIL PROTECTED]> wrote:
> One of my x86-64 (1GB) systems experienced order 1 page alloc failure
> after ~4 days of uptime and 9 times again in
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On 22 July 2012 17:15, Daniel J Blueman wrote:
> Hi Johannes et al,
>
> When running my Centrino Wireless-N 130 BGN (rev 0xb0) card in nl80211
> AP mode with hostapd on linux 3.5.0, I immediately hit this fatal
> pagefault [1].
>
> I can cook a debug kernel, reproduce, disass
expected.
Blacklist 3Gbps mode to avoid dataloss and the ~30s delay bus reset
and renegotiation incurs.
Signed-off-by: Daniel J Blueman
---
drivers/ata/libata-core.c |1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/ata/libata-core.c b/drivers/ata/libata-core.c
index 28db50b..0781510
r=(none)
I: If#= 3 Alt= 0 #EPs= 0 Cls=fe(app. ) Sub=01 Prot=01 Driver=(none)
Patch originally written and tested by clipcarl (forums.opensuse.org).
Signed-off-by: Daniel J Blueman
Signed-off-by: Henrik Rydberg
---
drivers/bluetooth/btusb.c |3 +++
1 file changed, 3 insertions(+)
diff --git
evice
}
}
+ if (!bios->execute)
+ nouveau_gpio_reset(dev);
+
return ret;
}
[2] https://bugs.freedesktop.org/show_bug.cgi?id=51971
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Allow module parameter 'enable_msi' to request an MSI interrupt for
hosts where available (presently PCI). Useful as a workaround on
platforms where the legacy interrupt is broken.
Signed-off-by: Daniel J Blueman
---
drivers/mmc/host/sdhci-pci.c | 30 +
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