Signed-off-by: Daniel Baluta
---
arch/arm64/boot/dts/freescale/imx8mm-evk.dts | 48
1 file changed, 48 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx8mm-evk.dts
b/arch/arm64/boot/dts/freescale/imx8mm-evk.dts
index 2d5d89475b76..207b13266a96 100644
--- a/arch/arm64
On Tue, Apr 23, 2019 at 8:21 AM Marco Felsch wrote:
>
> Hi Daniel,
>
> On 19-04-22 19:35, Daniel Baluta wrote:
> > i.MX8MM has 5 SAI instances with the following base
> > addresses according to RM.
> >
> > SAI1 base address: 3001_h
> > SAI2 base
Hi Marco,
On Tue, Apr 23, 2019 at 8:19 AM Marco Felsch wrote:
>
> Hi Daniel,
>
> On 19-04-22 19:36, Daniel Baluta wrote:
> > i.MX8MM has one wm8524 audio codec connected with
> > SAI3 digital audio interface.
> >
> > This patch uses simple-card machine driver
From: Shengjiu Wang
Turn off/on clocks when device enters suspend/resume. This
can help saving power.
As a further optimization, we turn off/on mclk only when SAI
is in master mode because otherwise mclk is externally provided.
Signed-off-by: Shengjiu Wang
Signed-off-by: Daniel Baluta
se SAI module on i.MX8M is not
compatbile with SAI modules form i.MX6
Daniel Baluta (2):
arm64: dts: imx8mm: Add SAI nodes
arm64: dts: imx8mm-evk: Enable audio codec wm8524
arch/arm64/boot/dts/freescale/imx8mm-evk.dts | 55
arch/arm64/boot/dts
* codec node
* simple-card configuration
Signed-off-by: Daniel Baluta
---
arch/arm64/boot/dts/freescale/imx8mm-evk.dts | 55
1 file changed, 55 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx8mm-evk.dts
b/arch/arm64/boot/dts/freescale/imx8mm-evk.dts
index
i.MX8MM has 5 SAI instances with the following base
addresses according to RM.
SAI1 base address: 3001_h
SAI2 base address: 3002_h
SAI3 base address: 3003_h
SAI5 base address: 3005_h
SAI6 base address: 3006_h
Signed-off-by: Daniel Baluta
---
arch/arm64/boot/dts/freescale
SAI module on imx8qm features a register map similar with imx6 series
(it doesn't have VERID and PARAM registers at the beginning
of address spece).
Also, it has one FIFO which can help up to 64 * 32 bit samples.
Signed-off-by: Daniel Baluta
---
sound/soc/fsl/fsl_sai.c | 7 +++
1
i.MX8QM SOC integrates 6 SAI instances. Register map is similar with
i.MX6 series.
Daniel Baluta (2):
ASoC: fsl_sai: Add support for imx8qm
ASoC: dt-bindings: Introduce compatible string for imx8qm
Documentation/devicetree/bindings/sound/fsl-sai.txt | 3 ++-
sound/soc/fsl/fsl_sai.c
Register map for i.MX8QM is similar with i.MX6 series. Integration
of SAI IP into i.MX8QM SOC features a FIFO size of 64 X 32 bits samples.
Signed-off-by: Daniel Baluta
---
Documentation/devicetree/bindings/sound/fsl-sai.txt | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a
On Wed, Aug 14, 2019 at 4:39 AM Nicolin Chen wrote:
>
> On Sun, Aug 11, 2019 at 10:55:45PM +0300, Daniel Baluta wrote:
> > An audio data frame consists of a number of slots one for each
> > channel. In the case of I2S there are 2 data slots / frame.
> >
> > The maxim
On Wed, Aug 14, 2019 at 4:01 AM Nicolin Chen wrote:
>
> On Sun, Aug 11, 2019 at 10:45:17PM +0300, Daniel Baluta wrote:
> > From: Viorel Suman
> >
> > The SAI interface can be a clock supplier or consumer
> > as a function of stream direction. e.g SAI can be mast
, 2019 at 1:02 PM Daniel Baluta wrote:
>
> Some of i.MX8 processors (e.g i.MX8QM, i.MX8QXP) contain
> the Tensilica HiFi4 DSP for advanced pre- and post-audio
> processing.
>
> The communication between Host CPU and DSP firmware is
> taking place using a shared memory area for me
From: Viorel Suman
The SAI interface can be a clock supplier or consumer
as a function of stream direction. e.g SAI can be master
for Tx and slave for Rx.
Signed-off-by: Viorel Suman
Signed-off-by: Daniel Baluta
---
sound/soc/fsl/fsl_sai.c | 18 +-
sound/soc/fsl/fsl_sai.h
hw_params.
Signed-off-by: Daniel Baluta
---
sound/soc/fsl/fsl_sai.c | 34 +-
sound/soc/fsl/fsl_sai.h | 2 +-
2 files changed, 14 insertions(+), 22 deletions(-)
diff --git a/sound/soc/fsl/fsl_sai.c b/sound/soc/fsl/fsl_sai.c
index 69cf3678c859..b70032c82fe2 100644
--- a
annel.part.2+0x24/0xb8
[2.116453] mbox_free_channel+0x18/0x28
This bug is present from the beginning of times.
Cc: Oleksij Rempel
Fixes: 2bb7005696e2246 ("mailbox: Add support for i.MX messaging unit")
Signed-off-by: Daniel Baluta
---
drivers/mailbox/imx-mailbox.c | 4 +++
:
.handle_reply
.handle_request
- the callbacks will be used by the protocol on
notification arrival from DSP.
Signed-off-by: Daniel Baluta
---
Changes since v3:
- Added remove function
drivers/firmware/imx/Kconfig | 11 +++
drivers/firmware/imx/Makefile| 1
On Tue, Jul 23, 2019 at 10:47 AM Shawn Guo wrote:
>
> On Tue, Jul 23, 2019 at 10:44:09AM +0300, Daniel Baluta wrote:
> > Just realized that for this patch I forgot to add [PATCH v3]. Shawn,
> > should I resend?
>
> No need.
Just sent v4 out there adding support for remove
my 2 bugfixes attached?
thanks,
Daniel.
From f9f382b8cab2cf88abf7fb26b885ac96e0cbaff4 Mon Sep 17 00:00:00 2001
From: Daniel Baluta
Date: Thu, 1 Aug 2019 17:41:25 +0300
Subject: [PATCH 2/2] mailbox: imx: Clear the right interrupts at shutdown
Make sure to only clear enabled interrupts keeping
Hi Oleksij,
Thanks for review
>
> your patch is in conflicht with Richard's Zhu
> patch "[PATCH v3] mailbox: imx: add support for imx v1 mu".
> Please sync your works.
Sent an email to Richard. Hopefully he can rebase his change on my patches.
>
> Looks like here is one more bug "from the
One more thing. See below:
On Wed, Jul 31, 2019 at 12:14 PM Richard Zhu wrote:
> -/* Control Register */
> -#define IMX_MU_xCR 0x24
> /* General Purpose Interrupt Enable */
> #define IMX_MU_xCR_GIEn(x) BIT(28 + (3 - (x)))
> /* Receive Interrupt Enable */
> @@ -44,6 +36,13 @@
On Thu, Jul 25, 2019 at 1:34 AM Nicolin Chen wrote:
>
> On Mon, Jul 22, 2019 at 03:48:24PM +0300, Daniel Baluta wrote:
> > From: Lucas Stach
> >
> > New revisions of the SAI IP block have even more differences that need
> > be taken into account by the driver.
On Thu, Jul 25, 2019 at 2:22 AM Nicolin Chen wrote:
>
> On Mon, Jul 22, 2019 at 03:48:31PM +0300, Daniel Baluta wrote:
> > This allows combining multiple-data-line FIFOs into a
> > single-data-line FIFO.
> >
> > Signed-off-by: Daniel Baluta
> > ---
> >
On Thu, Jul 25, 2019 at 2:32 AM Nicolin Chen wrote:
>
> On Mon, Jul 22, 2019 at 03:48:32PM +0300, Daniel Baluta wrote:
> > New IP version introduces Version ID and Parameter registers
> > and optionally added Timestamp feature.
> >
> > VERID and PARAM registers are
On Thu, Jul 25, 2019 at 2:14 AM Nicolin Chen wrote:
>
> On Mon, Jul 22, 2019 at 03:48:29PM +0300, Daniel Baluta wrote:
> > SAI supports up to 8 data lines. This property let the user
> > configure how many data lines should be used per transfer
> > direction (Tx/Rx).
>
+ Rob
On Mon, Aug 5, 2019 at 8:18 AM Richard Zhu wrote:
>
> There is a version 1.0 MU on imx7ulp, use "fsl,imx7ulp-mu" compatible
> to support it.
>
> Signed-off-by: Richard Zhu
> Reviewed-by: Dong Aisheng
Reviewed-by: Daniel Baluta
> ---
> Documentati
gt; SR/CR registers are defined at 0x60/0x64.
> Extend this driver to support it.
>
> Signed-off-by: Richard Zhu
> Suggested-by: Oleksij Rempel
> Reviewed-by: Dong Aisheng
> Reviewed-by: Oleksij Rempel
Very clean solution. Thanks Richard!
Reviewed-by: Daniel Baluta
&g
On Tue, 2019-08-06 at 14:46 +0800, anson.hu...@nxp.com wrote:
> From: Anson Huang
>
> When of_clk_add_provider failed, all clks should be unregistered.
>
> Signed-off-by: Anson Huang
Reviewed-by: Daniel Baluta
Thanks Anson for the patch!
On Tue, 2019-08-06 at 14:46 +0800, anson.hu...@nxp.com wrote:
> From: Anson Huang
>
> When of_clk_add_provider failed, all clks should be unregistered.
>
> Signed-off-by: Anson Huang
Reviewed-by: Daniel Baluta
> ---
> drivers/clk/imx/clk-imx8mq.c | 10 +-
On Tue, Jul 30, 2019 at 10:59 AM Nicolin Chen wrote:
>
> On Mon, Jul 29, 2019 at 09:20:01PM +0100, Mark Brown wrote:
> > On Mon, Jul 29, 2019 at 10:57:43PM +0300, Daniel Baluta wrote:
> > > On Mon, Jul 29, 2019 at 10:42 PM Nicolin Chen
> > > wrote:
> > &g
On Mon, Jul 29, 2019 at 10:42 PM Nicolin Chen wrote:
>
> On Sun, Jul 28, 2019 at 10:24:23PM +0300, Daniel Baluta wrote:
> > SAI IP supports up to 8 data lines. The configuration of
> > supported number of data lines is decided at SoC integration
> > time.
> >
>
On Mon, Jul 29, 2019 at 11:15 PM Nicolin Chen wrote:
>
> On Sun, Jul 28, 2019 at 10:24:26PM +0300, Daniel Baluta wrote:
> > SAI supports up to 8 data lines. This property let the user
> > configure how many data lines should be used per transfer
> > direction (Tx/Rx).
&g
On Tue, Jul 30, 2019 at 11:02 AM Nicolin Chen wrote:
>
> On Sun, Jul 28, 2019 at 10:24:29PM +0300, Daniel Baluta wrote:
> > For i.MX7ULP and i.MX8MQ register map is changed. Add two new compatbile
> > strings to differentiate this.
> >
> > Signed-off-by: Daniel Balu
On Tue, Jul 30, 2019 at 3:05 PM Mark Brown wrote:
>
> On Tue, Jul 30, 2019 at 03:02:30PM +0300, Daniel Baluta wrote:
>
> > I removed the 'or' on purpose because I don't want to move it
> > around each time we add a new compatible.
>
> > Anyhow, I can p
Tx channel enable (TCE) / Rx channel enable (RCE) bits
enable corresponding data channel for Tx/Rx operation.
Because SAI supports up the 8 channels TCE/RCE occupy
up the 8 bits inside TCR3/RCR3 registers we need to extend
the mask to reflect this.
Signed-off-by: Daniel Baluta
---
sound/soc
SAI module on imx7ulp/imx8m features 2 new registers (VERID and PARAM)
at the beginning of register address space.
On imx7ulp FIFOs can held up to 16 x 32 bit samples.
On imx8mq FIFOs can held up to 128 x 32 bit samples.
Signed-off-by: Daniel Baluta
Acked-by: Nicolin Chen
---
sound/soc/fsl
nups]
Signed-off-by: Daniel Baluta
[adapted to linux-next]
---
sound/soc/fsl/fsl_sai.c | 228
sound/soc/fsl/fsl_sai.h | 41
2 files changed, 156 insertions(+), 113 deletions(-)
diff --git a/sound/soc/fsl/fsl_sai.c b/sound/soc/fsl/fsl_sai.c
i
For i.MX7ULP and i.MX8MQ register map is changed. Add two new compatbile
strings to differentiate this.
Signed-off-by: Daniel Baluta
---
Documentation/devicetree/bindings/sound/fsl-sai.txt | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings
, Receive data register
* RFR0..7, Receive FIFO register
Signed-off-by: Daniel Baluta
---
sound/soc/fsl/fsl_sai.c | 76 +++--
sound/soc/fsl/fsl_sai.h | 36 ---
2 files changed, 98 insertions(+), 14 deletions(-)
diff --git a/sound/soc/fsl
rly allow users to set it.
Daniel Baluta (5):
ASoC: fsl_sai: Add registers definition for multiple datalines
ASoC: fsl_sai: Update Tx/Rx channel enable mask
ASoC: fsl_sai: Add support for SAI new version
ASoC: fsl_sai: Add support for imx7ulp/imx8mq
ASoC: dt-bindings: Introduce compati
On Mon, Jul 29, 2019 at 11:22 PM Nicolin Chen wrote:
>
> On Sun, Jul 28, 2019 at 10:24:25PM +0300, Daniel Baluta wrote:
> > SAI supports up to 8 Rx/Tx data lines which can be enabled
> > using TCE/RCE bits of TCR3/RCR3 registers.
> >
> > Data lines to be enable
On Wed, Jul 24, 2019 at 10:04 AM Daniel Baluta wrote:
>
> On Tue, Jul 23, 2019 at 6:19 PM Pierre-Louis Bossart
> wrote:
> >
> >
> > > diff --git a/sound/soc/sof/Kconfig b/sound/soc/sof/Kconfig
> > > index 61b97fc55bb2..2aa3a1cdf60c 100644
> > > -
On Wed, Aug 7, 2019 at 6:22 PM Pierre-Louis Bossart
wrote:
>
>
> +static int sof_dt_probe(struct platform_device *pdev)
> +{
> + struct device *dev = &pdev->dev;
> + const struct sof_dev_desc *desc;
> + /*TODO: create a generic snd_soc_xxx_mach */
> +
On Tue, Jul 23, 2019 at 6:19 PM Pierre-Louis Bossart
wrote:
>
>
> > diff --git a/sound/soc/sof/Kconfig b/sound/soc/sof/Kconfig
> > index 61b97fc55bb2..2aa3a1cdf60c 100644
> > --- a/sound/soc/sof/Kconfig
> > +++ b/sound/soc/sof/Kconfig
> > @@ -36,6 +36,15 @@ config SND_SOC_SOF_ACPI
> > Say
s will not be selected.
[1] https://github.com/thesofproject/sof
[2] https://github.com/thesofproject/linux/pull/1048/commits
Daniel Baluta (5):
ASoC: SOF: Add OF DSP device support
ASoC: SOF: imx: Add i.MX8 HW support
ASoC: SOF: topology: Add dummy support for i.MX8 DAIs
arm64: dts: imx8qx
Add support for the audio DSP hardware found on NXP i.MX8 platform.
Signed-off-by: Daniel Baluta
---
sound/soc/sof/Kconfig | 1 +
sound/soc/sof/Makefile | 1 +
sound/soc/sof/imx/Kconfig | 22 +++
sound/soc/sof/imx/Makefile | 4 +
sound/soc/sof/imx/imx8.c | 394
Add support for device tree based SOF DSP devices.
Signed-off-by: Daniel Baluta
---
sound/soc/sof/Kconfig | 10 +++
sound/soc/sof/Makefile | 3 +
sound/soc/sof/sof-of-dev.c | 143 +
3 files changed, 156 insertions(+)
create mode 100644 sound/soc
This describes the DSP device tree node.
Signed-off-by: Daniel Baluta
Reviewed-by: Rob Herring
---
.../devicetree/bindings/dsp/fsl,dsp.yaml | 88 +++
1 file changed, 88 insertions(+)
create mode 100644 Documentation/devicetree/bindings/dsp/fsl,dsp.yaml
diff --git a
Add dummy support for SAI/ESAI digital audio interface
IPs found on i.MX8 boards.
Signed-off-by: Daniel Baluta
---
include/sound/sof/dai.h | 2 ++
include/uapi/sound/sof/tokens.h | 8
sound/soc/sof/topology.c| 30 ++
3 files changed, 40
This includes DSP reserved memory, ADMA DSP device and DSP MU
communication channels description.
Signed-off-by: Daniel Baluta
---
arch/arm64/boot/dts/freescale/imx8qxp-mek.dts | 4 +++
arch/arm64/boot/dts/freescale/imx8qxp.dtsi| 32 +++
2 files changed, 36 insertions
On Wed, Aug 7, 2019 at 6:28 PM Daniel Baluta wrote:
>
> On Wed, Aug 7, 2019 at 6:22 PM Pierre-Louis Bossart
> wrote:
> >
> >
> > >>>> +static int sof_dt_probe(struct platform_device *pdev)
> > >>>> +{
> > >>>> + stru
On Mon, Jul 22, 2019 at 9:30 PM Vaittinen, Matti
wrote:
>
> Sorry for top posting. I'm replying using mobile phone and outlook web app...
>
> gpio_intr is not needed. Irq must be given using the standard irq property.
> gpio_intr has been used in an old draft driver - I assume the dts originates
Just realized that for this patch I forgot to add [PATCH v3]. Shawn,
should I resend?
Oleksij, care to have a look at this v3. It has a minor modification
but basically
all your review in v1 is still addressed.
On Thu, Jul 18, 2019 at 11:21 AM Daniel Baluta wrote:
>
> Some of i.MX8 proc
s' as it was already
applied by Shawn
- add patches adding support for Linux DSP driver to make things
clear for review
- add maxItems property for PM in DT bindings doc
Daniel Baluta (5):
ASoC: SOF: imx: Add i.MX8 HW support
ASoC: SOF: topology: Add dum
Add support for the audio DSP hardware found on NXP i.MX8 platform.
Signed-off-by: Daniel Baluta
---
- This is also on review with SOF community here:
https://github.com/thesofproject/linux/pull/1048
sound/soc/sof/Kconfig | 1 +
sound/soc/sof/Makefile | 1 +
sound/soc/sof/imx
This describes the DSP device tree node.
Signed-off-by: Daniel Baluta
---
.../devicetree/bindings/dsp/fsl,dsp.yaml | 87 +++
1 file changed, 87 insertions(+)
create mode 100644 Documentation/devicetree/bindings/dsp/fsl,dsp.yaml
diff --git a/Documentation/devicetree
This includes DSP reserved memory, ADMA DSP device and DSP MU
communication channels description.
Signed-off-by: Daniel Baluta
---
arch/arm64/boot/dts/freescale/imx8qxp-mek.dts | 4 +++
arch/arm64/boot/dts/freescale/imx8qxp.dtsi| 32 +++
2 files changed, 36 insertions
Add support for device tree based SOF DSP devices.
Signed-off-by: Daniel Baluta
---
This is also on review with SOF community here:
https://github.com/thesofproject/linux/pull/1048
sound/soc/sof/Kconfig | 9 +++
sound/soc/sof/Makefile | 3 +
sound/soc/sof/imx/Kconfig | 1
Add dummy support for SAI/ESAI digital audio interface
IPs found on i.MX8 boards.
Signed-off-by: Daniel Baluta
---
This is also on review with SOF community here:
https://github.com/thesofproject/linux/pull/1048
include/sound/sof/dai.h | 2 ++
include/uapi/sound/sof/tokens.h | 8
On Tue, Jul 23, 2019 at 8:01 PM Mark Brown wrote:
>
> On Mon, Jul 22, 2019 at 03:48:24PM +0300, Daniel Baluta wrote:
> > From: Lucas Stach
> >
> > New revisions of the SAI IP block have even more differences that need
> > be taken into account by the driver.
On Tue, Jul 23, 2019 at 6:18 PM Pierre-Louis Bossart
wrote:
>
>
> > diff --git a/sound/soc/sof/imx/Makefile b/sound/soc/sof/imx/Makefile
> > new file mode 100644
> > index ..c69237971da5
> > --- /dev/null
> > +++ b/sound/soc/sof/imx/Makefile
> > @@ -0,0 +1,7 @@
> > +# SPDX-License-Iden
latforms
> > Say Y if you have such a device.
> > diff --git a/sound/soc/sof/sof-dt-dev.c b/sound/soc/sof/sof-dt-dev.c
> > new file mode 100644
> > index ..31429bbb5c7e
> > --- /dev/null
> > +++ b/sound/soc/sof/sof-dt-dev.c
> > @@ -0,0 +1
On Mon, Jul 22, 2019 at 3:58 PM Lucas Stach wrote:
>
> Am Montag, den 22.07.2019, 15:48 +0300 schrieb Daniel Baluta:
> > SAI supports up to 8 Rx/Tx data lines which can be enabled
> > using TCE/RCE bits of TCR3/RCR3 registers.
> >
> > Data lines to be enabled are rea
On Wed, Jul 24, 2019 at 11:32 AM Lucas Stach wrote:
>
> Hi Daniel,
>
> Am Mittwoch, den 24.07.2019, 09:54 +0300 schrieb Daniel Baluta:
> > On Tue, Jul 23, 2019 at 6:18 PM Pierre-Louis Bossart
> [...]
> >
> > > Also are all the resources device-managed, I don&
On Mon, 2019-06-24 at 08:52 +0300, Matti Vaittinen wrote:
> Hello Richard,
>
> Nice to see you upstreaming this! Thumbs up!
>
> Just few remarks to pmic node from me:
>
>
Thanks a lot Matti for review. I am working together with Andra
for a Google Summer of Code project.
The first step of th
stems that are active :
> - Ethernet
> - USB
>
> Cc: Daniel Baluta
> Signed-off-by: Richard Hu
> Signed-off-by: Andra Danciu
> ---
> I am using pico-pi-8mxm board to work on my project for Google Summer of
> Code.
> This is based on patches from https:/
Shawn,
Care to have a look at this? git send-email should correctly work now.
Let me know if you want me to resend
On Tue, Jun 4, 2019 at 3:34 PM wrote:
>
> From: Daniel Baluta
>
> i.MX8MM has one wm8524 audio codec connected with
> SAI3 digital audio interface.
>
> T
lsio_mu13 node is used to communicate with DSP.
Signed-off-by: Daniel Baluta
---
arch/arm64/boot/dts/freescale/imx8qxp.dtsi | 8
1 file changed, 8 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx8qxp.dtsi
b/arch/arm64/boot/dts/freescale/imx8qxp.dtsi
index b2cb818c76c6
On Wed, Jun 26, 2019 at 10:06 AM wrote:
>
> From: Anson Huang
>
> Add i.MX SCU SoC's UID(unique identifier) support, user
> can read it from sysfs:
>
> root@imx8qxpmek:~# cat /sys/devices/soc0/soc_uid
> 7B64280B57AC1898
>
> Signed-off-by: Anson Huang
> ---
> drivers/soc/imx/soc-imx-scu.c | 35 +
On Tue, Jun 25, 2019 at 4:42 PM Abel Vesa wrote:
>
> Add the initial configuration for clocks that need default parent and rate
> setting. This is based on the vendor tree clock provider parents and rates
> configuration except this is doing the setup in dts rather than using clock
> consumer API
Hi Rob,
This is my first time documenting the bindings using the
new yaml format so thanks for your patience and explanations!
On Fri, Jun 14, 2019 at 5:53 PM Rob Herring wrote:
>
> On Fri, Jun 14, 2019 at 2:15 AM wrote:
> >
> > From: Daniel Baluta
> >
> > DSP IP
On Thu, Jun 27, 2019 at 3:48 AM Anson Huang wrote:
>
> Hi, Daniel
>
> > -Original Message-
> > From: Daniel Baluta
> > Sent: Wednesday, June 26, 2019 8:42 PM
> > To: Anson Huang
> > Cc: Shawn Guo ; Sascha Hauer
> > ; Pengutronix Kernel Team
> > > > + mboxes:
> > > > +description:
> > > > + List of phandle of 2 MU channels for TXDB, 2 MU channels for RXDB
> > > > + (see mailbox/fsl,mu.txt)
> > > > +maxItems: 1
> > >
> > > Should be 4?
> >
> > Actually is just a list with 1 item. I think is the terminology:
> >
> >
s and Oleksij comments)
- removed imx_dsp_get_handle now drivers wanting to use DSP IPC
will get a reference to dsp_ipc node in dts.
- added chip name in compatible string fsl,imx8qxp-dsp
- avoid memory leaks
- make dt_binding_check works fine now!
Daniel Balu
callbacks:
.handle_reply
.handle_request
- the callbacks will be used by the protocol driver on
notification arrival from DSP.
Signed-off-by: Daniel Baluta
---
drivers/firmware/imx/Kconfig | 11 +++
drivers/firmware/imx/Makefile| 1 +
drivers/firmware/imx/imx-dsp.c
DSP IPC is the layer that allows the Host CPU to communicate
with DSP firmware.
DSP is part of some i.MX8 boards (e.g i.MX8QM, i.MX8QXP)
Signed-off-by: Daniel Baluta
---
.../devicetree/bindings/dsp/fsl,dsp_ipc.yaml | 44 +++
1 file changed, 44 insertions(+)
create mode 100644
GIEn is enabled at startup for RX doorbell mailboxes so
we need to clear the bit at shutdown in order to avoid
leaving the interrupt line enabled.
Signed-off-by: Daniel Baluta
Reviewed-by: Oleksij Rempel
---
Changes since v1:
- separate patch from inital series of creating DSP IPC driver
From: Daniel Baluta
GIEn is enabled at startup for RX doorbell mailboxes so
we need to clear the bit at shutdown in order to avoid
leaving the interrupt line enabled.
Signed-off-by: Daniel Baluta
---
drivers/mailbox/imx-mailbox.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff
From: Daniel Baluta
TX doorbell with ACK will allow us to push the doorbell ring button
(trigger GIR) and also will allow us to handle the response from DSP.
DSP firmware found on i.MX8 boards implements a duplex
communication protocol over MU channels.
On the host side (Linux) we need to
From: Daniel Baluta
We need this in order to implement the communication protocol
between Linux kernel SOF IPC layer and DSP firmware found on i.MX8 boards.
First patch is just a bugfix and can be merged as it is.
The second patch is just a RFC to open the discussion on how to use the i.MX
GIEn is enabled at startup for RX doorbell mailboxes so
we need to clear the bit at shutdown in order to avoid
leaving the interrupt line enabled.
Signed-off-by: Daniel Baluta
Reviewed-by: Oleksij Rempel
---
Changes since v1:
- no changes since v1 just sent it as a separate patch from
Hi Oleksij,
On Tue, Jun 11, 2019 at 8:56 AM Oleksij Rempel wrote:
>
> Hi Daniel,
>
> On Mon, Jun 10, 2019 at 10:16:09PM +0800, daniel.bal...@nxp.com wrote:
> > From: Daniel Baluta
> >
> > TX doorbell with ACK will allow us to push the doorbell ring button
> &g
3/6 supports up to 2-channels TX (1 dataline) and 2-channels RX (1 dataline).
>
> > Cc: Daniel Baluta
> > Signed-off-by: Andra Danciu
> > ---
> > arch/arm64/boot/dts/freescale/imx8mq.dtsi | 14 ++
> > 1 file changed, 14 insertions(+)
> >
> &g
Looks better now. One comment inline:
On Tue, Jul 2, 2019 at 4:12 PM Andra Danciu wrote:
>
> SAI3 and SAI6 nodes are used to connect to an external codec.
> They have 1 Tx and 1 Rx dataline.
>
> Cc: Daniel Baluta
> Signed-off-by: Andra Danciu
> ---
> Changes since v1
On Tue, Jul 2, 2019 at 4:26 PM Abel Vesa wrote:
>
> On 19-06-26 15:45:15, Daniel Baluta wrote:
> > On Tue, Jun 25, 2019 at 4:42 PM Abel Vesa wrote:
> > >
> > > Add the initial configuration for clocks that need default parent and rate
> > > setting.
i.MX8QXP contains Hifi4 DSP. There are four clocks
associated with DSP:
* dsp_lpcg_core_clk
* dsp_lpcg_ipg_clk
* dsp_lpcg_adb_aclk
* ocram_lpcg_ipg_clk
Signed-off-by: Daniel Baluta
---
drivers/clk/imx/clk-imx8qxp-lpcg.c | 5 +
include/dt-bindings/clock/imx8-clock.h | 6 +-
2
On Tue, Jul 2, 2019 at 4:25 PM Andra Danciu wrote:
>
> SAI3 and SAI6 nodes are used to connect to an external codec.
> They have 1 Tx and 1 Rx dataline.
>
> Cc: Daniel Baluta
> Signed-off-by: Andra Danciu
Reviewed-by: Daniel Baluta
> ---
> Changes since v2:
>
t; consumer API in a clock provider driver.
>
> Signed-off-by: Abel Vesa
Thanks Abel, this helps audio. For audio clk:
Acked-by: Daniel Baluta
> ---
>
> Changes since v1:
> - removed the PCIE, CSI and DISP clocks parent setting since
>that should be done from th
t; consumer API in a clock provider driver.
>
> Signed-off-by: Abel Vesa
For audio related clock:
Acked-by: Daniel Baluta
> ---
>
> Changes since v1:
> - removed the PCIE and CSI clocks parent setting since
>that should be done from their driver, as suggested
>
AI patches that need to be upstream. Me and Andra
will be working on that over this summer.
>
> On 2019-07-02 07:23, Andra Danciu wrote:
> > SAI3 and SAI6 nodes are used to connect to an external codec.
> > They have 1 Tx and 1 Rx dataline.
> >
> > Cc: Daniel Baluta
&g
On Wed, Jul 3, 2019 at 4:12 PM Angus Ainslie wrote:
>
> Hi Daniel,
>
> On 2019-07-03 07:10, Daniel Baluta wrote:
> > On Wed, Jul 3, 2019 at 4:01 PM Angus Ainslie wrote:
> >>
> >> Hi Andra,
> >>
> >> I tried this out on linux-next and I
The Messaging Unit module enables two processors within the SoC to
communicate and coordinate by passing messages through the MU interface.
MUs have 2 “sides” with independent programming interfaces. Rename
mu PD range to mu_a because it's actually side A of MUs.
Signed-off-by: Daniel B
This patch adds power domain range for MU side b and irqsteer in
preparation for adding support for DSP <-> AP IPC communication.
Daniel Baluta (3):
firmware: imx: scu-pid: Rename mu PD range to mu_a
firmware: imx: scu-pd: Add mu_b side PD range
firmware: imx: scu-pd: Add IRQSTR_
LSIO subsystem contains 14 MU instances.
5 MUs to communicate between AP <-> SCU
- side-A PD range managed by AP
- side-B PD range managed by SCU
9 MUs to communicate between AP <-> M4
- side-A PD range managed by AP
- side-B PD range managed by AP
Signed-off-by: D
The DSP interrupt steer gathers interrupts from the system
and can be used to steer them to DSP.
Signed-off-by: Daniel Baluta
---
drivers/firmware/imx/scu-pd.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/firmware/imx/scu-pd.c b/drivers/firmware/imx/scu-pd.c
index 30adc3104347
On Fri, Jun 28, 2019 at 6:36 AM wrote:
>
> From: Anson Huang
>
> Add i.MX SCU SoC's UID(unique identifier) support, user
> can read it from sysfs:
>
> root@imx8qxpmek:~# cat /sys/devices/soc0/soc_uid
> 7B64280B57AC1898
>
> Signed-off-by: Anson Huang
Reviewed-by: Daniel Baluta
On Thu, Jun 27, 2019 at 6:59 PM Rob Herring wrote:
>
> On Thu, Jun 27, 2019 at 1:40 AM Daniel Baluta wrote:
> >
> >
> >
> > > > > > + mboxes:
> > > > > > +description:
> > > > > > + List of phandle of 2 MU
On Thu, Jul 18, 2019 at 9:40 PM Leonard Crestez wrote:
>
> On 18.07.2019 21:24, Daniel Baluta wrote:
> > On Thu, Jul 18, 2019 at 7:41 PM Rob Herring wrote:
> >>
> >> On Thu, Jul 18, 2019 at 9:13 AM Daniel Baluta
> >> wrote:
> >>
On Fri, Jul 19, 2019 at 10:00 AM Marco Felsch wrote:
>
> Hi Daniel,
>
> thanks for your patches :) but it's quite common to bundle the driver
> related and the dt related patches. Can you add the firmware related
> patch to this series in your v2?
Sure. Will do that in v2.
On Fri, Jul 19, 2019 at 2:22 PM Fabio Estevam wrote:
>
> Hi Andra,
>
> On Fri, Jul 19, 2019 at 7:48 AM andradanciu1997
> wrote:
>
> > + pmic: pmic@4b {
> > + reg = <0x4b>;
> > + compatible = "rohm,bd71837";
> > + /* PMIC BD71837 PMIC_nINT GPIO1_IO12
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