On Wed, Sep 11, 2019 at 2:01 PM Mark Brown wrote:
>
> On Thu, Sep 05, 2019 at 06:29:39PM -0700, Nicolin Chen wrote:
> > On Sat, Aug 31, 2019 at 12:59:10AM +0300, Daniel Baluta wrote:
>
> > > This is to allow machine drivers to set a certain bitclk rate
> > >
be set in record
to enable the transmitter which provides bit clock and frame sync.
Cc: NXP Linux Team
Signed-off-by: Daniel Baluta
---
Changes since v1:
* new patch
sound/soc/fsl/fsl_sai.c | 12 +++-
1 file changed, 7 insertions(+), 5 deletions(-)
diff --git a/sound/soc/fsl/fsl_sai.c
From: Shengjiu Wang
When Tx is synchronous with receiver the RMR should not be changed.
When Rx is synchronous with transmitter the TMR should not be changed.
Cc: NXP Linux Team
Signed-off-by: Shengjiu Wang
Signed-off-by: Daniel Baluta
---
Changes since v1:
* new patch
sound/soc/fsl
: Mihai Serban
Signed-off-by: Daniel Baluta
---
Changes since v1:
* rename variable to use_edma as per Nicolin's suggestion.
sound/soc/fsl/fsl_sai.c | 15 +++
sound/soc/fsl/fsl_sai.h | 1 +
2 files changed, 16 insertions(+)
diff --git a/sound/soc/fsl/fsl_sai.c b/sound/soc/fsl/fsl_
This series contains several fixes for SAI. They are unrelated
but grouped them in a patch series to be easier applied.
Daniel Baluta (1):
ASoC: fsl_sai: Fix TCSR.TE/RCSR.RE in synchronous mode
Mihai Serban (1):
ASoC: fsl_sai: Fix noise when using EDMA
Shengjiu Wang (1):
ASoC: fsl_sai
uot;ASoC: SOF: imx8: Fix COMPILE_TEST error")
> Fixes: 202acc565a1f ("ASoC: SOF: imx: Add i.MX8 HW support")
> Signed-off-by: Arnd Bergmann
Acked-by: Daniel Baluta
Indeed we will need to somehow avoid getting sof_imx8_ops from
sof-of-dev.c by directly referencing it.
Will k
Hi Richard,
Can you please rebase and resend this patch series?
On Mon, Aug 5, 2019 at 10:21 PM Daniel Baluta wrote:
>
> On Mon, Aug 5, 2019 at 8:16 AM Richard Zhu wrote:
> >
> > There is a version 1.0 MU on i.MX7ULP platform.
> > One new version ID register is add
asoc_simple_debug_info and asoc_simple_debug_dai must be static
otherwise we might a compilation error if the compiler decides
not to inline the given function.
Fixes: 0580dde59438686d ("ASoC: simple-card-utils: add
asoc_simple_debug_info()")
Signed-off-by: Daniel Baluta
---
inc
include/sound/simple_card_utils.h:168:3: note: in expansion of macro
‘dev_dbg’
dev_dbg(dev, "%s clk %luHz\n", name, clk_get_rate(dai->clk));
Fix this by including the appropriate header.
Fixes: 0580dde59438686d ("ASoC: simple-card-utils: add
asoc_simple_debug_info()
For this to happen we symbol DEBUG to be defined.
Daniel Baluta (2):
ASoC: simple_card_utils.h: Add missing include
ASoC: Fix potential multiple redefinition error
include/sound/simple_card_utils.h | 9 +
1 file changed, 5 insertions(+), 4 deletions(-)
--
2.17.1
For a sound card ignore_machine means that existing FEs links should be
ignored and existing BEs links should be overridden with some information
from the matching component driver.
Current code make some confusions about this so fix it!
Signed-off-by: Daniel Baluta
---
sound/soc/soc-core.c
On Tue, Jul 16, 2019 at 6:58 PM Lucas Stach wrote:
>
> Hi Daniel,
>
> Am Mittwoch, den 03.07.2019, 16:25 +0300 schrieb Daniel Baluta:
> > > On Wed, Jul 3, 2019 at 4:12 PM Angus Ainslie wrote:
> > >
> > > Hi Daniel,
> > >
> > > On 2019-07-0
Aisheng/Jacky,
Can you help with review on this?
On Tue, Jul 2, 2019 at 6:22 PM Daniel Baluta wrote:
>
> i.MX8QXP contains Hifi4 DSP. There are four clocks
> associated with DSP:
> * dsp_lpcg_core_clk
> * dsp_lpcg_ipg_clk
> * dsp_lpcg_adb_aclk
> * ocram_lpcg_ipg_
Aisheng/Shengjiu,
Care to help with review on this?
On Wed, Jul 3, 2019 at 10:06 PM Daniel Baluta wrote:
>
> This patch adds power domain range for MU side b and irqsteer in
> preparation for adding support for DSP <-> AP IPC communication.
>
> Daniel Baluta (3):
>
On Thu, Jul 18, 2019 at 6:30 AM Aisheng Dong wrote:
>
> > From: Daniel Baluta
> > Sent: Thursday, July 4, 2019 3:04 AM
> > Subject: [PATCH 2/3] firmware: imx: scu-pd: Add mu_b side PD range
> >
> > LSIO subsystem contains 14 MU instances.
> >
>
I just made some minor changes and will send the patch right now.
Shawn please skip this.
On Tue, Jul 9, 2019 at 3:02 PM Oleksij Rempel wrote:
>
> On Tue, Jul 09, 2019 at 08:48:20AM +0300, Daniel Baluta wrote:
> > Hi Oleksij,
> >
> > Any comments on this?
>
:
.handle_reply
.handle_request
- the callbacks will be used by the protocol on
notification arrival from DSP.
Signed-off-by: Daniel Baluta
---
Changes since v2:
- remove DSP IPC own DT node as per Rob comments
- make dsp responsability to add MU nodes
ate with SCU and to keep things simple we don't
want that now.
Signed-off-by: Daniel Baluta
---
drivers/firmware/imx/scu-pd.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/firmware/imx/scu-pd.c b/drivers/firmware/imx/scu-pd.c
index 950d30238186..eb9700b66a76 100644
--- a/drivers
only add PD range for mu 13 side B
Daniel Baluta (3):
firmware: imx: scu-pd: Rename mu PD range to mu_a
firmware: imx: scu-pd: Add mu13 b side PD range
firmware: imx: scu-pd: Add IRQSTR_DSP PD range
drivers/firmware/imx/scu-pd.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
--
2.17.1
The Messaging Unit module enables two processors within the SoC to
communicate and coordinate by passing messages through the MU interface.
MUs have 2 “sides” with independent programming interfaces. Rename
mu PD range to mu_a because it's actually side A of MUs.
Signed-off-by: Daniel B
The DSP interrupt steer gathers interrupts from the system
and can be used to steer them to DSP.
Signed-off-by: Daniel Baluta
Reviewed-by: Dong Aisheng
---
drivers/firmware/imx/scu-pd.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/firmware/imx/scu-pd.c b/drivers/firmware/imx/scu
This includes DSP reserved memory, ADMA DSP device and DSP MU
communication channels description.
Signed-off-by: Daniel Baluta
---
arch/arm64/boot/dts/freescale/imx8qxp-mek.dts | 4 +++
arch/arm64/boot/dts/freescale/imx8qxp.dtsi| 32 +++
2 files changed, 36 insertions
b.com/thesofproject/sof
[2] https://github.com/thesofproject/linux/pull/1048/commits
Daniel Baluta (3):
clk: imx8: Add DSP related clocks
arm64: dts: imx8qxp: Add DSP DT node
dt-bindings: dsp: fsl: Add DSP core binding support
.../devicetree/bindings/dsp/fsl,dsp.yaml | 87 +++
This describes the DSP device tree node.
Signed-off-by: Daniel Baluta
---
.../devicetree/bindings/dsp/fsl,dsp.yaml | 87 +++
1 file changed, 87 insertions(+)
create mode 100644 Documentation/devicetree/bindings/dsp/fsl,dsp.yaml
diff --git a/Documentation/devicetree
i.MX8QXP contains Hifi4 DSP. There are four clocks
associated with DSP:
* dsp_lpcg_core_clk
* dsp_lpcg_ipg_clk
* dsp_lpcg_adb_aclk
* ocram_lpcg_ipg_clk
Signed-off-by: Daniel Baluta
Reviewed-by: Dong Aisheng
---
drivers/clk/imx/clk-imx8qxp-lpcg.c | 5 +
include/dt-bindings/clock
On Thu, Jul 18, 2019 at 7:41 PM Rob Herring wrote:
>
> On Thu, Jul 18, 2019 at 9:13 AM Daniel Baluta wrote:
> >
> > This describes the DSP device tree node.
> >
> > Signed-off-by: Daniel Baluta
> > ---
> > .../devicetree/bindings/dsp/fsl,dsp.yaml
On 4/30/20 3:46 PM, Schrempf Frieder wrote:
+ /*
+* On i.MX8MM there is an interrupt getting triggered immediately
+* after requesting the IRQ, which leads to a stall as the handler
+* accesses the GPU registers whithout the clock being enabled.
+* Enabling the
On Wed, 2019-10-23 at 14:34 +0800, Anson Huang wrote:
> Machine compatible string normally is located in board DT, remove
> the duplicated one from SoC dtsi.
>
> Signed-off-by: Anson Huang
Reviewed-by: Daniel Baluta
> ---
> arch/arm64/boot/dts/freescale/imx8mn.dtsi | 1 -
&g
On Wed, 2019-10-23 at 14:34 +0800, Anson Huang wrote:
> Machine compatible string normally is located in board DT, remove
> the duplicated one from SoC dtsi.
>
> Signed-off-by: Anson Huang
Reviewed-by: Daniel Baluta
> ---
> arch/arm64/boot/dts/freescale/imx8mm.dtsi | 1 -
&g
On Sat, Apr 25, 2020 at 11:03 AM ChenTao wrote:
>
> Fix the following warning:
>
> sound/soc/sof/imx/imx8m.c:95:20: warning:
> symbol 'imx8m_dsp_ops' was not declared. Should it be static?
>
> Reported-by: Hulk Robot
> Signed-off-by: ChenTao
Reviewed-by: Dan
On Sat, Oct 12, 2019 at 4:12 AM Richard Zhu wrote:
>
> Hi Daniel:
> New version patch-set had been sent out on Oct9.
> https://patchwork.kernel.org/cover/11180683/
Thanks Richard. Jassi, care to have a look?
Daniel
We need to be able to create DPCM links even if we have a single CPU DAI
or just a dummy CPU DAI.
Daniel Baluta (2):
ASoC: simple-card: Introduce force-dpcm DT property
ASoC: simple-card: Add documentation for force-dpcm property
.../devicetree/bindings/sound/simple-card.txt | 1 +
include
This property can be global in which case all links created will be DPCM
or present in certian dai-link subnode in which case only that specific
link is forced to be DPCM.
Signed-off-by: Daniel Baluta
---
Documentation/devicetree/bindings/sound/simple-card.txt | 1 +
1 file changed, 1 insertion
CPU.
Add force-dpcm DT property to realize this.
Signed-off-by: Daniel Baluta
---
include/sound/simple_card_utils.h | 4
sound/soc/generic/simple-card-utils.c | 17 +
sound/soc/generic/simple-card.c | 25 +++--
3 files changed, 44 insertions(+), 2
d.
One concern is that we could end up in a case where IMX_DSP={y|m} but
IMX_MBOX=n.
Technically this is not possible because IMX_DSP depends on IMX_MBOX. So,
one cannot generate such a .config file from menuconfig interface.
You can add my:
Acked-by: Daniel Baluta
On Mon, Oct 14, 2019 at 2:57 PM Mark Brown wrote:
>
> On Sun, Oct 13, 2019 at 10:00:14PM +0300, Daniel Baluta wrote:
>
> > This property can be global in which case all links created will be DPCM
> > or present in certian dai-link subnode in which case only that specific
>
IMX DSP device is created by SOF layer. The current call to
devm_of_platform_populate is not needed and it doesn't produce
any effects.
Fixes: ffbf23d50353915d ("firmware: imx: Add DSP IPC protocol interface)
Signed-off-by: Daniel Baluta
---
drivers/firmware/imx/imx-dsp.c | 2 +-
1 fi
Hi Stephen,
On Fri, Oct 11, 2019 at 3:04 AM Stephen Rothwell wrote:
>
> Hi all,
>
> After merging the sound-asoc tree, today's linux-next build (x86_64
> allmodconfig) failed like this:
>
> In file included from include/sound/sof/dai-imx.h:11,
> from :
> include/sound/sof/header.
b9fdef6c ("arm64: dts: imx8mm-evk: Enable audio codec
> wm8524")
> Signed-off-by: Shengjiu Wang
Reviewed-by: Daniel Baluta
> ---
> arch/arm64/boot/dts/freescale/imx8mm-evk.dts | 2 ++
> arch/arm64/boot/dts/freescale/imx8mm.dtsi| 8 ++--
> 2 files changed, 8 ins
Hi all,
latest linux-next hangs at boot.
commit fde50b96be821ac9673a7e00847cc4605bd88f34 (HEAD -> master, tag:
next-20190726, origin/master, origin/HEAD)
Author: Stephen Rothwell
Date: Fri Jul 26 15:18:02 2019 +1000
Add linux-next specific files for 20190726
Signed-off-by: Stephen Ro
27;t self-explanatory, because nothing on this line says "bus"
> and it could be that someone reading this code isn't well versed in the
> concepts of ARM world AHB to connect the two.
Agree with Stephen. Commit message should try to give as much details
as possible
also maybe educate the readers who might not have that much knowledge.
Abel, I understand that for someone who works daily with this part of the kernel
this change might look trivial.
Also, without this patch linux-next hangs on imx8mq.
With the explanation added you can add my:
Tested-by: Daniel Baluta
thanks,
Daniel.
On Sat, Jul 27, 2019 at 9:19 AM Anson Huang wrote:
>
> Hi, Daniel
>
> > Subject: Re: [PATCH 5/6] clk: imx8mq: Remove CLK_IS_CRITICAL flag for
> > IMX8MQ_CLK_TMU_ROOT
> >
> > Hi all,
> >
> > latest linux-next hangs at boot.
> >
> > commit fde50b96be821ac9673a7e00847cc4605bd88f34 (HEAD -> master, ta
Making audio_pll1 parent of audio_pll1_bypass, will allow
setting rates multiple of 8000 for children.
After unbypass clk hierarchy looks like this:
* osc_25m
* audio_pll1
* audio_pll1_bypass
* audio_pll1_out
* sai2
* sai2_root_clk
Signed-off-by: Daniel Baluta
adding the initial rate setting for audio_pll1/audio_pll
setting we need to remove it from imx8mq-librem5-devkit.dts
imx8mq-librem5-devkit.dts
Signed-off-by: Abel Vesa
Signed-off-by: Daniel Baluta
---
Changes since v2:
- set rate for audio_pll1/audio_pll2 in the dtsi file and
adding the initial rate setting for audio_pll1/audio_pll
setting we need to remove it from imx8mq-librem5-devkit.dts
Signed-off-by: Abel Vesa
Signed-off-by: Daniel Baluta
Tested-by: Angus Ainslie (Purism)
---
Changes since v3:
- fix extra new lines
.../dts/freescale/imx8mq-librem5
On Wed, Jul 3, 2019 at 4:05 PM Daniel Baluta wrote:
>
> On Wed, Jul 3, 2019 at 3:03 PM Abel Vesa wrote:
> >
> > Add the initial configuration for clocks that need default parent and rate
> > setting. This is based on the vendor tree clock provider parents and rates
>
On Sun, Jul 28, 2019 at 5:53 PM Angus Ainslie wrote:
>
> Hi Daniel,
>
> On 2019-07-28 07:12, Daniel Baluta wrote:
> > From: Abel Vesa
> >
> > Add the initial configuration for clocks that need default parent and
> > rate
> > setting. This is based on
to update each call of regmap_functions.
Daniel Baluta (7):
ASoC: fsl_sai: Add registers definition for multiple datalines
ASoC: fsl_sai: Update Tx/Rx channel enable mask
ASoC: fsl_sai: Add support to enable multiple data lines
ASoC: dt-bindings: Document dl-mask property
ASoC: fsl_sai:
For i.MX7ULP and i.MX8MQ register map is changed. Add two new compatbile
strings to differentiate this.
Signed-off-by: Daniel Baluta
---
Documentation/devicetree/bindings/sound/fsl-sai.txt | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings
SAI module on imx7ulp/imx8m features 2 new registers (VERID and PARAM)
at the beginning of register address space.
On imx7ulp FIFOs can held up to 16 x 32 bit samples.
On imx8mq FIFOs can held up to 128 x 32 bit samples.
Signed-off-by: Daniel Baluta
---
sound/soc/fsl/fsl_sai.c | 14
SAI supports up to 8 data lines. This property let the user
configure how many data lines should be used per transfer
direction (Tx/Rx).
Signed-off-by: Daniel Baluta
---
Documentation/devicetree/bindings/sound/fsl-sai.txt | 7 +++
1 file changed, 7 insertions(+)
diff --git a/Documentation
SAI supports up to 8 Rx/Tx data lines which can be enabled
using TCE/RCE bits of TCR3/RCR3 registers.
Data lines to be enabled are read from DT fsl,dl-mask property.
By default (if no DT entry is provided) only data line 0 is enabled.
Signed-off-by: Daniel Baluta
---
sound/soc/fsl/fsl_sai.c
Tx channel enable (TCE) / Rx channel enable (RCE) bits
enable corresponding data channel for Tx/Rx operation.
Because SAI supports up the 8 channels TCE/RCE occupy
up the 8 bits inside TCR3/RCR3 registers we need to extend
the mask to reflect this.
Signed-off-by: Daniel Baluta
---
sound/soc
nups]
Signed-off-by: Daniel Baluta
[adapted to linux-next]
---
sound/soc/fsl/fsl_sai.c | 230
sound/soc/fsl/fsl_sai.h | 41 +++
2 files changed, 157 insertions(+), 114 deletions(-)
diff --git a/sound/soc/fsl/fsl_sai.c b/sound/soc/fsl/fsl_sai.c
i
, Receive data register
* RFR0..7, Receive FIFO register
Signed-off-by: Daniel Baluta
---
sound/soc/fsl/fsl_sai.c | 76 +++--
sound/soc/fsl/fsl_sai.h | 36 ---
2 files changed, 98 insertions(+), 14 deletions(-)
diff --git a/sound/soc/fsl
On Mon, Jul 29, 2019 at 4:29 AM Anson Huang wrote:
>
> Hi, Abel/Daniel
>
> > On 19-07-27 09:33:10, Daniel Baluta wrote:
> > > On Sat, Jul 27, 2019 at 9:19 AM Anson Huang
> > wrote:
> > > >
> > > > Hi, Daniel
> > > >
> >
> > Your explanation makes a lot of sense. We will take care today of Abel's
> > patch.
> > What do you think about Fabio's patch? I also think this is a valid patch:
> >
>
> Hmm, when did Fabio sent out this patch? I can NOT find it...
> I also have a patch in this series (#4/6) doing same thin
On Mon, Jul 29, 2019 at 10:20 AM Daniel Baluta wrote:
>
>
> > > Your explanation makes a lot of sense. We will take care today of Abel's
> > > patch.
> > > What do you think about Fabio's patch? I also think this is a valid patch:
> > >
>
&
On Mon, Jul 29, 2019 at 10:49 AM Anson Huang wrote:
> > We are all set then. Thanks Anson for clarifications!
>
> Thanks, so we are all clear about this issue, need to wait thermal maintainer
> to review
> the rest patch in this series, but I did NOT receive any response from
> thermal sub-syst
On Mon, Jul 29, 2019 at 11:32 AM Guido Günther wrote:
>
> Hi,
> On Sun, Jul 28, 2019 at 05:12:18PM +0300, Daniel Baluta wrote:
> > From: Abel Vesa
> >
> > Add the initial configuration for clocks that need default parent and rate
> > setting. This is based
On Mon, 2019-07-29 at 16:39 +0800, anson.hu...@nxp.com wrote:
> From: Anson Huang
>
> Some platforms have clock control for TMU, add optional
> clocks property to the binding doc.
>
> Signed-off-by: Anson Huang
Please also pick Rob's Reviewed-by from last revision.
> ---
> No changes.
> ---
>
This is done via RPC call to SCU.
Signed-off-by: Daniel Baluta
---
drivers/firmware/imx/misc.c | 29 +++
include/linux/firmware/imx/svc/misc.h | 3 +++
2 files changed, 32 insertions(+)
diff --git a/drivers/firmware/imx/misc.c b/drivers/firmware/imx/misc.c
This is done via RPC call to SCU.
Signed-off-by: Daniel Baluta
---
Changes since v1:
- remove unused variable ret
- add documentation for imx_sc_pm_cpu_start function
drivers/firmware/imx/misc.c | 38 +++
include/linux/firmware/imx/svc/misc.h
Thanks Aisheng for the comments!
+int imx_sc_pm_cpu_start(struct imx_sc_ipc *ipc, u32 resource,
> > + bool enable, u64 address)
> > +{
> > + struct imx_sc_msg_req_cpu_start msg;
> > + struct imx_sc_rpc_msg *hdr = &msg.hdr;
> > +
> > + hdr->ver = IMX_SC_RPC
This is done via RPC call to SCU.
Signed-off-by: Daniel Baluta
---
Changes since v2: (as per Aisheng's review)
- rename address with phys_address
- remove unnecessary uint8_t cast
- use 'true' as last parameter of imx_scu_call_rpc to actually
wait
On Tue, Jan 15, 2019 at 10:58 PM Rob Herring wrote:
>
> On Tue, Jan 08, 2019 at 01:05:51PM +, Viorel Suman wrote:
> > Add the DT binding documentation for Audio Mixer
> > machine driver.
> >
> > Signed-off-by: Viorel Suman
> > ---
> > .../devicetree/bindings/sound/imx-audmix.txt | 24
MU4_INT correct number is 180, while 179 is for MU3_INT.
Fixes: 3d91ba65fec ("arm64: dts: imx: add imx8qxp support")
Reviewed-by: Fabio Estevam
Reviewed-by: Dong Aisheng
Signed-off-by: Daniel Baluta
---
Changes since v1:
- fix subject prefix 'arm64: dts: imx' -&g
On Wed, 2019-01-16 at 11:12 -0200, Fabio Estevam wrote:
> Hi Daniel,
>
> On Tue, Jan 15, 2019 at 3:05 PM Daniel Baluta
> wrote:
> >
> > MU4_INT correct number is 180, while 179 is for MU3_INT.
> >
> > Signed-off-by: Daniel Baluta
>
> Two nitpicks:
&g
EPROBE_DEFER case likely
> would get missed.
>
> Signed-off-by: Stefan Agner
Reviewed-by: Daniel Baluta
On Thu, Jan 17, 2019 at 11:07 AM Stefan Agner wrote:
>
> Not finding the codec/SSI instance can be due to probe deferral.
> Do not print error messages in those cases.
>
> Signed-off-by: Stefan Agner
Reviewed-by: Daniel Baluta
On Thu, Jan 17, 2019 at 11:07 AM Stefan Agner wrote:
>
> Probe deferral is to be expected during normal operation, so avoid
> printing an error when it is encountered.
>
> Signed-off-by: Stefan Agner
Reviewed-by: Daniel Baluta
On Thu, Jan 17, 2019 at 11:07 AM Stefan Agner wrote:
>
> Probe deferral is to be expected during normal operation, so avoid
> printing an error when it is encountered.
>
> Signed-off-by: Stefan Agner
Reviewed-by: Daniel Baluta
> ---
> sound/soc/fsl/imx-sgtl5000.c | 4 +
On Thu, Jan 17, 2019 at 11:07 AM Stefan Agner wrote:
>
> Make sure to properly put the of node in case finding the codec
> fails.
>
> Fixes: 81e8e4926167 ("ASoC: fsl: add sgtl5000 clock support for imx-sgtl5000")
> Signed-off-by: Stefan Agner
Reviewed-by: Daniel Bal
MU4_INT correct number is 180, while 179 is for MU3_INT.
Signed-off-by: Daniel Baluta
---
arch/arm64/boot/dts/freescale/imx8qxp.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/freescale/imx8qxp.dtsi
b/arch/arm64/boot/dts/freescale/imx8qxp.dtsi
index
impossible to stop CPU DAI.
Signed-off-by: Shengjiu Wang
Signed-off-by: Daniel Baluta
---
sound/soc/fsl/fsl_sai.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/sound/soc/fsl/fsl_sai.c b/sound/soc/fsl/fsl_sai.c
index 4163f2cfc06f..db9e0872f73d 100644
--- a/sound/soc/fsl
On Sun, Jan 20, 2019 at 4:34 AM Angus Ainslie (Purism) wrote:
>
> On the imx8mq I get NULL pointer de-deference errors if the device
> isn't passed in during allocation.
>
> Signed-off-by: Angus Ainslie (Purism)
Hi Angus,
I have already sent a fix for this:
https://patchwork.kernel.org/patch/1
On Sun, Jan 20, 2019 at 4:32 AM Angus Ainslie (Purism) wrote:
>
> On i.mx8 mscale B0 chip, AHB/SDMA clock ratio 2:1 can't be supportted,
> since SDMA clock ratio has to be increased to 250Mhz, AHB can't reach
> to 500Mhz, so use 1:1 instead.
>
> based on NXP commit MLK-16841-1
Hi Angus,
Thanks f
On Sun, Jan 20, 2019 at 4:38 PM Angus Ainslie wrote:
>
> Hi Daniel,
>
> On 2019-01-20 02:58, Daniel Baluta wrote:
> > On Sun, Jan 20, 2019 at 4:32 AM Angus Ainslie (Purism)
> > wrote:
> >>
> >> On i.mx8 mscale B0 chip, AHB/SDMA clock ratio 2:1 can't
Hi Shawn,
Care to have a look?
Daniel.
On Thu, Jan 31, 2019 at 10:16 AM Aisheng Dong wrote:
>
> > -Original Message-
> > From: Daniel Baluta
> > Sent: Wednesday, January 30, 2019 9:30 PM
> > To: shawn...@kernel.org
> > Cc: s.ha...@pengutronix
the codec.
Unless, we can really look into the schematics and prove it otherwise.
On Thu, May 16, 2019 at 10:14 PM Fabio Estevam wrote:
>
> On Wed, May 15, 2019 at 11:42 AM Daniel Baluta wrote:
>
> > + simple-audio-card,codec {
> > +
-off-by: Viorel Suman
Reviewed-by: Daniel Baluta
> ---
> sound/soc/codecs/ak4458.c | 5 -
> 1 file changed, 4 insertions(+), 1 deletion(-)
>
> diff --git a/sound/soc/codecs/ak4458.c b/sound/soc/codecs/ak4458.c
> index eab7c76..baf990a 100644
> --- a/sound/soc/codecs/
g
> Signed-off-by: Viorel Suman
Reviewed-by: Daniel Baluta
> ---
> sound/soc/codecs/ak4458.c | 13 +++--
> 1 file changed, 7 insertions(+), 6 deletions(-)
>
> diff --git a/sound/soc/codecs/ak4458.c b/sound/soc/codecs/ak4458.c
> index baf990a..7156215 100644
&g
> +
> +static u32 imx8qxp_soc_revision(void)
> +{
> + struct imx_sc_msg_misc_get_soc_id msg;
> + struct imx_sc_rpc_msg *hdr = &msg.hdr;
> + u32 rev = 0;
> + int ret;
> +
> + hdr->ver = IMX_SC_RPC_VERSION;
> + hdr->svc = IMX_SC_RPC_SVC_MISC;
> + hdr->func
On Tue, May 14, 2019 at 9:09 AM Anson Huang wrote:
>
> Unnecessary blank lines do NOT help readability, so remove them.
>
> Signed-off-by: Anson Huang
Reviewed-by: Daniel Baluta
On Tue, May 14, 2019 at 2:34 AM Anson Huang wrote:
>
> Hi, Daniel
>
> > -Original Message-
> > From: Daniel Baluta [mailto:daniel.bal...@gmail.com]
> > Sent: Monday, May 13, 2019 10:30 PM
> > To: Anson Huang
> > Cc: catalin.mari...@arm.com; will.
On Thu, 2019-03-28 at 06:38 -0700, Angus Ainslie (Purism) wrote:
> Fix a typo in the compatible string
>
> Signed-off-by: Angus Ainslie (Purism)
Reviwed-by: Daniel Baluta
On Thu, Mar 28, 2019 at 3:41 PM Angus Ainslie (Purism) wrote:
>
> The imx8mq needs to be specified to check the clk ratio.
>
> Signed-off-by: Angus Ainslie (Purism)
> ---
> Documentation/devicetree/bindings/dma/fsl-imx-sdma.txt | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/Documentati
On Fri, Mar 29, 2019 at 11:11 AM Aisheng Dong wrote:
>
> > From: Angus Ainslie (Purism) [mailto:an...@akkea.ca]
> > Sent: Thursday, March 28, 2019 9:38 PM
> >
> > Fix a typo in the compatible string
> >
> > Signed-off-by: Angus Ainslie (Purism)
> > ---
> > arch/arm64/boot/dts/freescale/imx8mq.dt
On Fri, Mar 29, 2019 at 5:22 PM Angus Ainslie (Purism) wrote:
>
> Fix a typo in the compatible string
>
> Signed-off-by: Angus Ainslie (Purism)
Reviewed-by: Daniel Baluta
> ---
> arch/arm64/boot/dts/freescale/imx8mq.dtsi | 2 +-
> 1 file changed, 1 insertion(+), 1 delet
lpuart nodes are part of the ADMA subsystem. See Audio DMA
memory map in iMX8 QXP RM [1]
This patch is based on the dtsi file initially submitted by
Teo Hall in i.MX NXP internal tree.
[1] https://www.nxp.com/docs/en/reference-manual/IMX8DQXPRM.pdf
Signed-off-by: Teo Hall
Signed-off-by: Daniel
This patch series introduces the SAI nodes on i.MX8MM EVK then
creates the wm8524 codec node and finally uses simple card machine
driver to create a sound card.
Daniel Baluta (2):
arm64: dts: imx8mm: Add SAI nodes
arm64: dts: imx8mm-evk: Enable audio codec wm8524
arch/arm64/boot/dts
i.MX8MM has 5 SAI instances with the following base
addresses according to RM.
SAI1 base address: 3001_h
SAI2 base address: 3002_h
SAI3 base address: 3003_h
SAI5 base address: 3005_h
SAI6 base address: 3006_h
Signed-off-by: Bai Ping
Signed-off-by: Daniel Baluta
---
arch
Signed-off-by: Daniel Baluta
---
arch/arm64/boot/dts/freescale/imx8mm-evk.dts | 48
1 file changed, 48 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx8mm-evk.dts
b/arch/arm64/boot/dts/freescale/imx8mm-evk.dts
index 2d5d89475b76..207b13266a96 100644
--- a/arch
.
Signed-off-by: Shengjiu Wang
Signed-off-by: Daniel Baluta
---
arch/arm/boot/dts/imx6sx.dtsi | 6 --
arch/arm/boot/dts/imx6ul.dtsi | 9 ++---
arch/arm/boot/dts/imx7s.dtsi | 9 ++---
3 files changed, 16 insertions(+), 8 deletions(-)
diff --git a/arch/arm/boot/dts/imx6sx.dtsi b/arch
On Mon, Apr 22, 2019 at 5:45 AM Shawn Guo wrote:
>
> On Fri, Apr 19, 2019 at 08:20:39PM +, Daniel Baluta wrote:
> > i.MX8MM has 5 SAI instances with the following base
> > addresses according to RM.
> >
> > SAI1 base address: 3001_h
> > SAI2 base addre
From: Shengjiu Wang
Turn off/on clocks when device enters suspend/resume. This
can help saving power.
As a further optimization, we turn off/on mclk only when SAI
is in master mode because otherwise mclk is externally provided.
Signed-off-by: Shengjiu Wang
Signed-off-by: Daniel Baluta
On Mon, Apr 22, 2019 at 9:51 AM Daniel Baluta wrote:
>
> On Mon, Apr 22, 2019 at 5:45 AM Shawn Guo wrote:
> >
> > On Fri, Apr 19, 2019 at 08:20:39PM +0000, Daniel Baluta wrote:
> > > i.MX8MM has 5 SAI instances with the following base
> > > addresses ac
Basically the same actions as for system PM, so make use
of pm_runtime_force_suspend/pm_runtime_force_resume.
Signed-off-by: Shengjiu Wang
Signed-off-by: Daniel Baluta
---
sound/soc/fsl/fsl_sai.c | 22 +-
1 file changed, 17 insertions(+), 5 deletions(-)
diff --git a/sound
i.MX8MM has 5 SAI instances with the following base
addresses according to RM.
SAI1 base address: 3001_h
SAI2 base address: 3002_h
SAI3 base address: 3003_h
SAI5 base address: 3005_h
SAI6 base address: 3006_h
Signed-off-by: Daniel Baluta
---
arch/arm64/boot/dts/freescale
l,imx6sx-sai" because SAI module on i.MX8M is not
compatbile with SAI modules form i.MX6
Daniel Baluta (2):
arm64: dts: imx8mm: Add SAI nodes
arm64: dts: imx8mm-evk: Enable audio codec wm8524
arch/arm64/boot/dts/freescale/imx8mm-evk.dts | 48 +
arch/arm64/boot/dts
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