The direction field is set on 7 bits, thus we need to AND it with 0111 111 mask
in order to retrieve it, that is 0x7F, not 0xCF as it is now.
Fixes: ade7ef7ba (staging:iio: Differential channel handling)
Signed-off-by: Cristina Ciocan
---
include/linux/iio/events.h | 2 +-
1 file changed, 1
On 05.04.2016 11:48, Mika Westerberg wrote:
> On Mon, Apr 04, 2016 at 04:08:47PM +0200, Linus Walleij wrote:
>> On Fri, Apr 1, 2016 at 1:00 PM, Cristina Ciocan
>> wrote:
>>
>>> This patch updates the gpio chip implementation in order to interact with
>>> t
On 04.04.2016 17:17, Linus Walleij wrote:
> On Fri, Apr 1, 2016 at 1:00 PM, Cristina Ciocan
> wrote:
>
>> Make debounce setting and getting functionality available when
>> configurating a certain pin.
>>
>> Signed-off-by: Cristina Ciocan
>
> Patch ap
On 30.03.2016 14:15, Mika Westerberg wrote:
> On Mon, Mar 28, 2016 at 04:29:35PM +0300, Cristina Ciocan wrote:
>> +/* SCORE pins */
>> +static const struct pinctrl_pin_desc byt_score_pins[] = {
>> +PINCTRL_PIN(0, "SATA_GP[0]"), /* GPIOC_0 */
&g
amily-datasheet.html
Signed-off-by: Cristina Ciocan
---
drivers/pinctrl/intel/pinctrl-baytrail.c | 628 +--
1 file changed, 606 insertions(+), 22 deletions(-)
diff --git a/drivers/pinctrl/intel/pinctrl-baytrail.c
b/drivers/pinctrl/intel/pinctrl-baytrail.c
index 21b79a4..8d
enumerated pin
- apply pin naming conventions used in other Intel drivers
Changes from v1:
- fix reg, reg_val and byt_soc_data not used variables warnings
Cristina Ciocan (6):
pinctrl: baytrail: Add pin control data structures
pinctrl: baytrail: Add pin control operations
pinctrl
Make debounce setting and getting functionality available when
configurating a certain pin.
Signed-off-by: Cristina Ciocan
---
drivers/pinctrl/intel/pinctrl-baytrail.c | 83 +++-
1 file changed, 81 insertions(+), 2 deletions(-)
diff --git a/drivers/pinctrl/intel
This patch updates device's probing, removal and irq handling in order to
register it as pinctrl device. Pin control data is matched by ACPI UID,
since it is passed along as driver data in acpi_device_id structure.
Signed-off-by: Cristina Ciocan
---
drivers/pinctrl/intel/pinctrl-baytr
This patch updates the gpio chip implementation in order to interact with
the pin control model: the chip contains reference to SOC data and
pin/group/community information is retrieved through the SOC reference.
Signed-off-by: Cristina Ciocan
---
drivers/pinctrl/intel/pinctrl-baytrail.c | 97
This patch updates the irq chip implementation in order to interact with
the pin control chip model: the chip contains reference to SOC data and
pin/group/community information is retrieved through the SOC reference.
Signed-off-by: Cristina Ciocan
---
drivers/pinctrl/intel/pinctrl-baytrail.c
configuration:
- pull disable
- pull up/down and pull strength
- debounce
- any other option is treated as not supported.
Signed-off-by: Cristina Ciocan
---
drivers/pinctrl/intel/Kconfig| 3 +
drivers/pinctrl/intel/pinctrl
On 31.03.2016 11:04, Mika Westerberg wrote:
> On Wed, Mar 30, 2016 at 06:05:30PM +0300, Cristina Ciocan wrote:
>> +PINCTRL_PIN(55, "GPIO_S0_SC[055]"),
>> +PINCTRL_PIN(56, "GPIO_S0_SC[056]"),
>> +PINCTRL_PIN(57, "GPIO_S0_SC[0
This patch updates the gpio chip implementation in order to interact with
the pin control model: the chip contains reference to SOC data and
pin/group/community information is retrieved through the SOC reference.
Signed-off-by: Cristina Ciocan
---
drivers/pinctrl/intel/pinctrl-baytrail.c | 97
This patch updates the irq chip implementation in order to interact with
the pin control chip model: the chip contains reference to SOC data and
pin/group/community information is retrieved through the SOC reference.
Signed-off-by: Cristina Ciocan
---
drivers/pinctrl/intel/pinctrl-baytrail.c
configuration:
- pull disable
- pull up/down and pull strength
- debounce
- any other option is treated as not supported.
Signed-off-by: Cristina Ciocan
---
drivers/pinctrl/intel/Kconfig| 3 +
drivers/pinctrl/intel/pinctrl
amily-datasheet.html
Signed-off-by: Cristina Ciocan
---
drivers/pinctrl/intel/pinctrl-baytrail.c | 628 +--
1 file changed, 606 insertions(+), 22 deletions(-)
diff --git a/drivers/pinctrl/intel/pinctrl-baytrail.c
b/drivers/pinctrl/intel/pinctrl-baytrail.c
index 21b79a4..8d
This patch updates device's probing, removal and irq handling in order to
register it as pinctrl device. Pin control data is matched by ACPI UID,
since it is passed along as driver data in acpi_device_id structure.
Signed-off-by: Cristina Ciocan
---
drivers/pinctrl/intel/pinctrl-baytr
Make debounce setting and getting functionality available when
configurating a certain pin.
Signed-off-by: Cristina Ciocan
---
drivers/pinctrl/intel/pinctrl-baytrail.c | 83 +++-
1 file changed, 81 insertions(+), 2 deletions(-)
diff --git a/drivers/pinctrl/intel
This patch updates device's probing, removal and irq handling in order to
register it as pinctrl device. Pin control data is matched by ACPI UID,
since it is passed along as driver data in acpi_device_id structure.
Signed-off-by: Cristina Ciocan
---
drivers/pinctrl/intel/pinctrl-baytr
This patch updates the gpio chip implementation in order to interact with
the pin control model: the chip contains reference to SOC data and
pin/group/community information is retrieved through the SOC reference.
Signed-off-by: Cristina Ciocan
---
drivers/pinctrl/intel/pinctrl-baytrail.c | 97
Make debounce setting and getting functionality available when
configurating a certain pin.
Signed-off-by: Cristina Ciocan
---
drivers/pinctrl/intel/pinctrl-baytrail.c | 83 +++-
1 file changed, 81 insertions(+), 2 deletions(-)
diff --git a/drivers/pinctrl/intel
configuration:
- pull disable
- pull up/down and pull strength
- debounce
- any other option is treated as not supported.
Signed-off-by: Cristina Ciocan
---
drivers/pinctrl/intel/Kconfig| 3 +
drivers/pinctrl/intel/pinctrl
This patch updates the irq chip implementation in order to interact with
the pin control chip model: the chip contains reference to SOC data and
pin/group/community information is retrieved through the SOC reference.
Signed-off-by: Cristina Ciocan
---
drivers/pinctrl/intel/pinctrl-baytrail.c
naming conventions used in other
Intel pinctrl drivers
Changes from v2:
- remove comment for each enumerated pin
- apply pin naming conventions used in other Intel drivers
Changes from v1:
- fix reg, reg_val and byt_soc_data not used variables warnings
Cristina Ciocan
This patch updates device's probing, removal and irq handling in order to
register it as pinctrl device. Pin control data is matched by ACPI UID,
since it is passed along as driver data in acpi_device_id structure.
Signed-off-by: Cristina Ciocan
---
drivers/pinctrl/intel/pinctrl-baytr
amily-datasheet.html
Signed-off-by: Cristina Ciocan
---
drivers/pinctrl/intel/pinctrl-baytrail.c | 628 +--
1 file changed, 606 insertions(+), 22 deletions(-)
diff --git a/drivers/pinctrl/intel/pinctrl-baytrail.c
b/drivers/pinctrl/intel/pinctrl-baytrail.c
index 21b79a4..36
naming conventions used in other
Intel pinctrl drivers
Changes from v2:
- remove comment for each enumerated pin
- apply pin naming conventions used in other Intel drivers
Changes from v1:
- fix reg, reg_val and byt_soc_data not used variables warnings
Cristina Ciocan
On 01.04.2016 13:56, Cristina Ciocan wrote:
> Add support for pin control (pin muxing and pin configuration) for Baytrail
> platform.
>
> It follows the design in pinctrl-intel.c, but could not use the
> implementation in pinctrl-intel since there were significant differences:
>
This patch updates the gpio chip implementation in order to interact with
the pin control model: the chip contains reference to SOC data and
pin/group/community information is retrieved through the SOC reference.
Signed-off-by: Cristina Ciocan
---
drivers/pinctrl/intel/pinctrl-baytrail.c | 97
configuration:
- pull disable
- pull up/down and pull strength
- debounce
- any other option is treated as not supported.
Signed-off-by: Cristina Ciocan
---
drivers/pinctrl/intel/Kconfig| 3 +
drivers/pinctrl/intel/pinctrl
Make debounce setting and getting functionality available when
configurating a certain pin.
Signed-off-by: Cristina Ciocan
---
drivers/pinctrl/intel/pinctrl-baytrail.c | 83 +++-
1 file changed, 81 insertions(+), 2 deletions(-)
diff --git a/drivers/pinctrl/intel
amily-datasheet.html
Signed-off-by: Cristina Ciocan
---
drivers/pinctrl/intel/pinctrl-baytrail.c | 628 +--
1 file changed, 606 insertions(+), 22 deletions(-)
diff --git a/drivers/pinctrl/intel/pinctrl-baytrail.c
b/drivers/pinctrl/intel/pinctrl-baytrail.c
index 21b79a4..36
This patch updates the irq chip implementation in order to interact with
the pin control chip model: the chip contains reference to SOC data and
pin/group/community information is retrieved through the SOC reference.
Signed-off-by: Cristina Ciocan
---
drivers/pinctrl/intel/pinctrl-baytrail.c
Fix plt clock 3, 4 and 5 pins, which were not in the proper order.
Signed-off-by: Cristina Ciocan
---
drivers/pinctrl/intel/pinctrl-baytrail.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/pinctrl/intel/pinctrl-baytrail.c
b/drivers/pinctrl/intel/pinctrl
Make debounce setting and getting functionality available when
configurating a certain pin.
Signed-off-by: Cristina Ciocan
---
drivers/pinctrl/intel/pinctrl-baytrail.c | 83 +++-
1 file changed, 81 insertions(+), 2 deletions(-)
diff --git a/drivers/pinctrl/intel
only need pin base and count as specific data
- irq set type only clears all flags, while the actual type setting
is made in the byt_irq_unmask function, which does not comply with
the intel pinctrl implementation
Cristina Ciocan (6):
pinctrl: baytrail: Add pin control
amily-datasheet.html
Signed-off-by: Cristina Ciocan
---
drivers/pinctrl/intel/pinctrl-baytrail.c | 624 ++-
1 file changed, 604 insertions(+), 20 deletions(-)
diff --git a/drivers/pinctrl/intel/pinctrl-baytrail.c
b/drivers/pinctrl/intel/pinctrl-baytrail.c
index 21b79a4..80
This patch updates device's probing, removal and irq handling in order to
register it as pinctrl device. Pin control data is matched by ACPI UID,
since it is passed along as driver data in acpi_device_id structure.
Signed-off-by: Cristina Ciocan
---
drivers/pinctrl/intel/pinctrl-baytr
This patch updates the irq chip implementation in order to interact with
the pin control chip model: the chip contains reference to SOC data and
pin/group/community information is retrieved through the SOC reference.
Signed-off-by: Cristina Ciocan
---
drivers/pinctrl/intel/pinctrl-baytrail.c
This patch updates the gpio chip implementation in order to interact with
the pin control model: the chip contains reference to SOC data and
pin/group/community information is retrieved through the SOC reference.
Signed-off-by: Cristina Ciocan
---
drivers/pinctrl/intel/pinctrl-baytrail.c | 97
configuration:
- pull disable
- pull up/down and pull strength
- debounce
- any other option is treated as not supported.
Signed-off-by: Cristina Ciocan
---
drivers/pinctrl/intel/Kconfig| 3 +
drivers/pinctrl/intel/pinctrl
This patch updates device's probing, removal and irq handling in order to
register it as pinctrl device. Pin control data is matched by ACPI UID,
since it is passed along as driver data in acpi_device_id structure.
Signed-off-by: Cristina Ciocan
---
drivers/pinctrl/intel/pinctrl-baytr
This patch updates the irq chip implementation in order to interact with
the pin control chip model: the chip contains reference to SOC data and
pin/group/community information is retrieved through the SOC reference.
Signed-off-by: Cristina Ciocan
---
drivers/pinctrl/intel/pinctrl-baytrail.c
Make debounce setting and getting functionality available when
configurating a certain pin.
Signed-off-by: Cristina Ciocan
---
drivers/pinctrl/intel/pinctrl-baytrail.c | 83 +++-
1 file changed, 81 insertions(+), 2 deletions(-)
diff --git a/drivers/pinctrl/intel
not used variables warnings
Cristina Ciocan (6):
pinctrl: baytrail: Add pin control data structures
pinctrl: baytrail: Add pin control operations
pinctrl: baytrail: Update gpio chip operations
pinctrl: baytrail: Update irq chip operations
pinctrl: baytrail: Register pin control handling
This patch updates the gpio chip implementation in order to interact with
the pin control model: the chip contains reference to SOC data and
pin/group/community information is retrieved through the SOC reference.
Signed-off-by: Cristina Ciocan
---
drivers/pinctrl/intel/pinctrl-baytrail.c | 97
configuration:
- pull disable
- pull up/down and pull strength
- debounce
- any other option is treated as not supported.
Signed-off-by: Cristina Ciocan
---
drivers/pinctrl/intel/Kconfig| 3 +
drivers/pinctrl/intel/pinctrl
amily-datasheet.html
Signed-off-by: Cristina Ciocan
---
drivers/pinctrl/intel/pinctrl-baytrail.c | 628 +--
1 file changed, 606 insertions(+), 22 deletions(-)
diff --git a/drivers/pinctrl/intel/pinctrl-baytrail.c
b/drivers/pinctrl/intel/pinctrl-baytrail.c
index 21b79a4..cd
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