On Sat, Aug 01, 2020 at 08:16:06PM +0530, Manivannan Sadhasivam wrote:
> Hi,
>
> On Fri, Jun 26, 2020 at 04:06:41PM +0300, Cristian Ciocaltea wrote:
> > On Fri, Jun 26, 2020 at 12:50:46PM +0530, Manivannan Sadhasivam wrote:
> > >
> > >
> > > On 26 Ju
dback
- Set the pinctrl entry in MAINTAINERS according to Mani's suggestion
- Rebased patches on v5.8
Cristian Ciocaltea (3):
dt-bindings: pinctrl: Add bindings for Actions S500 SoC
pinctrl: actions: Add Actions S500 pinctrl driver
MAINTAINERS: Set pinctrl binding entry for all Action
Add pinctrl and gpio bindings for Actions Semi S500 SoC.
Signed-off-by: Cristian Ciocaltea
---
Changes in v2:
- Added myself to the list of maintainers, per Mani's suggestion
- Added a description item for each of the four register ranges,
per Rob's feedback
- Renamed the pin nod
Update the pinctrl binding entry to match all members of Actions Semi
Owl SoCs.
Signed-off-by: Cristian Ciocaltea
---
Changes in v2:
- Discarded the S500 specific pinctrl binding entry and instead use
a generic rule to match all members of Actions Semi Owl SoCs, per
Mani's sugge
Add pinctrl and gpio driver for Actions Semi S500 SoC.
The driver supports pinctrl, pinmux, pinconf, gpio and interrupt
functions using a set of registers shared between gpio and pinctrl.
Signed-off-by: Cristian Ciocaltea
---
Changes in v2:
- None
drivers/pinctrl/actions/Kconfig
On Sun, Aug 02, 2020 at 08:48:13PM +0530, Manivannan Sadhasivam wrote:
> Hi,
>
> Sorry for the delay. This has fallen through the cracks...
Hi Mani,
No problem, thanks for finding the time to review this.
> On Fri, Jun 26, 2020 at 08:11:48PM +0300, Cristian Ciocaltea wrote:
> &
Hi Marc,
Thanks for your quick and detailed review!
On Mon, Aug 17, 2020 at 02:52:06PM +0100, Marc Zyngier wrote:
> On 2020-08-16 12:33, Cristian Ciocaltea wrote:
> > This controller appears on Actions Semi Owl family SoC's S500, S700 and
> > S900 and provides support for
in v2 (Parthiban Nallathambi):
- Added SIRQ as hierarchical chip
GIC <> SIRQ <> External interrupt controller/Child devices
- Device binding updates with vendor prefix
- Register sharing handled globally and common init sequence/data for all
actions SoC family
Cristian Ciocaltea
Actions Semi Owl SoCs SIRQ interrupt controller is found in S500, S700
and S900 SoCs and provides support for handling up to 3 external
interrupt lines.
Signed-off-by: Cristian Ciocaltea
---
Changes in v5:
- Updated controller description statements both in the commit message
and the binding
Add entries for Actions Semi Owl SIRQ controller binding and driver.
Signed-off-by: Cristian Ciocaltea
---
MAINTAINERS | 2 ++
1 file changed, 2 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index db97d048a92e..e28d8ad47d03 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -1525,6 +1525,7
, various fixes/cleanups/improvements]
Signed-off-by: Cristian Ciocaltea
---
Changes in v5 - according to Marc's review:
* Updated commit message
* Aligned members in struct owl_sirq_chip_data
* Added naming for SIRQ0 control register offset
* Improved code readability by using FIELD_PREP and FIEL
On Tue, Aug 18, 2020 at 09:48:41PM +0100, Marc Zyngier wrote:
> On Tue, 18 Aug 2020 18:42:41 +0100,
> Cristian Ciocaltea wrote:
> >
> > Hi Marc,
> >
> > Thanks for your quick and detailed review!
> >
> > On Mon, Aug 17, 2020 at 02:52:06PM +0100, Mar
On Thu, Dec 10, 2020 at 09:17:43PM -0600, Rob Herring wrote:
> On Sun, 06 Dec 2020 03:27:02 +0200, Cristian Ciocaltea wrote:
> > Add devicetree binding for Actions Semi ATC260x PMICs.
> >
> > Signed-off-by: Cristian Ciocaltea
> > ---
> > Changes in v3 (according
On Mon, Dec 21, 2020 at 08:10:15AM +, Lee Jones wrote:
> On Fri, 18 Dec 2020, Cristian Ciocaltea wrote:
>
> > On Fri, Dec 18, 2020 at 01:21:39PM +, Lee Jones wrote:
> > > On Fri, 18 Dec 2020, Cristian Ciocaltea wrote:
> > >
> > > > Hi Lee,
&
On Mon, Dec 21, 2020 at 01:18:01PM +0100, Linus Walleij wrote:
> On Mon, Dec 21, 2020 at 12:59 PM Cristian Ciocaltea
> wrote:
>
> > enum atc260x_ver {
> > ATC260X_A = 0,
> > ATC260X_B,
> > ATC260X_C,
> > ATC260X_D,
>
On Mon, Dec 07, 2020 at 03:48:31PM -0600, Rob Herring wrote:
> On Wed, Nov 18, 2020 at 05:20:50PM +0200, Cristian Ciocaltea wrote:
> > If DT_SCHEMA_FILES is specified and contains more than one file paths,
>
> If that worked before, it was by chance. :) Yes, it's called '
On Mon, Dec 07, 2020 at 01:30:03PM +, Mark Brown wrote:
> On Sun, Dec 06, 2020 at 03:27:04AM +0200, Cristian Ciocaltea wrote:
>
> > +/*
> > + * ATC2603C notes:
> > + * - LDO8 is not documented in datasheet (v2.4), but supported
> > + * in the vendor's dr
On Mon, Dec 07, 2020 at 04:11:07PM -0600, Rob Herring wrote:
> On Fri, 20 Nov 2020 01:55:58 +0200, Cristian Ciocaltea wrote:
> > Add a new compatible string corresponding to the DMA controller found
> > in the S500 variant of the Actions Semi Owl SoCs family.
> >
> &
On Mon, Dec 07, 2020 at 04:12:14PM -0600, Rob Herring wrote:
> On Fri, 20 Nov 2020 01:56:04 +0200, Cristian Ciocaltea wrote:
> > Convert the Actions Semi Owl I2C DT binding to a YAML schema for
> > enabling DT validation.
> >
> > Additionally, add a new compatible stri
Implement 'poll_put_char' and 'poll_get_char' callbacks in struct
'owl_uart_ops' that enables OWL UART to be used for kernel debugging
over serial line.
Signed-off-by: Cristian Ciocaltea
---
Changes in v3:
- Used 'readl_poll_timeout_atomic()' in
mic transfers in the Owl I2C driver
- Added onkey driver: exposes the power button as an input device
- Added yaml binding doc
- Rebased patchset on kernel v5.9-rc1
Cristian Ciocaltea (6):
dt-bindings: input: Add reset-time-sec common property
dt-bindings: mfd: Add Actions Semi ATC260x PMI
Add a new common property 'reset-time-sec' to be used in conjunction
with the devices supporting the key pressed reset feature.
Signed-off-by: Cristian Ciocaltea
Reviewed-by: Rob Herring
---
Changes in v5:
- None
Changes in v4:
- Added Reviewed-by from Rob
Changes in v3:
- This
Add devicetree binding for Actions Semi ATC260x PMICs.
Signed-off-by: Cristian Ciocaltea
Reviewed-by: Rob Herring
---
Changes in v5:
- None
Changes in v4
- Added Reviewed-by from Rob
- Added support for ATC2603C LDO12 fixed regulator per Mark's suggestion
Changes in v3 (according to
ments SPI interface - TODO)
Co-developed-by: Manivannan Sadhasivam
Signed-off-by: Manivannan Sadhasivam
Signed-off-by: Cristian Ciocaltea
---
Changes in v5:
- None
Changes in v4 - according to Lee's review:
- Replaced 'regmap_add_irq_chip()' with 'devm' counterpart and
Add support for the DC-DC converters and LDO regulators found in
the ATC2603C and ATC2609A chip variants of the Actions Semi ATC260x
family of PMICs.
Co-developed-by: Manivannan Sadhasivam
Signed-off-by: Manivannan Sadhasivam
Signed-off-by: Cristian Ciocaltea
---
Changes in v5:
- None
-off-by: Cristian Ciocaltea
Acked-by: Dmitry Torokhov
---
Changes in v5:
- None
Changes in v4:
- Added Acked-by from Dmitry
Changes in v3:
- Integrated Dmitry's review:
* Dropped the logic around the check for 'pdev->dev.of_node'
* Renamed 'ret' variable i
From: Manivannan Sadhasivam
Add MAINTAINERS entry for ATC260x PMIC.
Signed-off-by: Manivannan Sadhasivam
[cristian: change binding doc file path, add file patterns for onkey and
poweroff drivers, fix ordering, add myself as co-maintainer]
Signed-off-by: Cristian Ciocaltea
This driver provides poweroff and reboot support for a system through
the ATC2603C and ATC2609A chip variants of the Actions Semi ATC260x
family of PMICs.
Signed-off-by: Cristian Ciocaltea
---
Changes in v5:
- Drop unneeded '#include '
Changes in v4:
- None
Changes in v3:
- R
Hi Greg,
Thank you for the review!
On Thu, Jan 07, 2021 at 04:20:55PM +0100, Greg Kroah-Hartman wrote:
> On Tue, Jan 05, 2021 at 07:02:02PM +0200, Cristian Ciocaltea wrote:
> > Implement 'poll_put_char' and 'poll_get_char' callbacks in struct
> > 'owl_ua
On Fri, Jan 08, 2021 at 08:58:38AM +0100, Jiri Slaby wrote:
> On 07. 01. 21, 19:16, Cristian Ciocaltea wrote:
> > Hi Greg,
> >
> > Thank you for the review!
> >
> > On Thu, Jan 07, 2021 at 04:20:55PM +0100, Greg Kroah-Hartman wrote:
> > > On Tue,
On Sat, Jan 09, 2021 at 12:38:13AM -0300, Matheus Castello wrote:
>
>
> Em 12/29/2020 6:17 PM, Cristian Ciocaltea escreveu:
> > Add Clock Management Unit for Actions Semi S500 SoC.
> >
> > Signed-off-by: Cristian Ciocaltea
> > Reviewed-by: Manivannan Sadhasi
tor_desc items
* Added more regulator capabilities
- Added power controller driver
* Provides system poweroff/reboot functionalities
* Depends on atomic transfers in the Owl I2C driver
- Added onkey driver: exposes the power button as an input device
- Added yaml binding doc
- Rebased patchset on kernel
Add support for the DC-DC converters and LDO regulators found in
the ATC2603C and ATC2609A chip variants of the Actions Semi ATC260x
family of PMICs.
Co-developed-by: Manivannan Sadhasivam
Signed-off-by: Manivannan Sadhasivam
Signed-off-by: Cristian Ciocaltea
---
Changes in v4
- Included the
-off-by: Cristian Ciocaltea
Acked-by: Dmitry Torokhov
---
Changes in v4:
- Added Acked-by from Dmitry
Changes in v3:
- Integrated Dmitry's review:
* Dropped the logic around the check for 'pdev->dev.of_node'
* Renamed 'ret' variable in 'atc260x_onkey_probe
ments SPI interface - TODO)
Co-developed-by: Manivannan Sadhasivam
Signed-off-by: Manivannan Sadhasivam
Signed-off-by: Cristian Ciocaltea
---
Changes in v4 - according to Lee's review:
- Replaced 'regmap_add_irq_chip()' with 'devm' counterpart and dropped
'atc260x_d
From: Manivannan Sadhasivam
Add MAINTAINERS entry for ATC260x PMIC.
Signed-off-by: Manivannan Sadhasivam
[cristian: change binding doc file path, add file patterns for onkey and
poweroff drivers, fix ordering, add myself as co-maintainer]
Signed-off-by: Cristian Ciocaltea
This driver provides poweroff and reboot support for a system through
the ATC2603C and ATC2609A chip variants of the Actions Semi ATC260x
family of PMICs.
Signed-off-by: Cristian Ciocaltea
---
Changes in v4:
- None
Changes in v3:
- Removed the unnecessary driver compatibles
drivers/power
Add devicetree binding for Actions Semi ATC260x PMICs.
Signed-off-by: Cristian Ciocaltea
Reviewed-by: Rob Herring
---
Changes in v4
- Added Reviewed-by from Rob
- Added support for ATC2603C LDO12 fixed regulator per Mark's suggestion
Changes in v3 (according to Rob's review):
- D
Add a new common property 'reset-time-sec' to be used in conjunction
with the devices supporting the key pressed reset feature.
Signed-off-by: Cristian Ciocaltea
Reviewed-by: Rob Herring
---
Changes in v4:
- Added Reviewed-by from Rob
Changes in v3:
- This patch was not pre
Add Clock Management Unit for Actions Semi S500 SoC.
Signed-off-by: Cristian Ciocaltea
Reviewed-by: Manivannan Sadhasivam
---
Changes in v3:
- Added Reviewed-by from Mani
arch/arm/boot/dts/owl-s500.dtsi | 14 ++
1 file changed, 14 insertions(+)
diff --git a/arch/arm/boot/dts/owl
TAINERS: Update entry for Actions Semi Owl I2C binding
* i2c: owl: Add compatible for the Actions Semi S500 I2C controller
Changes in v2:
- Added new bindings/compatibles for S500 DMA, MMC & I2C controllers
- Added support for the SIRQ controller
- Added new entries in MAINTAINERS
- Updated n
Add reset controller property and bindings header for the
Actions Semi S500 SoC DTS.
Signed-off-by: Cristian Ciocaltea
Reviewed-by: Manivannan Sadhasivam
---
Changes in v3:
- Added Reviewed-by from Mani
arch/arm/boot/dts/owl-s500.dtsi | 2 ++
1 file changed, 2 insertions(+)
diff --git a
Set Clock Management Unit clocks for the UART nodes of Actions Semi
S500 SoCs and remove the dummy "uart2_clk" and "uart3_clk" fixed clocks.
Signed-off-by: Cristian Ciocaltea
Reviewed-by: Manivannan Sadhasivam
---
Changes in v3:
- Added Reviewed-by from Mani
- Removed
Add a new compatible string corresponding to the DMA controller found
in the S500 variant of the Actions Semi Owl SoCs family. Additionally,
order the entries alphabetically.
Signed-off-by: Cristian Ciocaltea
Reviewed-by: Manivannan Sadhasivam
Reviewed-by: Rob Herring
---
Changes in v3
Add I2C controller nodes for Actions Semi S500 SoC.
Signed-off-by: Cristian Ciocaltea
Reviewed-by: Manivannan Sadhasivam
---
Changes in v3:
- Added Reviewed-by from Mani
arch/arm/boot/dts/owl-s500.dtsi | 40 +
1 file changed, 40 insertions(+)
diff --git a
Add DMA controller node for Actions Semi S500 SoC.
Signed-off-by: Cristian Ciocaltea
Reviewed-by: Manivannan Sadhasivam
---
Changes in v3:
- Added Reviewed-by from Mani
arch/arm/boot/dts/owl-s500.dtsi | 14 ++
1 file changed, 14 insertions(+)
diff --git a/arch/arm/boot/dts/owl
Add pinctrl node for Actions Semi S500 SoC.
Signed-off-by: Cristian Ciocaltea
Reviewed-by: Manivannan Sadhasivam
---
Changes in v3:
- Added Reviewed-by from Mani
arch/arm/boot/dts/owl-s500.dtsi | 20
1 file changed, 20 insertions(+)
diff --git a/arch/arm/boot/dts/owl
Add MMC controller nodes for Actions Semi S500 SoC, in order to
facilitate access to SD/EMMC/SDIO cards.
Signed-off-by: Cristian Ciocaltea
Reviewed-by: Ulf Hansson
Reviewed-by: Manivannan Sadhasivam
---
Changes in v3:
- Added Reviewed-by tags from Ulf and Mani
arch/arm/boot/dts/owl-s500
Add uSD support for RoseapplePi SBC using a fixed regulator as a
temporary solution until PMIC support becomes available.
Signed-off-by: Cristian Ciocaltea
---
Changes in v3:
- None
arch/arm/boot/dts/owl-s500-roseapplepi.dts | 50 ++
1 file changed, 50 insertions(+)
diff
Add the linux-actions mailing list for the Actions Semi architecture.
Signed-off-by: Cristian Ciocaltea
Reviewed-by: Manivannan Sadhasivam
---
Changes in v3:
- Added Reviewed-by from Mani
MAINTAINERS | 1 +
1 file changed, 1 insertion(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index
Add pinctrl definitions for the I2C controllers used in RoseapplePi SBC.
For the moment enable only I2C0, which is used by the ATC2603C PMIC.
Signed-off-by: Cristian Ciocaltea
Reviewed-by: Manivannan Sadhasivam
---
Changes in v3:
- Added Reviewed-by from Mani
arch/arm/boot/dts/owl-s500
Add SIRQ controller node for Actions Semi S500 SoC.
Signed-off-by: Cristian Ciocaltea
Reviewed-by: Manivannan Sadhasivam
---
Changes in v3:
- Added Reviewed-by from Mani
arch/arm/boot/dts/owl-s500.dtsi | 10 ++
1 file changed, 10 insertions(+)
diff --git a/arch/arm/boot/dts/owl-s500
The DMA controller present on the Actions Semi S500 SoC is compatible
with the S900 variant, so add it to the list of devices supported by
the Actions Semi Owl DMA driver. Additionally, order the entries
alphabetically.
Signed-off-by: Cristian Ciocaltea
Reviewed-by: Manivannan Sadhasivam
On Thu, Dec 31, 2020 at 12:57:10PM +0530, Manivannan Sadhasivam wrote:
> On Tue, Dec 29, 2020 at 11:17:26PM +0200, Cristian Ciocaltea wrote:
> > Add uSD support for RoseapplePi SBC using a fixed regulator as a
> > temporary solution until PMIC support becomes available.
> &g
On Thu, Dec 31, 2020 at 01:24:35PM +0530, Manivannan Sadhasivam wrote:
> On Tue, Dec 29, 2020 at 11:17:15PM +0200, Cristian Ciocaltea wrote:
> > Hi,
> >
> > This patchset brings a series of improvements for the Actions Semi S500
> > SoCs family, by adding support f
On Sat, Dec 05, 2020 at 11:24:14AM +0530, Manivannan Sadhasivam wrote:
> On Mon, Nov 30, 2020 at 01:54:45AM +0100, Andreas Färber wrote:
> > On 29.11.20 20:48, Cristian Ciocaltea wrote:
> > > On Sat, Nov 28, 2020 at 01:13:50PM +0530, Manivannan Sadhasivam wrote:
> > >&
The driver provides information about the Action Semi Owl family of
SoCs (S500, S700 and S900) to user space via sysfs: machine, family,
soc_id, serial_number.
Note the serial number is currently provided only for the S500 SoC
variant.
Signed-off-by: Cristian Ciocaltea
---
drivers/soc/actions
Add an entry for the Actions Semi Owl socinfo binding.
Signed-off-by: Cristian Ciocaltea
---
MAINTAINERS | 1 +
1 file changed, 1 insertion(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 20b8e37ea34c..21d54ddcceb4 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -1533,6 +1533,7 @@ F
SBC.
Thanks,
Cristi
Cristian Ciocaltea (4):
dt-bindings: soc: actions: Add Actions Semi Owl socinfo binding
soc: actions: Add Actions Semi Owl socinfo driver
arm: dts: owl-s500: Add socinfo support
MAINTAINERS: Add entry for Actions Semi Owl socinfo binding
.../bindings/soc/actions/owl
Update soc node compatible property to enable support for the Actions
Semi Owl soc info driver.
Additionally provide memory addresses where the serial number parts are
accessible.
Signed-off-by: Cristian Ciocaltea
---
arch/arm/boot/dts/owl-s500.dtsi | 4 +++-
1 file changed, 3 insertions(+), 1
Add devicetree binding for the Actions Semi Owl SoCs info module.
Signed-off-by: Cristian Ciocaltea
---
.../bindings/soc/actions/owl-socinfo.yaml | 71 +++
1 file changed, 71 insertions(+)
create mode 100644
Documentation/devicetree/bindings/soc/actions/owl-socinfo.yaml
On Fri, Mar 12, 2021 at 11:28:53AM +0200, Cristian Ciocaltea wrote:
> Hi Andreas,
>
> On Fri, Mar 12, 2021 at 09:39:31AM +0100, Andreas Färber wrote:
> > Hi Cristian,
> >
> > On 11.03.21 20:19, Cristian Ciocaltea wrote:
> > > Add machine entry for the S500
On Tue, Mar 23, 2021 at 12:38:10AM +0100, Andrew Lunn wrote:
> > +static void owl_emac_set_multicast(struct net_device *netdev, int count)
> > +{
> > + struct owl_emac_priv *priv = netdev_priv(netdev);
> > + struct netdev_hw_addr *ha;
> > + int index = 0;
> > +
> > + if (count <= 0) {
> > +
table usage of system_serial_{low,high} globals
with a public API to provide external access to SoC serial number
parts (e.g. Owl Ethernet MAC driver will use this to generate a
stable MAC address)
- Rebased patch series on v5.12-rc5
Cristian Ciocaltea (6):
dt-bindings: reserved-memory
Provide access to the reserved memory region where the Actions Semi Owl
S500 SoC serial number can be read from.
Signed-off-by: Cristian Ciocaltea
---
arch/arm/boot/dts/owl-s500.dtsi | 11 +++
1 file changed, 11 insertions(+)
diff --git a/arch/arm/boot/dts/owl-s500.dtsi b/arch/arm/boot
Add devicetree binding for the Actions Semi Owl SoC serial number
reserved-memory range.
Signed-off-by: Cristian Ciocaltea
---
.../actions,owl-soc-serial.yaml | 53 +++
1 file changed, 53 insertions(+)
create mode 100644
Documentation/devicetree/bindings/reserved
The driver provides information about the Action Semi Owl family of
SoCs (S500, S700 and S900) to user space via sysfs: machine, family,
soc_id, serial_number.
Note the serial number is currently provided only for the S500 SoC
variant.
Signed-off-by: Cristian Ciocaltea
---
drivers/soc/actions
Update soc node compatible property to enable support for the Actions
Semi Owl soc info driver.
Signed-off-by: Cristian Ciocaltea
---
arch/arm/boot/dts/owl-s500.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/owl-s500.dtsi b/arch/arm/boot/dts/owl-s500
Add entries for the Actions Semi Owl reserved-memory and socinfo
bindings.
Signed-off-by: Cristian Ciocaltea
---
MAINTAINERS | 2 ++
1 file changed, 2 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index bea5ac8a5e47..48b7f7d097ae 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -1533,6
Add devicetree binding for the Actions Semi Owl socinfo driver.
Signed-off-by: Cristian Ciocaltea
---
.../bindings/soc/actions/owl-socinfo.yaml | 57 +++
1 file changed, 57 insertions(+)
create mode 100644
Documentation/devicetree/bindings/soc/actions/owl-socinfo.yaml
ed devm_add_action_or_reset() before clk_set_rate() in owl_emac_probe()
* Other
- Added SMII interface support: updated owl_emac_core_sw_reset(), added
owl_emac_clk_set_rate(), updated description in the YAML binding
- Changed OWL_EMAC_TX_TIMEOUT from 0.05*HZ to 2*HZ
- Rebased patchset on v5.12-rc3
C
Add devicetree binding for the Ethernet MAC present on the Actions
Semi Owl family of SoCs.
For the moment advertise only the support for the Actions Semi S500 SoC
variant.
Signed-off-by: Cristian Ciocaltea
---
.../bindings/net/actions,owl-emac.yaml| 92 +++
1 file
Add new driver for the Ethernet MAC used on the Actions Semi Owl
family of SoCs.
Currently this has been tested only on the Actions Semi S500 SoC
variant.
Signed-off-by: Cristian Ciocaltea
---
drivers/net/ethernet/Kconfig|1 +
drivers/net/ethernet/Makefile |1
Add entries for Actions Semi Owl Ethernet MAC binding and driver.
Signed-off-by: Cristian Ciocaltea
---
MAINTAINERS | 2 ++
1 file changed, 2 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 14d1ef97c339..f9d147e27fb0 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -1530,6 +1530,7 @@ F
Hi Florian,
On Sun, Mar 21, 2021 at 08:30:07PM -0700, Florian Fainelli wrote:
> Hi Christian,
>
> On 3/21/2021 4:29 PM, Cristian Ciocaltea wrote:
> > Add new driver for the Ethernet MAC used on the Actions Semi Owl
> > family of SoCs.
> >
> > Currently this ha
On Mon, Mar 15, 2021 at 02:39:33PM -0700, David Miller wrote:
> From: Cristian Ciocaltea
> Date: Mon, 15 Mar 2021 13:29:17 +0200
>
> > +
> > +#define DEFAULT_MSG_ENABLE (NETIF_MSG_DRV | NETIF_MSG_PROBE |
> > NETIF_MSG_LINK)
> > +static int debug = -1
Hi Mani,
Thanks for reviewing this patch series!
On Tue, Mar 16, 2021 at 09:28:45AM +0530, Manivannan Sadhasivam wrote:
> On Mon, Mar 08, 2021 at 07:18:27PM +0200, Cristian Ciocaltea wrote:
> > Drop the unsupported entries in the factor table used for the SD[0-2]
> > clocks def
On Tue, Mar 16, 2021 at 09:47:39AM +0530, Manivannan Sadhasivam wrote:
> On Mon, Mar 08, 2021 at 07:18:28PM +0200, Cristian Ciocaltea wrote:
> > The following clocks of the Actions Semi Owl S500 SoC have been defined
> > to use a shared clock factor table 'bisp_factor_ta
On Tue, Mar 16, 2021 at 11:15:47AM +0530, Manivannan Sadhasivam wrote:
> On Mon, Mar 08, 2021 at 07:18:29PM +0200, Cristian Ciocaltea wrote:
> > There are a few issues with the setup of the Actions Semi Owl S500 SoC's
> > clock chain involving AHPPREDIV, H and AHB clocks:
On Tue, Mar 16, 2021 at 11:22:40AM +0530, Manivannan Sadhasivam wrote:
> On Mon, Mar 08, 2021 at 07:18:31PM +0200, Cristian Ciocaltea wrote:
> > Add support for the missing NIC and ETHERNET clocks in the Actions Semi
> > Owl S500 SoC clock driver.
> >
> > Additional
On Sat, Mar 27, 2021 at 10:30:06AM -0600, Rob Herring wrote:
> On Fri, Mar 19, 2021 at 08:27:59PM +0200, Cristian Ciocaltea wrote:
> > Add devicetree binding for the Actions Semi Owl SoCs info module.
> >
> > Signed-off-by: Cristian Ciocaltea
> > ---
> &
Hi Mani,
On Thu, Apr 01, 2021 at 10:54:38AM +0530, Manivannan Sadhasivam wrote:
> On Tue, Mar 30, 2021 at 04:48:15PM +0300, Cristian Ciocaltea wrote:
> > This patchset adds a socinfo driver which provides information about
> > Actions Semi Owl SoCs to user space via sysfs: machine,
On Thu, Apr 01, 2021 at 10:59:29AM +0530, Manivannan Sadhasivam wrote:
> On Fri, Mar 12, 2021 at 11:49:27AM +0200, Cristian Ciocaltea wrote:
> > Add device tree node for ATC2603C PMIC and remove the 'fixed-3.1V'
> > dummy regulator used for the uSD supply.
> >
>
On Thu, Apr 01, 2021 at 11:13:00AM +0530, Manivannan Sadhasivam wrote:
> On Fri, Mar 12, 2021 at 11:49:27AM +0200, Cristian Ciocaltea wrote:
> > Add device tree node for ATC2603C PMIC and remove the 'fixed-3.1V'
> > dummy regulator used for the uSD supply.
> >
>
Hi Mani, Andreas,
On Thu, Apr 01, 2021 at 12:49:37PM +0200, Andreas Färber wrote:
> Hi,
>
> On 01.04.21 12:27, Manivannan Sadhasivam wrote:
> > On Thu, Apr 01, 2021 at 12:40:41PM +0300, Cristian Ciocaltea wrote:
> >> On Thu, Apr 01, 2021 at 10:54:38AM +0530, Manivannan Sa
On Thu, Apr 01, 2021 at 04:37:52PM +0530, Manivannan Sadhasivam wrote:
> + Matheus
>
> On Thu, Apr 01, 2021 at 01:58:05PM +0300, Cristian Ciocaltea wrote:
> > Hi Mani, Andreas,
> >
> > On Thu, Apr 01, 2021 at 12:49:37PM +0200, Andreas Färber wrote:
> > >
On Thu, Apr 01, 2021 at 12:07:04PM -0500, Rob Herring wrote:
> On Tue, Mar 30, 2021 at 04:48:16PM +0300, Cristian Ciocaltea wrote:
> > Add devicetree binding for the Actions Semi Owl SoC serial number
> > reserved-memory range.
> >
> > Signed-off-by: Cristian Ciocalte
On Thu, Apr 01, 2021 at 12:08:18PM -0500, Rob Herring wrote:
> On Tue, Mar 30, 2021 at 04:48:17PM +0300, Cristian Ciocaltea wrote:
> > Add devicetree binding for the Actions Semi Owl socinfo driver.
> >
> > Signed-off-by: Cristian Ciocaltea
> > ---
> > .../bind
On Fri, Apr 02, 2021 at 11:34:07PM +0530, Manivannan Sadhasivam wrote:
> On Tue, Mar 30, 2021 at 04:48:17PM +0300, Cristian Ciocaltea wrote:
> > Add devicetree binding for the Actions Semi Owl socinfo driver.
> >
>
> Devicetree binding shouldn't be added for a driv
On Fri, Apr 02, 2021 at 11:46:24PM +0530, Manivannan Sadhasivam wrote:
> On Tue, Mar 30, 2021 at 04:48:18PM +0300, Cristian Ciocaltea wrote:
> > The driver provides information about the Action Semi Owl family of
> > SoCs (S500, S700 and S900) to user space via sysfs: machine, fam
On Fri, Apr 02, 2021 at 11:36:07PM +0530, Manivannan Sadhasivam wrote:
> On Thu, Apr 01, 2021 at 08:40:01PM +0300, Cristian Ciocaltea wrote:
> > On Thu, Apr 01, 2021 at 12:07:04PM -0500, Rob Herring wrote:
> > > On Tue, Mar 30, 2021 at 04:48:16PM +0300, Cristian Ciocaltea
Hi Lee,
I have just noticed your mfd-next tag for 5.12 doesn't include the
support for the ATC260x PMICs.
I assumed the patchset is ready for merging.. Did I miss something?
Thanks,
Cristi
On Tue, Jan 26, 2021 at 11:55:56AM +0200, Cristian Ciocaltea wrote:
> The ATC260x family
On Mon, Feb 22, 2021 at 09:02:47AM +, Lee Jones wrote:
> On Sun, 21 Feb 2021, Cristian Ciocaltea wrote:
>
> > Hi Lee,
> >
> > I have just noticed your mfd-next tag for 5.12 doesn't include the
> > support for the ATC260x PMICs.
> >
> > I as
On Mon, Feb 22, 2021 at 03:30:16PM +, Lee Jones wrote:
> On Mon, 22 Feb 2021, Cristian Ciocaltea wrote:
>
> > On Mon, Feb 22, 2021 at 09:02:47AM +, Lee Jones wrote:
> > > On Sun, 21 Feb 2021, Cristian Ciocaltea wrote:
> > >
> > > > Hi Lee,
>
Therefore, let's change '' content format from
path/to/schema1.yaml path/to/schema2.yaml ... path/to/schemaN.yaml
to
path/to/schema1.yaml
path/to/schema2.yaml
...
path/to/schemaN.yaml
Signed-off-by: Cristian Ciocaltea
---
Documentation/devicetree/bindings/Makefile | 2 +-
rl/actions/pinctrl-s500.o
After:
textdata bss dec hex filename
144353156 0 1759144b7 drivers/pinctrl/actions/pinctrl-s500.o
Signed-off-by: Cristian Ciocaltea
---
drivers/pinctrl/actions/pinctrl-s500.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
di
Hi Rob,
On Wed, Dec 09, 2020 at 09:37:08PM -0600, Rob Herring wrote:
> On Sun, Dec 06, 2020 at 03:27:01AM +0200, Cristian Ciocaltea wrote:
> > Add a new common property 'reset-time-sec' to be used in conjunction
> > with the devices supporting the key pressed reset featur
Hi Mani,
On Thu, Dec 10, 2020 at 09:36:44AM +0530, Manivannan Sadhasivam wrote:
> On Sun, Dec 06, 2020 at 03:27:01AM +0200, Cristian Ciocaltea wrote:
> > Add a new common property 'reset-time-sec' to be used in conjunction
> > with the devices supporting the
Q controller
- Added new entries in MAINTAINERS
- Updated naming of some patches in v1
Cristian Ciocaltea (18):
arm: dts: owl-s500: Add Clock Management Unit
arm: dts: owl-s500: Set CMU clocks for UARTs
arm: dts: owl-s500: Add Reset controller
dt-bindings: dma: owl: Add compatible string
Add Clock Management Unit for Actions Semi S500 SoC.
Signed-off-by: Cristian Ciocaltea
---
arch/arm/boot/dts/owl-s500.dtsi | 14 ++
1 file changed, 14 insertions(+)
diff --git a/arch/arm/boot/dts/owl-s500.dtsi b/arch/arm/boot/dts/owl-s500.dtsi
index 1dbe4e8b38ac..5d5ad9db549b
1 - 100 of 311 matches
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