On Mon, Jun 26, 2017 at 11:21:25AM -0400, Jintack Lim wrote:
> On Wed, Feb 22, 2017 at 6:47 AM, Christoffer Dall wrote:
> > On Mon, Jan 09, 2017 at 01:24:17AM -0500, Jintack Lim wrote:
> >> Forward exceptions due to hvc instruction to the guest hypervisor.
> >>
>
On Mon, Jul 03, 2017 at 11:31:56AM +0200, Andrew Jones wrote:
> On Mon, Jul 03, 2017 at 11:08:50AM +0200, Christoffer Dall wrote:
> > On Mon, Jun 26, 2017 at 11:21:25AM -0400, Jintack Lim wrote:
> > > On Wed, Feb 22, 2017 at 6:47 AM, Christoffer Dall
> > > wrote:
>
On Mon, Jul 03, 2017 at 10:32:45AM +0100, Marc Zyngier wrote:
> On 03/07/17 10:03, Christoffer Dall wrote:
> > On Mon, Jun 26, 2017 at 10:33:23AM -0400, Jintack Lim wrote:
> >> Hi Christoffer,
> >>
> >> On Wed, Feb 22, 2017 at 6:10 AM, Christoffer Dall wrote:
On Mon, Jul 3, 2017 at 4:09 PM, gengdongjiu wrote:
> Hi Christoffer,
> thank you very much for your review.
>
>
> 2017-07-03 15:50 GMT+08:00, Christoffer Dall :
>> Hi Dongjiu,
>>
>> It seems you sent this patch twice, once on its own and then part of a
>>
On Mon, Jul 03, 2017 at 10:44:51AM -0400, Jintack Lim wrote:
> Thanks Christoffer and Marc,
>
> On Mon, Jul 3, 2017 at 5:54 AM, Christoffer Dall wrote:
> > On Mon, Jul 03, 2017 at 10:32:45AM +0100, Marc Zyngier wrote:
> >> On 03/07/17 10:03, Christoffer Dall wrote:
> &
On Tue, Jul 04, 2017 at 01:41:49AM +0200, Andrea Arcangeli wrote:
> Hello,
>
> On Mon, Jul 03, 2017 at 10:48:03AM +0200, Alexander Graf wrote:
> > On 07/03/2017 10:03 AM, Christoffer Dall wrote:
> > > Hi Alex,
> > >
> > > On Fri, Jun 23, 2017 at 05:21:5
Hi Dongjiu,
On Tue, Jul 04, 2017 at 03:04:54PM +0800, gengdongjiu wrote:
> Hi Christoffer,
>
> On 2017/7/3 16:21, Christoffer Dall wrote:
> > On Mon, Jun 26, 2017 at 08:45:43PM +0800, Dongjiu Geng wrote:
> >> Handle userspace's detection for RAS extension, because
Hi Dongjiu,
On Tue, Jul 04, 2017 at 02:30:21PM +0800, gengdongjiu wrote:
> Hi Christoffer,
>
> On 2017/7/3 16:23, Christoffer Dall wrote:
> > On Tue, Jun 27, 2017 at 08:15:49PM +0800, gengdongjiu wrote:
> >> correct the commit message:
> >>
> >> In th
Hi Dongjiu,
On Tue, Jul 04, 2017 at 12:46:23PM +0800, gengdongjiu wrote:
> Hi Christoffer,
> thanks for the review.
>
>
> On 2017/7/3 16:39, Christoffer Dall wrote:
> > Hi Dongjiu,
> >
> > On Mon, Jun 26, 2017 at 08:46:39PM +0800, Dongjiu Geng wrote:
>
On Tue, Jul 25, 2017 at 04:41:52PM +0100, Marc Zyngier wrote:
> On 25/07/17 15:48, Christoffer Dall wrote:
> > On Tue, Jul 25, 2017 at 02:47:55PM +0100, Marc Zyngier wrote:
> >> On 21/07/17 14:03, Christoffer Dall wrote:
> >>> On Fri, Jul 07, 2017 at 09:41:42AM +020
Hi Vasyl,
On Tue, Nov 28, 2017 at 11:48:17PM +0100, Vasyl Gomonovych wrote:
> Fix ptr_ret.cocci warnings:
> virt/kvm/arm/vgic/vgic-its.c:971:1-3: WARNING: PTR_ERR_OR_ZERO can be used
>
> Use PTR_ERR_OR_ZERO rather than if(IS_ERR(...)) + PTR_ERR
>
> Generated by: scripts/coccinelle/api/ptr_ret.co
On Sat, Oct 21, 2017 at 12:13:21PM +0200, Auger Eric wrote:
> Hi Christoffer,
>
> On 18/10/2017 00:34, Christoffer Dall wrote:
> > On Tue, Oct 17, 2017 at 09:10:07AM +0200, Eric Auger wrote:
> >> When the GITS_BASER.Valid gets cleared, the data structures in
> >>
On Sat, Oct 21, 2017 at 11:02:27AM +0200, Auger Eric wrote:
> Hi Christoffer,
>
> On 13/10/2017 15:35, Christoffer Dall wrote:
> > On Wed, Sep 27, 2017 at 03:28:37PM +0200, Eric Auger wrote:
> >> From: wanghaibin
> >>
> >> We create
On Sat, Oct 21, 2017 at 04:40:00PM +0200, Auger Eric wrote:
> Hi Christoffer,
>
> On 17/10/2017 23:40, Christoffer Dall wrote:
> > On Tue, Oct 17, 2017 at 09:09:59AM +0200, Eric Auger wrote:
> >> AT the moment if ITT only contains invalid entries,
> >> vgic_its_
On Sat, Oct 21, 2017 at 04:36:22PM +0200, Auger Eric wrote:
> Hi Christoffer,
>
> On 21/10/2017 16:31, Christoffer Dall wrote:
> > On Sat, Oct 21, 2017 at 12:13:21PM +0200, Auger Eric wrote:
> >> Hi Christoffer,
> >>
> >> On 18/10/2017 00:34, Christoffer
that
> > the number of vcpus is now fixed), and we must have a vITS
> > (otherwise this is all very pointless). So we end-up calling
> > the init from both vgic_init and vgic_its_create.
> >
> > Reviewed-by: Christoffer Dall
> > Signed-off-by: Marc Zyngier
>
latform device
> >> interrupts
> > nit: I would remove "introduced for platform device interrupts"
> > as this is not upstream yet. x86 posted interrupts also use it.
> >
> >>
> > and establish our LPI->VLPI mapping.
I have tweake
for an INV command to be executed there.
> >>
> >> Acked-by: Christoffer Dall
> >> Signed-off-by: Marc Zyngier
> >> ---
> >> virt/kvm/arm/vgic/vgic-its.c | 3 +++
> >> 1 file changed, 3 insertions(+)
> >>
> >> diff --git a/virt
On Tue, Nov 07, 2017 at 10:23:25PM +0100, Auger Eric wrote:
> Hi Marc,
>
> On 27/10/2017 16:28, Marc Zyngier wrote:
> > Since when updating the properties one LPI at a time, there is no
> Since we update the properties one LPI at a time, ... ?
> > need to perform an INV each time we read one. Inst
On Fri, Nov 10, 2017 at 10:05 AM, Marc Zyngier wrote:
> On 10/11/17 08:28, Christoffer Dall wrote:
>> Hi Eric and Marc,
>>
>> On Tue, Nov 07, 2017 at 02:42:44PM +, Marc Zyngier wrote:
>>> Hi Eric,
>>>
>>> On 07/11/17 13:06, Auger Eric wrote:
&
to enable
> the requested profiling operations for the VMs of interest.
>
> Signed-off-by: Punit Agrawal
> Cc: Paolo Bonzini
> Cc: "Radim Krčmář"
> Cc: Christoffer Dall
> Cc: Marc Zyngier
> ---
> include/linux/kvm_host.h | 1 +
> virt/kvm/kvm_main.c
On Mon, Sep 05, 2016 at 05:31:33PM +0100, Punit Agrawal wrote:
> Register a notifier to track state changes of perf trace events.
>
> The notifier will enable taking appropriate action for trace events
> targeting VM.
>
> Signed-off-by: Punit Agrawal
> Cc: Christoffer Dal
_all(), as this has the
> appropriate instruction cache maintenance and barrier.
>
> Signed-off-by: Mark Rutland
> Cc: Marc Zyngier
> [ rename tlbi -> __tlbi, convert additional sites, update commit log ]
> Signed-off-by: Punit Agrawal
Acked-by: Christoffer Dall
On Mon, Sep 05, 2016 at 05:31:34PM +0100, Punit Agrawal wrote:
> From: Mark Rutland
>
> As with dsb() and isb(), add a __tlbi() helper so that we can avoid
> distracting asm boilerplate every time we want a TLBI. As some TLBI
> operations take an argument while others do not, some pre-processor i
ality to handle emulating the TLB instructions.
>
> Signed-off-by: Punit Agrawal
> Cc: Christoffer Dall
> Cc: Marc Zyngier
> ---
> arch/arm64/include/asm/kvm_asm.h | 1 +
> arch/arm64/kvm/hyp/tlb.c | 69 ++
>
ective trapping of guest TLB instructions when the associated
> perf trace event is enabled for a specific virtual machine.
>
> Signed-off-by: Punit Agrawal
> Cc: Christoffer Dall
> Cc: Marc Zyngier
> ---
> arch/arm64/kvm/perf_trace.c | 32 +
On Tue, Sep 06, 2016 at 10:51:27AM +0100, Punit Agrawal wrote:
> Hi Christoffer,
>
> Christoffer Dall writes:
>
> > On Mon, Sep 05, 2016 at 05:31:32PM +0100, Punit Agrawal wrote:
> >> Userspace tools such as perf can be used to profile individual
> >> proces
On Tue, Sep 06, 2016 at 11:05:17AM +0100, Punit Agrawal wrote:
> Christoffer Dall writes:
>
> > On Mon, Sep 05, 2016 at 05:31:34PM +0100, Punit Agrawal wrote:
> >> From: Mark Rutland
> >>
> >> As with dsb() and isb(), add a __tlbi() helper so that we can
On Tue, Sep 06, 2016 at 12:07:59PM +0100, Punit Agrawal wrote:
> Christoffer Dall writes:
>
> > On Tue, Sep 06, 2016 at 10:51:27AM +0100, Punit Agrawal wrote:
> >> Hi Christoffer,
> >>
> >> Christoffer Dall writes:
> >>
> >> > O
On Tue, Sep 06, 2016 at 04:22:17PM +0100, Punit Agrawal wrote:
> Christoffer Dall writes:
>
> > On Tue, Sep 06, 2016 at 12:07:59PM +0100, Punit Agrawal wrote:
> >> Christoffer Dall writes:
> >>
> >> > On Tue, Sep 06, 2016 at 10:51:27AM +0100, P
On Fri, Sep 30, 2016 at 02:24:40PM +0100, Robin Murphy wrote:
> Hi Eric,
>
> On 27/09/16 21:48, Eric Auger wrote:
> > iommu_dma_map_mixed and iommu_dma_unmap_mixed operate on
> > IOMMU_DOMAIN_MIXED typed domains. On top of standard iommu_map/unmap
> > they reserve the IOVA window to prevent the io
Commit-ID: 250a53d6fcd86012935d1cf71eb2e3d6e88c412c
Gitweb: https://git.kernel.org/tip/250a53d6fcd86012935d1cf71eb2e3d6e88c412c
Author: Christoffer Dall
AuthorDate: Fri, 27 Oct 2017 10:34:33 +0200
Committer: Thomas Gleixner
CommitDate: Sun, 29 Oct 2017 16:18:37 +0100
genirq: Document
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