On Thu, Jun 02, 2016 at 01:46:51PM +0800, Yongji Xie wrote:
> When vfio passthrough a PCI device of which MMIO BARs are
> smaller than PAGE_SIZE, guest will not handle the mmio
> accesses to the BARs which leads to mmio emulations in host.
>
> This is because vfio will not allow to passthrough one
[+cc Valentine]
Hi Geert,
Thanks a lot for testing this, and sorry for the breakage.
On Tue, Jun 21, 2016 at 12:41:31PM +0200, Geert Uytterhoeven wrote:
> On Tue, Jun 7, 2016 at 1:07 AM, Bjorn Helgaas wrote:
> > Request host bridge window resources so they appear in ioport_res
On Mon, Jun 20, 2016 at 03:50:07PM -0400, Paul Gortmaker wrote:
> On Mon, May 9, 2016 at 7:49 AM, Niklas Cassel wrote:
> > From: Niklas Cassel
> >
> > The Axis ARTPEC-6 SoC integrates a PCIe controller from Synopsys.
> > This commit adds a new driver that provides the small glue
> > needed to use
On Tue, Jun 21, 2016 at 07:58:08PM +0800, wangyijing wrote:
> Hi Bjorn, use devm_request_resource() for host bridge resource is cool,
> what about do the similar change for x86, now we request host bridge resource
> in pci_acpi_root_add_resources() in x86, and we would release the host bridge
> res
On Mon, Jun 20, 2016 at 06:22:40PM +0100, Lorenzo Pieralisi wrote:
> On Mon, Jun 20, 2016 at 09:56:45AM -0700, Tyler Baker wrote:
> > Hi Bjorn,
> >
> > On 6 June 2016 at 16:06, Bjorn Helgaas wrote:
> > > Previously we allocated the PCI resource list in
> > &
On Tue, Jun 21, 2016 at 06:41:00PM +0300, Valentine Barshak wrote:
> On Tue, Jun 21, 2016 at 09:26:23AM -0500, Bjorn Helgaas wrote:
> > [+cc Valentine]
> >
>
> Hi Bjorn,
>
> > Hi Geert,
> >
> > Thanks a lot for testing this, and sorry for the breaka
ries at [1], where they should
fix a resource conflict [2] in the R-Car driver.
[1]
http://lkml.kernel.org/r/20160606225630.20936.77349.st...@bhelgaas-glaptop2.roam.corp.google.com
[2]
http://lkml.kernel.org/r/camuhmdvglftd-bjrz+gvkgye8dkdzzq6dnytkus+jvpthjs...@mail.gmail.com
---
Bjorn
Drop the unused dummy I/O port region and set struct hw_pci.io_optional so
the ARM PCI code doesn't add a default one for us.
Signed-off-by: Bjorn Helgaas
---
drivers/pci/host/pci-rcar-gen2.c | 11 +--
1 file changed, 1 insertion(+), 10 deletions(-)
diff --git a/drivers/pci/hos
, and we
should not add fictitious spaces for them.
If a caller sets struct hw_pci.io_optional, assume it is responsible for
adding any I/O port resource it desires, and do not add any default I/O
port space.
Signed-off-by: Bjorn Helgaas
---
arch/arm/include/asm/mach/pci.h |1 +
arch/ar
On Fri, Jun 17, 2016 at 01:27:16PM +0200, Johannes Thumshirn wrote:
> On Tue, Jun 07, 2016 at 09:44:02AM +0200, Johannes Thumshirn wrote:
> > Now that we do have pci_request_mem_regions() and pci_release_mem_regions()
> > at
> > hand, use it in the NVMe driver.
> >
> > Suggested-by: Christoph Hel
On Tue, Jun 07, 2016 at 09:44:00AM +0200, Johannes Thumshirn wrote:
> The first patch in this series introduces the following 4 helper functions to
> the PCI core:
>
> * pci_request_mem_regions()
> * pci_request_io_regions()
> * pci_release_mem_regions()
> * pci_release_io_regions()
>
> which enc
t; > > Sent: 22 September 2016 10:50
> > > To: Bjorn Helgaas
> > > Cc: Ard Biesheuvel; Tomasz Nowicki; David Daney; Will Deacon; Catalin
> > > Marinas; Rafael Wysocki; Arnd Bergmann; Hanjun Guo; Sinan Kaya;
> > > Jayachandran C; Christopher Covington; Duc D
On Thu, Sep 22, 2016 at 01:31:01PM -0500, Bjorn Helgaas wrote:
> On Thu, Sep 22, 2016 at 01:44:46PM +0100, Lorenzo Pieralisi wrote:
> > On Thu, Sep 22, 2016 at 11:10:13AM +, Gabriele Paoloni wrote:
> > > Hi Lorenzo, Bjorn
> > >
> > > > -Orig
On Wed, Sep 21, 2016 at 06:40:47PM -0400, Christopher Covington wrote:
> Hi Bjorn,
>
> On 09/21/2016 09:11 AM, Bjorn Helgaas wrote:
> > On Tue, Sep 20, 2016 at 09:15:14PM -0400, c...@codeaurora.org wrote:
>
> >>> diff --git a/drivers/acpi/pci_mcfg.c b/drivers/acpi/
On Tue, Sep 13, 2016 at 09:05:40AM -0600, Keith Busch wrote:
> This patch adds a new function to set PCI domain specific options as
> devices are added. The usage included in this patch is for LED indicator
> control in VMD domains, but may be extended in the future as new domain
> specific options
On Fri, Sep 23, 2016 at 12:57:02PM -0400, Keith Busch wrote:
> On Fri, Sep 23, 2016 at 09:34:41AM -0500, Bjorn Helgaas wrote:
> > I made the necessary changes to match the renaming I did in the first
> > patch, and I also used plain old "#ifdef" instead of "#if IS_
On Fri, Sep 23, 2016 at 02:41:39PM -0400, Christopher Covington wrote:
> On 09/22/2016 07:08 PM, Bjorn Helgaas wrote:
> > On Wed, Sep 21, 2016 at 06:40:47PM -0400, Christopher Covington wrote:
> >> Hi Bjorn,
> >>
> >> On 09/21/2016 09:11 AM, Bjorn Helgaas wrote:
On Thu, Sep 22, 2016 at 10:31:18AM -0700, Brian Norris wrote:
> rk3399 supports PCIe 2.x link speeds marginally at best, and on some
> boards, the link won't train at 5 GT/s at all. Rather than sacrifice 500
> ms waiting for training that will never happen, let's support a device
> tree quirk flag
CodingStyle recommends IS_ENABLED(CONFIG_FOO) over #ifdef. Add an example
of the #ifdef, since it's not completely obvious that in many cases the
#ifdef needs to test both CONFIG_FOO and CONFIG_FOO_MODULE.
Signed-off-by: Bjorn Helgaas
---
Documentation/CodingStyle |
On Wed, Sep 14, 2016 at 07:10:01PM -0700, Long Li wrote:
> From: Long Li
>
> hv_pci_devices_present is called in hv_pci_remove when we remove a PCI device
> from host (e.g. by disabling SRIOV on a device). In hv_pci_remove, the bus is
> already removed before the call, so we don't need to resca
On Tue, Sep 27, 2016 at 09:32:08PM +0200, Paul Bolle wrote:
> On Tue, 2016-09-27 at 14:08 -0500, Bjorn Helgaas wrote:
>
> > --- a/Documentation/CodingStyle
> > +++ b/Documentation/CodingStyle
>
> > +Because the compiler processes the block, you have to use an #ifdef
On Wed, Jul 27, 2016 at 11:44:12PM +0800, Rui Wang wrote:
> IOAPICs present during system boot aren't added to ioapic_list,
> thus are unable to be hot-removed. Fix it by calling
> acpi_ioapic_add() during root bus enumeration.
>
> Signed-off-by: Rui Wang
Acked-by: Bjor
Hi Shawn,
I have some relatively minor comments below.
On Mon, Jul 18, 2016 at 08:42:13AM +0800, Shawn Lin wrote:
> This patch adds Rockchip PCIe controller support found
> on RK3399 Soc platform.
>
> Signed-off-by: Shawn Lin
>
> ---
>
> Changes in v7:
> - make it as a build-in driver
> - imp
On Wed, Jul 27, 2016 at 02:23:24PM -0400, Joseph Salisbury wrote:
> A kernel bug report was opened against Ubuntu [0]. After a kernel
> bisect, it was found that reverting the following commit resolved this bug:
>
> commit 1302fcf0d03e6ea74846c7fee14736306ab2ce4b
> Author: Bjorn
On Thu, Jul 28, 2016 at 05:03:30PM +0200, Thomas Gleixner wrote:
> On Tue, 26 Jul 2016, Thomas Gleixner wrote:
> > On Tue, 26 Jul 2016, Thomas Gleixner wrote:
> > > On Tue, 26 Jul 2016, Thomas Gleixner wrote:
> > > > On Mon, 25 Jul 2016, Bjorn Helgaas wrote:
> >
y: Shawn Lin
>
> Reviewed-by: Brian Norris
> ---
>
> Changes in v8:
> - fix all the comments suggested by Bjorn Helgaas in v7[1]
> [1] https://patchwork.kernel.org/patch/9233887/
> - enable bandwith interrupt for debug
>
> Changes in v7:
> - make it as a build-
On Wed, Jul 06, 2016 at 02:46:04PM +0200, Arnd Bergmann wrote:
> The designware PCIe driver requires MSI support, so we get a warning
> for the artpec6 glue driver if that is not enabled:
>
> warning: (PCIE_ARTPEC6) selects PCIE_DW which has unmet direct dependencies
> (PCI && PCI_MSI_IRQ_DOMAIN)
On Tue, Jun 14, 2016 at 04:24:05PM +0800, Po Liu wrote:
> On some platforms, root port doesn't support MSI/MSI-X/INTx in RC mode.
> When chip support the aer interrupt with none MSI/MSI-X/INTx mode,
> maybe there is interrupt line for aer pme etc. Search the interrupt
> number in the fdt file. Then
On Tue, Aug 23, 2016 at 04:42:41AM +, Dexuan Cui wrote:
>
> 1. use zero-length array to make the code more readable.
> 2. remove an unused struct member.
> 3. small error handling improvement to some error cases.
>
> Dexuan Cui (5):
> PCI: hv: use zero-length message in struct pci_packet
>
rrick recently added so it happens
automatically, without users having to specify the parameter.
I don't *know* of any actual users of either of these, but obviously that
doesn't mean there are none. Comments welcome.
---
Bjorn Helgaas (2):
PCI/AER: Remove aerdriver.nosourceid
.
Enabling Linux AER support when the firmware doesn't want us to is a recipe
for problems, e.g., the firmware might be handling AER itself.
Remove the aerdriver.forceload kernel parameter and related supporting
code.
Signed-off-by: Bjorn Helgaas
---
Documentation/PCI/pcieaer-howto.txt |
other than
debugging, asking users to find and use kernel parameters is a poor user
experience. Instead, we should add PCI_BUS_FLAGS_NO_AERSID quirks for any
hardware that needs it.
Signed-off-by: Bjorn Helgaas
---
Documentation/PCI/pcieaer-howto.txt |4
drivers/pci/pcie/aer/aerdrv_c
Hi Keith,
I like this. I think this fits into pciehp pretty well. Minor
comments below.
On Fri, Aug 26, 2016 at 11:23:01AM -0600, Keith Busch wrote:
> This patch adds a new flag to the pci_dev structure instructing pciehp to
> ignore PCIe slot LED indicators. The pciehp driver will instead prov
is
> > the set of hot-plug events we need to process. No functional change
> > intended.
> >
> > Signed-off-by: Bjorn Helgaas
> > ---
> > drivers/pci/hotplug/pciehp_hpc.c | 46
> > +-
> > 1 file changed, 25 in
Hi Bharat,
On Tue, Aug 30, 2016 at 04:09:16PM +0530, Bharat Kumar Gogada wrote:
> The current driver prints pcie core error, for all core events.
> Instead of just printing PCIe core error, now adding prints to show
> individual core events occurred.
>
> Signed-off-by: Bharat Kumar Gogada
> ---
On Tue, Sep 13, 2016 at 08:41:28AM +0100, Marc Zyngier wrote:
> On 12/09/16 23:02, Bjorn Helgaas wrote:
> > On Thu, Sep 01, 2016 at 05:19:55AM +, Bharat Kumar Gogada wrote:
> >>>>>>> Hi Bharat,
> >>>>>>>> @@ -561,7 +561,7 @@ st
On Tue, Aug 30, 2016 at 04:09:16PM +0530, Bharat Kumar Gogada wrote:
> The current driver prints pcie core error, for all core events.
> Instead of just printing PCIe core error, now adding prints to show
> individual core events occurred.
>
> Signed-off-by: Bharat Kumar Gogada
I applied the fir
[+cc Ley Foon (altera), Thomas (aardvark), Kishon (dra7xx), Murali (keystone)]
On Tue, Sep 13, 2016 at 10:05:11AM -0500, Bjorn Helgaas wrote:
> On Tue, Sep 13, 2016 at 08:41:28AM +0100, Marc Zyngier wrote:
> > On 12/09/16 23:02, Bjorn Helgaas wrote:
> > > On Thu, Sep 01, 2016 a
On Thu, Sep 01, 2016 at 03:44:41PM +0530, Bharat Kumar Gogada wrote:
> When built with MSI support the legacy domain reference is being
> overwritten with MSI.
> Instead creating two separate domains for MSI and legacy interrupts.
>
> Signed-off-by: Bharat Kumar Gogada
Applied all these (except
On Thu, Sep 01, 2016 at 07:00:00PM -0400, Sinan Kaya wrote:
> A secondary bus reset causes settings to be lost by all downstream
> devices on the tree. The code is currently saving and restoring device
> states only when called from the VFIO path via pci_probe_reset_bus
> and pci_reset_bus function
On Tue, Sep 13, 2016 at 06:20:52PM +0200, Lukas Wunner wrote:
> On Mon, Sep 12, 2016 at 04:08:47PM -0500, Bjorn Helgaas wrote:
> > This is mostly Mayurkumar's work from [1] and [2]. I split [2] into two
> > patches and reworked it to keep the enclosing loop around the pcie
On Thu, Sep 01, 2016 at 07:00:01PM -0400, Sinan Kaya wrote:
> The PCIE spec allows an endpoint device to extend the initialization time
> beyond 1 second by issuing Configuration Request Retry Status (CRS) for a
> vendor ID read request.
>
> This basically means "I'm busy now, please call me back
On Tue, Sep 13, 2016 at 05:04:49PM -0400, Sinan Kaya wrote:
> On 9/13/2016 4:01 PM, Bjorn Helgaas wrote:
> > On Thu, Sep 01, 2016 at 07:00:01PM -0400, Sinan Kaya wrote:
> >> The PCIE spec allows an endpoint device to extend the initialization time
> >> beyond 1 seco
On Thu, Sep 01, 2016 at 07:00:00PM -0400, Sinan Kaya wrote:
> A secondary bus reset causes settings to be lost by all downstream
> devices on the tree. The code is currently saving and restoring device
> states only when called from the VFIO path via pci_probe_reset_bus
> and pci_reset_bus function
On Wed, Sep 14, 2016 at 03:32:44PM +, Bharat Kumar Gogada wrote:
> On Thu, Sep 01, 2016 at 03:44:41PM +0530, Bharat Kumar Gogada wrote:
> > When built with MSI support the legacy domain reference is being
> > overwritten with MSI.
> > Instead creating two separate domains for MSI and legacy in
On Wed, Sep 14, 2016 at 11:41:17AM +0300, Mika Westerberg wrote:
> On Mon, Sep 12, 2016 at 04:08:47PM -0500, Bjorn Helgaas wrote:
> > This is mostly Mayurkumar's work from [1] and [2]. I split [2] into two
> > patches and reworked it to keep the enclosing loop around the pcie
c3cf23a587b04fdc526c:
PCI: Fix bridge_d3 update on device removal (2016-09-13 16:00:18 -0500)
PCI updates for v4.8:
Enumeration
Mark Haswell Power Control Unit as having non-compliant BARs (Bjorn Helgaas)
Power management
On Tue, Sep 06, 2016 at 05:19:22PM -0500, Bjorn Helgaas wrote:
> I'd like to remove the aerdriver.nosourceid and aerdriver.forceload kernel
> parameters. They seem like basically debugging things that are not really
> supportable upstream.
>
> "nosourceid" may have
On Fri, Sep 09, 2016 at 09:45:30AM +0200, Niklas Cassel wrote:
> From: Niklas Cassel
>
> artpec6_add_pcie_port is called from artpec6_pcie_probe.
> artpec6_pcie_probe does not have the __init section marker.
> It is wrong to have the marker on artpec6_add_pcie_port
> when the marker is not on art
On Mon, Sep 12, 2016 at 04:08:47PM -0500, Bjorn Helgaas wrote:
> This is mostly Mayurkumar's work from [1] and [2]. I split [2] into two
> patches and reworked it to keep the enclosing loop around the pciehp ISR.
>
> The patches I added are trivial ones to clarify variable
On Mon, Aug 29, 2016 at 02:14:11PM -0700, Brian Norris wrote:
> I'm pretty sure the bitwise 'or' was meant for the value parameter, not
> the register parameter.
>
> This resolves an interrupt storm, where if we receive any client IRQs
> (e.g., correctable errors), we fail to ever clear them prope
e quirk so it's not Broadwell-specific.
Link:
http://www.intel.com/content/www/us/en/processors/xeon/xeon-e5-v3-spec-update.html
Link: https://bugzilla.kernel.org/show_bug.cgi?id=153881
Reported-by: Paul Menzel
Signed-off-by: Bjorn Helgaas
---
arch/x86/pci/fixup.c | 20 +---
On Wed, Aug 31, 2016 at 01:42:13PM -0400, Prarit Bhargava wrote:
> On 08/31/2016 11:50 AM, Bjorn Helgaas wrote:
> > The Haswell Power Control Unit has a non-PCI register (CONFIG_TDP_NOMINAL)
> > where BAR 0 is supposed to be. This is erratum HSE43 in the spec update
>
On Wed, Aug 31, 2016 at 10:50:09AM -0500, Bjorn Helgaas wrote:
> The Haswell Power Control Unit has a non-PCI register (CONFIG_TDP_NOMINAL)
> where BAR 0 is supposed to be. This is erratum HSE43 in the spec update
> referenced below:
>
> The PCIe* Base Specification
On Thu, Sep 01, 2016 at 11:39:41AM +0800, Shawn Lin wrote:
> Hi Guenter,
>
> Thanks for your review, and I think it still not too late
> for nitpicking as it isn't merged to next branch. :)
>
> We have amend the code a bit, so probably we fixed some of
> the minor issues against V10. But some of
Guenter.
---
drivers/pci/host/pcie-rockchip.c | 69 --
1 file changed, 21 insertions(+), 48 deletions(-)
diff --git a/drivers/pci/host/pcie-rockchip.c b/drivers/pci/host/pcie-rockchip.c
index e77aec3..a7006be 100644
--- a/drivers/pci/host/pcie-rockchip.c
+++
rockchip_pcie_write().
---
drivers/pci/host/pcie-rockchip.c | 66 +++---
1 file changed, 33 insertions(+), 33 deletions(-)
diff --git a/drivers/pci/host/pcie-rockchip.c b/drivers/pci/host/pcie-rockchip.c
index a7006be..c9d0799 100644
--- a/drivers/pci/host/pcie-r
I didn't change anything
related to -EPROBE_DEFER because it wasn't obvious to me what to do.
I also made several other changes -- mostly renaming functions and
variables so they're more consistent with other PCI host drivers.
These are in git as pci/host-rockchip-wip.
---
Bjorn Helgaas (9
---
drivers/pci/host/pcie-rockchip.c |5 +
1 file changed, 5 insertions(+)
diff --git a/drivers/pci/host/pcie-rockchip.c b/drivers/pci/host/pcie-rockchip.c
index 17612e5..33bf2e1 100644
--- a/drivers/pci/host/pcie-rockchip.c
+++ b/drivers/pci/host/pcie-rockchip.c
@@ -282,6 +282,11 @@ sta
---
drivers/pci/host/pcie-rockchip.c | 34 +++---
1 file changed, 7 insertions(+), 27 deletions(-)
diff --git a/drivers/pci/host/pcie-rockchip.c b/drivers/pci/host/pcie-rockchip.c
index 61b0630..6623598 100644
--- a/drivers/pci/host/pcie-rockchip.c
+++ b/drivers/pci
---
drivers/pci/host/pcie-rockchip.c | 46 +-
1 file changed, 20 insertions(+), 26 deletions(-)
diff --git a/drivers/pci/host/pcie-rockchip.c b/drivers/pci/host/pcie-rockchip.c
index 7f6fe7d..61b0630 100644
--- a/drivers/pci/host/pcie-rockchip.c
+++ b/driver
---
drivers/pci/host/pcie-rockchip.c | 46 +++---
1 file changed, 23 insertions(+), 23 deletions(-)
diff --git a/drivers/pci/host/pcie-rockchip.c b/drivers/pci/host/pcie-rockchip.c
index 3cfb47a..63fb0ebc 100644
--- a/drivers/pci/host/pcie-rockchip.c
+++ b/drive
---
drivers/pci/host/pcie-rockchip.c | 488 +++---
1 file changed, 244 insertions(+), 244 deletions(-)
diff --git a/drivers/pci/host/pcie-rockchip.c b/drivers/pci/host/pcie-rockchip.c
index c9d0799..3cfb47a 100644
--- a/drivers/pci/host/pcie-rockchip.c
+++ b/driv
---
drivers/pci/host/pcie-rockchip.c | 69 +-
1 file changed, 23 insertions(+), 46 deletions(-)
diff --git a/drivers/pci/host/pcie-rockchip.c b/drivers/pci/host/pcie-rockchip.c
index 33bf2e1..7f6fe7d 100644
--- a/drivers/pci/host/pcie-rockchip.c
+++ b/driver
---
drivers/pci/host/pcie-rockchip.c | 95 --
1 file changed, 50 insertions(+), 45 deletions(-)
diff --git a/drivers/pci/host/pcie-rockchip.c b/drivers/pci/host/pcie-rockchip.c
index 63fb0ebc..17612e5 100644
--- a/drivers/pci/host/pcie-rockchip.c
+++ b/drive
On Thu, Sep 01, 2016 at 09:57:58AM -0700, Brian Norris wrote:
> On Thu, Sep 01, 2016 at 11:34:55AM -0500, Bjorn Helgaas wrote:
> > I can't conveniently build it, so I'm sure I've broken things. I
>
> Indeed, you have :)
>
> > pushed the current work-in-p
On Thu, Sep 01, 2016 at 10:14:01AM -0700, Brian Norris wrote:
> On Thu, Sep 01, 2016 at 11:34:55AM -0500, Bjorn Helgaas wrote:
> > In the interest of making progress, I made most of the changes Guenter
> > suggested (thanks very much, Guenter!) and made some more of my own on
&
On Mon, Aug 08, 2016 at 03:05:37PM +0200, Tomasz Nowicki wrote:
> pci_config_window keeps pointer to pci_ecam_ops and every time
> we want to deallocate pci_config_window (pci_ecam_free()) we need to make
> sure to free pci_ecam_ops in case it was dynamically allocated prior to
> pci_ecam_create()
On Thu, Sep 01, 2016 at 12:48:52PM -0500, Bjorn Helgaas wrote:
> On Thu, Sep 01, 2016 at 10:14:01AM -0700, Brian Norris wrote:
> > The use of HIWORD_UPDATE can indeed be a bit confusing, IMO, but this is
> > really a common Rockchip-ism that, once you read several of their
> >
---
drivers/pci/host/pcie-rockchip.c | 35 +++
1 file changed, 7 insertions(+), 28 deletions(-)
diff --git a/drivers/pci/host/pcie-rockchip.c b/drivers/pci/host/pcie-rockchip.c
index e33d2f7..d293a62 100644
--- a/drivers/pci/host/pcie-rockchip.c
+++ b/drivers/pc
to match similar definitions.
---
drivers/pci/host/pcie-rockchip.c |7 +++
1 file changed, 3 insertions(+), 4 deletions(-)
diff --git a/drivers/pci/host/pcie-rockchip.c b/drivers/pci/host/pcie-rockchip.c
index 88c16da..2a41439 100644
--- a/drivers/pci/host/pcie-rockchip.c
+++ b/drivers/pc
---
drivers/pci/host/pcie-rockchip.c | 70 +-
1 file changed, 24 insertions(+), 46 deletions(-)
diff --git a/drivers/pci/host/pcie-rockchip.c b/drivers/pci/host/pcie-rockchip.c
index c0c3ad5..b204567 100644
--- a/drivers/pci/host/pcie-rockchip.c
+++ b/driver
Instead of this:
#define PCIE_RC_CONFIG_LCS0xd0
read(rockchip, PCIE_RC_CONFIG_BASE + PCIE_RC_CONFIG_LCS);
do this:
#define PCIE_RC_CONFIG_LCS(PCIE_RC_CONFIG_BASE + 0xd0)
read(rockchip, PCIE_RC_CONFIG_LCS);
Mostly trivial, but rockchip_pcie_prog_ob_atu() and
rockc
---
drivers/pci/host/pcie-rockchip.c | 488 +++---
1 file changed, 244 insertions(+), 244 deletions(-)
diff --git a/drivers/pci/host/pcie-rockchip.c b/drivers/pci/host/pcie-rockchip.c
index c9d0799..3cfb47a 100644
--- a/drivers/pci/host/pcie-rockchip.c
+++ b/driv
---
drivers/pci/host/pcie-rockchip.c | 46 +++---
1 file changed, 23 insertions(+), 23 deletions(-)
diff --git a/drivers/pci/host/pcie-rockchip.c b/drivers/pci/host/pcie-rockchip.c
index 3cfb47a..63fb0ebc 100644
--- a/drivers/pci/host/pcie-rockchip.c
+++ b/drive
---
drivers/pci/host/pcie-rockchip.c |5 +
1 file changed, 5 insertions(+)
diff --git a/drivers/pci/host/pcie-rockchip.c b/drivers/pci/host/pcie-rockchip.c
index ea75f35..c0c3ad5 100644
--- a/drivers/pci/host/pcie-rockchip.c
+++ b/drivers/pci/host/pcie-rockchip.c
@@ -282,6 +282,11 @@ sta
. Again, I intend to squash these
all into the single commit that adds the driver when I finally merge it.
---
Bjorn Helgaas (15):
Remove unused symbols, unnecessary parens, other minor comments from
Rename pcie_read() and pcie_write() to rockchip_pcie_read() and
Always use "roc
name for it and similar registers in other blocks.
---
drivers/pci/host/pcie-rockchip.c | 31 +--
1 file changed, 17 insertions(+), 14 deletions(-)
diff --git a/drivers/pci/host/pcie-rockchip.c b/drivers/pci/host/pcie-rockchip.c
index 2a41439..a2610dd 100644
--- a/dr
rockchip_pcie_write().
---
drivers/pci/host/pcie-rockchip.c | 66 +++---
1 file changed, 33 insertions(+), 33 deletions(-)
diff --git a/drivers/pci/host/pcie-rockchip.c b/drivers/pci/host/pcie-rockchip.c
index a7006be..c9d0799 100644
--- a/drivers/pci/host/pcie-r
---
drivers/pci/host/pcie-rockchip.c |4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/pci/host/pcie-rockchip.c b/drivers/pci/host/pcie-rockchip.c
index fe1b52f..88c16da 100644
--- a/drivers/pci/host/pcie-rockchip.c
+++ b/drivers/pci/host/pcie-rockchip.c
@@ -121,7
Guenter.
---
drivers/pci/host/pcie-rockchip.c | 69 --
1 file changed, 21 insertions(+), 48 deletions(-)
diff --git a/drivers/pci/host/pcie-rockchip.c b/drivers/pci/host/pcie-rockchip.c
index e77aec3..a7006be 100644
--- a/drivers/pci/host/pcie-rockchip.c
+++
---
drivers/pci/host/pcie-rockchip.c | 148 +++---
1 file changed, 74 insertions(+), 74 deletions(-)
diff --git a/drivers/pci/host/pcie-rockchip.c b/drivers/pci/host/pcie-rockchip.c
index 6edfce5..fe1b52f 100644
--- a/drivers/pci/host/pcie-rockchip.c
+++ b/driver
---
drivers/pci/host/pcie-rockchip.c | 98 --
1 file changed, 51 insertions(+), 47 deletions(-)
diff --git a/drivers/pci/host/pcie-rockchip.c b/drivers/pci/host/pcie-rockchip.c
index 63fb0ebc..ea75f35 100644
--- a/drivers/pci/host/pcie-rockchip.c
+++ b/drive
PCIE_RC_CONFIG_LCSR was the same as PCIE_RC_CONFIG_LCS. Kept
PCIE_RC_CONFIG_LCS.
PCIE_CORE_LCSR_RETRAIN_LINK was inexplicably named differently and defined
separately.
---
drivers/pci/host/pcie-rockchip.c | 27 +--
1 file changed, 13 insertions(+), 14 deletions(-)
diff
---
drivers/pci/host/pcie-rockchip.c | 36 +++-
1 file changed, 15 insertions(+), 21 deletions(-)
diff --git a/drivers/pci/host/pcie-rockchip.c b/drivers/pci/host/pcie-rockchip.c
index a2610dd..e33d2f7 100644
--- a/drivers/pci/host/pcie-rockchip.c
+++ b/drivers/
above
> > memory aperture, and Mac OS does not use this pci bridge neither, we
> > choose a simple workaround to clear the hotplug flag(suggested by
> > Yinghai Lu), thus do not allocate any resource for this pci bridge,
> > and thereby no conflict anymore.
> >
>
On Fri, Sep 02, 2016 at 02:38:06PM -0700, Guenter Roeck wrote:
> On Fri, Sep 02, 2016 at 10:54:53AM -0500, Bjorn Helgaas wrote:
> > +#define HIWORD_UPDATE(mask, val) ((mask << 16) | val)
> > +
> > +#define ENCODE_LANES(x)(((x >> 1) & 3)
On Fri, Sep 02, 2016 at 02:42:56PM -0700, Guenter Roeck wrote:
> On Fri, Sep 02, 2016 at 10:53:58AM -0500, Bjorn Helgaas wrote:
> > Guenter.
>
> Kind of an odd patch description ;-)
Yeah :) These are just things you commented on initially. I'm going to
squash all these
On Thu, Aug 04, 2016 at 12:01:17PM +0200, Borislav Petkov wrote:
> On Thu, Jul 28, 2016 at 03:30:55PM -0700, York Sun wrote:
> > Two symbols are missing if mpc85xx_edac driver is compiled as module.
> >
> > Signed-off-by: York Sun
> > ---
> > Change log
> > v2: no change
> >
> > arch/powerpc/
On Fri, Aug 05, 2016 at 11:00:39AM -0700, Adit Ranadive wrote:
> The VMXNet3 PCI Id will be shared with our upcoming paravirtual RDMA
> driver. Moved it to the shared location in pci_ids.h and updated the
> driver version.
>
> Suggested-by: Leon Romanovsky
> Signed-off-by: Adit Ranadive
Please
On Fri, Aug 05, 2016 at 12:15:53PM -0600, Daniel Drake wrote:
> Hi Alexander,
>
> Reviving an old topic here...
>
> We are seeing this "problem" on an increasing number of units from the
> vendor, and searching around it can also be seen on Dell and HP
> products. Always with the same Realtek b72
On Fri, Jun 17, 2016 at 07:24:45PM -0700, Yinghai Lu wrote:
> Hi Bjorn,
>
> After 5b28541552ef (PCI: Restrict 64-bit prefetchable bridge windows
> to 64-bit resources), we have several reports on resource allocation
> failure, and we try to fix the problem with resource clip, and find
> more probl
On Sun, Jun 26, 2016 at 11:44:57AM +0800, Rui Wang wrote:
> v5: Remove #ifdef CONFIG_X86 from setup-bus.c, making it neutral to archs.
> v4: Add comments explaining when to call acpi_ioapic_add().
> v3: Previous versions break mips. This version fixes it.
>
> IOAPICs present during system boot are
just
> go with keeping the code runtime functionally equivalent to what it was.
>
> Paul.
>
> [1]
> https://lkml.kernel.org/r/1454889644-27830-1-git-send-email-paul.gortma...@windriver.com
>
> ---
>
> Cc: Bjorn Helgaas
> Cc: Jingoo Han
> Cc: Krzysztof K
On Mon, Jun 13, 2016 at 02:05:26PM -0500, Bjorn Helgaas wrote:
> This is a slightly different proposal for the PTM support Jonathan
> proposed here:
>
>
> http://lkml.kernel.org/r/1462956446-27361-2-git-send-email-jonathan.y...@intel.com
>
> I split this into three piec
> Signed-off-by: Omer Khaliq
Acked-by: Bjorn Helgaas
If you update this patch for any reason, please update the subject
like this:
-PCI: quirk fixup for cavium invalid sriov link value.
+PCI: Fix incorrect Cavium cn8xx SR-IOV Function Dependency Link
This will make "git log --oneline dr
[+cc Ray, Scott, Jon, bcm-kernel-feedback-list]
On Wed, Aug 24, 2016 at 03:07:52PM +0800, Ley Foon Tan wrote:
> On Mon, Aug 22, 2016 at 11:47 PM, Bjorn Helgaas wrote:
> > On Fri, Aug 19, 2016 at 04:24:38PM +0800, Ley Foon Tan wrote:
> >> Altera PCIe IP can be configured as root
[+cc Andreas, linux-kernel]
On Wed, Aug 24, 2016 at 05:40:53PM +0100, Richard van der Hoff wrote:
> I'm having problems with a Plugable USB-C docking station, with my
> laptop, a Dell XPS 13 (9350). If the docking station is plugged in
> at boot, it works correctly; however, when I hotplug it afte
t; To that end, we have remained with the existing initcall levels
> even though some of the hotplug infrastructural ones might make
> better sense to be listed as subsys_initcall or similar.
>
> Build tested with allmodconfig on all the major architectures.
>
> Paul.
> ---
>
On Thu, Aug 25, 2016 at 01:13:27PM +0100, Richard van der Hoff wrote:
> On 24/08/16 21:15, Bjorn Helgaas wrote:
> >[+cc Andreas, linux-kernel]
> >
> >On Wed, Aug 24, 2016 at 05:40:53PM +0100, Richard van der Hoff wrote:
> >>I'm having problems with a Plug
1101 - 1200 of 6735 matches
Mail list logo
