art of the patch set because it depends on generic TEE
which is still under discussion (https://lwn.net/Articles/644646/)
For allocation part of SMAF code I get inspirated by Sumit Semwal work about
constraint aware allocator.
Benjamin Gaignard (3):
create SMAF module
SMAF: add CMA alloca
This module is allow testing secure calls of SMAF.
Signed-off-by: Benjamin Gaignard
---
drivers/smaf/Kconfig | 6 +++
drivers/smaf/Makefile | 1 +
drivers/smaf/smaf-testsecure.c | 90 ++
3 files changed, 97 insertions(+)
create mode
be compatible with ARM 64bits architecture
Signed-off-by: Benjamin Gaignard
---
drivers/smaf/Kconfig| 6 ++
drivers/smaf/Makefile | 1 +
drivers/smaf/smaf-cma.c | 188
3 files changed, 195 insertions(+)
create mode 100644 drivers/smaf
is a few :-)
> Sadly (ideally?) nothing serious, but a bunch minor suggestions, plus
> the odd bug.
>
> On 9 May 2016 at 16:07, Benjamin Gaignard
> wrote:
>
>> --- /dev/null
>> +++ b/drivers/smaf/smaf-core.c
>> @@ -0,0 +1,794 @@
>> +/*
>> + * smaf.c
Hi Emil,
2016-05-17 1:05 GMT+02:00 Emil Velikov :
> Hi Benjamin,
>
> On 9 May 2016 at 16:07, Benjamin Gaignard
> wrote:
>> SMAF CMA allocator implement helpers functions to allow SMAF
>> to allocate contiguous memory.
>>
>> match() each if at le
2016-05-17 1:10 GMT+02:00 Emil Velikov :
> Hi Benjamin,
>
> On 9 May 2016 at 16:07, Benjamin Gaignard
> wrote:
>> This module is allow testing secure calls of SMAF.
>>
> "Add fake secure module" does sound like something not (m)any people
> want to h
n all of bindings/display/. So I've
> dropped them.
>
> Reported-by: Thierry Reding
> Cc: Thierry Reding
> Cc: Jianwei Wang
> Cc: Alison Wang
> Cc: Philipp Zabel
> Cc: Mark Yao
> Cc: Benjamin Gaignard
> Cc: Vincent Abriou
> Cc: Jean-Christophe Plagniol-
.gaignard/optee-sdp.git
This code isn't yet part of the patch set because it depends on generic TEE
which is still under discussion (https://lwn.net/Articles/644646/)
For allocation part of SMAF code I get inspirated by Sumit Semwal work about
constraint aware allocator.
Benjamin Gaignar
From: "benjamin.gaign...@linaro.org"
This module is allow testing secure calls of SMAF.
Signed-off-by: Benjamin Gaignard
---
drivers/smaf/Kconfig | 6 +++
drivers/smaf/Makefile | 1 +
drivers/smaf/smaf-fakesecure.c | 92 +
be compatible with ARM 64bits architecture
Signed-off-by: Benjamin Gaignard
---
drivers/smaf/Kconfig| 6 ++
drivers/smaf/Makefile | 1 +
drivers/smaf/smaf-cma.c | 199
3 files changed, 206 insertions(+)
create mode 100644 drivers/smaf
check if the devices are compatible or not with it allocation
method.
Securing module (smaf-secure.h):
The way of how securing memory it is done is platform specific.
Secure module is responsible of grant/revoke memory access.
Signed-off-by: Benjamin Gaignard
---
drivers/Kconfig
h description
>> from when the symbol was introduced names it O_CLOEXEC).
>
> I *think* wrapping it w/ DRM_CLOEXEC was mostly just for purposes of
> making it clear which flags are appropriate.. probably best to do the
> same w/ a DRM_RDWR I guess
>
> BR,
> -R
>
>
Hello,
Since few months I'm looking for Linaro to how do Secure Data Path (SPD).
I have tried and implemented multiple thinks but I always facing architecture
issues so I would like to get your help to solve the problem.
First what is Secure Data Path ? SDP is a set of hardware features to garant
st another IOMMU feature, just as stuff like IMR is on
> some x86 devices, and hypervisor enforced protection is on assorted
> platforms why do we need a special way to do it ? Is there anything
> actually needed beyond being able to tell the existing DMA code that this
> buffer won'
it.
>
> I'm not sure whether a special iommu is a good idea otoh: I'd expect that
> for most devices the driver would need to decide about which iommu to pick
> (or maybe keep track of some special flags for an extended dma_map
> interface). At least looking at gpu drivers using iommus
I think now I have an answer to my question.
I will back come in a couple of weeks with a generic dmabuf allocator.
The feature set of this should be:
- allow to have per device specificone allocator
- ioctl for buffer allocation and exporting dmabuf file descriptor on /dev/foo
- generic API to b
nt crtc);
> int sti_drm_crtc_vblank_cb(struct notifier_block *nb,
> unsigned long event, void *data);
> -bool sti_drm_crtc_is_main(struct drm_crtc *drm_crtc);
>
> #endif
> --
> 1.7.10.4
>
--
Benjamin Gaignard
Graphic Working Group
Linaro.org │ Open source softw
t;>>>>>> their respective xyz_fbdev.c files.
>>>>>>>>>
>>>>>>>>>
>>>>>>>>> But with the stubbed out functions that should work, right? Why
>>>>>>>>> doesn't
>>>&
in address space.
- IMX Ressource Domain Controller (RDC): supports four domains and up to eight
regions
This version has been rebased on top of v5.1-rc1.
Benjamin
Benjamin Gaignard (7):
devicetree: bindings: Document domains controller bindings
domainsctrl: Introduce domains controller
Document commons domains controller bindings for controller
and client devices.
Signed-off-by: Benjamin Gaignard
---
.../bindings/bus/domains/domainsctrl.txt | 55 ++
1 file changed, 55 insertions(+)
create mode 100644
Documentation/devicetree/bindings/bus
r/domainsctrl_unregister functions.
When a configuration has to be applied the driver callback,
provided in the ops at registration time, set_config is called
by the framework.
Signed-off-by: Benjamin Gaignard
Reviewed-by: Mark Brown
---
drivers/bus/Kconfig | 2 +
drivers/bus/
Describe STM32 Extended TrustZone Protection bindings.
Signed-off-by: Benjamin Gaignard
---
.../devicetree/bindings/bus/domains/st,stm32-etzpc.txt | 14 ++
1 file changed, 14 insertions(+)
create mode 100644
Documentation/devicetree/bindings/bus/domains/st,stm32-etzpc.txt
Declare ETZPC device as a domains controller node for stm32mp157 SoC
Signed-off-by: Benjamin Gaignard
---
arch/arm/boot/dts/stm32mp157c.dtsi | 7 +++
1 file changed, 7 insertions(+)
diff --git a/arch/arm/boot/dts/stm32mp157c.dtsi
b/arch/arm/boot/dts/stm32mp157c.dtsi
index f8bbfff5950b
To avoid modifying all the drivers call domainsctrl_set_default_config
before probe to apply the configuration define in device node (if any).
When unbinding the device try to apply configuration named "unbind".
Signed-off-by: Benjamin Gaignard
Reviewed-by: Mark Brown
---
drivers
Enable ETZPC and set configuration for CEC node
Signed-off-by: Benjamin Gaignard
---
arch/arm/boot/dts/stm32mp157c-ev1.dts | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm/boot/dts/stm32mp157c-ev1.dts
b/arch/arm/boot/dts/stm32mp157c-ev1.dts
index b6aca40b9b90..a69c171e6b69 100644
by the corpocessor.
Each hardware block status is defined by a 2 bits field and all of
them are packed into 32 bits registers. ETZPC can manage up to 94
hardware blocks.
Signed-off-by: Benjamin Gaignard
---
drivers/bus/domains/Kconfig | 7 ++
drivers/bus/domains/Makefile
Le lun. 18 mars 2019 à 11:43, Sudeep Holla a écrit :
>
> On Mon, Mar 18, 2019 at 11:05:58AM +0100, Benjamin Gaignard wrote:
> > Bus domains controllers allow to divided system on chip into multiple
> > domains
> > that can be used to select by who hardware blocks could b
Le ven. 6 sept. 2019 à 11:22, Yannick Fertré a écrit :
>
> The implementation of functions encoder_enable and encoder_disable
> make possible to control the pinctrl according to the encoder type.
> The pinctrl must be activated only if the encoder type is DPI.
> This helps to move the DPI-related
+dri-devel mailing list
Le lun. 2 sept. 2019 à 10:47, Philippe CORNU a écrit :
>
> Hi Yannick,
>
> On 8/2/19 4:47 PM, Yannick Fertré wrote:
> > The implementation of functions encoder_enable and encoder_disable
> > make possible to control the pinctrl according to the encoder type.
> > The pinctr
+ dri-devel mailing list
Le lun. 2 sept. 2019 à 10:45, Philippe CORNU a écrit :
>
> Hi Yannick,
>
> On 8/2/19 4:08 PM, Yannick Fertré wrote:
> > The ltdc pinctrl must be in the display controller node and
> > not in the peripheral node (hdmi bridge).
> >
> > Signed-off-by: Yannick Fertré
> > ---
Le mer. 18 sept. 2019 à 09:53, William Breathitt Gray
a écrit :
>
> The count_read and count_write callbacks are simplified to pass val as
> unsigned long rather than as an opaque data structure. The opaque
> counter_count_read_value and counter_count_write_value structures,
> counter_count_value_
Convert the STM32 cec binding to DT schema format using json-schema
Signed-off-by: Benjamin Gaignard
---
.../devicetree/bindings/media/st,stm32-cec.txt | 19
.../devicetree/bindings/media/st,stm32-cec.yaml| 57 ++
2 files changed, 57 insertions(+), 19
Convert the STM32 dcmi binding to DT schema format using json-schema
Signed-off-by: Benjamin Gaignard
---
.../devicetree/bindings/media/st,stm32-dcmi.txt| 45 --
.../devicetree/bindings/media/st,stm32-dcmi.yaml | 97 ++
2 files changed, 97 insertions(+), 45
Convert the STM32 display binding to DT schema format using json-schema.
Split the original bindings in two yaml files:
- one for display controller (ltdc)
- one for DSI controller
Signed-off-by: Benjamin Gaignard
---
.../devicetree/bindings/display/st,stm32-dsi.yaml | 130
Convert the STM32 hwspinlock binding to DT schema format using json-schema
Signed-off-by: Benjamin Gaignard
---
.../bindings/hwlock/st,stm32-hwspinlock.txt| 23 ---
.../bindings/hwlock/st,stm32-hwspinlock.yaml | 48 ++
2 files changed, 48 insertions
Convert the STM32 thermal binding to DT schema format using json-schema
Signed-off-by: Benjamin Gaignard
---
.../bindings/thermal/st,stm32-thermal.yaml | 74 ++
.../devicetree/bindings/thermal/stm32-thermal.txt | 61 --
2 files changed, 74 insertions
Convert the STM32 timer binding to DT schema format using json-schema
Signed-off-by: Benjamin Gaignard
---
.../devicetree/bindings/timer/st,stm32-timer.txt | 22 ---
.../devicetree/bindings/timer/st,stm32-timer.yaml | 46 ++
2 files changed, 46 insertions(+), 22
Le lun. 16 sept. 2019 à 15:19, Benjamin Gaignard
a écrit :
>
> Le lun. 9 sept. 2019 à 16:41, Benjamin Gaignard
> a écrit :
> >
> > Fix warnings with W=1.
> > Few for_each macro set variables that are never used later.
> > Prevent warning by marking
Le jeu. 3 oct. 2019 à 16:27, Ville Syrjälä
a écrit :
>
> On Mon, Sep 09, 2019 at 03:52:05PM +0200, Benjamin Gaignard wrote:
> > Fix warnings with W=1.
> > Few for_each macro set variables that are never used later.
> > Prevent warning by marking these variables as __mayb
On 10/1/19 10:43 AM, Jonathan Cameron wrote:
> On Mon, 30 Sep 2019 13:44:49 -0700
> Yizhuo wrote:
>
>> Several functions in this file are trying to use regmap_read() to
>> initialize the specific variable, however, if regmap_read() fails,
>> the variable could be uninitialized but used directly,
If the CPU isn't able to go in states where the clock event will
be stopped we can ignore CLOCK_EVT_FEAT_C3STOP flag.
Signed-off-by: Benjamin Gaignard
---
kernel/time/tick-broadcast.c | 6 +++---
kernel/time/tick-common.c| 4 ++--
kernel/time/tick-internal.h | 12
3
On 10/4/19 8:23 AM, Uwe Kleine-König wrote:
> Hello,
>
> On Thu, Oct 03, 2019 at 09:46:49PM -0700, Yizhuo wrote:
>> Inside function stm32_pwm_config(), variable "psc" and " arr"
>> could be uninitialized if regmap_read() returns -EINVALs.
>> However, they are used later in the if statement to deci
+ Hans
On 10/2/19 5:14 PM, Benjamin Gaignard wrote:
> Convert the STM32 cec binding to DT schema format using json-schema
>
> Signed-off-by: Benjamin Gaignard
> ---
> .../devicetree/bindings/media/st,stm32-cec.txt | 19
> .../devicetree/bindings/media/st,stm3
Adding always-on makes arm arch_timer claim to be an high resolution timer.
That is possible because power mode won't stop clocking the timer.
Signed-off-by: Benjamin Gaignard
---
arch/arm/boot/dts/stm32mp157c.dtsi | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/boo
On 9/27/19 1:22 PM, Marc Zyngier wrote:
> On 2019-09-27 09:48, Benjamin Gaignard wrote:
>> Adding always-on makes arm arch_timer claim to be an high resolution
>> timer.
>> That is possible because power mode won't stop clocking the timer.
>
> The "always-on
On 9/27/19 2:41 PM, Marc Zyngier wrote:
> On 2019-09-27 13:36, Benjamin GAIGNARD wrote:
>> On 9/27/19 1:22 PM, Marc Zyngier wrote:
>>> On 2019-09-27 09:48, Benjamin Gaignard wrote:
>>>> Adding always-on makes arm arch_timer claim to be an high resolution
>>>
On 4/30/20 5:50 PM, Valentin Schneider wrote:
> On 30/04/20 16:37, Benjamin GAIGNARD wrote:
>> On 4/30/20 4:33 PM, Valentin Schneider wrote:
>>> On 30/04/20 14:46, Benjamin GAIGNARD wrote:
>>>>> That's not what I meant.
>>>>>
>>>>
On 4/29/20 6:12 PM, Valentin Schneider wrote:
> On 29/04/2020 16:57, Benjamin GAIGNARD wrote:
>>
>> On 4/29/20 5:50 PM, Rafael J. Wysocki wrote:
>>> On Friday, April 24, 2020 1:40:55 PM CEST Benjamin Gaignard wrote:
>>>> When start streaming from the senso
On 4/30/20 11:03 AM, Rafael J. Wysocki wrote:
> On Thu, Apr 30, 2020 at 9:53 AM Benjamin GAIGNARD
> wrote:
>>
>>
>> On 4/29/20 6:12 PM, Valentin Schneider wrote:
>>> On 29/04/2020 16:57, Benjamin GAIGNARD wrote:
>>>> On 4/29/20 5:50 PM, Rafael J. Wys
On 4/30/20 4:33 PM, Valentin Schneider wrote:
> On 30/04/20 14:46, Benjamin GAIGNARD wrote:
>>> That's not what I meant.
>>>
>>> I suppose that the interrupt processing in question takes place in
>>> process context and so you may set the lower clamp
On 4/28/20 1:24 PM, Linus Walleij wrote:
> Hi Benjamin,
>
> On Mon, Apr 20, 2020 at 3:48 PM Benjamin Gaignard
> wrote:
>> Add schemas for firewall consumer and provider.
>>
>> Signed-off-by: Benjamin Gaignard
>> +$id: http://devicetree.org/schemas/bus/stm32
DSI driver doesn't use interrupt, remove it from the node since it
breaks yaml check.
Signed-off-by: Benjamin Gaignard
---
arch/arm/boot/dts/stm32f469.dtsi | 1 -
1 file changed, 1 deletion(-)
diff --git a/arch/arm/boot/dts/stm32f469.dtsi b/arch/arm/boot/dts/stm32f469.dtsi
index 5ae5213
Convert the STM32 hwspinlock binding to DT schema format using json-schema
Signed-off-by: Benjamin Gaignard
---
change in v2:
- use BSD-2-Clause license
- use const for #hwlock-cells
- add additionalProperties: false
.../bindings/hwlock/st,stm32-hwspinlock.txt| 23
Convert the STM32 cec binding to DT schema format using json-schema
Signed-off-by: Benjamin Gaignard
---
changes in v2:
- use BSD-2-Clause license
- add additionalProperties: false
- remove pinctrl-names and pinctrl-[0-9]
.../devicetree/bindings/media/st,stm32-cec.txt | 19
Convert the STM32 dcmi binding to DT schema format using json-schema
Signed-off-by: Benjamin Gaignard
---
changes in v2:
- use BSD-2-Clause license
- remove useless dma descriptions
- fix clock property
- add additionalProperties: false
- fix reset indentation
.../devicetree/bindings/media/st
Convert the STM32 hwspinlock binding to DT schema format using json-schema
Signed-off-by: Benjamin Gaignard
---
change in v3:
- use (GPL-2.0-only OR BSD-2-Clause)
change in v2:
- use BSD-2-Clause license
- use const for #hwlock-cells
- add additionalProperties: false
.../bindings/hwlock/st
Convert the STM32 cec binding to DT schema format using json-schema
Signed-off-by: Benjamin Gaignard
---
changes in v3:
- use (GPL-2.0-only OR BSD-2-Clause) license
changes in v2:
- use BSD-2-Clause license
- add additionalProperties: false
- remove pinctrl-names and pinctrl-[0-9
Convert the STM32 dcmi binding to DT schema format using json-schema
Signed-off-by: Benjamin Gaignard
---
changes in v3:
-use (GPL-2.0-only OR BSD-2-Clause) license
changes in v2:
- use BSD-2-Clause license
- remove useless dma descriptions
- fix clock property
- add additionalProperties: false
Convert the STM32 thermal binding to DT schema format using json-schema
Signed-off-by: Benjamin Gaignard
---
changes in v3:
- use (GPL-2.0-only OR BSD-2-Clause) license
- fix indentation
- add additionalProperties: false
- add #thermal-sensor-cells property
.../bindings/thermal/st,stm32
Convert the STM32 timer binding to DT schema format using json-schema
Signed-off-by: Benjamin Gaignard
---
changes in v3:
- use (GPL-2.0-only OR BSD-2-Clause) license
- fix identation
- add additionalProperties: false
.../devicetree/bindings/timer/st,stm32-timer.txt | 22
On 9/27/19 2:59 PM, Marc Zyngier wrote:
> On 2019-09-27 13:44, Benjamin GAIGNARD wrote:
>> On 9/27/19 2:41 PM, Marc Zyngier wrote:
>>> On 2019-09-27 13:36, Benjamin GAIGNARD wrote:
>>>> On 9/27/19 1:22 PM, Marc Zyngier wrote:
>>>>> On 2019-09-27
On 4/29/20 5:50 PM, Rafael J. Wysocki wrote:
> On Friday, April 24, 2020 1:40:55 PM CEST Benjamin Gaignard wrote:
>> When start streaming from the sensor the CPU load could remain very low
>> because almost all the capture pipeline is done in hardware (i.e. without
>> u
On 10/14/19 2:56 PM, Thomas Gleixner wrote:
> On Wed, 9 Oct 2019, Benjamin Gaignard wrote:
>> @@ -78,7 +78,7 @@ static bool tick_check_broadcast_device(struct
>> clock_event_device *curdev,
>> {
>> if ((newdev->features & CLOCK_EVT_FEAT_DUMMY
On 10/14/19 3:40 PM, Thomas Gleixner wrote:
> On Mon, 14 Oct 2019, Benjamin GAIGNARD wrote:
>> On 10/14/19 2:56 PM, Thomas Gleixner wrote:
>>> On Wed, 9 Oct 2019, Benjamin Gaignard wrote:
>>>> @@ -78,7 +78,7 @@ static bool tick_check_broadcast_device(struct
&
On 10/14/19 4:28 PM, Thomas Gleixner wrote:
> On Mon, 14 Oct 2019, Benjamin GAIGNARD wrote:
>> On 10/14/19 3:40 PM, Thomas Gleixner wrote:
>>> I don't understand what you are trying to achieve here. If the tick device,
>>> i.e. the comparator stops working in deep
any broadcast-capable HW clock
event device present will be chosen in preference as the tick broadcast
device.
Signed-off-by: Benjamin Gaignard
---
Note:
- The same reasons lead to same patch than for arm64 so I have copy the
commit message from: 9358d755bd5c ("arm64: kernel: initi
Remove dma-ranges from ltdc node since it is already set
on bus node.
Signed-off-by: Benjamin Gaignard
---
arch/arm/boot/dts/stm32429i-eval.dts | 1 -
1 file changed, 1 deletion(-)
diff --git a/arch/arm/boot/dts/stm32429i-eval.dts
b/arch/arm/boot/dts/stm32429i-eval.dts
index ba08624c6237
Remove dma-ranges from ltdc node since it is already set
on bus node.
Signed-off-by: Benjamin Gaignard
---
arch/arm/boot/dts/stm32f469-disco.dts | 1 -
1 file changed, 1 deletion(-)
diff --git a/arch/arm/boot/dts/stm32f469-disco.dts
b/arch/arm/boot/dts/stm32f469-disco.dts
index a3ff04940aec
eclared. Should it be static?
Reviewed-by: Benjamin Gaignard
Thanks,
Benjamin
>
> Signed-off-by: Ben Dooks
> ---
> Cc: Zhang Rui
> Cc: Daniel Lezcano
> Cc: Amit Kucheria
> Cc: Maxime Coquelin
> Cc: Alexandre Torgue
> Cc: linux...@vger.kernel.org
> Cc: li
Convert the STM32 watchdog binding to DT schema format using json-schema
Signed-off-by: Benjamin Gaignard
---
.../devicetree/bindings/watchdog/st,stm32-iwdg.txt | 26 ---
.../bindings/watchdog/st,stm32-iwdg.yaml | 54 ++
2 files changed, 54 insertions
On 10/17/19 3:06 PM, Alexandre Torgue wrote:
> Hi Benjamin
>
> On 10/17/19 2:41 PM, Benjamin Gaignard wrote:
>> Convert the STM32 watchdog binding to DT schema format using json-schema
>>
>> Signed-off-by: Benjamin Gaignard
>> ---
>> .../devicetree/b
version 2:
- limite help lines to 80 columns.
- Add Arnd Bergmann acks.
Benjamin Gaignard (2):
ARM: errata 814220-B-Cache maintenance by set/way operations can
execute out of order.
ARM: stm32: select ARM errata 814220
arch/arm/Kconfig| 12
arch/arm/mach-stm
Make sure that ARM errata 814220 is selected by STM32MP157 SoC
Signed-off-by: Benjamin Gaignard
Acked-by: Arnd Bergmann
---
arch/arm/mach-stm32/Kconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/mach-stm32/Kconfig b/arch/arm/mach-stm32/Kconfig
index 713c068b953f..be2403fa3deb
Signed-off-by: Benjamin Gaignard
Acked-by: Arnd Bergmann
---
version 2:
- limite help lines to 80 columns.
- Add Arnd Bergmann acks.
arch/arm/Kconfig | 12
arch/arm/mm/cache-v7.S | 3 +++
2 files changed, 15 insertions(+)
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index
On 1/16/19 6:30 PM, Mark Brown wrote:
> On Mon, Jan 14, 2019 at 03:41:56PM +0100, Benjamin Gaignard wrote:
>
>> +Common Domains Controller bindings properties
>> +
>> +Domains Controller framework defines common bindings properties to describe
>> +the configurations
gt;
> Build tested on arm and x86 allmodconfig
>
Acked-by: Benjamin Gaignard
> Signed-off-by: Sam Ravnborg
> Cc: Yannick Fertre
> Cc: Philippe Cornu
> Cc: Benjamin Gaignard
> Cc: Vincent Abriou
> Cc: David Airlie
> Cc: Daniel Vetter
> ---
> drivers/gpu/drm
Enable ETZPC and set configuration for CEC node
Signed-off-by: Benjamin Gaignard
---
arch/arm/boot/dts/stm32mp157c-ev1.dts | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm/boot/dts/stm32mp157c-ev1.dts
b/arch/arm/boot/dts/stm32mp157c-ev1.dts
index 063ee8ac5dcb..29142ca3d685 100644
are blocks of the soc could be managed by ETZPC and
assigned to one of the three domains.
It is an RFC, comments are welcome to help to create this framework, thanks.
Benjamin
Benjamin Gaignard (7):
devicetree: bindings: Document domains controller bindings
domainsctrl: Introduce domains co
To avoid modifying all the drivers call domainsctrl_set_default_config
before probe to apply the configuration define in device node (if any).
When unbinding the device try to apply configuration named "unbind".
Signed-off-by: Benjamin Gaignard
---
drivers/base/dd.c | 9 +++
Declare ETZPC device as a domains controller node for stm32mp157 SoC
Signed-off-by: Benjamin Gaignard
---
arch/arm/boot/dts/stm32mp157c.dtsi | 7 +++
1 file changed, 7 insertions(+)
diff --git a/arch/arm/boot/dts/stm32mp157c.dtsi
b/arch/arm/boot/dts/stm32mp157c.dtsi
index 8bf1c17f8cef
Document commons domains controller bindings for controller
and client devices.
Signed-off-by: Benjamin Gaignard
---
.../bindings/bus/domains/domainsctrl.txt | 35 ++
1 file changed, 35 insertions(+)
create mode 100644
Documentation/devicetree/bindings/bus
r/domainsctrl_unregister functions.
When a configuration has to be applied the driver callback,
provided in the ops at registration time, set_config is called
by the framework.
Signed-off-by: Benjamin Gaignard
---
drivers/bus/Kconfig | 2 +
drivers/bus/Makefile | 2
Describe STM32 Extended TrustZone Protection bindings.
Signed-off-by: Benjamin Gaignard
---
.../devicetree/bindings/bus/domains/st,stm32-etzpc.txt | 14 ++
1 file changed, 14 insertions(+)
create mode 100644
Documentation/devicetree/bindings/bus/domains/st,stm32-etzpc.txt
by the corpocessor.
Each hardware block status is defined by a 2 bits field and all of
them are packed into 32 bits registers. ETZPC can manage up to 94
hardware blocks.
Signed-off-by: Benjamin Gaignard
---
drivers/bus/domains/Kconfig | 7 ++
drivers/bus/domains/Makefile
On 1/17/19 6:27 PM, Mark Brown wrote:
> On Mon, Jan 14, 2019 at 03:41:57PM +0100, Benjamin Gaignard wrote:
>
>> Configurations could be applied with functions like
>> domainsctrl_set_config_by_index() or domainsctrl_set_config_by_name().
> Do you have any clients in the work
On 1/17/19 6:57 PM, Rob Herring wrote:
> On Mon, Jan 14, 2019 at 8:42 AM Benjamin Gaignard
> wrote:
>> The goal of this framework is to offer an interface for the
>> hardware blocks controlling bus accesses rights.
>>
>> Bus domains controllers are typically us
Le lun. 21 janv. 2019 à 09:21, YueHaibing a écrit :
>
> Fixes gcc '-Wunused-but-set-variable' warning:
>
> drivers/gpu/drm/stm/ltdc.c: In function 'ltdc_plane_atomic_check':
> drivers/gpu/drm/stm/ltdc.c:694:13: warning:
> variable 'src_y' set but not used [-Wunused-but-set-variable]
> u32 src_x
On 5/8/19 9:34 AM, William Breathitt Gray wrote:
> On Tue, May 07, 2019 at 02:37:07PM +0200, Benjamin Gaignard wrote:
>> Le mar. 7 mai 2019 à 12:19, William Breathitt Gray
>> a écrit :
>>> On Tue, May 07, 2019 at 11:12:24AM +0200, Benjamin Gaignard wrote:
>>>>
Pin controller may want to create a link between itself and its clients
to be sure of suspend/resume call ordering.
Introduce create_link field in pinctrl_desc structure to let pinctrl core
knows that controller expect to create a link.
Signed-off-by: Benjamin Gaignard
---
drivers/pinctrl
Set create_link to inform pinctrl core that stmfx wants to create
link with its consumers.
Signed-off-by: Benjamin Gaignard
---
drivers/pinctrl/pinctrl-stmfx.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/pinctrl/pinctrl-stmfx.c b/drivers/pinctrl/pinctrl-stmfx.c
index
is the same problem for resume but in
reverse order.
This series allow to let pinctrl core knows if a controller would like to
create link between itself and it client by setting create_link to true.
Benjamin Gaignard (2):
pinctrl: Allow to create link between controller and consumer
pinctrl
Le ven. 10 mai 2019 à 09:51, Fabrice Gasnier a écrit :
>
> On 4/18/19 11:37 AM, Fabrice Gasnier wrote:
> > This patch series adds power management support for STM32 LP Timer:
> > - PWM driver
> > - Document the pinctrl states for sleep mode
> >
> > It also adds device link between the PWM consumer
From: Benjamin Gaignard
Restore calls to clk_{enable/disable} deleted after applying the wrong
version of the patch
Fixes: fd6905fca4f0 ("drm/stm: ltdc: remove clk_round_rate comment")
Signed-off-by: Benjamin Gaignard
---
drivers/gpu/drm/stm/ltdc.c | 2 ++
1 file changed, 2
Le lun. 18 mars 2019 à 12:05, Benjamin Gaignard
a écrit :
>
> Le lun. 18 mars 2019 à 11:43, Sudeep Holla a écrit :
> >
> > On Mon, Mar 18, 2019 at 11:05:58AM +0100, Benjamin Gaignard wrote:
> > > Bus domains controllers allow to divided system on chip into multiple
&
On 4/23/19 3:21 PM, Sudeep Holla wrote:
> On Mon, Mar 18, 2019 at 12:05:54PM +0100, Benjamin Gaignard wrote:
>> Le lun. 18 mars 2019 à 11:43, Sudeep Holla a écrit :
>>> On Mon, Mar 18, 2019 at 11:05:58AM +0100, Benjamin Gaignard wrote:
>>>> Bus domains controllers a
On 4/23/19 3:55 PM, Sudeep Holla wrote:
> On Tue, Apr 23, 2019 at 01:33:19PM +0000, Benjamin GAIGNARD wrote:
>> On 4/23/19 3:21 PM, Sudeep Holla wrote:
>>> On Mon, Mar 18, 2019 at 12:05:54PM +0100, Benjamin Gaignard wrote:
>>>> Le lun. 18 mars 2019 à 11:43, Sudeep
Le ven. 26 avr. 2019 à 14:30, Philippe CORNU a écrit :
>
> Hi Fabien,
> and thank you for your patch,
>
> Acked-by: Philippe Cornu
>
> Philippe :-)
>
> On 4/24/19 4:03 PM, Fabien Dessenne wrote:
> > Manage the -EPROBE_DEFER error case for the ltdc IRQ.
> >
> > Signed-off-by: Fabien Dessenne
App
Le ven. 26 avr. 2019 à 14:30, Philippe CORNU a écrit :
>
> Hi Fabien,
> and thank you for your patch,
>
> Acked-by: Philippe Cornu
>
> Philippe :-)
>
> On 4/24/19 4:03 PM, Fabien Dessenne wrote:
> > During probe, return the "clk_get" error value instead of -ENODEV.
> >
> > Signed-off-by: Fabien D
Quadrature feature is now hosted on it own framework.
Remove quadrature related code from stm32-trigger driver to avoid
code duplication and simplify the ABI.
Signed-off-by: Benjamin Gaignard
---
.../ABI/testing/sysfs-bus-iio-timer-stm32 | 23 --
drivers/iio/trigger/stm32-timer
Le mar. 7 mai 2019 à 12:19, William Breathitt Gray
a écrit :
>
> On Tue, May 07, 2019 at 11:12:24AM +0200, Benjamin Gaignard wrote:
> > Quadrature feature is now hosted on it own framework.
> > Remove quadrature related code from stm32-trigger driver to avoid
> > code dupl
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