On 22 April 2013 06:51, Rusty Russell wrote:
>
> Pranavkumar Sawargaonkar writes:
> > On 18 April 2013 12:21, Rusty Russell wrote:
> >>
> >> PranavkumarSawargaonkar writes:
> >> > From: Pranavkumar Sawargaonkar
> >> >
> >> > This patch implements early printk support for virtio-mmio console
>
On Wed, May 1, 2013 at 5:56 AM, Alexander Graf wrote:
>
> On 30.04.2013, at 02:32, Rusty Russell wrote:
>
>> Alexander Graf writes:
>>> Am 29.04.2013 um 05:09 schrieb Rusty Russell :
>>>
Alexander Graf writes:
> On 26.04.2013, at 13:04, Pranavkumar Sawargaonkar wrote:
>
>> This
On Wed, May 1, 2013 at 7:37 AM, Rusty Russell wrote:
> Alexander Graf writes:
>> There are not device specific registers in
>> virtio-console. Virtio-console lives behind a virtio bus which doesn't
>> know what these registers are.
>
> You're not going to make coherent arguments without reading t
On 26 April 2013 17:03, Peter Maydell wrote:
> On 26 April 2013 12:19, Alexander Graf wrote:
>> MMIO registers are handled by a different layer than the virtio
>> console itself. After the virtio refactoring in QEMU, they will
>> be completely separate drivers.
>
> Good point -- we don't really w
On 26 April 2013 18:03, Arnd Bergmann wrote:
> On Friday 26 April 2013 17:36:16 Anup Patel wrote:
>> On 26 April 2013 17:03, Peter Maydell wrote:
>> > On 26 April 2013 12:19, Alexander Graf wrote:
>> >> MMIO registers are handled by a different layer than the virt
()
- Get UIO dmem dynamic region details as module parameter instead
of getting it from DT node
Ankit Jindal (3):
uio: code style cleanup
uio: Add new UIO_MEM_PHYS_CACHE type for mem regions
Documentation: Update documentation for UIO_MEM_PHYS_CACHE and
UIO_MEM_DEVICE
Anup Patel (2
useless. Fix this by computing dmem_region_start from the uiomem
which points to the last used UIO mapping.
Fixes: 0a0c3b5a24bd ("Add new uio device for dynamic memory allocation")
Signed-off-by: Jan Viktorin
Signed-off-by: Anup Patel
Cc: linux-stable
---
drivers/uio/uio_dmem_genirq.c
From: Ankit Jindal
This patch fixes the indentation of switch-case block in uio driver.
Signed-off-by: Ankit Jindal
Signed-off-by: Anup Patel
---
drivers/uio/uio.c | 14 +++---
1 file changed, 7 insertions(+), 7 deletions(-)
diff --git a/drivers/uio/uio.c b/drivers/uio/uio.c
index
From: Ankit Jindal
This patch updates UIO documentation for new mem region
types UIO_MEM_PHYS_CACHE and UIO_MEM_DEVICE.
Signed-off-by: Ankit Jindal
Signed-off-by: Anup Patel
---
Documentation/DocBook/uio-howto.tmpl | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a
pgprot_noncached().
This patch introduces a new UIO mem region type UIO_MEM_DEVICE to
represent device registers/memory. The UIO device drivers should
prefer this new UIO mem region type for memory mapped device registers.
Signed-off-by: Anup Patel
---
drivers/uio/uio.c | 4
include
: Ankit Jindal
Signed-off-by: Anup Patel
---
drivers/uio/uio.c | 16 +---
include/linux/uio_driver.h | 9 +
2 files changed, 18 insertions(+), 7 deletions(-)
diff --git a/drivers/uio/uio.c b/drivers/uio/uio.c
index f2729b7..0e53076 100644
--- a/drivers/uio/uio.c
+++ b
From: Jan Viktorin
We can simplify handling of platform_get_irq into one place as it is
acceptable to see UIO_IRQ_NONE instead of a valid IRQ number. Some
devices don't have or don't need any interrupt to be handled. The
same change has been already done for uio_pdrv_genirq.
Signed-off-by: Jan V
This patch extends uio_dmem_genirq driver to use recently
added memtypes as follows:
1. Use UIO_MEM_DEVICE memtype for MEM resources
2. Use UIO_MEM_PHYS_CACHE memtype for dynamic regions
when UIO DT node is marked as DMA coherent.
Signed-off-by: Anup Patel
---
drivers/uio/uio_dmem_genirq.c | 9
formatted string for dmem_sizes:
a) UIO dmem device with 3 dynamic regions:
uio_dmem_genirq.dmem_sizes=abc:4K,16K,4M
b) Two UIO dmem devices with different number of dynamic regions:
uio_dmem_genirq.dmem_sizes=abc:4K,16K,4M;xyz:8K
Signed-off-by: Jan Viktorin
Signed-off-by: Anup Patel
---
drivers
On Fri, Aug 11, 2017 at 12:53 AM, Alex Williamson
wrote:
> On Wed, 2 Aug 2017 11:08:30 +0530
> Anup Patel wrote:
>
>> This patch adds Broadcom FlexRM low-level reset for
>> VFIO platform.
>>
>> It will do the following:
>> 1. Disable/Deactivate each F
On Thu, Aug 17, 2017 at 9:14 AM, Vinod Koul wrote:
> On Tue, Aug 01, 2017 at 04:07:45PM +0530, Anup Patel wrote:
>> Make section comments consistent across the Broadcom SBA RAID driver
>> by avoiding " SBA " in some of the comments.
>
> and you add more comments..
On Thu, Aug 17, 2017 at 9:15 AM, Vinod Koul wrote:
> On Tue, Aug 01, 2017 at 04:07:47PM +0530, Anup Patel wrote:
>> This patch merges sba_request state and fence into common
>> sba_request flags. Also, in-future we can extend sba_request
>> flags as required.
>
> a
On Thu, Aug 17, 2017 at 12:08 PM, Vinod Koul wrote:
> On Tue, Aug 01, 2017 at 04:07:54PM +0530, Anup Patel wrote:
>> We should allocate DMA channel resources before registering the
>> DMA device in sba_probe() because we can get DMA request soon
>> after registering the DMA d
On Thu, Aug 17, 2017 at 1:31 PM, Vinod Koul wrote:
> On Tue, Aug 01, 2017 at 04:07:59PM +0530, Anup Patel wrote:
>> This patch adds debugfs support to report stats via debugfs
>> which in-turn will help debug hang or error situations.
>>
>> Signed-off-by: Anup Pat
On Fri, Aug 18, 2017 at 10:56 AM, Vinod Koul wrote:
> On Fri, Aug 18, 2017 at 10:33:54AM +0530, Anup Patel wrote:
>> On Thu, Aug 17, 2017 at 1:31 PM, Vinod Koul wrote:
>> > On Tue, Aug 01, 2017 at 04:07:59PM +0530, Anup Patel wrote:
>> > why fail, debugfs should be an
On Fri, Aug 18, 2017 at 10:55 AM, Vinod Koul wrote:
> On Fri, Aug 18, 2017 at 10:26:54AM +0530, Anup Patel wrote:
>> On Thu, Aug 17, 2017 at 9:15 AM, Vinod Koul wrote:
>> > On Tue, Aug 01, 2017 at 04:07:47PM +0530, Anup Patel wrote:
>> >> This patch merges sba_reque
On Thu, Aug 17, 2017 at 12:06 PM, Vinod Koul wrote:
> On Tue, Aug 01, 2017 at 04:07:53PM +0530, Anup Patel wrote:
>> The pending sba_request list can become very long in real-life usage
>> (e.g. setting up RAID array) which can cause sba_issue_pending() to
>> run for lo
On Wed, Jun 21, 2017 at 5:04 AM, Stephen Rothwell wrote:
> Hi all,
>
> After merging the clk tree, today's linux-next build (x86_64 allmodconfig)
> produced these warnings:
>
> WARNING: drivers/clk/bcm/built-in.o(.text+0x4022): Section mismatch in
> reference from the function sr_genpll3_clk_init
Ping ??
--
Anup
Ping ??
--
Anup
On Fri, May 26, 2017 at 3:03 AM, Michael Turquette
wrote:
> Hello Anup,
>
> Quoting Anup Patel (2017-05-22 04:58:19)
>> +#include
>> +#include
>> +#include
>> +#include
>> +#include
>> +#include
>> +#include
>> +#include
>
>
From: Oza Pawandeep
This patch adds I2C DT nodes on Stingray SoC.
Signed-off-by: Oza Pawandeep
Reviewed-by: Vikram Prakash
Reviewed-by: Ray Jui
Reviewed-by: Scott Branden
---
.../boot/dts/broadcom/stingray/bcm958742-base.dtsi | 22 ++
.../arm64/boot/dts/broadcom/stingray
will have quite
a few DTS files for Stingray. To tackle, we have added a
separate directory for Stingray DTS files.
Signed-off-by: Anup Patel
Signed-off-by: Scott Branden
Reviewed-by: Ray Jui
---
arch/arm64/boot/dts/broadcom/Makefile | 1 +
arch/arm64/boot/dts/broadcom/stingray
From: Pramod Kumar
This patch adds NAND controller DT Node and NAND chip DT
node for Stingray SOC and Stingray reference boards.
Signed-off-by: Pramod Kumar
Signed-off-by: Abhishek Shah
Reviewed-by: Vikram Prakash
Reviewed-by: Ray Jui
Reviewed-by: Scott Branden
---
arch/arm64/boot/dts/broa
From: Sandeep Tripathy
This patch describes Stingray SOC clock tree using
DT nodes in Stingray DTS.
Signed-off-by: Sandeep Tripathy
Reviewed-by: Ray Jui
Reviewed-by: Scott Branden
---
.../boot/dts/broadcom/stingray/stingray-clock.dtsi | 170 +
.../arm64/boot/dts/broadcom/
From: Pramod Kumar
The GPIOs on Stingray SOC are based on iProc GPIOs hence
using this we add GPIO DT nodes for Stingray SOC.
Signed-off-by: Pramod Kumar
Reviewed-by: Ray Jui
Reviewed-by: Scott Branden
---
.../arm64/boot/dts/broadcom/stingray/stingray.dtsi | 34 ++
1 file
From: Pramod Kumar
This patch adds pinctrl and pinmux related DT nodes for
Stingray SOC.
For manageability, pinctrl and pinmum DT nodes are added
as separate DTSi file and included in main DTSi file.
Signed-off-by: Pramod Kumar
Signed-off-by: Anup Patel
Reviewed-by: Ray Jui
Reviewed-by
We have two instance of PL022 SPI controllers, one instance of
DMA PL330, and one non-secure SP805 Watchdog on Stingray SOC.
This patch adds DT nodes for the above mentioned devices in
Stingray DT.
Signed-off-by: Anup Patel
Reviewed-by: Pramod KUMAR
Reviewed-by: Ray Jui
Reviewed-by: Scott
From: Srinath Mannam
The Stingray SoC has two instances of SDHCI controller
and one instance of iProc PWM.
Let's enable above mentioned devices in Stingray DT.
Signed-off-by: Srinath Mannam
Signed-off-by: Anup Patel
Reviewed-by: Ray Jui
Reviewed-by: Scott Branden
---
.../boot/dts/bro
This patch adds DT bindings info for Broadcom Stingray SOC
and related reference boards.
Signed-off-by: Anup Patel
Acked-by: Rob Herring
---
Documentation/devicetree/bindings/arm/bcm/brcm,stingray.txt | 12
1 file changed, 12 insertions(+)
create mode 100644 Documentation
tsi
- Use ranges DT property to clear view of memory-layout
- Make bcm-sr.h part of clock DT bindings patch
Anup Patel (3):
dt-bindings: bcm: Add Broadcom Stingray bindings document
arm64: dts: Initial DTS files for Broadcom Stingray SOC
arm64: dts: Add PL022, PL330 and SP805 DT nodes for Sti
From: Sandeep Tripathy
This patch adds support for Stingray clocks in iproc
ccf. The Stingray SOC has various plls based on iproc
pll architecture.
Signed-off-by: Sandeep Tripathy
Reviewed-by: Ray Jui
Reviewed-by: Scott Branden
---
drivers/clk/bcm/Kconfig | 8 ++
drivers/clk/bcm/Makefile
From: Sandeep Tripathy
Update iproc clock dt-binding documentation with
Stingray pll and clock details.
Signed-off-by: Sandeep Tripathy
Reviewed-by: Ray Jui
Reviewed-by: Scott Branden
Acked-by: Rob Herring
---
.../bindings/clock/brcm,iproc-clocks.txt | 76
includ
On Tue, Oct 3, 2017 at 10:57 AM, Anup Patel wrote:
> This patch adds Broadcom FlexRM low-level reset for
> VFIO platform.
>
> It will do the following:
> 1. Disable/Deactivate each FlexRM ring
> 2. Flush each FlexRM ring
>
> The cleanup sequence for FlexRM rings is adapte
On Thu, Oct 5, 2017 at 10:19 PM, Anup Patel wrote:
> The RPMSG_VIRTIO is now user selectable option so we explicitly
> select it in multi_v7_defconfig. Till now RPMSG_VIRTIO was
> selected by ST_REMOTEPROC=m in multi_v7_defconfig.
>
> Signed-off-by: Anup Patel
> ---
&
On Tue, Oct 3, 2017 at 10:51 AM, Anup Patel wrote:
> This patchset does few more improvements to Broadcom FlexRM mailbox
> driver.
>
> The patches are based on Linux-4.14-rc3 and can also be found at
> flexrm-imp2-v1 branch of:
> https://github.com/Broadcom/arm64-linux.git
On Thu, Oct 26, 2017 at 9:33 PM, Anup Patel wrote:
> On Thu, Oct 5, 2017 at 10:19 PM, Anup Patel wrote:
>> The RPMSG_VIRTIO is now user selectable option so we explicitly
>> select it in multi_v7_defconfig. Till now RPMSG_VIRTIO was
>> selected by ST_REMOTEPROC=m
> -Original Message-
> From: Florian Fainelli [mailto:f.faine...@gmail.com]
> Sent: 07 October 2015 04:51
> To: Scott Branden; Brian Norris; Anup Patel
> Cc: linux-arm-ker...@lists.infradead.org; Rob Herring; Pawel Moll; Mark
> Rutland; Ian Campbell; Kumar Gala; Cat
Hi Brian,
> -Original Message-
> From: Brian Norris [mailto:computersforpe...@gmail.com]
> Sent: 13 October 2015 02:58
> To: Anup Patel
> Cc: Florian Fainelli; Scott Branden; linux-arm-ker...@lists.infradead.org; Rob
> Herring; Pawel Moll; Mark Rutland; Ian Campbell; K
.
Changes since v1:
- Dropped patch3 and patch4 because we don't need to reset
BRCMNAND controller for NS2.
- Added patch to force 8bit mode before doing nand_scan_ident()
in brcmnand_init_cs().
Anup Patel (4):
mtd: brcmnand: Fix pointer type-cast in brcmnand_write()
m
The BRCM NAND driver can be re-used for Broadcom ARM64 SoCs hence
this patch updates Kconfig to allow selection of MTD_NAND_BRCMNAND
for ARM64.
Signed-off-by: Anup Patel
Reviewed-by: Vikram Prakash
Reviewed-by: Ray Jui
Reviewed-by: Pramod KUMAR
Reviewed-by: Scott Branden
---
drivers/mtd
is issued.
Signed-off-by: Anup Patel
Reviewed-by: Ray Jui
Reviewed-by: Scott Branden
---
drivers/mtd/nand/brcmnand/brcmnand.c | 9 +
1 file changed, 9 insertions(+)
diff --git a/drivers/mtd/nand/brcmnand/brcmnand.c
b/drivers/mtd/nand/brcmnand/brcmnand.c
index 4cba03d..0be8ef9 100644
The NAND controller on NS2 SoC is compatible with existing
BRCM IPROC NAND driver so let's enable it in NS2 DT and
NS2 SVK DT.
Signed-off-by: Anup Patel
Reviewed-by: Ray Jui
Reviewed-by: Scott Branden
---
arch/arm64/boot/dts/broadcom/ns2-svk.dts | 12
arch/arm64/boot/dts/bro
We should always type-cast pointer to "long" or "unsigned long"
because size of pointer is same as machine word size. This will
avoid pointer type-cast issues on both 32bit and 64bit systems.
This patch fixes pointer type-cast issue in brcmnand_write()
as-per above info.
> -Original Message-
> From: Ray Jui [mailto:r...@broadcom.com]
> Sent: 16 October 2015 21:06
> To: Anup Patel; David Woodhouse; Brian Norris; linux-...@lists.infradead.org
> Cc: Rob Herring; Pawel Moll; Mark Rutland; Ian Campbell; Kumar Gala; Catalin
> Marinas;
> -Original Message-
> From: Sudeep Holla [mailto:sudeep.ho...@arm.com]
> Sent: 20 October 2015 14:36
> To: Anup Patel
> Cc: David Woodhouse; Brian Norris; linux-...@lists.infradead.org; Sudeep
> Holla; Rob Herring; Pawel Moll; Mark Rutland; Ian Campbell; Kumar Gala;
&
de before doing nand_scan_ident()
in brcmnand_init_cs().
Anup Patel (2):
mtd: brcmnand: Force 8bit mode before doing nand_scan_ident()
arm64: dts: Add BRCM IPROC NAND DT node for NS2
arch/arm64/boot/dts/broadcom/ns2-svk.dts | 30 --
arch/arm64/boot/dts/broadcom/n
The NAND controller on NS2 SoC is compatible with existing
BRCM IPROC NAND driver so let's enable it in NS2 DT and
NS2 SVK DT.
This patch also fixes use of node labels in ns2-svk.dts.
Signed-off-by: Anup Patel
Reviewed-by: Ray Jui
Reviewed-by: Scott Branden
---
arch/arm64/boot/dts/bro
is issued.
Signed-off-by: Anup Patel
Reviewed-by: Ray Jui
Reviewed-by: Scott Branden
---
drivers/mtd/nand/brcmnand/brcmnand.c | 9 +
1 file changed, 9 insertions(+)
diff --git a/drivers/mtd/nand/brcmnand/brcmnand.c
b/drivers/mtd/nand/brcmnand/brcmnand.c
index 4cba03d..0be8ef9 100644
Ping ???
Regards,
Anup
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Please read the FAQ at http://www.tux.org/lkml/
Recent kernels requires cache hierrachy to be defined via DT hence
this patch updates NS2 DT accordingly.
Signed-off-by: Anup Patel
Reviewed-by: Sandeep Tripathy
Reviewed-by: Ray Jui
Reviewed-by: Scott Branden
---
arch/arm64/boot/dts/broadcom/ns2.dtsi | 8
1 file changed, 8
We have IPROC RNG200 hardware random number generation in
NS2 SoC, lets enable it for NS2 in NS2 DT.
Signed-off-by: Anup Patel
Reviewed-by: Ray Jui
Reviewed-by: Pramod KUMAR
Reviewed-by: Vikram Prakash
Reviewed-by: Scott Branden
---
arch/arm64/boot/dts/broadcom/ns2.dtsi | 5 +
1 file
From: Ray Jui
This patch adds iProc I2C DT nodes for NS2 and enable them for the NS2
SVK board
Signed-off-by: Ray Jui
Reviewed-by: Vikram Prakash
Reviewed-by: Scott Branden
---
arch/arm64/boot/dts/broadcom/ns2-svk.dts | 8
arch/arm64/boot/dts/broadcom/ns2.dtsi| 20 +
or NS2 using DT.
Signed-off-by: Anup Patel
Reviewed-by: Ray Jui
Reviewed-by: Scott Branden
---
arch/arm64/boot/dts/broadcom/ns2.dtsi | 12
1 file changed, 12 insertions(+)
diff --git a/arch/arm64/boot/dts/broadcom/ns2.dtsi
b/arch/arm64/boot/dts/broadcom/ns2.dtsi
index c5d90e4..5d2ac
The SMMU-500 driver is already available in Linux kernel. Let's
enable it for NS2 in DT.
This patch keeps mmu-masters attribute empty so that driver patches
can later extend this attribute when adding device DT nodes.
Signed-off-by: Anup Patel
Reviewed-by: Ray Jui
Reviewed-by: Scott Br
The NS2 SoC has Cortex-A57 CPUs which support ARM PMUv3 so,
lets enable ARM PMUv3 in NS2 DT.
Signed-off-by: Anup Patel
Reviewed-by: Vikram Prakash
Reviewed-by: Ray Jui
Reviewed-by: Scott Branden
---
arch/arm64/boot/dts/broadcom/ns2.dtsi | 20
1 file changed, 16
We add l2-cache, SMMU, reboot, PMUv3, RNG, and I2C DT nodes
for NS2 SVK.
This patchset is based on v4.3-rc3 and available in ns2_dt1_v1
branch of https://github.com/Broadcom/arm64-linux.git.
The patchset is tested on NS2 SVK.
Anup Patel (5):
arm64: dts: Add L2-cache DT node for NS2
arm64
We enable NAND support for Broadcom NS2 SoC by reusing existing
BRCMNAND driver.
This patchset applies on-top of "arm64: Simple additions to
NS2 DT" patchset and is available in ns2_nand_v1 branch of
https://github.com/Broadcom/arm64-linux.git.
The patchset is tested on NS2 SVK.
Anu
This patch updates the BRCM NAND controller DT bindings documentation
to add info about newly added optional flag "brcm,nand-iproc-reset".
Signed-off-by: Anup Patel
Reviewed-by: Pramod KUMAR
Reviewed-by: Ray Jui
Reviewed-by: Scott Branden
---
Documentation/devicetree/binding
The NAND controller on NS2 SoC is compatible with existing
BRCM IPROC NAND driver so let's enable it in NS2 DT and
NS2 SVK DT.
Signed-off-by: Anup Patel
Reviewed-by: Ray Jui
Reviewed-by: Scott Branden
---
arch/arm64/boot/dts/broadcom/ns2-svk.dts | 12
arch/arm64/boot/dts/bro
t
the NAND controller before any commands are issued.
Signed-off-by: Anup Patel
Reviewed-by: Pramod KUMAR
Reviewed-by: Ray Jui
Reviewed-by: Scott Branden
---
drivers/mtd/nand/brcmnand/iproc_nand.c | 19 +++
1 file changed, 19 insertions(+)
diff --git a/drivers/mtd/nand/brcmnand/iproc
The BRCM NAND driver can be re-used for Broadcom ARM64 SoCs hence
this patch updates Kconfig to allow selection of MTD_NAND_BRCMNAND
for ARM64.
Signed-off-by: Anup Patel
Reviewed-by: Vikram Prakash
Reviewed-by: Ray Jui
Reviewed-by: Pramod KUMAR
Reviewed-by: Scott Branden
---
drivers/mtd
We should always type-cast pointer to "long" or "unsigned long"
because size of pointer is same as machine word size. This will
avoid pointer type-cast issues on both 32bit and 64bit systems.
This patch fixes pointer type-cast issue in brcmnand_write()
as-per above info.
> -Original Message-
> From: Brian Norris [mailto:computersforpe...@gmail.com]
> Sent: 05 October 2015 03:20
> To: Anup Patel
> Cc: linux-arm-ker...@lists.infradead.org; Rob Herring; Pawel Moll; Mark
> Rutland; Ian Campbell; Kumar Gala; Catalin Marinas; Will Deacon;
Hi Loic Pallardy, Bjorn Andersson,
This patchset also helps in getting VirtIO RPMSG driver working
with VirtIO MMIO transport.
Is it possible to have this patchset part of Linux-4.19 or Linux-4.20?
Regards,
Anup
ra (3):
> RISC-V: Add logical CPU indexing for RISC-V
> RISC-V: Use Linux logical cpu number instead of hartid
> RISC-V: Support cpu hotplug.
>
This series looks good to me.
FWIW,
Reviewed-by: Anup Patel
Regards,
Anup
On Thu, Aug 30, 2018 at 10:11 AM, Christoph Hellwig wrote:
> On Thu, Aug 30, 2018 at 09:53:50AM -0400, Anup Patel wrote:
>> > Atish Patra (3):
>> > RISC-V: Add logical CPU indexing for RISC-V
>> > RISC-V: Use Linux logical cpu number instead of hartid
>
On Thu, Aug 30, 2018 at 10:11 AM, Christoph Hellwig wrote:
> On Thu, Aug 30, 2018 at 09:53:50AM -0400, Anup Patel wrote:
>> > Atish Patra (3):
>> > RISC-V: Add logical CPU indexing for RISC-V
>> > RISC-V: Use Linux logical cpu number instead of hartid
>
On Tue, Aug 21, 2018 at 1:18 PM, Christoph Hellwig wrote:
> On Thu, Aug 16, 2018 at 11:51:03AM +0530, Anup Patel wrote:
>> Having thought about this more, I think cpu_ops should be an pointer array
>> of NR_CPUS size. This means its not necessary to have have same ops for
>>
On Wed, Aug 22, 2018 at 11:33 AM, Christoph Hellwig wrote:
> On Tue, Aug 21, 2018 at 10:34:38PM +0530, Anup Patel wrote:
>> The cpu_operations is certainly required because SOC vendors will add
>> vendor-specific mechanism to selectively bringing-up CPUs/HARTs instead
>>
On Thu, Aug 23, 2018 at 9:37 AM, Christoph Hellwig wrote:
> On Wed, Aug 22, 2018 at 08:54:51PM +0530, Anup Patel wrote:
>> IMHO, rather than waiting for new CPU ON/OFF methods to come-up we
>> can keep the cpu_operations ready. Also, we are not re-inventing anything
>> here w
On Wed, Jul 25, 2018 at 4:54 PM, Christoph Hellwig wrote:
> On Wed, Jul 25, 2018 at 12:18:39PM +0100, Marc Zyngier wrote:
>> This feels odd. It means that you cannot have the following sequence:
>>
>> local_irq_disable();
>> enable_irq(x); // where x is owned by a remote hart
>>
>> as
On Thu, Jul 26, 2018 at 1:57 PM, Christoph Hellwig wrote:
> On Thu, Jul 26, 2018 at 09:08:00AM +0530, Anup Patel wrote:
>> Actually, RISCV HLIC and PLIC are very similar to RPi2 and RPi3 SOCs.
>>
>> On RPi2 and RPi3, we have per-CPU BCM2836 local intc and the global
>
On Sat 28 Jul, 2018, 5:34 AM Atish Patra, wrote:
>
> On 7/26/18 7:38 AM, Christoph Hellwig wrote:
> > This patch adds a driver for the Platform Level Interrupt Controller (PLIC)
> > specified as part of the RISC-V supervisor level ISA manual, in the memory
> > layout implemented by SiFive and qemu
On Wed, Jan 10, 2018 at 6:46 PM, Anup Patel wrote:
> When virtio-rpmsg device is provided via virtio-mmio transport, the
> dma_alloc_coherent() (called by rpmsg_probe()) fails on ARM/ARM64
> systems because "vdev->dev.parent->parent" device is used as parameter
> to d
On Wed, Jan 10, 2018 at 6:47 PM, Anup Patel wrote:
> This patch adds "driver_override" device attribute for rpmsg_device which
> will allow users to explicitly specify the rpmsg_driver to be used via
> sysfs entry.
>
> The "driver_override" device attribute im
- Implemented SBA request chaning for handling (len > sba->req_size)
in bcm-sba-raid driver
- Implemented device_terminate_all() callback in bcm-sba-raid driver
Anup Patel (4):
lib/raid6: Add log-of-2 table for RAID6 HW requiring disk position
async_tx: Fix DMA_PREP_FENCE us
AID6
offload engine driver can use this newly added raid6_gflog table to
get disk position from multiplicative coefficient.
Signed-off-by: Anup Patel
Reviewed-by: Scott Branden
Reviewed-by: Ray Jui
Acked-by: Shaohua Li
---
include/linux/raid/pq.h | 1 +
lib/raid6/mktabl
SoC specific ring manager channels. The SBA RAID driver in its
current shape implements memcpy, xor, and pq operations.
Signed-off-by: Anup Patel
Reviewed-by: Ray Jui
Acked-by: Dan Williams
---
drivers/dma/Kconfig| 14 +
drivers/dma/Makefile |1 +
drivers/dma/bcm-sba-raid.c
This patch adds the DT bindings document for newly added Broadcom
SBA RAID driver.
Acked-by: Rob Herring
Reviewed-by: Ray Jui
Reviewed-by: Scott Branden
Signed-off-by: Anup Patel
---
.../devicetree/bindings/dma/brcm,iproc-sba.txt | 29 ++
1 file changed, 29 insertions
not set in submit->flags
2. DMA_PREP_FENCE not set in dma_flags
3. src_cnt (= (disks - 2)) is greater than dma_maxpq(dma, dma_flags)
This patch fixes DMA_PREP_FENCE usage in do_async_gen_syndrome() taking
inspiration from do_async_xor() implementation.
Signed-off-by: Anup Patel
Reviewed-by: R
On Fri, May 12, 2017 at 8:51 PM, Rob Herring wrote:
> On Sat, May 06, 2017 at 05:24:37PM +0530, Anup Patel wrote:
>> From: Sandeep Tripathy
>>
>> Update iproc clock dt-binding documentation with
>> Stingray pll and clock details.
>>
>> Signed-off-by: Sa
On Mon, May 8, 2017 at 5:00 AM, Florian Fainelli wrote:
> Le 05/06/17 à 04:54, Anup Patel a écrit :
>> The Broadcom Stingray SoC is a new member in Broadcom iProc
>> SoC family.
>>
>> This patch adds initial DTS files for Broadcom Stingray SoC
>> and two of its
On Tue, May 9, 2017 at 2:02 AM, Scott Branden
wrote:
> One update below needed dealing with memreserve
>
>
> On 17-05-06 04:54 AM, Anup Patel wrote:
>>
>> The Broadcom Stingray SoC is a new member in Broadcom iProc
>> SoC family.
>>
>> This patch adds i
From: Sandeep Tripathy
Update iproc clock dt-binding documentation with
Stingray pll and clock details.
Signed-off-by: Sandeep Tripathy
Reviewed-by: Ray Jui
Reviewed-by: Scott Branden
Acked-by: Rob Herring
---
.../bindings/clock/brcm,iproc-clocks.txt | 76
includ
will have quite
a few DTS files for Stingray. To tackle, we have added a
separate directory for Stingray DTS files.
Signed-off-by: Anup Patel
Signed-off-by: Scott Branden
Reviewed-by: Ray Jui
---
arch/arm64/boot/dts/broadcom/Makefile | 1 +
arch/arm64/boot/dts/broadcom/stingray
From: Sandeep Tripathy
This patch describes Stingray SOC clock tree using
DT nodes in Stingray DTS.
Signed-off-by: Sandeep Tripathy
Reviewed-by: Ray Jui
Reviewed-by: Scott Branden
---
.../boot/dts/broadcom/stingray/stingray-clock.dtsi | 170 +
.../arm64/boot/dts/broadcom/
stingray-v2 branch of https://github.com/Broadcom/arm64-linux.git
Changes since v1:
- Rebased patches for Linux-4.12-rc1
- Removed unwanted /memreserve/ from bcm958742-base.dtsi
- Use ranges DT property to clear view of memory-layout
- Make bcm-sr.h part of clock DT bindings patch
Anup Patel (3
This patch adds DT bindings info for Broadcom Stingray SOC
and related reference boards.
Signed-off-by: Anup Patel
Acked-by: Rob Herring
---
Documentation/devicetree/bindings/arm/bcm/brcm,stingray.txt | 12
1 file changed, 12 insertions(+)
create mode 100644 Documentation
We have two instance of PL022 SPI controllers, one instance of
DMA PL330, and one non-secure SP805 Watchdog on Stingray SOC.
This patch adds DT nodes for the above mentioned devices in
Stingray DT.
Signed-off-by: Anup Patel
Reviewed-by: Pramod KUMAR
Reviewed-by: Ray Jui
Reviewed-by: Scott
From: Pramod Kumar
This patch adds NAND controller DT Node and NAND chip DT
node for Stingray SOC and Stingray reference boards.
Signed-off-by: Pramod Kumar
Signed-off-by: Abhishek Shah
Reviewed-by: Vikram Prakash
Reviewed-by: Ray Jui
Reviewed-by: Scott Branden
---
arch/arm64/boot/dts/broa
From: Oza Pawandeep
This patch adds I2C DT nodes on Stingray SoC.
Signed-off-by: Oza Pawandeep
Reviewed-by: Vikram Prakash
Reviewed-by: Ray Jui
Reviewed-by: Scott Branden
---
.../boot/dts/broadcom/stingray/bcm958742-base.dtsi | 22 ++
.../arm64/boot/dts/broadcom/stingray
From: Srinath Mannam
The Stingray SoC has two instances of SDHCI controller
and one instance of iProc PWM.
Let's enable above mentioned devices in Stingray DT.
Signed-off-by: Srinath Mannam
Signed-off-by: Anup Patel
Reviewed-by: Ray Jui
Reviewed-by: Scott Branden
---
.../boot/dts/bro
From: Pramod Kumar
This patch adds pinctrl and pinmux related DT nodes for
Stingray SOC.
For manageability, pinctrl and pinmum DT nodes are added
as separate DTSi file and included in main DTSi file.
Signed-off-by: Pramod Kumar
Signed-off-by: Anup Patel
Reviewed-by: Ray Jui
Reviewed-by
From: Pramod Kumar
The GPIOs on Stingray SOC are based on iProc GPIOs hence
using this we add GPIO DT nodes for Stingray SOC.
Signed-off-by: Pramod Kumar
Reviewed-by: Ray Jui
Reviewed-by: Scott Branden
---
.../arm64/boot/dts/broadcom/stingray/stingray.dtsi | 34 ++
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