[PATCH v7 4/7] arm64: perf: Defer irq_work to IPI_IRQ_WORK

e Melo Cc: Alexander Shishkin Cc: Jiri Olsa Cc: Namhyung Kim Cc: Catalin Marinas Signed-off-by: Julien Thierry [Alexandru E.: Reworded commit message] Signed-off-by: Alexandru Elisei --- arch/arm64/kernel/perf_event.c | 14 +- 1 file changed, 5 insertions(+), 9 deletions(-) diff --

Re: [PATCH v6 0/7] arm_pmu: Use NMI for perf interrupt

Hi, On 9/21/20 4:41 PM, Alexandru Elisei wrote: > Hi Will, > > Thank you so much for reviewing the series! > > On 9/21/20 2:59 PM, Will Deacon wrote: >> On Wed, Aug 19, 2020 at 02:34:12PM +0100, Alexandru Elisei wrote: >>> The series makes the arm_pmu driver use NM

Re: [PATCH v6 6/7] arm_pmu: Introduce pmu_irq_ops

Hi Will, On 9/21/20 2:55 PM, Will Deacon wrote: > On Wed, Aug 19, 2020 at 02:34:18PM +0100, Alexandru Elisei wrote: >> From: Julien Thierry >> >> Currently the PMU interrupt can either be a normal irq or a percpu irq. >> Supporting NMI will introduce two cases for ea

[PATCH v5 4/7] arm64: perf: Defer irq_work to IPI_IRQ_WORK

: Alexandru Elisei --- arch/arm64/kernel/perf_event.c | 14 +- 1 file changed, 5 insertions(+), 9 deletions(-) diff --git a/arch/arm64/kernel/perf_event.c b/arch/arm64/kernel/perf_event.c index a6195022be7d..cf1d92030790 100644 --- a/arch/arm64/kernel/perf_event.c +++ b/arch/arm64/kernel

[PATCH v5 0/7] arm_pmu: Use NMI for perf interrupt

d.org/pipermail/linux-arm-kernel/2019-March/640536.html [5] https://lists.infradead.org/pipermail/linux-arm-kernel/2018-January/554611.html Alexandru Elisei (1): arm64: perf: Add missing ISB in armv8pmu_enable_event() Julien Thierry (5): arm64: perf: Remove PMU locking arm64: perf: Defer irq_wor

[PATCH v5 1/7] arm64: perf: Add missing ISB in armv8pmu_enable_event()

Julien Thierry Signed-off-by: Alexandru Elisei --- arch/arm64/kernel/perf_event.c | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm64/kernel/perf_event.c b/arch/arm64/kernel/perf_event.c index 4d7879484cec..ee180b2a5b39 100644 --- a/arch/arm64/kernel/perf_event.c +++ b/arch/arm64/kern

[PATCH v5 2/7] arm64: perf: Avoid PMXEV* indirection

nused read_pmevtypern function, fix counter index issue.] Signed-off-by: Julien Thierry [Removed comment, removed trailing semicolons in macros, added ISB] Signed-off-by: Alexandru Elisei --- arch/arm64/kernel/perf_event.c | 95 +- 1 file changed, 81 insertions(+

[PATCH v5 7/7] arm_pmu: arm64: Use NMIs for PMU

-off-by: Julien Thierry [Added that NMIs only work on arm64 + GICv3] Signed-off-by: Alexandru Elisei --- drivers/perf/arm_pmu.c | 62 ++ 1 file changed, 56 insertions(+), 6 deletions(-) diff --git a/drivers/perf/arm_pmu.c b/drivers/perf/arm_pmu.c index

[PATCH v5 5/7] arm64: kvm: pmu: Make overflow handler NMI safe

...@lists.cs.columbia.edu Cc: k...@vger.kernel.org Signed-off-by: Julien Thierry Signed-off-by: Alexandru Elisei --- arch/arm64/kvm/pmu-emul.c | 25 - include/kvm/arm_pmu.h | 1 + 2 files changed, 25 insertions(+), 1 deletion(-) diff --git a/arch/arm64/kvm/pmu-emul.c b

[PATCH v5 6/7] arm_pmu: Introduce pmu_irq_ops

rrupt. The appropriate set of callbacks is selected at interrupt request time and simplifies interrupt enabling/disabling and freeing. Cc: Julien Thierry Cc: Will Deacon Cc: Mark Rutland Signed-off-by: Julien Thierry Signed-off-by: Alexandru Elisei --- drivers/perf/arm_

[PATCH v5 3/7] arm64: perf: Remove PMU locking

a Cc: Namhyung Kim Cc: Catalin Marinas Signed-off-by: Julien Thierry [Explained why locking is not needed, removed WARN_ONs] Signed-off-by: Alexandru Elisei --- arch/arm64/kernel/perf_event.c | 28 1 file changed, 28 deletions(-) diff --git a/arch/arm64/kernel/perf

Re: [PATCH 0/3] arm64: perf: Add support for Perf NMI interrupts

Hi, On 5/18/20 11:45 AM, Mark Rutland wrote: > Hi all, > > On Mon, May 18, 2020 at 02:26:00PM +0800, Lecopzer Chen wrote: >> HI Sumit, >> >> Thanks for your information. >> >> I've already implemented IPI (same as you did [1], little difference >> in detail), hardlockup detector and perf in last y

[tip: irq/core] irqchip/gic-v3: Spell out when pseudo-NMIs are enabled

The following commit has been merged into the irq/core branch of tip: Commit-ID: 4e594ad1068ea1db359d6161f580f03edecf6cb0 Gitweb: https://git.kernel.org/tip/4e594ad1068ea1db359d6161f580f03edecf6cb0 Author:Alexandru Elisei AuthorDate:Sat, 12 Sep 2020 16:37:06 +01:00

[tip: irq/core] irqchip/gic-v3: Support pseudo-NMIs when SCR_EL3.FIQ == 0

The following commit has been merged into the irq/core branch of tip: Commit-ID: 336780590990efa69596884114cad3f517b6333b Gitweb: https://git.kernel.org/tip/336780590990efa69596884114cad3f517b6333b Author:Alexandru Elisei AuthorDate:Sat, 12 Sep 2020 16:37:07 +01:00

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