-December/006099.html
Aleksey Makarov (2):
ACPI: table upgrade: use cacheable map for tables
ACPI: table upgrade: move early_initrd_acpi_init() to header file
Jon Masters (1):
ACPI: ARM64: support for ACPI_TABLE_UPGRADE
arch/arm64/kernel/setup.c | 6 --
arch/x86/kernel/setup.c | 7
On 05/17/2016 03:46 PM, Mark Rutland wrote:
> On Tue, May 17, 2016 at 03:06:03PM +0300, Aleksey Makarov wrote:
[...]
>> diff --git a/arch/arm64/kernel/setup.c b/arch/arm64/kernel/setup.c
>> index feab2ee..1d5e24f 100644
>> --- a/arch/arm64/kernel/setup.c
>> +++
naro-acpi/2015-December/006101.html
[3] https://lists.linaro.org/pipermail/linaro-acpi/2015-December/006099.html
Aleksey Makarov (4):
ACPI: table upgrade: use cacheable map for tables
ACPI: table upgrade: refactor function definitions
ACPI: table upgrade: move arch-specific symbol t
acpi_table_upgrade() and acpi_boot_table_init() are called so I
think that we can just move this mapping one function earlier too.
Signed-off-by: Jon Masters
Signed-off-by: Aleksey Makarov
---
arch/arm64/Kconfig| 1 +
arch/arm64/include/asm/acpi.h | 2 ++
arch/arm64/kernel/setup.c | 6
removes the unneeded
wraps early_acpi_table_init() and early_initrd_acpi_init().
Signed-off-by: Aleksey Makarov
---
arch/x86/kernel/setup.c | 9 +
drivers/acpi/tables.c | 14 --
include/linux/acpi.h| 8 ++--
3 files changed, 11 insertions(+), 20 deletions(-)
diff
The new memory allocated in acpi_table_initrd_init() is used to
copy the upgraded tables to it. So it should be mapped with
early_memunmap() instead of early_ioremap().
This is critical for ARM.
Signed-off-by: Aleksey Makarov
Acked-by: Lv Zheng
---
drivers/acpi/tables.c | 6 +++---
1 file
We want to use the table upgrade feature in ARM64.
Introduce a new configuration option that allows that.
Signed-off-by: Aleksey Makarov
---
arch/x86/Kconfig | 1 +
drivers/acpi/Kconfig | 5 -
2 files changed, 5 insertions(+), 1 deletion(-)
diff --git a/arch/x86/Kconfig b/arch/x86
The constant that defines max phys address where the new upgraded
ACPI table should be allocated is arch-specific. Move it to
Signed-off-by: Aleksey Makarov
---
arch/x86/include/asm/acpi.h | 2 ++
drivers/acpi/tables.c | 3 ++-
2 files changed, 4 insertions(+), 1 deletion(-)
diff --git
This patch adds function pl011_console_match() that implements
method match of struct console. It allows to match consoles against
data specified in a string, for example taken from command line or
compiled by ACPI SPCR table handler.
Signed-off-by: Aleksey Makarov
Reviewed-by: Peter Hurley
f required,
enable specified console.
Thanks to Peter Hurley for explaining how this should work.
[1]
http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.den0044a/index.html
[2]
https://msdn.microsoft.com/en-us/library/windows/hardware/dn639132(v=vs.85).aspx
Signed-off-by: Aleks
ction from
arch/microblaze/kernel/prom.c
Signed-off-by: Leif Lindholm
Signed-off-by: Aleksey Makarov
Acked-by: Rob Herring
Acked-by: Greg Kroah-Hartman
Reviewed-by: Peter Hurley
Tested-by: Kefeng Wang
---
drivers/of/fdt.c | 11 +--
drivers/tty/serial/earlycon.c | 2 +-
-arch.
When ACPI_SPCR_TABLE is defined initialization of DT earlycon is
deferred until the DT/ACPI decision is done. Initialize DT earlycon
if ACPI is disabled.
Signed-off-by: Aleksey Makarov
Tested-by: Kefeng Wang
---
arch/arm64/Kconfig | 1 +
arch/arm64/kernel/acpi.c | 11 +
ndows/hardware/dn639132(v=vs.85).aspx
[3]
https://lkml.kernel.org/g/1441716217-23786-1-git-send-email-leif.lindh...@linaro.org
[4]
https://lkml.kernel.org/g/1457415800-8799-1-git-send-email-...@codeaurora.org
Aleksey Makarov (3):
ACPI: parse SPCR and enable matching console
ARM64: ACPI: ena
On 05/20/2016 04:03 PM, Aleksey Makarov wrote:
> 'ARM Server Base Boot Requirements' [1] mentions SPCR (Serial Port Console
> Redirection Table) [2] as a mandatory ACPI table that specifies the
> configuration of serial console.
Hi Russell,
Can you review these patches and
On 05/20/2016 12:22 AM, Rafael J. Wysocki wrote:
> On Thu, May 19, 2016 at 6:15 PM, Aleksey Makarov
> wrote:
>> This patchset adds support for ACPI_TABLE_UPGRADE for ARM64
Hi Catalin, Will,
Can you review these patches and consider ACKing the ARM64 part [5/5]
please?
Thank
only limited slots
> available for drivers to map memory.
> So by changing __init to __ref here, you probably will hide many such defects.
What defects? This funcions checks acpi_gbl_permanent_mmap.
BTW, exactly the same thing is done in the beginning of acpi_os_unmap_memory()
and than's
Hi Peter,
Thank you for review.
On 02/19/2016 01:03 AM, Peter Hurley wrote:
> On 02/17/2016 07:36 PM, Zheng, Lv wrote:
>> Hi,
>>
>>> From: Aleksey Makarov [mailto:aleksey.maka...@linaro.org]
>>> Subject: Re: [PATCH v3 1/5] ACPI: change __init to __ref f
Hi Peter,
Thank you for review.
On 02/19/2016 01:19 AM, Peter Hurley wrote:
> On 02/15/2016 10:05 AM, Aleksey Makarov wrote:
[..]
>> diff --git a/drivers/tty/serial/serial_core.c
>> b/drivers/tty/serial/serial_core.c
>> index a126a60..459ab54 100644
>> --- a/drive
Hi Lv,
On 02/19/2016 05:58 AM, Zheng, Lv wrote:
> Hi,
>
>> From: Peter Hurley [mailto:pe...@hurleysoftware.com]
>> Subject: Re: [PATCH v3 1/5] ACPI: change __init to __ref for
>> early_acpi_os_unmap_memory()
>>
>> On 02/17/2016 07:36 PM, Zheng, Lv wrote:
&g
1441716217-23786-1-git-send-email-leif.lindh...@linaro.org
Aleksey Makarov (4):
ACPI: parse SPCR and enable matching console
ACPI: enable ACPI_SPCR_TABLE on ARM64
ACPI: add definitions of DBG2 subtypes
serial: pl011: use ACPI SPCR to setup 32-bit access
arch/arm64/Kconfig
SBBR mentions SPCR as a mandatory ACPI table.
So enable it for ARM64
Signed-off-by: Aleksey Makarov
---
arch/arm64/Kconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig
index 9dc5209..544af2e 100644
--- a/arch/arm64/Kconfig
+++ b/arch/arm64/Kconfig
.85).aspx
[2]
https://msdn.microsoft.com/en-us/library/windows/hardware/dn639132(v=vs.85).aspx
Signed-off-by: Aleksey Makarov
---
include/acpi/actbl2.h | 5 +
1 file changed, 5 insertions(+)
diff --git a/include/acpi/actbl2.h b/include/acpi/actbl2.h
index a4ef625..652f747 100644
--- a
the SPCR
table is ACPI_DBG2_ARM_SBSA_32BIT.
How this value is described in the DBG2 spec:
"(deprecated) ARM SBSA (2.x only) Generic UART supporting only
32-bit accesses"
Signed-off-by: Aleksey Makarov
---
drivers/acpi/spcr.c | 22 ++
drivers/tty
c.den0044a/index.html
[2]
http://msdn.microsoft.com/en-us/library/windows/hardware/dn639131(v=vs.85).aspx
Signed-off-by: Aleksey Makarov
---
drivers/acpi/Kconfig | 3 +
drivers/acpi/Makefile| 1 +
drivers/acpi/spcr.c | 116 ++
ned-off-by: Aleksey Makarov
---
Documentation/kernel-parameters.txt | 3 ++
drivers/tty/serial/earlycon.c | 60 +
include/linux/acpi_dbg2.h | 20 +
3 files changed, 83 insertions(+)
diff --git a/Documentation/kernel-paramet
nd subtype.
- For each declared port that is also described in the ACPI DBG2 table
call the provided callback.
[1]
http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.den0044a/index.html
[2] http://go.microsoft.com/fwlink/p/?LinkId=234837
Signed-off-by: Aleksey Makarov
---
drivers/ac
.85).aspx
[2]
https://msdn.microsoft.com/en-us/library/windows/hardware/dn639132(v=vs.85).aspx
Signed-off-by: Aleksey Makarov
---
include/acpi/actbl2.h | 5 +
1 file changed, 5 insertions(+)
diff --git a/include/acpi/actbl2.h b/include/acpi/actbl2.h
index a4ef625..652f747 100644
--- a
https://lkml.kernel.org/g/1441716217-23786-1-git-send-email-leif.lindh...@linaro.org
Aleksey Makarov (6):
ACPI: add definitions of DBG2 subtypes
ACPI: genaralize iterating over subtables in ACPI_PROBE_TABLE()
ACPI: parse DBG2 table
ACPI: serial: implement earlycon on ACPI DBG2 port
ACPI: enable
Add a handler for ACPI DBG2 serial port of type ACPI_DBG2_ARM_PL011
that sets up an earlycon on it.
Signed-off-by: Aleksey Makarov
---
drivers/tty/serial/amba-pl011.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/tty/serial/amba-pl011.c b/drivers/tty/serial/amba-pl011.c
index
From: Leif Lindholm
We have multiple "earlycon" early_param handlers - merge the DT one into
the main earlycon one. This means the earlycon early_param handler does
not just return success if no options are specified.
Signed-off-by: Leif Lindholm
Signed-off-by: Aleksey Makarov
---
SBBR mentions DBG2 as a mandatory ACPI table.
So enable it for ARM64
Signed-off-by: Aleksey Makarov
---
arch/arm64/Kconfig | 1 +
arch/arm64/kernel/acpi.c | 2 ++
2 files changed, 3 insertions(+)
diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig
index 9dc5209..0b614d4 100644
--- a
e subtable callback validator.
Instead, pass the sideband data specified by the driver.
- Fix the driver's callback signatures: a. Add an unused pointer to void
for table matchers (currently only clocksource callback) b. Change
the type of sideband data to kernel_ulong_t.
Signed-off-by:
Hi Andy,
Thank you for review.
On 02/29/2016 04:29 PM, Andy Shevchenko wrote:
> On Mon, Feb 29, 2016 at 2:02 PM, Aleksey Makarov
> wrote:
>> 'ARM Server Base Boot Requiremets' [1] mentions SPCR (Serial Port
>> Console Redirection Table) [2] as a mandatory ACPI
On 02/13/2016 02:07 AM, Rafael J. Wysocki wrote:
> On Fri, Feb 12, 2016 at 6:43 PM, Aleksey Makarov
> wrote:
>> The function acpi_table_parse() has some problems:
>> 1 It can be called only from __init code
>> 2 It does not pass any data to the handler
>> 3 It just
Hi Rafael,
Thank you for review.
On 02/13/2016 02:08 AM, Rafael J. Wysocki wrote:
> On Fri, Feb 12, 2016 at 7:51 PM, Greg Kroah-Hartman
> wrote:
>> On Fri, Feb 12, 2016 at 08:43:34PM +0300, Aleksey Makarov wrote:
>>> The function acpi_table_parse() has some problems:
&
inserted.
When this table accessed before acpi_gbl_permanent_mmap is set,
the pointer should be unmapped. This is exactly what this function
does.
Signed-off-by: Aleksey Makarov
---
drivers/acpi/osl.c | 6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/drivers/acpi/osl.c b/drivers
SBBR mentions SPCR as a mandatory ACPI table.
So enable it for ARM64
Signed-off-by: Aleksey Makarov
---
arch/arm64/Kconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig
index 6bb21d8..75739cd 100644
--- a/arch/arm64/Kconfig
+++ b/arch/arm64/Kconfig
the SPCR
table is ACPI_DBG2_ARM_SBSA_32BIT.
How this value is described in the DBG2 spec:
"(deprecated) ARM SBSA (2.x only) Generic UART supporting only
32-bit accesses"
Signed-off-by: Aleksey Makarov
---
drivers/acpi/spcr.c | 25 +
drivers/tty
.85).aspx
[2]
https://msdn.microsoft.com/en-us/library/windows/hardware/dn639132(v=vs.85).aspx
Signed-off-by: Aleksey Makarov
---
include/acpi/actbl2.h | 5 +
1 file changed, 5 insertions(+)
diff --git a/include/acpi/actbl2.h b/include/acpi/actbl2.h
index a4ef625..e9930ab 100644
--- a
c.den0044a/index.html
[2]
http://msdn.microsoft.com/en-us/library/windows/hardware/dn639131(v=vs.85).aspx
Signed-off-by: Aleksey Makarov
---
drivers/acpi/Kconfig | 3 ++
drivers/acpi/Makefile| 1 +
drivers/acpi/spcr.c | 97
d
.den0044a/index.html
[3]
https://msdn.microsoft.com/en-us/library/windows/hardware/dn639132(v=vs.85).aspx
Aleksey Makarov (5):
ACPI: change __init to __ref for early_acpi_os_unmap_memory()
ACPI: parse SPCR and enable matching console
ACPI: enable ACPI_SPCR_TABLE on ARM64
ACPI: add definition of
Factor out the code that finds the first physical device
of a given ACPI device. It is used in several places.
Signed-off-by: Aleksey Makarov
---
drivers/acpi/acpi_platform.c | 19 ++-
drivers/acpi/bus.c | 26 --
drivers/acpi/internal.h
Hi Matthias,
Thank you for review. The bug is fixed in the next version of the patchset.
Aleksey Makarov
On 02/23/2016 05:37 PM, Matthias Brugger wrote:
>
>
> On 23/02/16 14:57, Graeme Gregory wrote:
>> On Mon, Feb 22, 2016 at 04:45:17PM +0100, Matthias Brugger wrote:
>>
wlink/p/?LinkId=234837
[3]
https://lkml.kernel.org/g/149532-8305-1-git-send-email-aleksey.maka...@linaro.org
[4]
https://lkml.kernel.org/g/1441716217-23786-1-git-send-email-leif.lindh...@linaro.org
Aleksey Makarov (6):
ACPI: add definitions of DBG2 subtypes
ACPI: genaralize iterating ov
From: Leif Lindholm
We have multiple "earlycon" early_param handlers - merge the DT one into
the main earlycon one. This means the earlycon early_param handler does
not just return success if no options are specified.
Signed-off-by: Leif Lindholm
Signed-off-by: Aleksey Makarov
---
e subtable callback validator.
Instead, pass the sideband data specified by the driver.
- Fix the driver's callback signatures: a. Add an unused pointer to void
for table matchers (currently only clocksource callback) b. Change
the type of sideband data to kernel_ulong_t.
Signed-off-by:
Add a handler for ACPI DBG2 serial port of type ACPI_DBG2_ARM_PL011
that sets up an earlycon on it.
Signed-off-by: Aleksey Makarov
---
drivers/tty/serial/amba-pl011.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/tty/serial/amba-pl011.c b/drivers/tty/serial/amba-pl011.c
index
ned-off-by: Aleksey Makarov
---
Documentation/kernel-parameters.txt | 3 ++
drivers/tty/serial/earlycon.c | 60 +
include/linux/acpi_dbg2.h | 20 +
3 files changed, 83 insertions(+)
diff --git a/Documentation/kernel-paramet
SBBR mentions DBG2 as a mandatory ACPI table.
So enable it for ARM64
Signed-off-by: Aleksey Makarov
---
arch/arm64/Kconfig | 1 +
arch/arm64/kernel/acpi.c | 2 ++
2 files changed, 3 insertions(+)
diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig
index 2ee5731..4ad33f8 100644
--- a
nd subtype.
- For each declared port that is also described in the ACPI DBG2 table
call the provided callback.
[1]
http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.den0044a/index.html
[2] http://go.microsoft.com/fwlink/p/?LinkId=234837
Signed-off-by: Aleksey Makarov
---
drivers/ac
From: Leif Lindholm
In order to support selecting earlycon via either ACPI or DT, move
the decision on whether to attempt ACPI configuration into the
early_param handling. Then make acpi_boot_table_init() bail out if
acpi_disabled.
Signed-off-by: Leif Lindholm
Signed-off-by: Aleksey Makarov
.85).aspx
[2]
https://msdn.microsoft.com/en-us/library/windows/hardware/dn639132(v=vs.85).aspx
Signed-off-by: Aleksey Makarov
---
include/acpi/actbl2.h | 5 +
1 file changed, 5 insertions(+)
diff --git a/include/acpi/actbl2.h b/include/acpi/actbl2.h
index a4ef625..652f747 100644
--- a
On 02/24/2016 08:17 PM, Moore, Robert wrote:
> I've got these for the next release of ACPICA
It have not been pulled to linux-next but is required for the patchset.
So I included it here.
>
>
>> -Original Message-----
>> From: Aleksey Makarov [mailto:aleksey.m
Hi Matthias,
On 02/24/2016 09:22 PM, Matthias Brugger wrote:
>
>
> On 24/02/16 18:10, Aleksey Makarov wrote:
>> From: Leif Lindholm
>>
>> In order to support selecting earlycon via either ACPI or DT, move
>> the decision on whether to attempt ACPI configuration
That's fine, I use the approach I described in the last mail, it works.
Thank you
Aleksey Makarov
>
> Thanks and best regards
> -Lv
>
>> From: Aleksey Makarov [mailto:aleksey.maka...@linaro.org]
>> Sent: Monday, February 22, 2016 10:58 PM
>> Subject: Re: [PATCH
for OCTEON. This
code is protected with #ifdef CONFIG_64BIT so it still builds under
configurations lacking readq/writeq.
We can get rid of the #ifdef __BIG_ENDIAN, as under 64-bit accesses,
OCTEON is byte order invariant.
Signed-off-by: David Daney
Signed-off-by: Aleksey Makarov
---
drivers
From: Sunil Goutham
This vendor id will be used by network (vNIC), USB (xHCI),
SATA (AHCI), GPIO, I2C, MMC and maybe other drivers
for ThunderX SoC.
Acked-by: Bjorn Helgaas
Signed-off-by: Sunil Goutham
Signed-off-by: Aleksey Makarov
---
include/linux/pci_ids.h | 2 ++
1 file changed, 2
This patchset adds support for the Cavium ThunderX network controller.
changes in v5:
* __packed were removed. now we rely on C language ABI
* nic_dbg() -> netdev_dbg()
* fixes for a typo, constant spelling and using BIT_ULL
* use print_hex_dump()
* unnecessary conditions in a long if() chai
445-10061-1-git-send-email-r...@kernel.org>
v1: https://lkml.kernel.org/g/<20141030165434.GW20170@rric.localhost>
Aleksey Makarov (1):
pci: Add Cavium PCI vendor id
Sunil Goutham (1):
net: Adding support for Cavium ThunderX network controller
Signed-off-by: Aleksey Makarov
---
include/linux/pci_ids.h | 2 ++
1 file changed, 2 insertions(+)
diff --git a/include/linux/pci_ids.h b/include/linux/pci_ids.h
index e63c02a..3633cc6 100644
--- a/include/linux/pci_ids.h
+++ b/include/linux/pci_ids.h
@@ -2327,6 +2327,8 @@
#define
Author of this patch is
Author: Sunil Goutham
Sorry for this. It will be fixed in next versions.
On 05/15/2015 08:36 PM, Aleksey Makarov wrote:
Signed-off-by: Aleksey Makarov
---
include/linux/pci_ids.h | 2 ++
1 file changed, 2 insertions(+)
diff --git a/include/linux/pci_ids.h b
On 05/18/2015 02:05 PM, Aaro Koskinen wrote:
Hi,
On Mon, Mar 16, 2015 at 06:06:00PM +0300, Aleksey Makarov wrote:
The OCTEON MMC controller is currently found on cn61XX and cnf71XX
devices. Device parameters are configured from device tree data.
eMMC, MMC and SD devices are supported
This patchset adds support for the Cavium ThunderX network controller.
changes in v4:
* the patch "pci: Add Cavium PCI vendor id" was attributed correctly
* a note that Cavium id is used in many drivers was added
* the license comments now match MODULE_LICENSE
* a comment explaining usage of w
From: Sunil Goutham
This vendor id will be used by network (vNIC), USB (xHCI),
SATA (AHCI), GPIO, I2C, MMC and maybe other drivers
for ThunderX SoC.
Acked-by: Bjorn Helgaas
Signed-off-by: Sunil Goutham
Signed-off-by: Aleksey Makarov
---
include/linux/pci_ids.h | 2 ++
1 file changed, 2
The OCTEON SATA controller is currently found on cn71XX devices.
Cc: Arnd Bergmann
Acked-by: Hans de Goede
Signed-off-by: David Daney
Signed-off-by: Vinita Gupta
Signed-off-by: Aleksey Makarov
---
.../devicetree/bindings/ata/ahci-platform.txt | 1 +
.../devicetree/bindings/mips
From: David Daney
Don't assume they are there, the device tree will tell us.
Signed-off-by: David Daney
Signed-off-by: Aleksey Makarov
---
arch/mips/cavium-octeon/flash_setup.c | 42 ++-
1 file changed, 37 insertions(+), 5 deletions(-)
diff --git a/arch
From: David Daney
Without this, we get bus errors.
Signed-off-by: David Daney
Signed-off-by: Aleksey Makarov
---
arch/mips/Kconfig | 1 +
arch/mips/cavium-octeon/flash_setup.c | 42 ++-
2 files changed, 42 insertions(+), 1 deletion
Changes in v2:
- Rebase to v4.0-rc2
Summary:
- Use semaphore to protect access to bootbus.
- Use device tree to probe for flash chips.
Version 1:
https://lkml.kernel.org/g/<1419337623-16101-1-git-send-email-aleksey.maka...@auriga.com>
David Daney (3):
MIPS: OCTEON: Add semaphore to serial
: Aleksey Makarov
Signed-off-by: Chandrakala Chavva
---
arch/mips/cavium-octeon/setup.c | 3 +++
arch/mips/include/asm/octeon/octeon.h | 2 ++
2 files changed, 5 insertions(+)
diff --git a/arch/mips/cavium-octeon/setup.c b/arch/mips/cavium-octeon/setup.c
index a42110e..01130e9 100644
--- a/arch
Chavva
Signed-off-by: Peter Swain
[aleksey.maka...@auriga.com: preparation for submission]
Signed-off-by: Aleksey Makarov
---
.../devicetree/bindings/mmc/octeon-mmc.txt | 69 +
drivers/mmc/host/Kconfig | 10 +
drivers/mmc/host/Makefile
The OCTEON SATA controller is currently found on cn71XX devices.
Signed-off-by: David Daney
Signed-off-by: Vinita Gupta
Signed-off-by: Aleksey Makarov
---
Version 2:
https://lkml.kernel.org/g/<1422038495-5204-1-git-send-email-aleksey.maka...@auriga.com>
Changes in v3:
- Rebased to v4
From: Chandrakala Chavva
This fixes reboot for Octeon III boards
Signed-off-by: Chandrakala Chavva
Signed-off-by: Aleksey Makarov
---
arch/mips/cavium-octeon/setup.c | 5 -
arch/mips/include/asm/octeon/cvmx.h | 6 +-
2 files changed, 9 insertions(+), 2 deletions(-)
diff --git a
From: Chandrakala Chavva
Also delete unused cvmx_reset_octeon()
This fixes reboot for Octeon III boards
Signed-off-by: Chandrakala Chavva
Signed-off-by: Aleksey Makarov
---
arch/mips/cavium-octeon/setup.c | 5 -
arch/mips/include/asm/octeon/cvmx.h | 8
2 files changed, 4
The OCTEON MMC controller is currently found on cn61XX and cnf71XX
devices. Device parameters are configured from device tree data.
eMMC, MMC and SD devices are supported.
Tested-by: Aaro Koskinen
Signed-off-by: Chandrakala Chavva
Signed-off-by: David Daney
Signed-off-by: Aleksey Makarov
These patches fix some issues in the Cavium Octeon code and
introduce some partial support for Octeon III and little-endian.
Aleksey Makarov (1):
MIPS: OCTEON: Delete unused COP2 saving code
Chandrakala Chavva (1):
MIPS: OCTEON: Use correct instruction to read 64-bit COP0 register
David
From: David Daney
It wasn't being saved on task switch.
Signed-off-by: David Daney
Signed-off-by: Aleksey Makarov
---
arch/mips/kernel/octeon_switch.S | 19 +++
1 file changed, 7 insertions(+), 12 deletions(-)
diff --git a/arch/mips/kernel/octeon_switch.S b/arch/mips/k
resolution,
support for old compilers]
Signed-off-by: Aleksey Makarov
---
arch/mips/cavium-octeon/setup.c | 37 ++
arch/mips/include/asm/octeon/octeon.h | 13
arch/mips/include/asm/ptrace.h| 4 +-
arch/mips/kernel/octeon_switch.S | 128
From: Chandrakala Chavva
Use dmfc0/dmtc0 instructions for reading CvmMemCtl COP0 register,
its a 64-bit wide.
Signed-off-by: Chandrakala Chavva
Signed-off-by: Aleksey Makarov
---
arch/mips/kernel/octeon_switch.S | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch
From: David Daney
Allocate new save space, and then save/restore the registers if
OCTEON III.
Signed-off-by: David Daney
Signed-off-by: Aleksey Makarov
---
arch/mips/include/asm/processor.h | 2 ++
arch/mips/kernel/asm-offsets.c| 1 +
arch/mips/kernel/octeon_switch.S | 43
Commit 2c952e06e4f5 ("MIPS: Move cop2 save/restore to switch_to()")
removes assembler code to store COP2 registers. Commit
a36d8225bceb ("MIPS: OCTEON: Enable use of FPU") mistakenly
restores it
Fixes: a36d8225bceb ("MIPS: OCTEON: Enable use of FPU")
Signed-off-
From: David Daney
The acknowledge bits don't exist for level triggered irqs, so setting
them causes the simulator to terminate.
Signed-off-by: David Daney
Signed-off-by: Leonid Rosenboim
Signed-off-by: Aleksey Makarov
---
arch/mips/cavium-octeon/octeon-irq.c
From: David Daney
Add coverage for OCTEON III models.
Signed-off-by: David Daney
Signed-off-by: Aleksey Makarov
---
arch/mips/include/asm/octeon/octeon-model.h | 65 -
1 file changed, 63 insertions(+), 2 deletions(-)
diff --git a/arch/mips/include/asm/octeon
From: David Daney
The clock divisors are kept in different registers on OCTEON III.
Signed-off-by: David Daney
Signed-off-by: Aleksey Makarov
---
arch/mips/cavium-octeon/csrc-octeon.c | 10 ++
1 file changed, 10 insertions(+)
diff --git a/arch/mips/cavium-octeon/csrc-octeon.c
b
From: David Daney
Needed by follow-on patches.
Signed-off-by: David Daney
Signed-off-by: Aleksey Makarov
---
arch/mips/include/asm/octeon/cvmx-rst-defs.h | 441 +++
1 file changed, 441 insertions(+)
create mode 100644 arch/mips/include/asm/octeon/cvmx-rst-defs.h
From: David Daney
Also update union octeon_cvmemctl with new OCTEON II fields.
Signed-off-by: David Daney
[aleksey.maka...@auriga.com: use __BITFIELD_FIELD]
Signed-off-by: Aleksey Makarov
---
arch/mips/include/asm/octeon/octeon.h | 135 ++
1 file changed, 105
From: David Daney
If 'rd_name=xxx' is passed to the kernel, the named block with name
'xxx' is used for the initrd.
Signed-off-by: David Daney
Signed-off-by: Leonid Rosenboim
[aleksey.maka...@auriga.com: conflict resolution]
Signed-off-by: Aleksey Makarov
---
arch/mips/c
From: David Daney
Signed-off-by: David Daney
Signed-off-by: Aleksey Makarov
---
arch/mips/include/asm/processor.h | 6 --
1 file changed, 6 deletions(-)
diff --git a/arch/mips/include/asm/processor.h
b/arch/mips/include/asm/processor.h
index a5b8a7f..728b05a 100644
--- a/arch/mips
From: David Daney
Disable ICache prefetch for certian Octeon II processors.
Signed-off-by: David Daney
Signed-off-by: Aleksey Makarov
---
.../asm/mach-cavium-octeon/kernel-entry-init.h | 22 ++
1 file changed, 22 insertions(+)
diff --git a/arch/mips/include/asm/mach
On 12/15/2014 11:53 PM, Aaro Koskinen wrote:
> On Mon, Dec 15, 2014 at 09:03:15PM +0300, Aleksey Makarov wrote:
>> From: David Daney
>>
>> If 'rd_name=xxx' is passed to the kernel, the named block with name
>> 'xxx' is used for the initrd.
>
the Cavium Octeon code and
introduce some partial support for Octeon III and little-endian.
Aleksey Makarov (1):
MIPS: OCTEON: Delete unused COP2 saving code
Chandrakala Chavva (1):
MIPS: OCTEON: Use correct instruction to read 64-bit COP0 register
David Daney (10):
MIPS: OCTEON: Save/Res
From: David Daney
Allocate new save space, and then save/restore the registers if
OCTEON III.
Signed-off-by: David Daney
Signed-off-by: Aleksey Makarov
---
arch/mips/include/asm/processor.h | 2 ++
arch/mips/kernel/asm-offsets.c| 1 +
arch/mips/kernel/octeon_switch.S | 43
resolution,
support for old compilers]
Signed-off-by: Aleksey Makarov
---
arch/mips/cavium-octeon/setup.c | 37 ++
arch/mips/include/asm/octeon/octeon.h | 13
arch/mips/include/asm/ptrace.h| 4 +-
arch/mips/kernel/octeon_switch.S | 128
From: David Daney
It wasn't being saved on task switch.
Signed-off-by: David Daney
Signed-off-by: Aleksey Makarov
---
arch/mips/kernel/octeon_switch.S | 19 +++
1 file changed, 7 insertions(+), 12 deletions(-)
diff --git a/arch/mips/kernel/octeon_switch.S b/arch/mips/k
From: David Daney
The acknowledge bits don't exist for level triggered irqs, so setting
them causes the simulator to terminate.
Signed-off-by: David Daney
Signed-off-by: Leonid Rosenboim
Signed-off-by: Aleksey Makarov
---
arch/mips/cavium-octeon/octeon-irq.c
From: David Daney
Disable ICache prefetch for certian Octeon II processors.
Signed-off-by: David Daney
Signed-off-by: Aleksey Makarov
---
.../asm/mach-cavium-octeon/kernel-entry-init.h | 22 ++
1 file changed, 22 insertions(+)
diff --git a/arch/mips/include/asm/mach
Commit 2c952e06e4f5 ("MIPS: Move cop2 save/restore to switch_to()")
removes assembler code to store COP2 registers. Commit
a36d8225bceb ("MIPS: OCTEON: Enable use of FPU") mistakenly
restores it
Fixes: a36d8225bceb ("MIPS: OCTEON: Enable use of FPU")
Signed-off-
From: Chandrakala Chavva
Use dmfc0/dmtc0 instructions for reading CvmMemCtl COP0 register,
its a 64-bit wide.
Signed-off-by: Chandrakala Chavva
Signed-off-by: Aleksey Makarov
---
arch/mips/kernel/octeon_switch.S | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch
From: David Daney
If 'rd_name=xxx' is passed to the kernel, the named block with name
'xxx' is used for the initrd.
Signed-off-by: David Daney
Signed-off-by: Leonid Rosenboim
[aleksey.maka...@auriga.com: conflict resolution]
Signed-off-by: Aleksey Makarov
---
arch/mips/c
From: David Daney
Also update union octeon_cvmemctl with new OCTEON II fields.
Signed-off-by: David Daney
[aleksey.maka...@auriga.com: use __BITFIELD_FIELD]
Signed-off-by: Aleksey Makarov
---
arch/mips/include/asm/octeon/octeon.h | 135 ++
1 file changed, 105
From: David Daney
The clock divisors are kept in different registers on OCTEON III.
Signed-off-by: David Daney
Signed-off-by: Aleksey Makarov
---
arch/mips/cavium-octeon/csrc-octeon.c | 34 ++
1 file changed, 34 insertions(+)
diff --git a/arch/mips/cavium
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