> From: Anson Huang
> Sent: Sunday, May 5, 2019 2:19 PM
>
> Use imx_mmdc_mask_handshake() API instead of programming CCM register
> directly in each platform to mask unused MMDC channel's handshake.
>
> Signed-off-by: Anson Huang
Reviewed-by: Dong Aisheng
Regards
Dong Aisheng
> From: Anson Huang
> Sent: Sunday, May 5, 2019 11:32 AM
> Subject: [PATCH] i2c: imx: Use __maybe_unused instead of #if CONFIG_PM
>
> Use __maybe_unused for runtime PM related functions instead of #if
> CONFIG_PM to simply the code.
>
> Signed-off-by: Anson Huang
Reviewed-by: Dong Aisheng
Reg
> From: Fabio Estevam [mailto:feste...@gmail.com]
> Sent: Saturday, May 4, 2019 7:04 PM
>
> Hi Kay-Liu,
>
> On Thu, Apr 25, 2019 at 8:09 AM wrote:
> >
> > From: Kay-Liu
> >
> > The imx6sx's dts file defines five clocks for fec, the 'ahb'clock's
> > value is IMX6SX_CLK_ENET_AHB, but in the i.MX6
> From: Fabio Estevam [mailto:feste...@gmail.com]
> Sent: Saturday, May 4, 2019 7:02 PM
>
> Hi Kay-Liu,
>
> On Thu, Apr 25, 2019 at 8:14 AM wrote:
> >
> > From: Kay-Liu
> >
> > The imx6sx's dts file defines five clocks for fec, the 'ahb'clock's
> > value is IMX6SX_CLK_ENET_AHB, but in the i.MX6
i.MX8
> SCU OCOTP driver.
>
> Signed-off-by: Peng Fan
> Cc: Rob Herring
> Cc: Mark Rutland
> Cc: Aisheng Dong
> Cc: Shawn Guo
> Cc: Ulf Hansson
> Cc: Stephen Boyd
> Cc: Anson Huang
> Cc: devicet...@vger.kernel.org
> ---
> Documentation/devicetree/bin
> From: Peng Fan
> Sent: Sunday, May 5, 2019 9:28 PM
> Subject: [PATCH 2/4] nvmem: imx: add i.MX8 nvmem driver
>
> This patch adds i.MX8 nvmem ocotp driver to access fuse via RPC to i.MX8
> system controller.
>
> Signed-off-by: Peng Fan
Only a few minor comments.
Otherwise, this patch looks goo
> From: Peng Fan
> Sent: Sunday, May 5, 2019 9:28 PM
> Subject: [PATCH 3/4] defconfig: arm64: enable i.MX8 nvmem driver
>
> Build in CONFIG_NVMEM_IMX_OCOTP_SCU.
>
> Signed-off-by: Peng Fan
defconfig: arm64: enable i.MX8 SCU octop driver
otherwise:
Reviewed-by: Dong Aisheng
Regards
Dong Aishe
> From: Anson Huang
> Sent: Monday, May 6, 2019 11:27 AM
>
> i.MX6SL's KPP and WDOG use IMX6SL_CLK_IPG as clock root, assign
> IMX6SL_CLK_IPG to them instead of IMX6SL_CLK_DUMMY.
>
> Signed-off-by: Anson Huang
Reviewed-by: Dong Aisheng
Regards
Dong Aisheng
> From: Anson Huang
> Sent: Monday, May 6, 2019 11:27 AM
>
> i.MX6Q/DL's WDOGs use IMX6QDL_CLK_IPG as clock root, assign
> IMX6QDL_CLK_IPG to them instead of IMX6QDL_CLK_DUMMY.
>
> Signed-off-by: Anson Huang
Reviewed-by: Dong Aisheng
Regards
Dong Aisheng
Pengutronix Kernel Team
> Cc: Fabio Estevam
> Cc: NXP Linux Team
> Cc: Aisheng Dong
> Cc: Anson Huang
> Cc: Daniel Baluta
> Cc: devicet...@vger.kernel.org
> Cc: linux-arm-ker...@lists.infradead.org
> ---
> arch/arm64/boot/dts/freescale/imx8qxp.dtsi | 6 ++
>
> From: Anson Huang
> Sent: Monday, May 6, 2019 5:18 PM
> Subject: [PATCH 1/3] dt-bindings: clock: imx8mm: Add GPIO clocks
>
> Add macro for the GPIO clocks of the i.MX8MM.
>
> Signed-off-by: Anson Huang
Reviewed-by: Dong Aisheng
Regards
Dong Aisheng
> From: Anson Huang
> Sent: Monday, May 6, 2019 5:18 PM
> Subject: [PATCH 3/3] arm64: dts: imx8mm: add clock for GPIO node
>
> i.MX8MM has clock gate for each GPIO bank, add clock info to GPIO node for
> clock management.
>
> Signed-off-by: Anson Huang
Reviewed-by: Dong Aisheng
Regards
Dong A
> From: Anson Huang
> Sent: Monday, May 6, 2019 5:18 PM
> Subject: [PATCH 2/3] clk: imx8mm: add GPIO clocks to clock tree
>
> i.MX8MM has clock gate for each GPIO bank, add them into clock tree for
> GPIO driver to manage.
>
> Signed-off-by: Anson Huang
Reviewed-by: Dong Aisheng
Regards
Dong
> From: S.j. Wang
> Sent: Sunday, April 28, 2019 5:53 PM
>
> Add macros to define masks and bits for imx6sx MQS registers
>
> Signed-off-by: Shengjiu Wang
Reviewed-by: Dong Aisheng
Regards
Dong Aisheng
> From: Anson Huang
> Sent: Monday, April 29, 2019 3:03 PM
>
> Use __maybe_unused for power management related functions instead of #if
> CONFIG_PM_SLEEP to simply the code.
>
> Signed-off-by: Anson Huang
Reviewed-by: Dong Aisheng
Regards
Dong Aisheng
> From: Aisheng Dong
> Sent: Monday, April 29, 2019 7:28 PM
> Subject: RE: [PATCH] clk: imx: add fractional-N pll support to pllv4
> > The pllv4 supports fractional-N function, the formula is:
> >
> > PLL output freq = input * (mult + num/denom),
> >
> >
> From: Anson Huang
> Sent: Monday, April 29, 2019 11:19 AM
>
clk: imx: pllv4: add fractional-N pll support
> The pllv4 supports fractional-N function, the formula is:
>
> PLL output freq = input * (mult + num/denom),
>
> This patch adds fractional-N function support, including clock round rat
> From: Anson Huang
> Sent: Tuesday, April 30, 2019 9:55 AM
> Subject: [PATCH] clk: imx: pllv3: Fix fall through build warning
>
> Fix below fall through build warning:
>
> drivers/clk/imx/clk-pllv3.c:453:21: warning:
> this statement may fall through [-Wimplicit-fallthrough=]
>
>pll->denom_
> From: Anson Huang
> Sent: Tuesday, April 30, 2019 3:00 PM
> Subject: [PATCH] i2c: imx-lpi2c: Use __maybe_unused instead of #if
> CONFIG_PM_SLEEP
>
> Use __maybe_unused for power management related functions instead of #if
> CONFIG_PM_SLEEP to simply the code.
>
> Signed-off-by: Anson Huang
Ac
> From: Stephen Boyd [mailto:sb...@kernel.org]
> Sent: Thursday, May 2, 2019 5:01 AM
>
> The Content-transfer-encoding header is still base64. I guess it can't be
> fixed.
>
How can we know it's base64?
As I saw from the 'Headers' in patchwork, it's:
"Content-Type: text/plain; charset="us-ascii
> From: Richard Zhu
> Sent: Monday, August 5, 2019 10:51 AM
>
> Tx doorbell is handled by txdb_tasklet and doesn't have an associated IRQ.
>
> Anyhow, imx_mu_shutdown ignores this and tries to free an IRQ that wasn't
> requested for Tx DB resulting in the following warning:
>
> [1.967644] T
> From: Richard Zhu
> Sent: Monday, August 5, 2019 10:51 AM
>
> Make sure to only clear enabled interrupts keeping count of the connection
> type.
>
> Suggested-by: Oleksij Rempel
> Signed-off-by: Daniel Baluta
> Signed-off-by: Richard Zhu
Keep original author if any.
Otherwise:
Reviewed-by:
> From: Richard Zhu
> Sent: Monday, August 5, 2019 10:52 AM
>
> There is a version 1.0 MU on imx7ulp, use "fsl,imx7ulp-mu" compatible to
> support it.
>
> Signed-off-by: Richard Zhu
Reviewed-by: Dong Aisheng
Regards
Aisheng
> From: Anson Huang
>
> Some platforms like i.MX8MQ has clock control for this module, need to add
> clock operations to make sure the driver is working properly.
>
> Signed-off-by: Anson Huang
> Reviewed-by: Guido Günther
Reviewed-by: Dong Aisheng
Regards
Aisheng
> From: anson.hu...@nxp.com
> Sent: Tuesday, July 30, 2019 10:21 AM
>
> Use devm_platform_ioremap_resource() instead of of_iomap() to save the
> iounmap() call in error handle path;
>
> Signed-off-by: Anson Huang
Reviewed-by: Dong Aisheng
Regards
Aisheng
> From: anson.hu...@nxp.com
> Sent: Tuesday, July 30, 2019 10:21 AM
>
> When registering tmu zone failed, the error path should be err_tmu instead of
> err_iomap, as iounmap() needs to be called.
>
> Signed-off-by: Anson Huang
Reviewed-by: Dong Aisheng
Regards
Aisheng
> From: anson.hu...@nxp.com
> Sent: Tuesday, July 30, 2019 10:21 AM
>
> Some platforms like i.MX8M series SoCs have clock control for TMU, add
> optional clocks property to the binding doc.
>
> Signed-off-by: Anson Huang
> Reviewed-by: Rob Herring
Reviewed-by: Dong Aisheng
Regards
Aisheng
> From: anson.hu...@nxp.com
> Sent: Tuesday, July 30, 2019 10:21 AM
>
> Use __maybe_unused for power management related functions instead of #if
> CONFIG_PM_SLEEP to simply the code.
>
> Signed-off-by: Anson Huang
Reviewed-by: Dong Aisheng
Regards
Aisheng
> From: Linus Walleij [mailto:linus.wall...@linaro.org]
> Sent: Saturday, June 8, 2019 5:04 AM
>
> On Thu, May 30, 2019 at 5:04 AM wrote:
>
> > From: Anson Huang
> >
> > Add binding doc for i.MX8MN pinctrl driver.
> >
> > Signed-off-by: Anson Huang
>
> Looks mostly OK to me, but I'd like the
> From: anson.hu...@nxp.com [mailto:anson.hu...@nxp.com]
> Sent: Thursday, May 30, 2019 11:06 AM
>
> From: Anson Huang
>
> Add the pinctrl driver support for i.MX8MN.
>
> Signed-off-by: Anson Huang
> ---
> drivers/pinctrl/freescale/Kconfig | 7 +
> drivers/pinctrl/freescale/Makefil
> From: anson.hu...@nxp.com [mailto:anson.hu...@nxp.com]
> Sent: Thursday, May 30, 2019 11:06 AM
>
> Enable CONFIG_PINCTRL_IMX8MN by default to support i.MX8MN pinctrl
> driver.
>
> Signed-off-by: Anson Huang
Nitpick: please check the alphabetical order,
Otherwise:
Reviewed-by: Dong Aisheng
R
> From: Anson Huang
>
> Update RTC compatible string to make system controller RTC driver more
> generic for all i.MX SoCs with system controller inside.
>
> Signed-off-by: Anson Huang
Reviewed-by: Dong Aisheng
Regards
Dong Aisheng
> From: anson.hu...@nxp.com [mailto:anson.hu...@nxp.com]
> Sent: Tuesday, June 11, 2019 2:34 PM
>
> i.MX system controller RTC driver can support all i.MX SoCs with system
> controller inside, this patch makes the compatible string more generic to
> support other i.MX SoCs with system controller i
> From: anson.hu...@nxp.com [mailto:anson.hu...@nxp.com]
> Sent: Tuesday, June 11, 2019 2:34 PM
>
> The i.MX system controller RTC driver uses generic compatible string to
> support all i.MX SoCs with system controller inside, this patch adds the
> generic
> system controller RTC compatible strin
Hi Anson,
> From: Anson Huang
> Sent: Friday, February 22, 2019 5:42 PM
>
> Currently on i.MX8MQ platform, clock driver is probed later than GPIO driver,
> and GPIO driver does NOT have defer probe mechanism since the GPIO clock is
> optional, some platforms have GPIO clocks and some are NOT. So
Hi Arnd,
> From: Arnd Bergmann [mailto:a...@arndb.de]
> Sent: Tuesday, March 5, 2019 4:26 AM
>
> Submitted by Anders Roxell already
>
> Signed-off-by: Arnd Bergmann
How would suggest to handle this patch?
I've already given an Ack to Andres' v3 patch with a few additional comments,
but seems
+ Haibo
> From: Stefan Agner [mailto:ste...@agner.ch]
> Sent: Tuesday, February 26, 2019 9:22 PM
>
> On 26.02.2019 13:21, Aisheng Dong wrote:
> >> From: Christina Quast [mailto:cqu...@hanoverdisplays.com]
> >> Sent: Saturday, February 23, 2019 1:01 AM
> &g
> From: Arnd Bergmann [mailto:a...@arndb.de]
> Sent: Tuesday, March 5, 2019 4:30 PM
> On Tue, Mar 5, 2019 at 4:00 AM Aisheng Dong
> wrote:
> >
> > Hi Arnd,
> >
> > > From: Arnd Bergmann [mailto:a...@arndb.de]
> > > Sent: Tuesday, March 5, 201
[...]
> > > Btw, I saw that imx7d-sdb.dts (and probably other i.MX 7 boards too)
> > > use three different settings for usdhc pinctrl: 0x59, 0x5a and 0x5b
> > > (for default, 100MHz and 200MHz respectively). One would expect that
> > > higher frequency use higher driver strength (and this is the c
[...]
> > > > > diff --git
> > > > > a/Documentation/devicetree/bindings/arm/freescale/fsl,scu.txt
> > > > > b/Documentation/devicetree/bindings/arm/freescale/fsl,scu.txt
> > > > > index 72d481c..855270b 100644
> > > > > ---
> > > > > a/Documentation/devicetree/bindings/arm/freescale/fsl,scu.txt
>
Hi Rob,
> > > I think Rob suggested that the SCU parent driver should instantiate
> > > the watchdog without explicit watchdog node. That would be possible,
> > > but it currently uses
> > > devm_of_platform_populate() to do the instantiation, and changing
> > > that would be a mess. Besides, it d
[...]
> > diff --git a/drivers/firmware/imx/imx-scu.c
> > b/drivers/firmware/imx/imx-scu.c index 2bb1a19..df75ead 100644
> > --- a/drivers/firmware/imx/imx-scu.c
> > +++ b/drivers/firmware/imx/imx-scu.c
...
> > + /* register SCU child devices which are NOT in device tree */
> > + child_pdev =
> From: Anson Huang
> Sent: Wednesday, March 6, 2019 9:06 AM
>
> i.MX8QXP is an ARMv8 SoC which has a Cortex-M4 system controller inside,
> the system controller is in charge of controlling power, clock and watchdog
> etc..
>
> This patch adds i.MX system controller watchdog driver support, watch
[...]
> > As I replied in another mail, it actually does not depend on SCU.
> > Let's wait for Rob's comment on whether we could move watchdog Out of
> > SCU node.
>
> Per previous discussion, the dependency here is to prevent enabling this
> module for platform without IMX SCU, although it does
[...]
> >
> > > > As I replied in another mail, it actually does not depend on SCU.
> > > > Let's wait for Rob's comment on whether we could move watchdog Out
> > > > of SCU node.
> > >
> > > Per previous discussion, the dependency here is to prevent enabling
> > > this module for platform without
> From: Anson Huang
> Sent: Wednesday, June 10, 2020 6:42 AM
>
> Correct i.MX8MP UID fuse offset according to fuse map:
>
> UID_LOW: 0x420
> UID_HIGH: 0x430
>
> Fixes: fc40200ebf82 ("soc: imx: increase build coverage for imx8m soc driver")
AFAIK "Fixes:" should point to the original patch whic
> From: Anson Huang
> Sent: Tuesday, June 9, 2020 10:21 PM
>
> There are more and mroe requirements that SoC specific modules should be
> built as module in order to support generic kernel image, such as Android GKI
> concept.
>
> This patch series supports i.MX8 SoCs pinctrl drivers to be built
> From: Anson Huang
> Sent: Monday, June 29, 2020 1:54 PM
>
> i.MX common clock drivers may support module build, so it is NOT selected by
> default, for ARCH_MXC ARMv7 platforms, need to select it manually in each SoC
> to make build pass.
>
> Signed-off-by: Anson Huang
> ---
> Changes since V
> From: Arnd Bergmann
> Sent: Monday, June 29, 2020 4:20 PM
>
> On Mon, Jun 29, 2020 at 9:18 AM Dong Aisheng
> wrote:
> > On Thu, Jun 25, 2020 at 6:43 AM Stephen Boyd wrote:
> > > Quoting Aisheng Dong (2020-06-23 19:59:09) Why aren't there options
> >
> From: Arnd Bergmann
> Sent: Thursday, June 18, 2020 3:21 PM
>
> On Wed, Jun 17, 2020 at 11:41 AM Anson Huang
> wrote:
>
> > > >
> > > > I'm ok with the change. But I'm curious how can this module be
> > > > autoloaded without MODULE_DEVICE_TABLE.
> > > > Have you tested if it can work?
> > >
> From: Nathan Chancellor
> Sent: Tuesday, June 23, 2020 9:04 AM
>
> When CONFIG_PM and CONFIG_PM_SLEEP are unset, the following warnings
> occur:
>
> drivers/mailbox/imx-mailbox.c:638:12: warning: 'imx_mu_runtime_resume'
> defined but not used [-Wunused-function]
> 638 | static int imx_mu_run
> From: Stephen Boyd
> Sent: Saturday, June 20, 2020 11:28 AM
> Subject: RE: [PATCH V2 3/9] clk: imx: Support building SCU clock driver as
> module
>
> Quoting Aisheng Dong (2020-06-17 18:58:51)
> > > From: Anson Huang
> > > > > +obj-$(CONFIG_MXC_CLK_
> From: Stephen Boyd
> Sent: Tuesday, June 23, 2020 4:34 PM
> Subject: RE: [PATCH V2 3/9] clk: imx: Support building SCU clock driver as
> module
>
> Quoting Aisheng Dong (2020-06-22 20:42:19)
> > > From: Stephen Boyd
> > > Sent: Saturday, June 20, 2020 11:28
> From: Andy Duan
> Sent: Monday, June 15, 2020 10:49 AM
>
> From: wu000...@umn.edu Sent: Sunday, June 14,
> 2020 6:12 AM
> > From: Qiushi Wu
> >
> > pm_runtime_get_sync() increments the runtime PM usage counter even
> > when it returns an error code. Thus call pm_runtime_put_noidle() if
> > pm_
> From: Wolfram Sang
> Sent: Sunday, June 14, 2020 5:12 PM
>
> On Mon, Jun 01, 2020 at 02:16:40PM +0800, Dinghao Liu wrote:
> > pm_runtime_get_sync() increments the runtime PM usage counter even the
> > call returns an error code. Thus a corresponding decrement is needed
> > on the error handling
> From: Wolfram Sang
> Sent: Friday, June 12, 2020 9:00 PM
>
> On Fri, Jun 12, 2020 at 02:18:06PM +0200, Marc Kleine-Budde wrote:
> > On 6/12/20 1:51 PM, Wolfram Sang wrote:
> > >
> > >> This basically kills the concept of devm for interrupts. Some other
> > >
> > > It only works when you can ens
> From: Vincenzo Frascino
> Sent: Monday, July 6, 2020 11:00 PM
>
> imx_mu_suspend_noirq()/imx_mu_resume_noirq() are currently used only
> when CONFIG_PM_SLEEP configuration options is enabled. Having it disabled
> triggers the following warning at compile time:
>
> drivers/mailbox/imx-mailbox.c
Hi Shawn,
> From: Anson Huang
> Sent: Monday, October 12, 2020 7:36 PM
>
> Hi, Shawn
>
> > Subject: Re: [PATCH V3 1/4] gpio: mxc: Support module build
> >
> > On Thu, Sep 17, 2020 at 7:40 AM Anson Huang
> > wrote:
> >
> > > Change config to tristate, add module device table, module author,
> >
> From: Anson Huang
> Sent: Saturday, May 9, 2020 4:18 PM
>
> Interrupts is a required property according to SRC binding, add it for SRC
> node.
>
> Signed-off-by: Anson Huang
Reviewed-by: Dong Aisheng
Regards
Aisheng
> From: Anson Huang
> Sent: Saturday, May 9, 2020 4:18 PM
>
> Interrupts is a required property according to SRC binding, add it for SRC
> node.
>
> Signed-off-by: Anson Huang
Reviewed-by: Dong Aisheng
Regards
Aisheng
[...]
> +
> +maintainers:
> + - Anson Huang
> +
> +description: |
> + The system reset controller can be used to reset various set of
> + peripherals. Device nodes that need access to reset lines should
> + specify them as a reset phandle in their corresponding node as
> + specified in reset
> From: Anson Huang
> Sent: Monday, May 11, 2020 7:58 PM
>
> Convert the i.MX7 reset binding to DT schema format using json-schema.
>
> Signed-off-by: Anson Huang
Reviewed-by: Dong Aisheng
Regards
Aisheng
> From: Peng Fan
> Sent: Tuesday, June 2, 2020 1:24 PM
>
> > Subject: RE: [PATCH 2/4] firmware: imx: add resource management api
> >
> > > From: Peng Fan
> > > Sent: Thursday, April 23, 2020 3:00 PM
> > >
> > > Add resource management API, when we have multiple partition running
> > > together,
> From: Peng Fan
> Sent: Tuesday, June 2, 2020 12:51 PM
> >
> > > From: Peng Fan
> > > Sent: Monday, June 1, 2020 8:40 PM
> > > >
> > > > > From: Peng Fan
> > > > > Sent: Friday, April 24, 2020 9:12 AM
> > > > > >
> > > > > > > From: Peng Fan
> > > > > > > Sent: Thursday, April 23, 2020 6:57 PM
> From: Peng Fan
> Sent: Tuesday, June 2, 2020 3:48 PM
> >
> > > From: Peng Fan
> > > Sent: Tuesday, June 2, 2020 12:51 PM
> > > >
> > > > > From: Peng Fan
> > > > > Sent: Monday, June 1, 2020 8:40 PM
> > > > > >
> > > > > > > From: Peng Fan
> > > > > > > Sent: Friday, April 24, 2020 9:12 AM
>
> From: Peng Fan
> Sent: Wednesday, June 3, 2020 11:32 AM
>
> Add resource management API, when we have multiple partition running
> together, resources not owned to current partition should not be used.
>
> Reviewed-by: Leonard Crestez
> Signed-off-by: Peng Fan
> ---
> drivers/firmware/imx/M
> From: Anson Huang
> Sent: Thursday, June 4, 2020 9:33 AM
>
> Convert the i.MX7ULP clock binding to DT schema format using json-schema,
> the original binding doc is actually for two clock modules(SCG and PCC), so
> split
> it to two binding docs, and the MPLL(mipi PLL) is NOT supposed to be in
> From: Peng Fan
> Sent: Wednesday, June 3, 2020 5:30 PM
>
> Use devm_kasprintf to simplify code
>
> Signed-off-by: Peng Fan
Reviewed-by: Dong Aisheng
Regards
Aisheng
> From: Saravana Kannan
> Sent: Saturday, August 22, 2020 2:28 AM
>
> On Thu, Aug 20, 2020 at 8:50 PM Dong Aisheng
> wrote:
> >
> > Hi ALL,
> >
> > We met the below WARNING during system suspend on an iMX6Q SDB board
> > with the latest linus/master branch (v5.9-rc1+) and next-20200820.
> > v5.8
> From: Krzysztof Kozlowski
> Sent: Monday, August 24, 2020 12:16 AM
>
> The USDHC on i.MX 8QXP has its own compatible described in bindings and
> used in the driver (with its own quirks). Remove additional fsl,imx7d-usdhc
> compatible to fix dtbs_check warnings like:
>
> arch/arm64/boot/dts/
> From: Anson Huang
> Sent: Friday, July 17, 2020 5:53 PM
>
> Hi, Arnd
>
> > Subject: Re: [PATCH 1/2] pinctrl: imx: Support building SCU pinctrl
> > driver as module
> >
> > On Fri, Jul 17, 2020 at 11:24 AM Anson Huang
> > wrote:
> > > > Subject: Re: [PATCH 1/2] pinctrl: imx: Support building S
> From: Anson Huang
> Sent: Thursday, July 16, 2020 11:07 PM
> Subject: [PATCH 1/2] pinctrl: imx: Support building SCU pinctrl driver as
> module
>
> To support building i.MX SCU pinctrl driver as module, below things need to be
> changed:
>
> - Export SCU related functions
This line seem
> From: Anson Huang
> Sent: Thursday, July 16, 2020 11:07 PM
> Subject: [PATCH 2/2] pinctrl: imx: Support building i.MX pinctrl driver as
> module
>
S/pinctrl driver/pinctrl core driver
This also applies for Patch 1/2.
> Change PINCTRL_IMX to tristate to support loadable module build.
>
> An
> From: Anson Huang
> Sent: Monday, September 7, 2020 8:33 PM
>
> Use function callbacks for SCU related functions in pinctrl-imx.c in order to
> support the scenario of PINCTRL_IMX is built in while PINCTRL_IMX_SCU is built
> as module, all drivers using SCU pinctrl driver need to initialize the
> From: Anson Huang
> Sent: Monday, September 7, 2020 8:33 PM
>
> Change PINCTR_IMX_SCU to tristate, remove unnecessary #ifdef and add
> module author, description and license to support building SCU pinctrl core
> driver as module.
>
> Signed-off-by: Anson Huang
> ---
> Changes since V1:
>
> From: Anson Huang
> Sent: Monday, September 7, 2020 8:33 PM
>
> Change PINCTRL_IMX to tristate to support loadable module build.
>
> And i.MX common pinctrl driver should depend on CONFIG_OF to make sure no
> build error when i.MX common pinctrl driver is enabled for different
> architectures
> From: Anson Huang
> Sent: Tuesday, September 8, 2020 4:12 PM
>
> Use function callbacks for SCU related functions in pinctrl-imx.c in order to
> support the scenario of PINCTRL_IMX is built in while PINCTRL_IMX_SCU is built
> as module, all drivers using SCU pinctrl driver need to initialize th
> From: Anson Huang
> Sent: Tuesday, September 8, 2020 4:12 PM
>
> Change PINCTR_IMX_SCU to tristate, add module author, description and
> license to support building SCU pinctrl core driver as module.
>
> Signed-off-by: Anson Huang
> ---
> changes since V3:
> - remove the prompt for PINC
e multiple calls for same OPP table in
> _of_add_opp_table_v1()")
> Reported-by: Aisheng Dong
> Signed-off-by: Viresh Kumar
Tested-by: Dong Aisheng
Regards
Aisheng
> ---
> drivers/opp/of.c | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git a/drivers/opp/of.c b/
> From: Colin King
> Sent: Friday, October 30, 2020 6:40 AM
>
> Pointer np is being initialized with a value that is never read and it is
> being
> updated with a value later on. The initialization is redundant and can be
> removed.
>
> Addresses-Coverity: ("Unused value")
> Signed-off-by: Coli
> From: Franck Lenormand (OSS)
> Sent: Tuesday, July 21, 2020 11:21 PM
> Subject: [PATCH v2 1/5] firmware: imx: scu-seco: Add SEcure Controller APIS
Is 'Secure' intended? Not 'Secure'?
>
> This patch adds the APIs:
> - imx_sc_seco_build_info: get commit and sha of SECO
> - imx_sc_seco_secvio_
> From: Franck Lenormand (OSS)
> Sent: Tuesday, July 21, 2020 11:21 PM
>
> This patch adds the API to retrieve the status of an IRQ.
>
> It also adds values used to process SECVIO IRQ from the SCU.
>
> Signed-off-by: Franck LENORMAND
> ---
> drivers/firmware/imx/imx-scu-irq.c | 37
> +
> From: Franck Lenormand (OSS)
> Sent: Tuesday, July 21, 2020 11:21 PM
>
> The SNVS can trigger interruption when detecting a SECurity VIOlation.
> This patch adds the definition of the resource.
>
Not sure if the uppercase of 'SECurity VIOlation' is intended because it looks
strange.
Otherwis
> From: Franck Lenormand (OSS)
> Sent: Tuesday, July 21, 2020 11:21 PM
>
> This patch adds the documentation for the SECurity VIOlation driver using the
> SCU on imx8x and imx8q.
>
> Signed-off-by: Franck LENORMAND
> ---
> .../bindings/arm/freescale/fsl,imx-sc-secvio.yaml | 34
> +
> From: Shawn Guo
> Sent: Wednesday, August 19, 2020 9:32 PM
> >
> > The SNVS is a hardware component in the imx8 SoC. One of its function
> > is to detect hardware attacks, in which case it creates a SECurity
> > VIOlation.
> >
> > This patch adds the support for the reception of these secvio and
Hi Greg,
> From: Greg Kroah-Hartman
> Sent: Monday, November 9, 2020 6:37 PM
> Subject: Re: [PATCH RESEND] driver core: export device_is_bound() to fix build
> failure
>
> On Mon, Nov 09, 2020 at 10:14:46AM +, Sudip Mukherjee wrote:
> > Hi Greg,
> >
> > On Sun, Nov 8, 2020 at 8:23 AM Greg Kr
> From: Sudip Mukherjee
> Sent: Monday, November 9, 2020 7:19 PM
>
> Hi Aisheng,
>
> On Mon, Nov 9, 2020 at 10:57 AM Aisheng Dong
> wrote:
> >
> > Hi Greg,
> >
> > > From: Greg Kroah-Hartman
> > > Sent: Monday, November 9, 2020 6:37
> From: Greg Kroah-Hartman
> Sent: Monday, November 9, 2020 7:41 PM
>
> On Mon, Nov 09, 2020 at 10:57:05AM +0000, Aisheng Dong wrote:
> > Hi Greg,
> >
> > > From: Greg Kroah-Hartman
> > > Sent: Monday, November 9, 2020 6:37 PM
> > &
> From: Greg Kroah-Hartman
> Sent: Monday, November 9, 2020 8:05 PM
>
> On Mon, Nov 09, 2020 at 11:55:46AM +0000, Aisheng Dong wrote:
> > > From: Greg Kroah-Hartman
> > > Sent: Monday, November 9, 2020 7:41 PM
> > >
> > > On Mon, Nov 09, 2020 at
> From: Peng Fan
> Sent: Friday, September 11, 2020 11:32 AM
>
>
> Enable cpufreq for i.MX7ULP when imx cpufreq dt driver enabled.
>
> Signed-off-by: Peng Fan
Reviewed-by: Dong Aisheng
Regards
Aisheng
> From: Peng Fan
> Sent: Friday, September 11, 2020 11:31 AM
>
> Add i.MX7ULP Power Management Controller binding doc
>
> Signed-off-by: Peng Fan
> ---
> .../bindings/arm/freescale/imx7ulp-pmc.yaml | 33 +++
> 1 file changed, 33 insertions(+)
> create mode 100644
> Documenta
> From: Abel Vesa
> Sent: Tuesday, September 8, 2020 6:25 PM
>
> These will be used by the imx8mp for blk_ctl driver.
>
> Signed-off-by: Abel Vesa
> Acked-by: Rob Herring
Reviewed-by: Dong Aisheng
Regards
Aisheng
> ---
> include/dt-bindings/clock/imx8mp-clock.h | 40
> +++
> From: Abel Vesa
> Sent: Tuesday, September 8, 2020 6:25 PM
>
> All these IDs are for one single HW gate (CCGR101) that is shared between
> these
> root clocks.
>
> Signed-off-by: Abel Vesa
> Acked-by: Rob Herring
Seems missed my tag.
So:
Reviewed-by: Dong Aisheng
Regards
Aisheng
> ---
>
> From: Peng Fan
> Sent: Friday, September 11, 2020 3:45 PM
>
> > Subject: RE: [PATCH 1/4] dt-bindings: fsl: add i.MX7ULP PMC binding
> > doc
> >
> > > From: Peng Fan
> > > Sent: Friday, September 11, 2020 11:31 AM
> > >
> > > Add i.MX7ULP Power Management Controller binding doc
> > >
> > > Sign
> From: Shawn Guo
> Sent: Wednesday, August 19, 2020 9:23 PM
>
> On Tue, Aug 18, 2020 at 09:52:02AM +0200, Franck LENORMAND (OSS) wrote:
> > Hello,
> >
> > Peng was able to do a firt pass of review on my patchset which led to
> > this second version. I hope a maintainer will be able to take a loo
> From: Krzysztof Kozlowski
> Sent: Friday, September 18, 2020 3:42 AM
>
> Add quite common property - power-domains - to fix dtbs_check warnings
> like:
>
> arch/arm64/boot/dts/freescale/imx8qxp-mek.dt.yaml:
> mailbox@5d28: 'power-domains' does not match any of the regexes:
> 'pinctrl
> From: Peng Fan
> Sent: Wednesday, September 16, 2020 10:49 AM
>
> Update fsl,imx7ulp-pm.yaml to include pmc
>
> Signed-off-by: Peng Fan
> ---
> .../devicetree/bindings/arm/freescale/fsl,imx7ulp-pm.yaml | 6 +-
> 1 file changed, 5 insertions(+), 1 deletion(-)
>
> diff --git
> a/Documen
> From: Peng Fan
> Sent: Wednesday, September 16, 2020 10:49 AM
>
> Add i.MX7ULP pmc node for m4 and a7.
>
> Signed-off-by: Peng Fan
> ---
> arch/arm/boot/dts/imx7ulp.dtsi | 10 ++
> 1 file changed, 10 insertions(+)
>
> diff --git a/arch/arm/boot/dts/imx7ulp.dtsi b/arch/arm/boot/dts/i
> From: Peng Fan
> Sent: Wednesday, September 16, 2020 10:49 AM
>
> Configure PMPROT to let ARM core could run into HSRUN mode.
> In LDO-enabled mode, HSRUN mode is not allowed, so add a check before
> configure PMPROT.
>
> Signed-off-by: Peng Fan
> ---
> arch/arm/mach-imx/pm-imx7ulp.c | 15 ++
> From: Peng Fan
> Sent: Wednesday, September 16, 2020 10:49 AM
>
> When cpu runs in HSRUN mode, cpuidle is not allowed to run into Stop mode.
> So add imx7ulp_get_mode to get thr cpu run mode, and use WAIT mode
> instead, when cpu in HSRUN mode.
>
> Signed-off-by: Peng Fan
> ---
> arch/arm/ma
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