The AM3517 has a different OTG controller location than the OMAP3,
which is included from omap3.dtsi. This results in a hwmod error.
Since the AM3517 has a different OTG controller address, this patch
disabes one that is isn't available.
Signed-off-by: Adam Ford
diff --git a/arch/arm/boo
On Tue, Jan 23, 2018 at 10:06 AM, David Lechner wrote:
> On 01/23/2018 10:03 AM, David Lechner wrote:
>>
>> You can see if the clock is enabled by running:
>>
>> cat /sys/kernel/debug/clk/clk_summary
>>
>
> I just realized if you can't boot, you can't do this. :-/
I can boot with the latest
On Wed, Jan 10, 2018 at 12:52 PM, Sekhar Nori wrote:
> On Wednesday 10 January 2018 08:31 AM, David Lechner wrote:
>> On 01/09/2018 06:35 AM, Sekhar Nori wrote:
>>> On Monday 08 January 2018 09:59 PM, David Lechner wrote:
On 01/08/2018 08:00 AM, Sekhar Nori wrote:
> On Monday 08 January 2
On Wed, Jan 10, 2018 at 8:50 PM, David Lechner wrote:
> On 01/10/2018 04:24 PM, Adam Ford wrote:
>>
>>
>> I am available tomorrow to build and test patches against the
>> da850-evm. I just need to know which version(s) to test.
>
>
> Great. As per the cove
On Thu, Jan 11, 2018 at 9:47 AM, Sekhar Nori wrote:
> On Thursday 11 January 2018 06:15 PM, Adam Ford wrote:
>> On Wed, Jan 10, 2018 at 8:50 PM, David Lechner wrote:
>>> On 01/10/2018 04:24 PM, Adam Ford wrote:
>>>>
>>>>
>>>> I am av
On Thu, Jan 11, 2018 at 11:22 AM, David Lechner wrote:
> On 01/11/2018 06:45 AM, Adam Ford wrote:
>>
>> On Wed, Jan 10, 2018 at 8:50 PM, David Lechner
>> wrote:
>>>
>>> On 01/10/2018 04:24 PM, Adam Ford wrote:
>>>>
>>>>
>>
On Thu, Jan 11, 2018 at 12:29 PM, David Lechner wrote:
> On 01/11/2018 12:09 PM, Adam Ford wrote:
>>
>> On Thu, Jan 11, 2018 at 11:22 AM, David Lechner
>> wrote:
>>>
>>> On 01/11/2018 06:45 AM, Adam Ford wrote:
>>>>
>>>>
On Thu, Jan 11, 2018 at 2:04 PM, David Lechner wrote:
> On 01/11/2018 12:50 PM, Adam Ford wrote:
>>
>> On Thu, Jan 11, 2018 at 12:29 PM, David Lechner
>> wrote:
>>>
>>> If removing the "clk_ignore_unused" option causes the board to not boot,
>
On Thu, Jan 11, 2018 at 3:04 PM, David Lechner wrote:
> On 01/11/2018 02:58 PM, Adam Ford wrote:
>>
>> On Thu, Jan 11, 2018 at 2:04 PM, David Lechner
>> wrote:
>>>
>>> On 01/11/2018 12:50 PM, Adam Ford wrote:
>>>>
>>>>
&
On Fri, Jan 12, 2018 at 9:25 AM, David Lechner wrote:
> On 01/12/2018 03:21 AM, Sekhar Nori wrote:
>>
>> On Monday 08 January 2018 07:47 AM, David Lechner wrote:
>>>
>>> This adds a new driver for mach-davinci PLL clocks. This is porting the
>>> code from arch/arm/mach-davinci/clock.c to the commo
644 drivers/clk/davinci/pll-dm646x.c
> create mode 100644 drivers/clk/davinci/pll.c
> create mode 100644 drivers/clk/davinci/pll.h
> create mode 100644 drivers/clk/davinci/psc-da830.c
> create mode 100644 drivers/clk/davinci/psc-da850.c
> create mode 100644 drivers/clk/davinci/psc-dm355.c
> create mode 100644 drivers/clk/davinci/psc-dm365.c
> create mode 100644 drivers/clk/davinci/psc-dm644x.c
> create mode 100644 drivers/clk/davinci/psc-dm646x.c
> create mode 100644 drivers/clk/davinci/psc.c
> create mode 100644 drivers/clk/davinci/psc.h
> create mode 100644 include/linux/clk/davinci.h
>
I tested this tested on DA850-evm in both Device Tree mode and using
the board file. The reboot is broken without the watchdog module, but
the watchdog patch is in [PATCH] ARM: davinci_all_defconfig: set
CONFIG_DAVINCI_WATCHDOG=y
Go ahead and mark me down as tested if you want.
Tested-by: Adam Ford
> --
> 2.7.4
>
On Thu, Jan 4, 2018 at 11:50 AM, David Lechner wrote:
>
>
> On 1/4/18 6:39 AM, Sekhar Nori wrote:
>>
>> On Monday 01 January 2018 05:09 AM, David Lechner wrote:
>>>
>>> This converts all of arch/arm/mach-davinci to the common clock framework.
>>> The clock drivers from clock.c and psc.c have been
260456 ("ARM: davinci: remove watchdog reset") and into the
>> watchdog driver, devices cannot reboot unless the watchdog driver is
>> loaded, so make it a compiled-in option so that we can always reboot, even
>> when modules are not loaded.
>>
>> Cc: Sek
On Tue, Jan 16, 2018 at 5:22 AM, Sekhar Nori wrote:
> Hi Adam, David,
>
> On Friday 12 January 2018 03:04 AM, Adam Ford wrote:
>> Thanks for clarifying. I was able to make it work with the following patch:
>>
>> diff --git a/drivers/clk/davinci/psc-da850.c
>>
On Wed, May 9, 2018 at 12:25 PM, David Lechner wrote:
> This series converts mach-davinci to use the common clock framework.
>
> The series works like this, the first 3 patches fix some issues with the clock
> drivers that have already been accepted into the mainline kernel.
>
> Then, starting wit
There are no keys connected to the keypad pins on any of the
logicpd torpedo SOM's.
This eliminates some splat about malformed keypad properies
Signed-off-by: Adam Ford
diff --git a/arch/arm/boot/dts/logicpd-torpedo-som.dtsi
b/arch/arm/boot/dts/logicpd-torpedo-som.dtsi
index 7d2302e
On Thu, Dec 20, 2018 at 7:18 PM Sebastian Reichel wrote:
>
> From: Sebastian Reichel
>
> Add a node for the UART part of WiLink chip.
>
> Cc: Adam Ford
> Signed-off-by: Sebastian Reichel
> ---
> This is compile tested only!
I have tried this a few times, unfo
On Fri, Dec 21, 2018 at 2:13 AM Sebastian Reichel wrote:
>
> From: Sebastian Reichel
>
> This driver has been superseded by the serdev based Bluetooth
> hci_ll driver, which is initialized from DT. All mainline users
> have been converted and this driver can be safely dropped.
There seems to be
On Fri, Dec 21, 2018 at 9:00 PM Sebastian Reichel wrote:
>
> Hi,
>
> On Fri, Dec 21, 2018 at 03:10:52PM -0600, Adam Ford wrote:
> > On Fri, Dec 21, 2018 at 2:13 AM Sebastian Reichel wrote:
> > >
> > > From: Sebastian Reichel
> > >
> > &g
On Sat, Dec 22, 2018 at 11:09 AM Tony Lindgren wrote:
>
> * Sebastian Reichel [181221 01:18]:
> > The new code has been tested on the Motorola Droid 4. For testing the audio
> > should be configured to route Ext to Speaker or Headphone. Then you need to
> > plug headphone, since its cable is used
I have a question regarding the pinstate and the corresponding uhs_signaling.
The uhs_signaling shows a variety of timing options,
MMC_TIMING_UHS_SDR12, MMC_TIMING_UHS_SDR25:, MMC_TIMING_UHS_SDR50,
MMC_TIMING_UHS_SDR104, MMC_TIMING_MMC_HS200, MMC_TIMING_UHS_DDR50,
MMC_TIMING_MMC_DDR52, MMC_
On Wed, Oct 24, 2018 at 9:17 AM Adam Ford wrote:
>
> On Wed, Oct 24, 2018 at 9:08 AM jacopo mondi wrote:
> >
> > Hi Adam,
> >
> > On Wed, Oct 24, 2018 at 08:53:41AM -0500, Adam Ford wrote:
> > > On Tue, Oct 23, 2018 at 6:03 PM jacopo mondi wrote:
> >
On Thu, Sep 20, 2018 at 9:58 AM jacopo mondi wrote:
>
> Hi imx6 people,
>
> On Thu, May 31, 2018 at 08:39:20PM +0530, Jagan Teki wrote:
> > Hi All,
> >
> > I'm trying to verify MIPI-CSI2 OV5640 camera on i.MX6 platform with
> > Mainline Linux.
>
> Sorry to resurect this, but before diving deep int
On Wed, Oct 17, 2018 at 3:01 AM jacopo mondi wrote:
>
> Hi Adam, Seve,
>
> On Tue, Oct 16, 2018 at 05:13:24PM -0700, Steve Longerbeam wrote:
> > Hi Adam,
> >
> >
> > On 10/16/18 12:46 PM, Adam Ford wrote:
> > >On Thu, Sep 20, 2018 at 9:58
Enable 100Mhz and 200MHz pinmux and corrsesponding voltage supplies
to enable SDR104 on usdhc1 connecting the WiFi chip.
Signed-off-by: Adam Ford
diff --git a/arch/arm64/boot/dts/freescale/imx8mn-beacon-som.dtsi
b/arch/arm64/boot/dts/freescale/imx8mn-beacon-som.dtsi
index de2cd0e3201c
On Wed, Apr 7, 2021 at 5:13 PM Lucas Stach wrote:
>
> Hi Adrien,
>
> I feel like I already mentioned to you some time ago that there is
> already a much more complete patch series to add this functionality on
> the list [1].
>
> If you want this functionality to go upstream, please help test and
>
On Tue, May 15, 2018 at 4:25 AM, Bartosz Golaszewski wrote:
> 2018-05-14 2:40 GMT+02:00 Adam Ford :
>> On Wed, May 9, 2018 at 12:25 PM, David Lechner wrote:
>>> This series converts mach-davinci to use the common clock framework.
>>>
>>> The series works lik
he one SoC that
> supports it.
>
> This series has been tested on TI OMAP-L138 LCDK (both device tree and legacy
> board file).
>
I am find. I don't know what I did wrong, but it's working fine. If
you want to add my 'tested-by' go ahead.
Tested-by: Adam Ford #
On Tue, Apr 16, 2019 at 3:38 AM Bartosz Golaszewski wrote:
>
> pon., 15 kwi 2019 o 12:21 Sekhar Nori napisał(a):
> >
> > On 12/04/19 9:01 PM, Bartosz Golaszewski wrote:
> > > pt., 12 kwi 2019 o 15:53 Sekhar Nori napisał(a):
> > >>
> > >> On 12/04/19 5:41 PM, Bartosz Golaszewski wrote:
> > >>> pt
igate it. I can certainly live without ondemand. Using
userspace as the default governor is fine for me for now.
adam
>
> Signed-off-by: Bartosz Golaszewski
> Reviewed-by: Adam Ford
> ---
> arch/arm/boot/dts/da850-evm.dts | 13 +
> 1 file changed, 13 insertions(+)
&
This driver supports the ILI2117A touch controller. This is
different than the ILI210x and it uses different register and
algorithm so it's a separate driver rather than integrating with
the other.
Signed-off-by: Adam Ford
diff --git a/drivers/input/touchscreen/Kconfig
b/drivers/
since initial get_frequency returns an error:
>
> What is the status of this series?
>
> Based on some of the replies (from Adam Ford in particular) it appears that
> this isn't ready to be merged, so is a v2 planned?
If you can leave the Logic PD Torpedo board alone and don'
On Fri, Mar 22, 2019 at 8:31 AM Bartosz Golaszewski wrote:
>
> From: Bartosz Golaszewski
>
> The system_rev variable is never set on davinci and is always 0, so
> we're using the default max operating point of 300MHz. The cvdd supply
> comes from the tps6507 pmic and the voltage can go all the wa
On Fri, Mar 22, 2019 at 8:31 AM Bartosz Golaszewski wrote:
>
> From: Bartosz Golaszewski
>
> Enable cpufreq-dt support for da850-evm. The cvdd is supplied by the
> tps6507 pmic with configurable output voltage, so all operating points
> can be enabled.
>
> Signed-off-by: Bartosz Golaszewski
> --
where the sourcing power supply
cannot source enough current and overloads and the kit fails to
start.
Fixes: 1c207f911fe9 ("ARM: dts: imx: Add support for Logic PD
i.MX6QD EVM")
Signed-off-by: Adam Ford
diff --git a/arch/arm/boot/dts/imx6-logicpd-baseboard.dtsi
b/arch/arm/boot/dts/im
which allows the
analog microphone to capture audio.
Signed-off-by: Adam Ford
---
V2: Remove 'fixes' note reference Shawn's request.
diff --git a/arch/arm/boot/dts/imx6-logicpd-baseboard.dtsi
b/arch/arm/boot/dts/imx6-logicpd-baseboard.dtsi
index e31b6923cb72..db6b5b900826 100644
---
backlight from being
used again until the sequencer is ready. This reduces
standby power consumption by ~100mW.
Signed-off-by: Adam Ford
---
V2: Remove 'fixes' reference per Shawn's request
diff --git a/arch/arm/boot/dts/imx6q-logicpd.dts
b/arch/arm/boot/dts/imx6q-logic
t;ARM: dts: imx: Add support for Logic PD
i.MX6QD EVM")
Signed-off-by: Adam Ford
diff --git a/arch/arm/boot/dts/imx6-logicpd-baseboard.dtsi
b/arch/arm/boot/dts/imx6-logicpd-baseboard.dtsi
index db6b5b900826..7731db493cb0 100644
--- a/arch/arm/boot/dts/imx6-logicpd-baseboard.dtsi
+++ b/ar
On Wed, Apr 3, 2019 at 7:50 AM Bartosz Golaszewski wrote:
>
> śr., 27 mar 2019 o 12:14 Sekhar Nori napisał(a):
> >
> > Hi Bart,
> >
> > On 26/03/19 11:21 PM, Bartosz Golaszewski wrote:
> > > wt., 26 mar 2019 o 15:00 Adam Ford napisał(a):
> > >
t; Fixes: 25aaa75df1e6 ("dmaengine: imx-sdma: add clock ratio 1:1 check")
> Signed-off-by: Andrey Smirnov
> Reviewed-by: Lucas Stach
Tested-by: Adam Ford #imx6q-logicpd
> Cc: Angus Ainslie (Purism)
> Cc: Chris Healy
> Cc: Lucas Stach
> Cc: Fabio Estevam
>
On Wed, Feb 3, 2021 at 3:22 PM Adam Ford wrote:
>
> On Thu, Jan 21, 2021 at 4:24 AM Abel Vesa wrote:
> >
> > On 21-01-21 10:56:17, Sascha Hauer wrote:
> > > On Wed, Jan 20, 2021 at 06:14:21PM +0200, Abel Vesa wrote:
> > > > On 21-01-20 16:50:01, Sascha Haue
add the additional optional clock, and explicitly
name both of them.
Signed-off-by: Adam Ford
Reviewed-by: Geert Uytterhoeven
Acked-by: Rob Herring
---
V3: No Change
V2: No Change
diff --git a/Documentation/devicetree/bindings/net/renesas,etheravb.yaml
b/Documentation/devicetree/bindings/net
The bindings have been updated to support two clocks, but the
original clock now requires the name fck. Add a clock-names
list in the device tree with fck in it.
Signed-off-by: Adam Ford
Reviewed-by: Geert Uytterhoeven
---
V3: No Change
V2: No Change
diff --git a/arch/arm64/boot/dts/renesas
For devices that use a programmable clock for the AVB reference clock,
the driver may need to enable them. Add code to find the optional clock
and enable it when available.
Signed-off-by: Adam Ford
---
V3: Change 'avb' to 'AVB'
Remove unnessary else statement and p
The AVB refererence clock assumes an external clock that runs
automatically. Because the Versaclock is wired to provide the
AVB refclock, the device tree needs to reference it in order for the
driver to start the clock.
Signed-off-by: Adam Ford
---
V3: New to series
diff --git a/arch/arm64
The bindings have been updated to support two clocks, but the
original clock now requires the name fck. Add a clock-names
list in the device tree with fck in it.
Signed-off-by: Adam Ford
Reviewed-by: Geert Uytterhoeven
---
V3: No Change
V2: No Change
diff --git a/arch/arm/boot/dts/r8a7742
On Wed, Feb 10, 2021 at 2:18 PM Rob Herring wrote:
>
> On Sun, Feb 07, 2021 at 12:51:38PM -0600, Adam Ford wrote:
> > There are two registers which can set the load capacitance for
> > XTAL1 and XTAL2. These are optional registers when using an
> > external crystal. Si
a wrote:
> > > > > On 21-01-20 16:13:05, Sascha Hauer wrote:
> > > > > > Hi Abel,
> > > > > >
> > > > > > On Wed, Jan 20, 2021 at 04:44:54PM +0200, Abel Vesa wrote:
> > > > > > &g
On Thu, May 21, 2020 at 10:56 AM Tim Harvey wrote:
>
> On Mon, May 4, 2020 at 2:19 AM Lucas Stach wrote:
> >
> > Am Montag, den 27.04.2020, 15:37 + schrieb Jacky Bai:
> > > > -Original Message-
> > > > From: Lucas Stach
> > > > Sent: Monday, April 27, 2020 11:11 PM
> > > > To: Abel V
The DTC doesn't like the default PWM settings, because it's expecting
three cells. This patch reduces adds the extra entry of 0 to the PWM
reference.
Fixes: fa28d8212ede ("ARM: dts: imx: default to #pwm-cells = <3> in the SoC
dtsi files")
Signed-off-by: Adam Ford
The DTC doesn't like the default PWM settings, because it's expecting
three cells. This patch reduces adds the extra entry of 0 to the PWM
reference.
Fixes: fa28d8212ede ("ARM: dts: imx: default to #pwm-cells = <3> in the SoC
dtsi files")
---
V2: Don't change
The DTC doesn't like the default PWM settings, because it's expecting
three cells. This patch reduces adds the extra entry of 0 to the PWM
reference.
Fixes: fa28d8212ede ("ARM: dts: imx: default to #pwm-cells = <3> in the SoC
dtsi files")
Reviewed-by: Fabio Estevam
On Mon, Oct 7, 2019 at 5:06 PM Adam Ford wrote:
>
> The OMAP3530, OMAP3630, and DM3730 all show thresholds of 90C and 105C
> depending on commercial or industrial temperature ratings.
>
> This patch expands the thermal information to include the limits of 90
> and 105C for alert
o increase the temperatures for extended
temperature ratings, these can be changed on their respective
device trees with something like:
&cpu_alert0 {
temperature = <9>; /* millicelsius */
};
&cpu_crit {
temperature = <105000>; /* millicelsius */
};
Signed-o
eeded.
Signed-off-by: Adam Ford
diff --git a/drivers/thermal/ti-soc-thermal/ti-bandgap.c
b/drivers/thermal/ti-soc-thermal/ti-bandgap.c
index ab19ceff6e2a..923ef3abb867 100644
--- a/drivers/thermal/ti-soc-thermal/ti-bandgap.c
+++ b/drivers/thermal/ti-soc-thermal/ti-bandgap.c
@@ -25,10 +25,18 @@
#in
With the additional power management options enabled,
this patch enables OMAP3_THERMAL by default.
Signed-off-by: Adam Ford
diff --git a/arch/arm/configs/omap2plus_defconfig
b/arch/arm/configs/omap2plus_defconfig
index fe383f5a92fb..efcc46305a47 100644
--- a/arch/arm/configs
On Tue, Aug 18, 2020 at 11:58 PM Tony Lindgren wrote:
>
> * Adam Ford [200818 15:46]:
> > @@ -1153,6 +1166,38 @@ static int ti_bandgap_suspend(struct device *dev)
> > return err;
> > }
> >
> > +static int bandgap_omap_cp
eeded.
Signed-off-by: Adam Ford
Reported-by: kernel test robot
---
V2: Fix issue where variable stating the suspend mode isn't being
properly set and cleared.
diff --git a/drivers/thermal/ti-soc-thermal/ti-bandgap.c
b/drivers/thermal/ti-soc-thermal/ti-bandgap.c
index ab19ceff6e2a..9404631be
With the additional power management options enabled,
this patch enables OMAP3_THERMAL by default.
Signed-off-by: Adam Ford
---
V2: No change
diff --git a/arch/arm/configs/omap2plus_defconfig
b/arch/arm/configs/omap2plus_defconfig
index fe383f5a92fb..efcc46305a47 100644
--- a/arch/arm/configs
On Mon, Jan 4, 2021 at 1:12 AM Sascha Hauer wrote:
>
> Hi Adam,
>
> On Tue, Dec 29, 2020 at 08:51:28AM -0600, Adam Ford wrote:
> > Remove the earlycon uart clocks that are hard cord in platforms
> > clock driver, instead of parsing the earlycon uart port from dt
>
&g
On Sat, Jan 9, 2021 at 12:02 PM Luca Ceresoli wrote:
>
> Hi Adam,
>
> On 09/01/21 04:00, Adam Ford wrote:
> > On Fri, Jan 8, 2021 at 4:49 PM Luca Ceresoli wrote:
> >>
> >> Hi Adam,
> >>
> >> On 06/01/21 18:39, Adam Ford wrote:
> >>&
On Mon, Dec 7, 2020 at 7:36 AM Krzysztof Kozlowski wrote:
>
> On Mon, Dec 07, 2020 at 02:21:40PM +0100, Krzysztof Kozlowski wrote:
> > On Mon, Dec 07, 2020 at 02:53:24PM +0800, Shengjiu Wang wrote:
> > > Error log:
> > > sysfs: cannot create duplicate filename
> > > '/bus/platform/devices/300
The SoC expects the txv_refclk is provided, but if it is provided
by a programmable clock, there needs to be a way to get and enable
this clock to operate. It needs to be optional since it's only
necessary for those with programmable clocks.
Signed-off-by: Adam Ford
diff --git a/driver
On Sat, Dec 12, 2020 at 11:55 AM Sergei Shtylyov
wrote:
>
> Hello!
>
> On 12.12.2020 19:56, Adam Ford wrote:
>
> > The SoC expects the txv_refclk is provided, but if it is provided
> > by a programmable clock, there needs to be a way to get and enable
> > this
On Fri, Dec 18, 2020 at 7:16 AM Geert Uytterhoeven wrote:
>
> Hi Adam,
>
> CC Shimoda-san
>
> On Thu, Dec 17, 2020 at 12:52 PM Adam Ford wrote:
> > On Thu, Dec 17, 2020 at 2:16 AM Geert Uytterhoeven
> > wrote:
> > > On Wed, Dec 16, 2020 at 6:03 PM Adam Fo
On Thu, Dec 17, 2020 at 5:49 AM Geert Uytterhoeven wrote:
>
> Hi Adam,
>
> On Sun, Dec 13, 2020 at 7:38 PM Adam Ford wrote:
> > Beacon EmebeddedWorks is introducing a new kit based on the
> > RZ/G2N SoC from Renesas.
> >
> > The SOM supports eMMC, WiF
On Sun, Dec 6, 2020 at 11:24 PM Sascha Hauer wrote:
>
> Hi Adam,
>
> On Fri, Dec 04, 2020 at 12:31:54PM -0600, Adam Ford wrote:
> > The default clock source on i.MX8M Mini and Nano boards use a 24MHz clock,
> > but users who need to re-parent the clock source run into is
The RZ/G2 Series has the optional CLK_RCAR_USB2_CLOCK_SEL.
Enable it by default. It's disabled by default in the
the device tree, so it should be safe to enable it here.
Signed-off-by: Adam Ford
diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig
index 8383016
On Tue, Jan 12, 2021 at 10:45 AM Luca Ceresoli wrote:
>
> Hi Adam,
>
> On 11/01/21 17:40, Adam Ford wrote:
> > On Sat, Jan 9, 2021 at 12:02 PM Luca Ceresoli wrote:
> >>
> >> Hi Adam,
> >>
> >> On 09/01/21 04:00, Adam Ford wrote:
> >&
On Tue, Jan 12, 2021 at 9:16 PM Rob Herring wrote:
>
> On Wed, Jan 06, 2021 at 11:38:59AM -0600, Adam Ford wrote:
> > There are two registers which can set the load capacitance for
> > XTAL1 and XTAL2. These are optional registers when using an
> > external crystal.
On Mon, Jan 18, 2021 at 6:52 AM Abel Vesa wrote:
>
> On 21-01-15 12:29:08, Adam Ford wrote:
>
> ...
>
> > diff --git a/drivers/clk/imx/clk-imx25.c b/drivers/clk/imx/clk-imx25.c
> > index a66cabfbf94f..66192fe0a898 100644
> > --- a/drivers/clk/imx/clk-imx25.c
>
On Sat, Jan 16, 2021 at 3:55 PM Adam Ford wrote:
>
> There are two registers which can set the load capacitance for
> XTAL1 and XTAL2. These are optional registers when using an
> external crystal. Parse the device tree and set the
> corresponding registers accordingly.
>
>
There are two registers which can set the load capacitance for
XTAL1 and XTAL2. These are optional registers when using an
external crystal. Parse the device tree and set the
corresponding registers accordingly.
Signed-off-by: Adam Ford
---
V2: Make the math subtract 9000 since we have a
There are two registers which can set the load capacitance for
XTAL1 and XTAL2. These are optional registers when using an
external crystal. Since XTAL1 and XTAL2 will set to the same value,
update the binding to support a single property called
xtal-load-femtofarads.
Signed-off-by: Adam Ford
There is a QSPI chip connected to the FlexSPI bus. Enable it.
Signed-off-by: Adam Ford
diff --git a/arch/arm64/boot/dts/freescale/imx8mn-beacon-som.dtsi
b/arch/arm64/boot/dts/freescale/imx8mn-beacon-som.dtsi
index 2120e6485393..9f575184d899 100644
--- a/arch/arm64/boot/dts/freescale/imx8mn
The i.MX8M Nano has the same Flexspi controller used in the i.MX8M
Mini. Add the node and disable it by default.
Signed-off-by: Adam Ford
diff --git a/arch/arm64/boot/dts/freescale/imx8mn.dtsi
b/arch/arm64/boot/dts/freescale/imx8mn.dtsi
index 3fac73779fdd..16ea50089567 100644
--- a/arch/arm64
On Fri, Jan 8, 2021 at 1:22 AM Tony Lindgren wrote:
>
> * H. Nikolaus Schaller [201230 13:29]:
> > > Am 30.12.2020 um 13:55 schrieb Adam Ford :
> > > On Wed, Dec 30, 2020 at 2:43 AM Tony Lindgren wrote:
> > >>
> > >> At least for 4430, try
On Fri, Jan 8, 2021 at 7:45 AM Adam Ford wrote:
>
> On Fri, Jan 8, 2021 at 1:22 AM Tony Lindgren wrote:
> >
> > * H. Nikolaus Schaller [201230 13:29]:
> > > > Am 30.12.2020 um 13:55 schrieb Adam Ford :
> > > > On Wed, Dec 30, 2020 at 2:43 AM Tony Lindg
random issues where nobody took care to debug them.
> > >
> > > That would be since v4.11.
> >
> > I guess maybe best is to include both. Then if someone is debugging
> > why their async probe is failing they will notice this commit, but
> > they also might decide to pick it earlier just to be safe...
>
> OK I'll add the above fixes tag too and apply this into fixes.
>
It might be too late, but...
Tested-by: Adam Ford #logicpd-torpedo-37xx-devkit
> Thanks,
>
> Tony
On Fri, Jan 8, 2021 at 12:31 PM Adam Ford wrote:
>
> On Fri, Jan 8, 2021 at 7:45 AM Adam Ford wrote:
> >
> > On Fri, Jan 8, 2021 at 1:22 AM Tony Lindgren wrote:
> > >
> > > * H. Nikolaus Schaller [201230 13:29]:
> > > > > Am 30.12.2020 um
On Fri, Jan 8, 2021 at 4:49 PM Luca Ceresoli wrote:
>
> Hi Adam,
>
> On 06/01/21 18:38, Adam Ford wrote:
> > There are two registers which can set the load capacitance for
> > XTAL1 and XTAL2. These are optional registers when using an
> > external crystal. Updat
On Fri, Jan 8, 2021 at 4:49 PM Luca Ceresoli wrote:
>
> Hi Adam,
>
> On 06/01/21 18:39, Adam Ford wrote:
> > There are two registers which can set the load capacitance for
> > XTAL1 and XTAL2. These are optional registers when using an
> > external crystal. Par
On Fri, Jan 8, 2021 at 1:37 PM Andreas Kemnade wrote:
>
> Hi,
>
> On Fri, 8 Jan 2021 13:17:06 -0600
> Adam Ford wrote:
>
> > On Mon, Dec 7, 2020 at 8:01 AM Tony Lindgren wrote:
> > >
> > > * Doug Anderson [201204 16:43]:
> > > > Hi,
.
Signed-off-by: Adam Ford
diff --git a/arch/arm/boot/dts/logicpd-torpedo-som.dtsi
b/arch/arm/boot/dts/logicpd-torpedo-som.dtsi
index 3a5228562b0d..3451f9be104e 100644
--- a/arch/arm/boot/dts/logicpd-torpedo-som.dtsi
+++ b/arch/arm/boot/dts/logicpd-torpedo-som.dtsi
@@ -70,6 +70,7 @@ nand@0,0
On Sat, Jan 9, 2021 at 10:39 AM Adam Ford wrote:
>
> Previously, the 1GHz variants were marked as a turbo,
> because that variant has reduced thermal operating range.
>
> Now that the thermal throttling is in place, it should be
> safe to remove the turbo-mode from the 1GHz
.
Signed-off-by: Adam Ford
---
V2: The orignal patch had the wrong file added. Add the omap36xx.dtsi
diff --git a/arch/arm/boot/dts/omap36xx.dtsi b/arch/arm/boot/dts/omap36xx.dtsi
index 05fe5ed127b0..20844dbc002e 100644
--- a/arch/arm/boot/dts/omap36xx.dtsi
+++ b/arch/arm/boot/dts/omap36xx.dtsi
On Sat, Jan 9, 2021 at 10:58 AM H. Nikolaus Schaller wrote:
>
> Hi Adam,
>
> > Am 09.01.2021 um 17:39 schrieb Adam Ford :
> >
> > Previously, the 1GHz variants were marked as a turbo,
> > because that variant has reduced thermal operating range.
> >
> >
The WiFi chip is capable of communication at SDR104 speeds.
Enable 100Mhz and 200MHz pinmux to support this.
Signed-off-by: Adam Ford
diff --git a/arch/arm64/boot/dts/freescale/imx8mm-beacon-som.dtsi
b/arch/arm64/boot/dts/freescale/imx8mm-beacon-som.dtsi
index d897913537ca..988f8ab679ad 100644
nt to the external RTC all the time and
rtc1 point to the SVNS in order to correctly hold date/time over
a power-cycle.
Signed-off-by: Adam Ford
diff --git a/arch/arm64/boot/dts/freescale/imx8mn-beacon-som.dtsi
b/arch/arm64/boot/dts/freescale/imx8mn-beacon-som.dtsi
index 67e5e5b9ddea..2120e64
On Mon, Dec 14, 2020 at 4:05 AM Geert Uytterhoeven wrote:
>
> Hi Adam,
>
> On Sun, Dec 13, 2020 at 5:18 PM Adam Ford wrote:
> > The SoC expects the txv_refclk is provided, but if it is provided
> > by a programmable clock, there needs to be a way to get and enable
> &
to add the additional optional clock, and explicitly
name both of them.
Signed-off-by: Adam Ford
---
.../devicetree/bindings/net/renesas,etheravb.yaml | 11 ++-
1 file changed, 10 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/net/renesas,etheravb.yaml
b
The bindings have been updated to support two clocks, but the
original clock now requires the name fck. Add a clock-names
list in the device tree with fck in it.
Signed-off-by: Adam Ford
---
arch/arm/boot/dts/r8a7742.dtsi | 1 +
arch/arm/boot/dts/r8a7743.dtsi | 1 +
arch/arm/boot/dts/r8a7744
The bindings have been updated to support two clocks, but the
original clock now requires the name fck. Add a clock-names
list in the device tree with fck in it.
Signed-off-by: Adam Ford
---
arch/arm64/boot/dts/renesas/r8a774a1.dtsi | 1 +
arch/arm64/boot/dts/renesas/r8a774b1.dtsi | 1 +
arch
The bindings have been updated to support two clocks, but the
original clock now requires the name fck to distinguish it
from the other.
Signed-off-by: Adam Ford
---
drivers/net/ethernet/renesas/ravb_main.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/net/ethernet
The datasheet for the RZ/G2 Series show the bit for choosing between a crystal
oscillator and an external oscillator is present. Add the bindings for
r8a774a1 (RZ/G2M), r8a774b1 (RZ/G2N), and r8a774e1 (RZ/G2H)
Signed-off-by: Adam Ford
diff --git
a/Documentation/devicetree/bindings/clock
wards compatibility with existing
boards.
Signed-off-by: Adam Ford
diff --git a/arch/arm64/boot/dts/renesas/r8a774a1.dtsi
b/arch/arm64/boot/dts/renesas/r8a774a1.dtsi
index d37ec42a1caa..60e150320ce8 100644
--- a/arch/arm64/boot/dts/renesas/r8a774a1.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a774a1.dtsi
@@ -
On Tue, Dec 29, 2020 at 6:15 AM wrote:
>
> From: Peng Fan
>
> According to RM, there is a spba bus inside aips3 and aips1, add it.
>
> Signed-off-by: Peng Fan
> ---
> arch/arm64/boot/dts/freescale/imx8mm.dtsi | 362 +++---
> 1 file changed, 189 insertions(+), 173 deletions(-)
>
an
Signed-off-by: Adam Ford
---
Based on NXP's code base and adapted for 5.11-rc1.
https://source.codeaurora.org/external/imx/linux-imx/commit/drivers/clk/imx/clk.c?h=imx_5.4.47_2.2.0&id=754ae82cc55b7445545fc2f092a70e0f490e9c1b
The original signed-off was retained.
Added the fixes tag.
-
With the clk driver scanning the device tree the for stdout, it
doesn't require a list of clocks to be passed to it. Remove the
code that generates these clock lists.
Signed-off-by: Adam Ford
---
This was build tested for arm, and tested on i.MX8M Nano.
---
drivers/clk/imx/clk-imx25.c
we also need to add udelay to for the EOCZ (end of conversion)
> bit polling as otherwise we have it time out too early on 4430. We'll be
> changing the loop to use iopoll in the following clean-up patch.
>
> Cc: Adam Ford
I don't have an OMAP4, but if you want, I can test a
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