[PATCH v5 0/2] pinctrl: imx: Add driver for i.MX8MQ

SION generic pinconf changes * added examples to the bindings doc Changes since v2: * switch back to the 'fsl,pins' and hardcoded the config values inside the dts. * updated documentation accordingly Abel Vesa (1): dt-bindings: add binding for i.MX8MQ IOMUXC Lucas Stach (1): pi

[PATCH v5 1/2] dt-bindings: add binding for i.MX8MQ IOMUXC

This adds the binding for the i.MX8MQ pin controller, in the same fashion as earlier i.MX SoCs. Signed-off-by: Abel Vesa Acked-by: Dong Aisheng --- .../bindings/pinctrl/fsl,imx8mq-pinctrl.txt| 32 ++ 1 file changed, 32 insertions(+) create mode 100644

[PATCH v5 2/2] pinctrl: imx: add driver for i.MX8MQ

From: Lucas Stach The i.MX8MQ pincontrol works in a similar way to the earlier i.MX SoCs. This driver builds on top of the imx specific pinconf handling. Signed-off-by: Lucas Stach Signed-off-by: Abel Vesa Acked-by: Dong Aisheng --- drivers/pinctrl/freescale/Kconfig | 7

Re: [PATCH v6 3/5] clk: imx: add SCCG PLL type

On Fri, Aug 24, 2018 at 09:40:11AM +0200, Sascha Hauer wrote: > +Cc Andrey Smirnov who made me aware of this issue. > > On Wed, Aug 22, 2018 at 04:48:21PM +0300, Abel Vesa wrote: > > From: Lucas Stach > > > > The SCCG is a new PLL type introduced on i.MX8. Add suppo

[PATCH v3 0/4] Add i.MX8MQ clock driver

This is basically just a resend of the following patchset: https://www.spinics.net/lists/linux-clk/msg23141.html I've just updated the patchset and implemented Shawn's and Aisheng's comments. I hope I haven't missed any of their comments. Lucas Stach (4): dt-bindings: add binding for i.MX8MQ

[PATCH v3 2/4] clk: imx: add fractional PLL output clock

From: Lucas Stach This is a new clock type introduced on i.MX8. Signed-off-by: Lucas Stach Signed-off-by: Abel Vesa --- drivers/clk/imx/Makefile | 1 + drivers/clk/imx/clk-frac-pll.c | 230 + drivers/clk/imx/clk.h | 3 + 3 files

[PATCH v3 1/4] dt-bindings: add binding for i.MX8MQ CCM

From: Lucas Stach This adds the binding for the i.MX8MQ Clock Controller Module. Signed-off-by: Lucas Stach Signed-off-by: Abel Vesa --- .../devicetree/bindings/clock/imx8mq-clock.txt | 20 + include/dt-bindings/clock/imx8mq-clock.h | 629 + 2 files changed

[PATCH v3 3/4] clk: imx: add SCCG PLL type

Signed-off-by: Abel Vesa --- drivers/clk/imx/Makefile | 3 +- drivers/clk/imx/clk-sccg-pll.c | 231 + drivers/clk/imx/clk.h | 9 ++ 3 files changed, 242 insertions(+), 1 deletion(-) create mode 100644 drivers/clk/imx/clk-sccg-pll.c diff

[PATCH v3 4/4] clk: imx: add clock driver for i.MX8MQ CCM

From: Lucas Stach Add driver for the Clock Control Module found on i.MX8MQ. This is largely based on the downstream driver from Anson Huang and Bai Ping at NXP, with only some small adaptions to mainline from me. Signed-off-by: Lucas Stach Signed-off-by: Abel Vesa --- drivers/clk/imx

Re: [RESEND v5 4/5] clk: imx: add imx composite clock

On Tue, Aug 21, 2018 at 08:58:30AM +0200, Sascha Hauer wrote: > On Mon, Aug 20, 2018 at 10:16:06AM +0300, Abel Vesa wrote: > > + > > + val |= (u32)value << divider->shift; > > + val |= (u32)value << PCG_DIV_SHIFT; > > + clk_writel(val, divider-&

[PATCH v6 0/5] Add i.MX8MQ clock driver

ops and used clk-composite as suggested by Sascha Hauer. Changes since v3: * Added a composite clock type to get rid of some complexity from clk-imx8mq. This new composite clock type will also be used by all the imx8 socs that will follow. * Added back the reviewed-by tag. Abel Vesa (1

[PATCH v6 1/5] dt-bindings: add binding for i.MX8MQ CCM

From: Lucas Stach This adds the binding for the i.MX8MQ Clock Controller Module. Signed-off-by: Lucas Stach Signed-off-by: Abel Vesa Reviewed-by: Rob Herring --- .../devicetree/bindings/clock/imx8mq-clock.txt | 20 + include/dt-bindings/clock/imx8mq-clock.h | 410

[PATCH v6 2/5] clk: imx: add fractional PLL output clock

From: Lucas Stach This is a new clock type introduced on i.MX8. Signed-off-by: Lucas Stach Signed-off-by: Abel Vesa --- drivers/clk/imx/Makefile | 1 + drivers/clk/imx/clk-frac-pll.c | 230 + drivers/clk/imx/clk.h | 3 + 3 files

[PATCH v6 3/5] clk: imx: add SCCG PLL type

Signed-off-by: Abel Vesa --- drivers/clk/imx/Makefile | 3 +- drivers/clk/imx/clk-sccg-pll.c | 231 + drivers/clk/imx/clk.h | 9 ++ 3 files changed, 242 insertions(+), 1 deletion(-) create mode 100644 drivers/clk/imx/clk-sccg-pll.c diff

[PATCH v6 5/5] clk: imx: add clock driver for i.MX8MQ CCM

From: Lucas Stach Add driver for the Clock Control Module found on i.MX8MQ. This is largely based on the downstream driver from Anson Huang and Bai Ping at NXP, with only some small adaptions to mainline from me. Signed-off-by: Lucas Stach Signed-off-by: Abel Vesa --- drivers/clk/imx

[PATCH v6 4/5] clk: imx: add imx composite clock

composite clock with those. Signed-off-by: Abel Vesa Suggested-by: Sascha Hauer --- drivers/clk/imx/Makefile| 1 + drivers/clk/imx/clk-composite.c | 157 drivers/clk/imx/clk.h | 9 +++ 3 files changed, 167 insertions(+) create mode 100644

Re: [PATCH] arm: ftrace: Adds support for CONFIG_DYNAMIC_FTRACE_WITH_REGS

On Fri, May 12, 2017 at 09:38:37PM +0100, abelv...@gmail.com wrote: > From: Abel Vesa To be ignored, wrong git config. Will send another one without the From line. > > The DYNAMIC_FTRACE_WITH_REGS configuration makes it possible for a ftrace > operation to specify if registers n

[PATCH] arm: ftrace: Adds support for CONFIG_DYNAMIC_FTRACE_WITH_REGS

this patch is to activate the support for ftrace_modify_call() as it defines ARCH_SUPPORTS_FTRACE_OPS for the ARM architecture. Signed-off-by: Abel Vesa --- arch/arm/Kconfig | 1 + arch/arm/include/asm/ftrace.h | 4 ++ arch/arm/kernel/entry-ftra

[PATCH] clk: imx7d: Add USB clock information

From: Peter Chen Add USB clock information, the pll_usb_main_clk is USB_PLL at CCM which is the output of USBOTG2 PHY. Signed-off-by: Peter Chen Signed-off-by: Irina Tirdea Signed-off-by: Abel Vesa --- drivers/clk/imx/clk-imx7d.c | 9 - 1 file changed, 8 insertions(+), 1 deletion

[PATCH] clk: imx7d: Correct dram pll type

From: Anson Huang DRAM PLL is a audio/video type PLL, need to correct it to get correct ops of PLL. There is a test_div placed before DRAM PLL's gate, so add this test div clk. Signed-off-by: Anson Huang Signed-off-by: Irina Tirdea Signed-off-by: Abel Vesa --- drivers/clk/imx/clk-im

[PATCH] clk: imx7d: Correct ahb clk parent select

clk parent option to make clk tree info correct. Signed-off-by: Anson Huang Signed-off-by: Irina Tirdea Signed-off-by: Abel Vesa --- drivers/clk/imx/clk-imx7d.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/clk/imx/clk-imx7d.c b/drivers/clk/imx/clk-imx7d.c ind

[PATCH] clk: imx7d: Move clks_init_on before any clock operations

-off-by: Abel Vesa --- drivers/clk/imx/clk-imx7d.c | 14 +++--- 1 file changed, 7 insertions(+), 7 deletions(-) diff --git a/drivers/clk/imx/clk-imx7d.c b/drivers/clk/imx/clk-imx7d.c index 89bfa75..9b17805 100644 --- a/drivers/clk/imx/clk-imx7d.c +++ b/drivers/clk/imx/clk-imx7d.c @@ -433,13

[PATCH v2] clk: imx: Set CLK_SET_RATE_GATE for gate and divider clocks

due to the glitchy multiplexers. Signed-off-by: Shawn Guo [initial patch from imx internal repo] Signed-off-by: Abel Vesa [carried over from 3.14 and also applied the flag to newer functions] --- Changes since v1: - changed ownership as per initial patch drivers/clk/imx/clk.h | 15

[PATCH 1/4] arm: imx: Update clk driver API

This adds the following new wrappers: - imx_clk_gate2_flag - imx_clk_set_parent It also updates the flags for the old wrappers. Signed-off-by: Anson Huang Signed-off-by: Abel Vesa --- drivers/clk/imx/clk.h | 42 +++--- 1 file changed, 31 insertions(+), 11

[PATCH 3/4] arm: imx: Correct ahb clk parent select

clk parent option to make clk tree info correct. Signed-off-by: Anson Huang Signed-off-by: Abel Vesa --- drivers/clk/imx/clk-imx7d.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/clk/imx/clk-imx7d.c b/drivers/clk/imx/clk-imx7d.c index d786f98..3553b68 100644 --- a/d

[PATCH 0/4] arm: imx: Clock related updates

This is part of the imx upstreaming effort. All the changes are related imx generic clk API and imx7d clk driver. The imx clk API updates will also be used by the new imx SOCs that will follow. Abel Vesa (1): arm: imx: Update clk driver API Anson Huang (3): arm: imx: Correct dram pll type

[PATCH 4/4] arm: imx: Update clk driver for imx7d

From: Anson Huang This patch updates the imx7d clk driver to make use of the new imx clk API. Signed-off-by: Anson Huang Signed-off-by: Abel Vesa --- drivers/clk/imx/clk-imx7d.c | 28 ++-- 1 file changed, 14 insertions(+), 14 deletions(-) diff --git a/drivers/clk/imx

[PATCH 2/4] arm: imx: Correct dram pll type

From: Anson Huang DRAM PLL is a audio/video type PLL, need to correct it to get correct ops of PLL. There is a test_div placed before DRAM PLL's gate, so add this test div clk. Signed-off-by: Anson Huang Signed-off-by: Abel Vesa --- drivers/clk/imx/clk-imx7d.c

Re: [PATCH 2/4] arm: imx: Correct dram pll type

Hi Fabio, On Thu, Mar 22, 2018 at 09:31:03AM -0300, Fabio Estevam wrote: > > This has already been applied in linux-next as commit: > > commit b716aad97eb5 ("clk: imx: imx7d: correct video pll clock tree) OK. Will create the patchset again without this one. > > Nit: the prefix in the Subject

Return checks for clock calls

Hi Shawn, Fabio, I'm trying to get the imx clks changes upstreamed. To that end, I reached this old commit that adds some wrappers over the generic clk API. Here is the commit message: ARM: imx6: add return check for clock calls There are a bunch of clk_enable_prepare, clk_set_pa

[PATCH] clk: imx: Set CLK_SET_RATE_GATE for gate and divider clocks

multiplexers. Signed-off-by: Shawn Guo [initial patch from imx internal repo] Signed-off-by: Abel Vesa [carried over from 3.14 and also applied the flag to newer functions] --- drivers/clk/imx/clk.h | 15 +-- 1 file changed, 9 insertions(+), 6 deletions(-) diff --git a/drivers/clk

[PATCH v14 0/5] Add i.MX8MQ clock driver

Here is a link to the 13th version: https://lkml.org/lkml/2018/11/13/1020 Changes since v13: * included changes suggested by Stephen Boyd Abel Vesa (2): clk: imx: Add imx composite clock clk: imx: Add clock driver for i.MX8MQ CCM Lucas Stach (3): dt-bindings: Add binding for i.MX8MQ CCM

[PATCH v14 2/5] clk: imx: Add fractional PLL output clock

From: Lucas Stach This is a new fractional clock type introduced on i.MX8. The description of this fractional clock can be found here: https://www.nxp.com/docs/en/reference-manual/IMX8MDQLQRM.pdf#page=834 Signed-off-by: Lucas Stach Signed-off-by: Abel Vesa Reviewed-by: Sascha Hauer

[PATCH v14 5/5] clk: imx: Add clock driver for i.MX8MQ CCM

Add driver for the Clock Control Module found on i.MX8MQ. Signed-off-by: Anson Huang Signed-off-by: Bai Ping Signed-off-by: Lucas Stach Signed-off-by: Abel Vesa Reviewed-by: Sascha Hauer --- drivers/clk/imx/Makefile | 1 + drivers/clk/imx/clk-imx8mq.c | 589

[PATCH v14 1/5] dt-bindings: Add binding for i.MX8MQ CCM

From: Lucas Stach This adds the binding for the i.MX8MQ Clock Controller Module. Signed-off-by: Lucas Stach Signed-off-by: Abel Vesa Reviewed-by: Rob Herring --- .../devicetree/bindings/clock/imx8mq-clock.txt | 20 ++ include/dt-bindings/clock/imx8mq-clock.h | 395

[PATCH v14 3/5] clk: imx: Add SCCG PLL type

From: Lucas Stach The SCCG is a new PLL type introduced on i.MX8. The description of this SCCG clock can be found here: https://www.nxp.com/docs/en/reference-manual/IMX8MDQLQRM.pdf#page=834 Signed-off-by: Lucas Stach Signed-off-by: Abel Vesa Reviewed-by: Sascha Hauer --- drivers/clk/imx

[PATCH v14 4/5] clk: imx: Add imx composite clock

composite clock with those. Signed-off-by: Abel Vesa Suggested-by: Sascha Hauer Reviewed-by: Sascha Hauer --- drivers/clk/imx/Makefile | 1 + drivers/clk/imx/clk-composite-8m.c | 178 + drivers/clk/imx/clk.h | 16 3 files changed

[PATCH] clk: imx: Use do_div in SCCG due to 64-bit divisor

0: vmlinux] Error 1 Fixes: 9fd680d0fafd ("clk: imx: add fractional PLL output clock") Signed-off-by: Abel Vesa Reported-by: Stephen Rothwell --- drivers/clk/imx/clk-frac-pll.c | 7 --- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/drivers/clk/imx/clk-frac-pll.c b/driv

[PATCH v13 2/5] clk: imx: add fractional PLL output clock

From: Lucas Stach This is a new fractional clock type introduced on i.MX8. The description of this fractional clock can be found here: https://www.nxp.com/docs/en/reference-manual/IMX8MDQLQRM.pdf#page=834 Signed-off-by: Lucas Stach Signed-off-by: Abel Vesa Reviewed-by: Sascha Hauer

[PATCH v13 1/5] dt-bindings: add binding for i.MX8MQ CCM

From: Lucas Stach This adds the binding for the i.MX8MQ Clock Controller Module. Signed-off-by: Lucas Stach Signed-off-by: Abel Vesa Reviewed-by: Rob Herring --- .../devicetree/bindings/clock/imx8mq-clock.txt | 20 ++ include/dt-bindings/clock/imx8mq-clock.h | 395

[PATCH v13 0/5] Add i.MX8MQ clock driver

Here is a link to the 12th version: https://lkml.org/lkml/2018/11/7/642 Changes since v12: * replaced the division in clk_pll_recalc_rate in clk-frac with do_div as suggested by Stephen Abel Vesa (2): clk: imx: Add imx composite clock clk: imx: Add clock driver for i.MX8MQ CCM Lucas

[PATCH v13 3/5] clk: imx: Add SCCG PLL type

From: Lucas Stach The SCCG is a new PLL type introduced on i.MX8. The description of this SCCG clock can be found here: https://www.nxp.com/docs/en/reference-manual/IMX8MDQLQRM.pdf#page=834 Signed-off-by: Lucas Stach Signed-off-by: Abel Vesa Reviewed-by: Sascha Hauer --- drivers/clk/imx

[PATCH v13 5/5] clk: imx: Add clock driver for i.MX8MQ CCM

Add driver for the Clock Control Module found on i.MX8MQ. Signed-off-by: Anson Huang Signed-off-by: Bai Ping Signed-off-by: Lucas Stach Signed-off-by: Abel Vesa Reviewed-by: Sascha Hauer --- drivers/clk/imx/Makefile | 1 + drivers/clk/imx/clk-imx8mq.c | 589

[PATCH v13 4/5] clk: imx: Add imx composite clock

composite clock with those. Signed-off-by: Abel Vesa Suggested-by: Sascha Hauer Reviewed-by: Sascha Hauer --- drivers/clk/imx/Makefile | 1 + drivers/clk/imx/clk-composite-8m.c | 178 + drivers/clk/imx/clk.h | 16 3 files changed

[PATCH v5 0/6] Add basic support for i.MX8MQ SoC and i.MX8MQ EVK board

Took this from Lucas since he's busy with some other work for the moment and I thought we might be able to get this ready for the merge window. Basically is just a respin with a minor fix for a comment from Rob. Lucas, thanks for all the effort with this. Changes since v5: * replaced the name o

[PATCH v5 1/6] arm64: add basic Kconfig symbols for i.MX8

From: Lucas Stach Add basic Kconfig symbols to make the MXC architecture available in the ARM64 world. Signed-off-by: Lucas Stach Reviewed-by: Fabio Estevam --- arch/arm64/Kconfig.platforms | 14 ++ 1 file changed, 14 insertions(+) diff --git a/arch/arm64/Kconfig.platforms b/arch

[PATCH v5 4/6] MAINTAINERS: add i.MX8 DT path to i.MX architecture

From: Lucas Stach Shawn agreed to take patches for the i.MX8 parts through his tree. Signed-off-by: Lucas Stach Reviewed-by: Dong Aisheng --- MAINTAINERS | 1 + 1 file changed, 1 insertion(+) diff --git a/MAINTAINERS b/MAINTAINERS index 3625a8d..b41ebff 100644 --- a/MAINTAINERS +++ b/MAINTAI

[PATCH v5 2/6] arm64: add basic DTS for i.MX8MQ

From: Lucas Stach This adds the basic DTS for the i.MX8MQ. For now only the following peripherals are supported: - IOMUXC (pin controller) - CCM (clock controller) - GPIO - UART - uSDHC (SD/eMMC controller) - FEC (ethernet controller) - i2c This is enough to get a very basic board support up and

[PATCH v5 5/6] arm64: dts: imx8mq: add watchdog devices

From: Baruch Siach Signed-off-by: Baruch Siach Signed-off-by: Lucas Stach --- arch/arm64/boot/dts/freescale/imx8mq.dtsi | 24 1 file changed, 24 insertions(+) diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi b/arch/arm64/boot/dts/freescale/imx8mq.dtsi index 370

[PATCH v5 3/6] arm64: add support for i.MX8M EVK board

From: Lucas Stach This is the evaluation kit board for the i.MX8M. The current level of support yields a working console and is able to boot userspace from SD card or Network. Signed-off-by: Lucas Stach Reviewed-by: Fabio Estevam (v1) Reviewed-by: Rob Herring (v3) Tested-by: Tested-by: Baruch

[PATCH v5 6/6] arm64: dts: imx8mq-evk: enable watchdog

From: Baruch Siach The external nWDOG signal connects to the EVK board reset circuit. Tested on the i.MX8MQ EVK rev B3. Signed-off-by: Baruch Siach Signed-off-by: Lucas Stach --- arch/arm64/boot/dts/freescale/imx8mq-evk.dts | 13 + 1 file changed, 13 insertions(+) diff --git a/a

[PATCH v15 4/5] clk: imx: Add imx composite clock

composite clock with those. Signed-off-by: Abel Vesa Suggested-by: Sascha Hauer Reviewed-by: Sascha Hauer --- drivers/clk/imx/Makefile | 1 + drivers/clk/imx/clk-composite-8m.c | 178 + drivers/clk/imx/clk.h | 16 3 files changed

[PATCH v15 5/5] clk: imx: Add clock driver for i.MX8MQ CCM

Add driver for the Clock Control Module found on i.MX8MQ. Signed-off-by: Anson Huang Signed-off-by: Bai Ping Signed-off-by: Lucas Stach Signed-off-by: Abel Vesa Reviewed-by: Sascha Hauer --- drivers/clk/imx/Makefile | 1 + drivers/clk/imx/clk-imx8mq.c | 589

[PATCH v15 0/5] Add i.MX8MQ clock driver

replacing with do_divs in clk-frac-pll Abel Vesa (2): clk: imx: Add imx composite clock clk: imx: Add clock driver for i.MX8MQ CCM Lucas Stach (3): dt-bindings: Add binding for i.MX8MQ CCM clk: imx: Add fractional PLL output clock clk: imx: Add SCCG PLL type .../devicetree/bindings

[PATCH v15 3/5] clk: imx: Add SCCG PLL type

From: Lucas Stach The SCCG is a new PLL type introduced on i.MX8. The description of this SCCG clock can be found here: https://www.nxp.com/docs/en/reference-manual/IMX8MDQLQRM.pdf#page=834 Signed-off-by: Lucas Stach Signed-off-by: Abel Vesa Reviewed-by: Sascha Hauer --- drivers/clk/imx

[PATCH v15 2/5] clk: imx: Add fractional PLL output clock

From: Lucas Stach This is a new fractional clock type introduced on i.MX8. The description of this fractional clock can be found here: https://www.nxp.com/docs/en/reference-manual/IMX8MDQLQRM.pdf#page=834 Signed-off-by: Lucas Stach Signed-off-by: Abel Vesa Reviewed-by: Sascha Hauer

[PATCH v15 1/5] dt-bindings: Add binding for i.MX8MQ CCM

From: Lucas Stach This adds the binding for the i.MX8MQ Clock Controller Module. Signed-off-by: Lucas Stach Signed-off-by: Abel Vesa Reviewed-by: Rob Herring --- .../devicetree/bindings/clock/imx8mq-clock.txt | 20 ++ include/dt-bindings/clock/imx8mq-clock.h | 395

[PATCH v6 2/2] pinctrl: imx: add driver for i.MX8MQ

From: Lucas Stach The i.MX8MQ pincontrol works in a similar way to the earlier i.MX SoCs. This driver builds on top of the imx specific pinconf handling. Signed-off-by: Lucas Stach Signed-off-by: Abel Vesa Acked-by: Dong Aisheng --- drivers/pinctrl/freescale/Kconfig | 7

[PATCH v6 0/2] pinctrl: imx: Add driver for i.MX8MQ

ce v4: * implemented all Aisheng's review comments Changes since v3: * dropped the SION generic pinconf changes * added examples to the bindings doc Changes since v2: * switch back to the 'fsl,pins' and hardcoded the config values inside the dts. * updated documentation accordingly Abel Ves

[PATCH v6 1/2] dt-bindings: add binding for i.MX8MQ IOMUXC

This adds the binding for the i.MX8MQ pin controller, in the same fashion as earlier i.MX SoCs. Signed-off-by: Abel Vesa Acked-by: Dong Aisheng --- .../bindings/pinctrl/fsl,imx8mq-pinctrl.txt| 36 ++ 1 file changed, 36 insertions(+) create mode 100644

[PATCH v3 3/3] pinctrl: imx: add driver for i.MX8MQ

From: Lucas Stach The i.MX8MQ pincontrol works in a similar way to the earlier i.MX SoCs. This driver builds on top of the generic pinconf handling introduced with the i.MX7ULP pinctrl driver. Signed-off-by: Lucas Stach Signed-off-by: Abel Vesa --- drivers/pinctrl/freescale/Kconfig

[PATCH v3 1/3] dt-bindings: add binding for i.MX8MQ IOMUXC

This adds the binding for the i.MX8MQ pin controller, in the same fashion as earlier i.MX SoCs. Signed-off-by: Abel Vesa --- .../devicetree/bindings/pinctrl/fsl,imx8mq-pinctrl.txt | 13 + 1 file changed, 13 insertions(+) create mode 100644 Documentation/devicetree/bindings

[PATCH v3 2/3] pinctrl: imx: allow to configure SION with generic pinconf

From: Lucas Stach The SION bit force enables the input buffer, overriding the configuration driven by the muxed module. It is not located in the pad config register, but in the mux register and thus needs special handling. Signed-off-by: Lucas Stach Signed-off-by: Abel Vesa --- drivers

[PATCH v3 0/3] pinctrl: imx: Add driver for i.MX8MQ

This is the third version for the patch series sent by Lucas. https://www.spinics.net/lists/devicetree/msg212752.html Changes since v2: * switch back to the 'fsl,pins' and hardcoded the config values inside the dts. * updated documentation accordingly Abel Vesa (1): dt-bindings: a

Re: [PATCH v3 2/3] pinctrl: imx: allow to configure SION with generic pinconf

n the next version. Thanks, Abel > Regards, > Lucas > > Am Mittwoch, den 20.06.2018, 10:24 +0300 schrieb Abel Vesa: > > > From: Lucas Stach > > > > The SION bit force enables the input buffer, overriding the configuration > > driven by the muxed module. It is n

[PATCH v4 1/2] dt-bindings: add binding for i.MX8MQ IOMUXC

This adds the binding for the i.MX8MQ pin controller, in the same fashion as earlier i.MX SoCs. Signed-off-by: Abel Vesa --- .../bindings/pinctrl/fsl,imx8mq-pinctrl.txt| 29 ++ 1 file changed, 29 insertions(+) create mode 100644 Documentation/devicetree/bindings

[PATCH v4 2/2] pinctrl: imx: add driver for i.MX8MQ

From: Lucas Stach The i.MX8MQ pincontrol works in a similar way to the earlier i.MX SoCs. This driver builds on top of the generic pinconf handling introduced with the i.MX7ULP pinctrl driver. Signed-off-by: Lucas Stach Signed-off-by: Abel Vesa --- drivers/pinctrl/freescale/Kconfig

[PATCH v4 0/2] pinctrl: imx: Add driver for i.MX8MQ

Changes since v2: * switch back to the 'fsl,pins' and hardcoded the config values inside the dts. * updated documentation accordingly Abel Vesa (1): dt-bindings: add binding for i.MX8MQ IOMUXC Lucas Stach (1): pinctrl: imx: add driver for i.MX8MQ .../bindings/pinctrl/fsl,imx8mq-p

[PATCH] cpu/hotplug: Non-SMP machines do not make use of booted_once

Following commit breaks the non-SMP builds. [0cc3cd21657be04cb0] cpu/hotplug: Boot HT siblings at least once Signed-off-by: Abel Vesa --- kernel/cpu.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/kernel/cpu.c b/kernel/cpu.c index 099fb20cd7be..f06c513c5c42 100644 --- a/kernel/cpu.c

[PATCH v4 1/5] dt-bindings: add binding for i.MX8MQ CCM

From: Lucas Stach This adds the binding for the i.MX8MQ Clock Controller Module. Signed-off-by: Lucas Stach Signed-off-by: Abel Vesa Reviewed-by: Rob Herring --- .../devicetree/bindings/clock/imx8mq-clock.txt | 20 + include/dt-bindings/clock/imx8mq-clock.h | 410

[PATCH v4 0/5] Add i.MX8MQ clock driver

reviewed-by tag. Abel Vesa (1): clk: imx: add imx composite clock Lucas Stach (4): dt-bindings: add binding for i.MX8MQ CCM clk: imx: add fractional PLL output clock clk: imx: add SCCG PLL type clk: imx: add clock driver for i.MX8MQ CCM .../devicetree/bindings/clock/imx8mq-clock.txt

[PATCH v4 3/5] clk: imx: add SCCG PLL type

Signed-off-by: Abel Vesa --- drivers/clk/imx/Makefile | 3 +- drivers/clk/imx/clk-sccg-pll.c | 231 + drivers/clk/imx/clk.h | 9 ++ 3 files changed, 242 insertions(+), 1 deletion(-) create mode 100644 drivers/clk/imx/clk-sccg-pll.c diff

[PATCH v4 2/5] clk: imx: add fractional PLL output clock

From: Lucas Stach This is a new clock type introduced on i.MX8. Signed-off-by: Lucas Stach Signed-off-by: Abel Vesa --- drivers/clk/imx/Makefile | 1 + drivers/clk/imx/clk-frac-pll.c | 230 + drivers/clk/imx/clk.h | 3 + 3 files

[PATCH v4 4/5] clk: imx: add imx composite clock

Since a lot of clocks on imx8 are formed by a mux, gate, predivider and divider, the idea here is to combine all of those into one more complex clock type, therefore moving the complexity inside the composite clock and outside of the SoC specific clock driver. Signed-off-by: Abel Vesa

[PATCH v4 5/5] clk: imx: add clock driver for i.MX8MQ CCM

From: Lucas Stach Add driver for the Clock Control Module found on i.MX8MQ. This is largely based on the downstream driver from Anson Huang and Bai Ping at NXP, with only some small adaptions to mainline from me. Signed-off-by: Lucas Stach Signed-off-by: Abel Vesa --- drivers/clk/imx

[PATCH v5 0/5] Add i.MX8MQ clock driver

composite clock type will also be used by all the imx8 socs that will follow. * Added back the reviewed-by tag. Abel Vesa (1): clk: imx: add imx composite clock Lucas Stach (4): dt-bindings: add binding for i.MX8MQ CCM clk: imx: add fractional PLL output clock clk: imx: add SCCG PLL type

[PATCH v5 1/5] dt-bindings: add binding for i.MX8MQ CCM

From: Lucas Stach This adds the binding for the i.MX8MQ Clock Controller Module. Signed-off-by: Lucas Stach Signed-off-by: Abel Vesa Reviewed-by: Rob Herring --- .../devicetree/bindings/clock/imx8mq-clock.txt | 20 + include/dt-bindings/clock/imx8mq-clock.h | 410

[PATCH v5 2/5] clk: imx: add fractional PLL output clock

From: Lucas Stach This is a new clock type introduced on i.MX8. Signed-off-by: Lucas Stach Signed-off-by: Abel Vesa --- drivers/clk/imx/Makefile | 1 + drivers/clk/imx/clk-frac-pll.c | 230 + drivers/clk/imx/clk.h | 3 + 3 files

[PATCH v5 4/5] clk: imx: add imx composite clock

Since a lot of clocks on imx8 are formed by a mux, gate, predivider and divider, the idea here is to combine all of those into one more complex clock type, therefore moving the complexity inside the composite clock and outside of the SoC specific clock driver. Signed-off-by: Abel Vesa Suggested

[PATCH v5 3/5] clk: imx: add SCCG PLL type

Signed-off-by: Abel Vesa --- drivers/clk/imx/Makefile | 3 +- drivers/clk/imx/clk-sccg-pll.c | 231 + drivers/clk/imx/clk.h | 9 ++ 3 files changed, 242 insertions(+), 1 deletion(-) create mode 100644 drivers/clk/imx/clk-sccg-pll.c diff

[PATCH v5 5/5] clk: imx: add clock driver for i.MX8MQ CCM

From: Lucas Stach Add driver for the Clock Control Module found on i.MX8MQ. This is largely based on the downstream driver from Anson Huang and Bai Ping at NXP, with only some small adaptions to mainline from me. Signed-off-by: Lucas Stach Signed-off-by: Abel Vesa --- drivers/clk/imx

[RESEND v5 2/5] clk: imx: add fractional PLL output clock

From: Lucas Stach This is a new clock type introduced on i.MX8. Signed-off-by: Lucas Stach Signed-off-by: Abel Vesa --- drivers/clk/imx/Makefile | 1 + drivers/clk/imx/clk-frac-pll.c | 230 + drivers/clk/imx/clk.h | 3 + 3 files

[RESEND v5 3/5] clk: imx: add SCCG PLL type

Signed-off-by: Abel Vesa --- drivers/clk/imx/Makefile | 3 +- drivers/clk/imx/clk-sccg-pll.c | 231 + drivers/clk/imx/clk.h | 9 ++ 3 files changed, 242 insertions(+), 1 deletion(-) create mode 100644 drivers/clk/imx/clk-sccg-pll.c diff

[RESEND v5 1/5] dt-bindings: add binding for i.MX8MQ CCM

From: Lucas Stach This adds the binding for the i.MX8MQ Clock Controller Module. Signed-off-by: Lucas Stach Signed-off-by: Abel Vesa Reviewed-by: Rob Herring --- .../devicetree/bindings/clock/imx8mq-clock.txt | 20 + include/dt-bindings/clock/imx8mq-clock.h | 410

[RESEND v5 0/5] Add i.MX8MQ clock driver

clock type to get rid of some complexity from clk-imx8mq. This new composite clock type will also be used by all the imx8 socs that will follow. * Added back the reviewed-by tag. Abel Vesa (1): clk: imx: add imx composite clock Lucas Stach (4): dt-bindings: add binding for i.MX8MQ CCM

[RESEND v5 4/5] clk: imx: add imx composite clock

Since a lot of clocks on imx8 are formed by a mux, gate, predivider and divider, the idea here is to combine all of those into one more complex clock type, therefore moving the complexity inside the composite clock and outside of the SoC specific clock driver. Signed-off-by: Abel Vesa Suggested

[RESEND v5 5/5] clk: imx: add clock driver for i.MX8MQ CCM

From: Lucas Stach Add driver for the Clock Control Module found on i.MX8MQ. This is largely based on the downstream driver from Anson Huang and Bai Ping at NXP, with only some small adaptions to mainline from me. Signed-off-by: Lucas Stach Signed-off-by: Abel Vesa --- drivers/clk/imx

[PATCH 0/3] i.MX8MQ build dependency fixes

These patches will probably have to be take through different trees, but the order has to be kept otherwise this won't work. I can resend as separate patches (if necessary) as long as we can get them in together. Abel Vesa (3): arm64: Remove CONFIG_SOC_IMX8MQ and use ARCH_MXC instead

[PATCH 2/3] clk: imx: Build imx8mq clocks on arm64 only

The composite-8m, frac and sccg clocks are not used by any arm32 IMX SoC, therefore build them only on arm64. CONFIG_ARCH_MXC is arm64 only, use that. Signed-off-by: Abel Vesa --- drivers/clk/imx/Makefile | 10 +- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/drivers/clk

[PATCH 1/3] arm64: Remove CONFIG_SOC_IMX8MQ and use ARCH_MXC instead

To keep aligned with arm64, remove the unnecessary SOC_IMX8MQ and use ARCH_MXC instead. Signed-off-by: Abel Vesa --- arch/arm64/Kconfig.platforms | 8 arch/arm64/boot/dts/freescale/Makefile | 2 +- drivers/clk/imx/Makefile | 3 ++- drivers/phy/freescale/Kconfig

[PATCH 3/3] arm64: Add i.MX8 boot necesarry configs to defconfig

The CONFIG_ARCH_MXC will enable all the i.MX8 SoC. Also add the FEC config for ethernet support, the serial and the pinctrl for i.MX8MQ. Signed-off-by: Abel Vesa --- arch/arm64/configs/defconfig | 5 + 1 file changed, 5 insertions(+) diff --git a/arch/arm64/configs/defconfig b/arch/arm64

Re: [PATCH 0/3] i.MX8MQ build dependency fixes

On 18-12-13 13:17:40, Abel Vesa wrote: > These patches will probably have to be take through different > trees, but the order has to be kept otherwise this won't work. > > I can resend as separate patches (if necessary) as long as we can > get them in together. > Please i

Re: [PATCH 1/3] arm64: Remove CONFIG_SOC_IMX8MQ and use ARCH_MXC instead

On 18-12-13 15:35:27, Lucas Stach wrote: > Am Donnerstag, den 13.12.2018, 13:17 + schrieb Abel Vesa: > > To keep aligned with arm64, remove the unnecessary SOC_IMX8MQ and use > > ARCH_MXC instead. > > > > Signed-off-by: Abel Vesa > > --- > >  arc

[PATCH] clk: imx: Make the i.MX8MQ CCM clock driver CLK_IMX8MQ dependant

Remove the dependency between the i.MX8MQ CCM clock driver and the CONFIG_SOC_IMX8MQ and use CONFIG_CLK_IMX8MQ instead. CONFIG_CLK_IMX8MQ depends on ARCH_MXC && ARM64. Signed-off-by: Abel Vesa --- drivers/clk/Kconfig | 1 + drivers/clk/imx/Kconfig | 5 + drivers/clk/imx/Make

Re: [PATCH 0/3] clk: imx: Make all the parent_names arrays be const pointers

On 18-12-17 10:40:52, Stephen Boyd wrote: > Quoting Abel Vesa (2018-12-17 03:35:40) > > On 18-12-14 13:08:37, Stephen Boyd wrote: > > > Quoting Abel Vesa (2018-12-14 07:30:08) > > > > This is mainly to shut up the checkpatch.pl script warnings about the > > >

Re: [PATCH 1/3] arm64: Remove CONFIG_SOC_IMX8MQ and use ARCH_MXC instead

On 18-12-14 10:22:11, Lucas Stach wrote: > Hi Shawn, > > Am Freitag, den 14.12.2018, 09:12 +0800 schrieb Shawn Guo: > > On Thu, Dec 13, 2018 at 02:51:50PM +, Abel Vesa wrote: > > ... > > > > > diff --git a/arch/arm64/Kconfig.platforms > > > >

[PATCH v2] clk: imx: Make the i.MX8MQ CCM clock driver CLK_IMX8MQ dependant

Remove the dependency between the i.MX8MQ CCM clock driver and the CONFIG_SOC_IMX8MQ and use CONFIG_CLK_IMX8MQ instead. CONFIG_CLK_IMX8MQ depends on ARCH_MXC && ARM64. Signed-off-by: Abel Vesa --- Changes since v1: * reordered the CONFIGs in clk/imx/Makefile as suggested by Daniel a

[PATCH 0/3] clk: imx: Make all the parent_names arrays be const pointers

This is mainly to shut up the checkpatch.pl script warnings about the "static const char *" needing to be "static const char * const". Abel Vesa (3): clk: imx: Make parent_names const pointer in composite-8m clk: imx: Make parents const pointer in mux wrappers clk: imx8m

[PATCH 1/3] clk: imx: Make parent_names const pointer in composite-8m

The parent_names needs to be pointer to const pointer to const char. Signed-off-by: Abel Vesa --- drivers/clk/imx/clk-composite-8m.c | 2 +- drivers/clk/imx/clk.h | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/clk/imx/clk-composite-8m.c b/drivers

[PATCH 2/3] clk: imx: Make parents const pointer in mux wrappers

The parents needs to be pointer to const pointer to const char. Signed-off-by: Abel Vesa --- drivers/clk/imx/clk.h | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/clk/imx/clk.h b/drivers/clk/imx/clk.h index 1363dbe..2e442d8 100644 --- a/drivers/clk/imx/clk.h +++ b

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