=%gpr8:s32\
arg5=%gpr7:u64 arg6=%gpr6:s32 arg7=%gpr5:u64 arg8=%gpr4:s32\
arg9=+37(%gpr28):u8
Perf probe fails with seg fault for such markers. As uprobe_events file
accepts definition upto 4094 characters(4096 - 2 (\n\0)), increase value
of MAX_CMDLEN to 4094.
Signed-off-by: Ravi Bangoria
ent has to be probed before recording it.
Suggested-by: Ingo Molnar
Signed-off-by: Ravi Bangoria
---
tools/lib/api/fs/tracing_path.c | 16
1 file changed, 12 insertions(+), 4 deletions(-)
diff --git a/tools/lib/api/fs/tracing_path.c b/tools/lib/api/fs/tracing_path.c
index 251b7c
=%gpr8:s32\
arg5=%gpr7:u64 arg6=%gpr6:s32 arg7=%gpr5:u64 arg8=%gpr4:s32\
arg9=+37(%gpr28):u8
Perf probe fails with seg fault for such markers. As uprobe_events file
accepts definition beyond 256 characters, increase value of MAX_CMDLEN
to 512.
Signed-off-by: Ravi Bangoria
---
tools/perf
SDT marker argument is in N@OP format. N is the size of argument and
OP is the actual assembly operand. OP is arch dependent component and
hence it's parsing logic also should be placed under tools/perf/arch/.
Signed-off-by: Ravi Bangoria
---
tools/perf/arch/x86/util/perf_regs.c
SDT marker argument is in N@OP format. Here OP is arch dependent
component. Add powerpc logic to parse OP and convert it to uprobe
compatible format.
Signed-off-by: Ravi Bangoria
---
tools/perf/arch/powerpc/util/perf_regs.c | 115 +++
1 file changed, 115 insertions
'perf probe' is failing for sdt markers whose arguments has rNN
(with postfix b/w/d), %rsp, %esp, %sil etc. registers. Add renaming
logic for these registers.
Signed-off-by: Ravi Bangoria
---
tools/perf/arch/x86/util/perf_regs.c | 44 ++--
1 file c
here uprobe definition of sdt event goes beyond
current limit MAX_CMDLEN (256) and in such case perf fails with
seg fault. I've solve this issue. (patch 5)
Note: This patchset is prepared on top of Alexis' v5 series.[1]
[1] http://www.mail-archive.com/linux-kernel@vger.kernel.org/ms
d (on %idle__add in /usr/lib64/libglib-2.0.so.0.5000.2)
You can now use it in all perf tools, such as:
perf record -e sdt_glib:idle__add -aR sleep 1
$ perf record -a -e sdt_glib:idle__add
[ perf record: Woken up 1 times to write data ]
[ perf record: Captured and wrot
f/core.
From 89c977ae9c3ae35c78b16cddabcf2b01d3cf5cc8 Mon Sep 17 00:00:00 2001
From: Ravi Bangoria
Date: Wed, 10 Aug 2016 23:13:45 -0500
Subject: [PATCH] perf ppc64le: Fix build failure when no dwarf support
Fix perf build failure on ppc64le because of Commit 99e608b5954c ("perf
prob
On Thursday 11 August 2016 05:20 PM, Arnaldo Carvalho de Melo wrote:
Em Thu, Aug 11, 2016 at 10:01:04AM +0530, Ravi Bangoria escreveu:
On Thursday 11 August 2016 05:24 AM, Anton Blanchard wrote:
Hi,
Powerpc has Global Entry Point and Local Entry Point for functions.
LEP catches call from
perf script
test 6300 [001] 5877.879327: probe_test:foo: (400541) i=42
No need to skip prologue for optimized case since debug info is correct
for each instructions for -O2 -g. For more details please visit:
https://bugzilla.redhat.com/show_bug.cgi?id=612253#c6
Signed-off-by: Ravi Bangoria
---
C
Introduce helper function instead of inline code and replace hardcoded
strings "$vars" and "$params" with their corresponding macros.
perf_probe_with_var is not declared as static since it will be called
from different file in subsequent patch.
Signed-off-by: Ravi Bangoria
Thanks Masami,
On Tuesday 02 August 2016 08:22 PM, Masami Hiramatsu wrote:
On Mon, 1 Aug 2016 14:19:28 +0530
Ravi Bangoria wrote:
Function prologue prepares stack and registers before executing function
logic. When target program is compiled without optimization, function
parameter
On Saturday 27 August 2016 01:00 AM, Arnaldo Carvalho de Melo wrote:
> Em Wed, Aug 03, 2016 at 02:28:45PM +0530, Ravi Bangoria escreveu:
>> +++ b/tools/perf/util/probe-finder.c
>> @@ -892,6 +892,169 @@ static int find_probe_point_lazy(Dwarf_Die *sp_die,
>> st
On Saturday 27 August 2016 01:24 AM, Arnaldo Carvalho de Melo wrote:
> Em Fri, Aug 26, 2016 at 04:30:27PM -0300, Arnaldo Carvalho de Melo escreveu:
>> Em Wed, Aug 03, 2016 at 02:28:45PM +0530, Ravi Bangoria escreveu:
>>> +++ b/tools/perf/util/probe-finder.c
>>> @@ -8
Move generic dwarf related functions from util/probe-finder.c to
util/dwarf-aux.c. Function names and their prototype are also
changed accordingly. No functionality changes.
Suggested-by: Masami Hiramatsu
Signed-off-by: Ravi Bangoria
---
tools/perf/util/dwarf-aux.c| 135
Move generic dwarf related functions from util/probe-finder.c to
util/dwarf-aux.c. Functions name and their prototype are also
changed accordingly. No functionality changes.
Suggested-by: Masami Hiramatsu
Signed-off-by: Ravi Bangoria
---
Changes in v2:
- Add comments about functions prototype
Hi Arnaldo,
On Friday 08 July 2016 02:01 PM, Michael Ellerman wrote:
Ravi Bangoria writes:
On Wednesday 06 July 2016 03:38 PM, Michael Ellerman wrote:
I've sent v4 which enables annotate for bctr' instructions.
for 'bctr', it will show down arrow(indicate jump) and &#x
Define macro for each normalized arch name and use them instead
of using arch name as string.
Signed-off-by: Ravi Bangoria
---
Changes in v5:
- No changes.
tools/perf/arch/common.c | 36 ++--
tools/perf/arch/common.h | 11 +++
tools
//lkml.org/lkml/2016/7/8/10
Naveen N. Rao (1):
perf annotate: Add support for powerpc
Ravi Bangoria (6):
perf: Define macro for normalized arch names
perf annotate: Add cross arch annotate support
perf annotate: Do not ignore call instruction with indirect target
perf annotate: Sho
For jump instructions that does not include target address as direct
operand, use raw value for that. This is needed for certain powerpc
jump instructions that use target address in a register (such as bctr,
btar, ...).
Suggested-by: Michael Ellerman
Signed-off-by: Ravi Bangoria
---
Changes in
Current perf is not able to parse jump instruction when second operand
contains target address. Arch like powerpc has such instructions. For
example, 'beq cr7,10173e60'.
Signed-off-by: Ravi Bangoria
---
Changes in v5:
- New patch
tools/perf/util/annotate.c | 6 +-
1 file
nop
10:mov_DYNAMIC+0x2e8,%rax
movl -bashx16,%fs:(%rax)
mov-bashxffff,%eax
retq
Signed-off-by: Ravi Bangoria
---
Changes in v5:
- New patch
tools/perf/ui/browsers/annotate.c | 5 +++--
tools/perf/util/annotate.c| 14 +-
to
about 'bctrl' instruction]
Signed-off-by: Ravi Bangoria
---
Changes in v5:
- New patch, introduced to annotate all indirect call instructions.
tools/perf/util/annotate.c | 8 ++--
1 file changed, 2 insertions(+), 6 deletions(-)
diff --git a/tools/perf/util/annotate.c b/tools/perf/util/a
recorded.
Signed-off-by: Ravi Bangoria
---
Changes in v5:
- Replaced symbol__annotate with symbol__disassemble.
tools/perf/builtin-top.c | 2 +-
tools/perf/ui/browsers/annotate.c | 3 +-
tools/perf/ui/gtk/annotate.c | 2 +-
tools/perf/util/annotate.c| 133
ears to be error-prone. So, add function
to find instruction instead of creating table. This function dynamically
create table (list of 'struct ins'), and instead of creating object
every time, first check if list already contain object for that
instruction.
Signed-off-by: Naveen N. Rao
I've sent v5 series for this. Please review it.
Thanks,
Ravi
On Wednesday 13 July 2016 03:15 PM, Ravi Bangoria wrote:
> Arnaldo, Michael,
>
> I've tested this patchset on ppc64 BE and LE both. Please review this.
>
> -Ravi
>
> On Friday 08 July 2016 10:10 AM, R
Thanks Russell for reviewing.
On Friday 19 August 2016 01:20 PM, Russell King - ARM Linux wrote:
> On Fri, Aug 19, 2016 at 10:59:01AM +0530, Ravi Bangoria wrote:
>> -static struct ins instructions[] = {
>> +static struct ins instructions_x86[] = {
>> { .name = &quo
On Friday 19 August 2016 04:18 PM, Russell King - ARM Linux wrote:
> On Fri, Aug 19, 2016 at 04:09:51PM +0530, Ravi Bangoria wrote:
>> Thanks Russell for reviewing.
>>
>> On Friday 19 August 2016 01:20 PM, Russell King - ARM Linux wrote:
>>> On Fri, Aug 19,
about 'bctrl' instruction]
Signed-off-by: Ravi Bangoria
---
Changes in v6:
- No change
tools/perf/util/annotate.c | 8 ++--
1 file changed, 2 insertions(+), 6 deletions(-)
diff --git a/tools/perf/util/annotate.c b/tools/perf/util/annotate.c
index ea07588..a05423b 100644
--- a/tools/per
Define macro for each normalized arch name and use them instead
of using arch name as string.
Signed-off-by: Ravi Bangoria
---
Changes in v6:
- No change
tools/perf/arch/common.c | 36 ++--
tools/perf/arch/common.h | 11 +++
tools
ears to be error-prone. So, add function
to find instruction instead of creating table. This function dynamically
create table (list of 'struct ins'), and instead of creating object
every time, first check if list already contain object for that
instruction.
Signed-off-by: Naveen N. Rao
):
perf annotate: Add support for powerpc
Ravi Bangoria (6):
perf: Define macro for normalized arch names
perf annotate: Add cross arch annotate support
perf annotate: Do not ignore call instruction with indirect target
perf annotate: Show raw form for jump instruction with indirect target
nop
10:mov_DYNAMIC+0x2e8,%rax
movl -bashx16,%fs:(%rax)
mov-bashxffff,%eax
retq
Signed-off-by: Ravi Bangoria
---
Changes in v6:
- No changes
tools/perf/ui/browsers/annotate.c | 5 +++--
tools/perf/util/annotate.c| 14 +-
to
Current perf is not able to parse jump instruction when second operand
contains target address. Arch like powerpc has such instructions. For
example, 'beq cr7,10173e60'.
Signed-off-by: Ravi Bangoria
---
Changes in v6:
- No changes
tools/perf/util/annotate.c | 6 +-
1 file
recorded.
Signed-off-by: Ravi Bangoria
---
Changes in v6:
- Instead of adding only those instructions defined in #ifdef __arm__,
add all instructions from default table to arm table.
tools/perf/builtin-top.c | 2 +-
tools/perf/ui/browsers/annotate.c | 3 +-
tools/perf/ui/gtk
For jump instructions that does not include target address as direct
operand, use raw value for that. This is needed for certain powerpc
jump instructions that use target address in a register (such as bctr,
btar, ...).
Suggested-by: Michael Ellerman
Signed-off-by: Ravi Bangoria
---
Changes in
From: "Naveen N. Rao"
Powerpc has long list of branch instructions and hardcoding them in table
appears to be error-prone. So, add new function to find instruction
instead of creating table.
Signed-off-by: Naveen N. Rao
Signed-off-by: Ravi Bangoria
---
tools/perf/util/annot
erf report -i perf.data.powerpc --vmlinux vmlinux.powerpc
Changes in [PATCH] vs [RFC]
- Removed global var 'arch__ins' and pass arch info till ins__find
Naveen N. Rao (1):
perf annotate: add powerpc support
Ravi Bangoria (3):
perf: Utility function to fetch arch
perf annotate: Enable cro
Define macro for each arch name and use them instead of using arch
name as string.
Signed-off-by: Ravi Bangoria
---
tools/perf/arch/common.c | 36 ++--
tools/perf/arch/common.h | 11 +++
tools/perf/util/annotate.c | 10
re whether instruction defined
outside of that also contains arm instructions. Apart from that,
'call__parse()' and 'move__parse()' contains #ifdef __arm__ directive.
I've changed it to if (!strcmp(norm_arch, "arm")). But I've not
tested this as well.
Signed-of
Add Utility function to fetch 'arch' from 'evsel'. (evsel->env->arch)
Signed-off-by: Ravi Bangoria
---
tools/perf/util/evsel.c | 7 +++
tools/perf/util/evsel.h | 2 ++
2 files changed, 9 insertions(+)
diff --git a/tools/perf/util/evsel.c b/tools/perf/util/evse
On Monday 27 June 2016 10:46 PM, Arnaldo Carvalho de Melo wrote:
Em Fri, Jun 24, 2016 at 05:23:57PM +0530, Ravi Bangoria escreveu:
Change current data structures and function to enable cross arch annotate
and add support for x86 and arm instructions.
Current implementation does not contain
Thanks David.
On Tuesday 28 June 2016 09:37 PM, David Laight wrote:
From: Ravi Bangoria
Sent: 28 June 2016 12:37
Powerpc has long list of branch instructions and hardcoding them in table
appears to be error-prone. So, add new function to find instruction
instead of creating table.
Signed-off
erf report -i perf.data.powerpc --vmlinux vmlinux.powerpc
Changes in v2:
- Corrected few memory leaks.
- Created Dynamic list for powerpc to optimize memory consumption
Naveen N. Rao (1):
perf annotate: add powerpc support
Ravi Bangoria (3):
perf: Utility function to fetch arch
perf annotate: Enab
every time, first check if list already contain object for that
nemonics.
Signed-off-by: Naveen N. Rao
Signed-off-by: Ravi Bangoria
---
Changes in v2:
- Corrected few memory leaks.
- Created Dynamic list for powerpc to optimize memory consumption
tools/perf/util/annota
re whether instruction defined
outside of that also contains arm instructions. Apart from that,
'call__parse()' and 'move__parse()' contains #ifdef __arm__ directive.
I've changed it to if (!strcmp(norm_arch, "arm")). But I've not
tested this as well.
Signe
Add Utility function to fetch arch using evsel. (evsel->env->arch)
Signed-off-by: Ravi Bangoria
---
Changes in v2:
- No changes
tools/perf/util/evsel.c | 7 +++
tools/perf/util/evsel.h | 2 ++
2 files changed, 9 insertions(+)
diff --git a/tools/perf/util/evsel.c b/tools/per
Define macro for each arch name and use them instead of using arch
name as string.
Signed-off-by: Ravi Bangoria
---
Changes in v2:
- No changes
tools/perf/arch/common.c | 36 ++--
tools/perf/arch/common.h | 11 +++
tools/perf/util
Thanks Naveen,
On Wednesday 29 June 2016 08:15 PM, Naveen N. Rao wrote:
On 2016/06/29 04:45PM, Ravi Bangoria wrote:
From: Naveen N. Rao
Powerpc has long list of branch instructions and hardcoding them in
table appears to be error-prone. So, add new function to find
instruction instead of
re whether instruction defined
outside of that also contains arm instructions. Apart from that,
'call__parse()' and 'move__parse()' contains #ifdef __arm__ directive.
I've changed it to if (!strcmp(norm_arch, arm)). But I've not
tested this as well.
Signed-off-by:
erf report -i perf.data.powerpc --vmlinux vmlinux.powerpc
Changes in v3:
- Optimized patch that enables annotate on powerpc
- Corrected one memory leak
v2 link: https://lkml.org/lkml/2016/6/29/278
Naveen N. Rao (1):
perf annotate: add powerpc support
Ravi Bangoria (4):
perf: Utility function to fetc
every time, first check if list already contain object for that
instruction.
Signed-off-by: Naveen N. Rao
Signed-off-by: Ravi Bangoria
---
Changes in v3:
- Optimized code
- Corrected one memory leak
tools/perf/util/annotate.c | 126 +
1 file ch
Define macro for each normalized arch name and use them instead
of using arch name as string
Signed-off-by: Ravi Bangoria
---
Changes in v3:
- No changes
tools/perf/arch/common.c | 36 ++--
tools/perf/arch/common.h | 11 +++
tools
Add Utility function to fetch arch using evsel. (evsel->env->arch)
Signed-off-by: Ravi Bangoria
---
Change in v3:
- No changes
tools/perf/util/evsel.c | 7 +++
tools/perf/util/evsel.h | 2 ++
2 files changed, 9 insertions(+)
diff --git a/tools/perf/util/evsel.c b/tools/perf/util/e
Thanks acme,
On Wednesday 02 March 2016 09:52 PM, Arnaldo Carvalho de Melo wrote:
Em Wed, Mar 02, 2016 at 09:16:48PM +0530, Ravi Bangoria escreveu:
Thanks Arnaldo,
Please find my comments.
On Wednesday 02 March 2016 07:55 PM, Arnaldo Carvalho de Melo wrote:
Em Wed, Feb 24, 2016 at 02:37
ar 22, 2016 at 04:12:11PM -0300, Arnaldo Carvalho de Melo escreveu:
Em Wed, Feb 24, 2016 at 02:37:42PM +0530, Ravi Bangoria escreveu:
'perf kvm record' is not available on powerpc because 'perf' relies on
the 'cycles' event (a PMU event) to profile the guest. However, f
e_bp_slot()
arch_unregister_hw_breakpoint()
perf_event_exit_task_context sets child_ctx->task as TASK_TOMBSTONE
which is (void *)-1. arch_unregister_hw_breakpoint tries to fetch
'thread' attribute of 'task' resulting in Oops.
This patch adds one more condition before accessing data from '
Thanks Arnaldo,
Please find my comments.
On Wednesday 02 March 2016 07:55 PM, Arnaldo Carvalho de Melo wrote:
Em Wed, Feb 24, 2016 at 02:37:45PM +0530, Ravi Bangoria escreveu:
use_browser = 0;
+ if (!field_order &&
+ is_perf_data_reorded_on_ppc(session
par_hcall
0.00% :9689[guest.kernel.kallsyms] [g] .__srcu_read_unlock
0.00% :9689[guest.kernel.kallsyms] [g] ._raw_spin_lock
0.00% :9689[guest.kernel.kallsyms] [g] .arch_local_irq_restore
Signed-off-by: Ravi Bangoria
Signed-off-by: Hemant Kumar
---
tool
HI acme,
On Tuesday 02 February 2016 02:36 AM, Arnaldo Carvalho de Melo wrote:
Em Fri, Jan 22, 2016 at 11:28:11AM +0530, Ravi Bangoria escreveu:
+ return event->header.misc & PERF_RECORD_MISC_CPUMODE_MASK;
+}
This hunk and the next should be on the previous patch, that is n
HI acme,
Thanks for reviewing the patch.
On Tuesday 02 February 2016 02:23 AM, Arnaldo Carvalho de Melo wrote:
Em Fri, Jan 22, 2016 at 11:28:10AM +0530, Ravi Bangoria escreveu:
This patch changes prototype of perf_event__preprocess_sample() with
additional argument evsel added at last.
This
point: Use builtin ALIGN*() macros")
Reported-by: Milton Miller
Signed-off-by: Ravi Bangoria
---
arch/powerpc/kernel/hw_breakpoint.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/powerpc/kernel/hw_breakpoint.c
b/arch/powerpc/kernel/hw_breakpoint.c
index daf0e1d
Add new device-tree feature for 2nd DAWR. If this feature is present,
2nd DAWR is supported, otherwise not.
Signed-off-by: Ravi Bangoria
---
arch/powerpc/include/asm/cputable.h | 7 +--
arch/powerpc/kernel/dt_cpu_ftrs.c | 7 +++
2 files changed, 12 insertions(+), 2 deletions(-)
diff
CPU_FTR_DAWR to CPU_FTRS_POWER10. Note that
this change does not enable 2nd DAWR support.
Signed-off-by: Ravi Bangoria
---
arch/powerpc/include/asm/cputable.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/powerpc/include/asm/cputable.h
b/arch/powerpc/include/asm/cputable.h
affected.
Fixes: 27985b2a640e ("powerpc/watchpoint: Don't ignore extraneous exceptions
blindly")
Fixes: 74c6881019b7 ("powerpc/watchpoint: Prepare handler to handle more than
one watchpoint")
Reported-by: Pedro Miraglia Franco de Carvalho
Signed-off-by: Ravi
...@linux.ibm.com/
v2->v3:
- patch #2 is new. It fixes an issue with DAWR exception constraint
- Rename dawr1 to debug-facilities-v31 in dt cpu feature, suggested
by Nick Piggin.
- Rebased to powerpc/next
[1]:
https://lore.kernel.org/linuxppc-dev/20200514111741.97993-1-ravi.bango...@linux.ibm.com/
R
So far Book3S Powerpc supported only one watchpoint. Power10 is
introducing 2nd DAWR. Enable 2nd DAWR support for Power10.
Availability of 2nd DAWR will depend on CPU_FTR_DAWR1.
Signed-off-by: Ravi Bangoria
---
arch/powerpc/include/asm/cputable.h | 4 +++-
arch/powerpc/include/asm
2nd DAWR can be set/unset using H_SET_MODE hcall with resource value 5.
Enable powervm guest support with that. This has no effect on kvm guest
because kvm will return error if guest does hcall with resource value 5.
Signed-off-by: Ravi Bangoria
---
arch/powerpc/include/asm/hvcall.h | 1
or
guests and thus this change is mostly applicable for guests only.
Signed-off-by: Ravi Bangoria
---
arch/powerpc/kernel/prom.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/powerpc/kernel/prom.c b/arch/powerpc/kernel/prom.c
index 9cc49f265c86..c76c09b97bc8 100644
--- a/arch/po
Current H_SET_MODE hcall macro name for setting/resetting DAWR0 is
H_SET_MODE_RESOURCE_SET_DAWR. Add suffix 0 to macro name as well.
Signed-off-by: Ravi Bangoria
---
arch/powerpc/include/asm/hvcall.h | 2 +-
arch/powerpc/include/asm/plpar_wrappers.h | 2 +-
arch/powerpc/kvm/book3s_hv.c
Power10 has removed 512 bytes boundary from match criteria. i.e. The watch
range can cross 512 bytes boundary.
Signed-off-by: Ravi Bangoria
---
arch/powerpc/kernel/hw_breakpoint.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/arch/powerpc/kernel/hw_breakpoint.c
b
BACK_SET()")
Signed-off-by: Ravi Bangoria
---
tools/lib/subcmd/parse-options.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/tools/lib/subcmd/parse-options.c b/tools/lib/subcmd/parse-options.c
index dbb9efbf718a..39ebf6192016 100644
--- a/tools/lib/subcmd/parse-options.c
+++ b/too
perf record man page uses word 'size' while describing
--switch-output=time option. Fix that.
Signed-off-by: Ravi Bangoria
---
tools/perf/Documentation/perf-record.txt | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/tools/perf/Documentation/perf-record.txt
b/
Hi Christophe,
diff --git a/arch/powerpc/kernel/ptrace/ptrace-noadv.c
b/arch/powerpc/kernel/ptrace/ptrace-noadv.c
index 57a0ab822334..866597b407bc 100644
--- a/arch/powerpc/kernel/ptrace/ptrace-noadv.c
+++ b/arch/powerpc/kernel/ptrace/ptrace-noadv.c
@@ -286,11 +286,16 @@ long ppc_del_hwdebug(st
Hi Christophe,
+static int cache_op_size(void)
+{
+#ifdef __powerpc64__
+ return ppc64_caches.l1d.block_size;
+#else
+ return L1_CACHE_BYTES;
+#endif
+}
You've got l1_dcache_bytes() in arch/powerpc/include/asm/cache.h to do that.
+
+void wp_get_instr_detail(struct pt_regs *regs, struct
: Consolidate symbol fixup issue")
Reported-by: Sandipan Das
Signed-off-by: Ravi Bangoria
---
tools/perf/arch/powerpc/util/Build | 1 +
1 file changed, 1 insertion(+)
diff --git a/tools/perf/arch/powerpc/util/Build
b/tools/perf/arch/powerpc/util/Build
index e5c9504f8586..e86e210bf514 100
Power10 is introducing second DAWR. Add SPRN_ macros for the same.
Signed-off-by: Ravi Bangoria
Reviewed-by: Michael Neuling
---
arch/powerpc/include/asm/reg.h | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/powerpc/include/asm/reg.h b/arch/powerpc/include/asm/reg.h
index
Power10 is introducing second DAWR. Use real register names from ISA
for current macros:
s/SPRN_DAWR/SPRN_DAWR0/
s/SPRN_DAWRX/SPRN_DAWRX0/
Signed-off-by: Ravi Bangoria
Reviewed-by: Michael Neuling
---
arch/powerpc/include/asm/reg.h | 4 ++--
arch/powerpc/kernel/dawr.c
Introduce new parameter 'nr' to set_dawr() which indicates which DAWR
should be programed.
Signed-off-by: Ravi Bangoria
Reviewed-by: Michael Neuling
---
arch/powerpc/include/asm/hw_breakpoint.h | 4 ++--
arch/powerpc/kernel/dawr.c | 15 ++-
arch/powe
Introduce new parameter 'nr' to __set_breakpoint() which indicates
which DAWR should be programed. Also convert current_brk variable
to an array.
Signed-off-by: Ravi Bangoria
Reviewed-by: Michael Neuling
---
arch/powerpc/include/asm/debug.h | 2 +-
arch/powerpc/i
User can ask for num of available watchpoints(dbginfo.num_data_bps)
using ptrace(PPC_PTRACE_GETHWDBGINFO). Return actual number of
available watchpoints on the machine rather than hardcoded 1.
Signed-off-by: Ravi Bangoria
Reviewed-by: Michael Neuling
---
arch/powerpc/kernel/ptrace/ptrace
ps://lore.kernel.org/linuxppc-dev/20200430043417.30948-1-ravi.bango...@linux.ibm.com
v4->v5:
- s/future power architecture/Power10/
- s/dawr/DAWR/ in commit descriptions
[1]: https://www-355.ibm.com/systems/power/openpower/
Ravi Bangoria (16):
powerpc/watchpoint: Rename current DAWR macros
M_MAX, which will now represent maximum number of watchpoints
supported by Powerpc.
Signed-off-by: Ravi Bangoria
Reviewed-by: Michael Neuling
---
arch/powerpc/include/asm/cputable.h | 6 +-
arch/powerpc/include/asm/hw_breakpoint.h | 5 +
arch/powerpc/include/asm/processor.h | 2 +-
Instead of disabling only one watchpoint, get num of available
watchpoints dynamically and disable all of them.
Signed-off-by: Ravi Bangoria
Reviewed-by: Michael Neuling
---
arch/powerpc/include/asm/hw_breakpoint.h | 16
1 file changed, 8 insertions(+), 8 deletions(-)
diff
Currently we calculate hw aligned start and end addresses manually.
Replace them with builtin ALIGN_DOWN() and ALIGN() macros.
So far end_addr was inclusive but this patch makes it exclusive (by
avoiding -1) for better readability.
Suggested-by: Christophe Leroy
Signed-off-by: Ravi Bangoria
Introduce is_ptrace_bp() function and move the check inside the
function. It will be utilize more in later set of patches.
Signed-off-by: Ravi Bangoria
Reviewed-by: Michael Neuling
---
arch/powerpc/kernel/hw_breakpoint.c | 7 ++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a
ime if their address
range overlaps.
Signed-off-by: Ravi Bangoria
Reviewed-by: Michael Neuling
---
arch/powerpc/include/asm/hw_breakpoint.h | 2 +
arch/powerpc/kernel/hw_breakpoint.c | 221 +++
kernel/events/hw_breakpoint.c| 16 ++
3 files changed, 239
-off-by: Ravi Bangoria
Reviewed-by: Michael Neuling
---
arch/powerpc/kernel/dawr.c | 10 +++---
1 file changed, 7 insertions(+), 3 deletions(-)
diff --git a/arch/powerpc/kernel/dawr.c b/arch/powerpc/kernel/dawr.c
index 8114ad3a8574..500f52fa4711 100644
--- a/arch/powerpc/kernel/dawr.c
+++ b
Add support for 2nd DAWR in xmon. With this, we can have two
simultaneous breakpoints from xmon.
Signed-off-by: Ravi Bangoria
Reviewed-by: Michael Neuling
---
arch/powerpc/xmon/xmon.c | 101 ++-
1 file changed, 69 insertions(+), 32 deletions(-)
diff --git a
So far powerpc hw supported only one watchpoint. But Power10 is
introducing 2nd DAWR. Convert thread_struct->hw_brk into an array.
Signed-off-by: Ravi Bangoria
Reviewed-by: Michael Neuling
---
arch/powerpc/include/asm/processor.h | 2 +-
arch/powerpc/kernel/process.c |
Xmon allows overwriting breakpoints because it's supported by only
one DAWR. But with multiple DAWRs, overwriting becomes ambiguous
or unnecessary complicated. So let's not allow it.
Signed-off-by: Ravi Bangoria
Reviewed-by: Michael Neuling
---
arch/powerpc/xmon/xmon.c | 4
1 fi
.
Signed-off-by: Ravi Bangoria
Reviewed-by: Michael Neuling
---
arch/powerpc/kernel/hw_breakpoint.c | 7 --
arch/powerpc/kernel/process.c | 6 -
arch/powerpc/kernel/ptrace/ptrace-noadv.c | 28 +--
3 files changed, 31 insertions(+), 10 deletions
configured for readonly watchpoint and the instruction is store, this
DAWR must not have caused exception.
Signed-off-by: Ravi Bangoria
Reviewed-by: Michael Neuling
---
arch/powerpc/include/asm/processor.h | 2 +-
arch/powerpc/include/asm/sstep.h | 2 +
arch/powerpc/kernel/hw_breakpoint.c
cra"
+ [PERF_REG_POWERPC_MMCRA] = "mmcra",
+ [PERF_REG_POWERPC_MMCR0] = "mmcr0",
+ [PERF_REG_POWERPC_MMCR1] = "mmcr1",
+ [PERF_REG_POWERPC_MMCR2] = "mmcr2",
+
Unnecesasy line.
Apart from those, for the series:
Reviewed-and-Tested-by: Ravi Bangoria
CPU_FTR_DAWR to CPU_FTRS_POWER10. Note that
this change does not enable 2nd DAWR support yet.
Signed-off-by: Ravi Bangoria
---
arch/powerpc/include/asm/cputable.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/powerpc/include/asm/cputable.h
b/arch/powerpc/include/asm
Current H_SET_MODE hcall macro name for setting/resetting DAWR0 is
H_SET_MODE_RESOURCE_SET_DAWR. Add suffix 0 to macro name as well.
Signed-off-by: Ravi Bangoria
---
arch/powerpc/include/asm/hvcall.h | 2 +-
arch/powerpc/include/asm/plpar_wrappers.h | 2 +-
arch/powerpc/kvm/book3s_hv.c
Add new device-tree feature for 2nd DAWR. If this feature is present,
2nd DAWR is supported, otherwise not.
Signed-off-by: Ravi Bangoria
---
arch/powerpc/include/asm/cputable.h | 7 +--
arch/powerpc/kernel/dt_cpu_ftrs.c | 7 +++
2 files changed, 12 insertions(+), 2 deletions(-)
diff
and thus this change is
mostly applicable for guests only.
Signed-off-by: Ravi Bangoria
---
arch/powerpc/kernel/prom.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/powerpc/kernel/prom.c b/arch/powerpc/kernel/prom.c
index 1dcf0e214a22..6de59de579f7 100644
--- a/arch/powerpc/kernel/prom.c
++
s.
[1]:
https://lore.kernel.org/linuxppc-dev/20200514111741.97993-1-ravi.bango...@linux.ibm.com/
[2]:
https://lore.kernel.org/linuxppc-dev/20200521014341.29095-1-alist...@popple.id.au
Ravi Bangoria (7):
powerpc/watchpoint: Enable watchpoint functionality on power10 guest
powerpc/dt_cpu_ftrs: Add
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