node according to the requested data flow path, physical links and
constraints. The topology could be complicated and multi-tiered and is SoC
specific.
Signed-off-by: Georgi Djakov
Reviewed-by: Evan Green
---
Documentation/interconnect/interconnect.rst | 94
drivers/Kconfig
consumer drivers, introduce a translation function
to help us get the board specific interconnect data from device-tree.
Signed-off-by: Georgi Djakov
---
drivers/interconnect/core.c | 156 ++
include/linux/interconnect-provider.h | 17 +++
include/linux
From: David Dai
Introduce Qualcomm SDM845 specific provider driver using the
interconnect framework.
Signed-off-by: David Dai
Signed-off-by: Georgi Djakov
---
.../bindings/interconnect/qcom,sdm845.txt | 24 +
drivers/interconnect/Kconfig | 5 +
drivers/interconnect
From: David Dai
Add RSC (Resource State Coordinator) provider
dictating network-on-chip interconnect bus performance
found on SDM845-based platforms.
Signed-off-by: David Dai
Signed-off-by: Georgi Djakov
---
arch/arm64/boot/dts/qcom/sdm845.dtsi | 5 +
1 file changed, 5 insertions
Hi Rob,
On 9/26/18 17:42, Georgi Djakov wrote:
Hi Rob,
Thanks for the comments!
On 09/25/2018 09:02 PM, Rob Herring wrote:
On Fri, Aug 31, 2018 at 05:01:45PM +0300, Georgi Djakov wrote:
This binding is intended to represent the relations between the interconnect
controllers (providers) and
Hi Joe,
On 11/27/18 20:35, Joe Perches wrote:
On Tue, 2018-11-27 at 20:03 +0200, Georgi Djakov wrote:
This patch introduces a new API to get requirements and configure the
interconnect buses across the entire chipset to fit with the current
demand.
trivial notes:
diff --git a/drivers
Hi Evan,
On 12/1/18 02:38, Evan Green wrote:
> On Tue, Nov 27, 2018 at 10:03 AM Georgi Djakov
> wrote:
>>
>> This patch introduces a new API to get requirements and configure the
>> interconnect buses across the entire chipset to fit with the current
>> demand.
>
Hi Evan,
On 12/1/18 02:38, Evan Green wrote:
> On Tue, Nov 27, 2018 at 10:04 AM Georgi Djakov
> wrote:
>>
>> Currently we support only platform data for specifying the interconnect
>> endpoints. As now the endpoints are hard-coded into the consumer driver
>> this
Hi Evan,
On 12/1/18 02:39, Evan Green wrote:
> On Tue, Nov 27, 2018 at 10:04 AM Georgi Djakov
> wrote:
>>
>> From: David Dai
>>
>> Add RSC (Resource State Coordinator) provider
>> dictating network-on-chip interconnect bus performance
>> found on S
Hi Evan,
On 12/1/18 02:39, Evan Green wrote:
> On Tue, Nov 27, 2018 at 10:04 AM Georgi Djakov
> wrote:
>>
>> From: David Dai
>>
>> Introduce Qualcomm SDM845 specific provider driver using the
>> interconnect framework.
>>
>> Signed-of
Hi Greg and Evan,
On 12/6/18 16:55, Greg KH wrote:
> On Wed, Dec 05, 2018 at 12:41:35PM -0800, Evan Green wrote:
>> On Tue, Nov 27, 2018 at 10:03 AM Georgi Djakov
>> wrote:
>>>
>>> Modern SoCs have multiple processors and various dedicated cores (video,
>
Hi Rob,
On 12/5/18 18:16, Rob Herring wrote:
> On Tue, Nov 27, 2018 at 12:03 PM Georgi Djakov
> wrote:
>>
>> This patch introduces a new API to get requirements and configure the
>> interconnect buses across the entire chipset to fit with the current
>> demand.
>
struct interconnect_path to use array instead of linked list.
David Dai (2):
interconnect: qcom: Add sdm845 interconnect provider driver
arm64: dts: sdm845: Add interconnect provider DT nodes
Georgi Djakov (6):
interconnect: Add generic on-chip interconnect API
dt-bindings: Introduce int
Add a functionality to provide information about the current constraints
per each node and provider.
Reviewed-by: Evan Green
Signed-off-by: Georgi Djakov
---
drivers/interconnect/core.c | 71 +
1 file changed, 71 insertions(+)
diff --git a/drivers
Add myself as the maintainer of the interconnect API.
Signed-off-by: Georgi Djakov
---
MAINTAINERS | 10 ++
1 file changed, 10 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 380e43f585d3..4f426863ff3b 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -7694,6 +7694,16 @@ L
From: David Dai
Introduce Qualcomm SDM845 specific provider driver using the
interconnect framework.
Signed-off-by: David Dai
Signed-off-by: Georgi Djakov
---
.../bindings/interconnect/qcom,sdm845.txt | 24 +
drivers/interconnect/Kconfig | 5 +
drivers/interconnect
bandwidth that satisfies all bandwidth requests that cross
through that node. The topology could be complicated and multi-tiered and
is SoC specific.
Reviewed-by: Evan Green
Signed-off-by: Georgi Djakov
---
Documentation/interconnect/interconnect.rst | 94
drivers/Kconfig
This binding is intended to represent the relations between the interconnect
controllers (providers) and consumer device nodes. It will allow creating links
between consumers and interconnect paths (exposed by interconnect providers).
Reviewed-by: Evan Green
Signed-off-by: Georgi Djakov
Recently the cmd_db_read_aux_data() function was changed to avoid using
memcpy and return a pointer instead. Update the code to the new API and
fix the build failure.
Fixes: ed3cafa79ea7 ("soc: qcom: cmd-db: Stop memcpy()ing in
cmd_db_read_aux_data()")
Signed-off-by: Georgi Djakov
--
From: David Dai
Add RSC (Resource State Coordinator) provider
dictating network-on-chip interconnect bus performance
found on SDM845-based platforms.
Signed-off-by: David Dai
Signed-off-by: Georgi Djakov
---
arch/arm64/boot/dts/qcom/sdm845.dtsi | 5 +
1 file changed, 5 insertions
consumer drivers, introduce a translation function
to help us get the board specific interconnect data from device-tree.
Reviewed-by: Evan Green
Signed-off-by: Georgi Djakov
---
drivers/interconnect/core.c | 149 ++
include/linux/interconnect-provider.h | 17
Hi Quentin,
On 12/7/18 18:27, Quentin Perret wrote:
> Hi Georgi,
>
> On Friday 07 Dec 2018 at 17:29:17 (+0200), Georgi Djakov wrote:
>> Recently the cmd_db_read_aux_data() function was changed to avoid using
>> memcpy and return a pointer instead. Update the code to the n
Hi Matthias,
Thanks for looking into this.
On 8.12.18 1:30, Matthias Kaehlcke wrote:
> Hi Georgi,
>
> not a full review, only one thing I just stumbled across:
>
> On Fri, Dec 07, 2018 at 05:29:14PM +0200, Georgi Djakov wrote:
>> From: David Dai
>>
>> I
consumer drivers, introduce a translation function
to help us get the board specific interconnect data from device-tree.
Reviewed-by: Evan Green
Signed-off-by: Georgi Djakov
---
drivers/interconnect/core.c | 149 ++
include/linux/interconnect-provider.h | 17
David Dai (2):
interconnect: qcom: Add sdm845 interconnect provider driver
arm64: dts: sdm845: Add interconnect provider DT nodes
Georgi Djakov (5):
interconnect: Add generic on-chip interconnect API
dt-bindings: Introduce interconnect binding
interconnect: Allow endpoints translation via DT
From: David Dai
Introduce Qualcomm SDM845 specific provider driver using the
interconnect framework.
Signed-off-by: David Dai
Signed-off-by: Georgi Djakov
---
.../bindings/interconnect/qcom,sdm845.txt | 24 +
drivers/interconnect/Kconfig | 5 +
drivers/interconnect
From: David Dai
Add RSC (Resource State Coordinator) provider
dictating network-on-chip interconnect bus performance
found on SDM845-based platforms.
Signed-off-by: David Dai
Signed-off-by: Georgi Djakov
---
arch/arm64/boot/dts/qcom/sdm845.dtsi | 5 +
1 file changed, 5 insertions
Add a functionality to provide information about the current constraints
per each node and provider.
Reviewed-by: Evan Green
Signed-off-by: Georgi Djakov
---
drivers/interconnect/core.c | 71 +
1 file changed, 71 insertions(+)
diff --git a/drivers
Add myself as the maintainer of the interconnect API.
Signed-off-by: Georgi Djakov
---
MAINTAINERS | 10 ++
1 file changed, 10 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 380e43f585d3..4f426863ff3b 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -7694,6 +7694,16 @@ L
bandwidth that satisfies all bandwidth requests that cross
through that node. The topology could be complicated and multi-tiered and
is SoC specific.
Reviewed-by: Evan Green
Signed-off-by: Georgi Djakov
---
Documentation/interconnect/interconnect.rst | 94
drivers/Kconfig
This binding is intended to represent the relations between interconnect
controllers (providers) and consumer device nodes. It will allow creating
links between consumers and interconnect paths (exposed by interconnect
providers).
Reviewed-by: Evan Green
Signed-off-by: Georgi Djakov
Hi Olof,
On 9.12.18 2:33, Olof Johansson wrote:
> Hi Georgi,
>
> On Sat, Dec 8, 2018 at 9:02 AM Georgi Djakov wrote:
>>
>> Modern SoCs have multiple processors and various dedicated cores (video, gpu,
>> graphics, modem). These cores are talking to each other and ca
Hi Evan,
Thanks for reviewing!
On 06/26/2018 11:57 PM, Evan Green wrote:
> Hi Georgi. Thanks for the new spin of this.
>
> On Wed, Jun 20, 2018 at 5:11 AM Georgi Djakov
> wrote:
>>
>> This patch introduce a new API to get requirements and configure the
>> interc
Hi Matthias,
Thanks for reviewing!
On 06/27/2018 02:34 AM, Matthias Kaehlcke wrote:
> Hi Georgi,
>
> On Wed, Jun 20, 2018 at 03:11:34PM +0300, Georgi Djakov wrote:
>> This patch introduce a new API to get requirements and configure the
>
> nit: s/introduc
Hi Vincent,
On 27.06.18 г. 9:19, Vincent Guittot wrote:
> Hi Georgi
>
> On Wed, 20 Jun 2018 at 14:11, Georgi Djakov wrote:
>
> [snip]
>
>> +
>> +static struct icc_path *path_allocate(struct icc_node *dst, ssize_t
>> num_nodes)
>> +{
>> +
Hi Evan,
On 06/26/2018 11:47 PM, Evan Green wrote:
> Hi Georgi,
>
> On Wed, Jun 20, 2018 at 5:11 AM Georgi Djakov
> wrote:
>>
>> On some Qualcomm SoCs, there is a remote processor, which controls some of
>> the Network-On-Chip interconnect resources. Other
Hi Matthias,
On 06/27/2018 03:55 AM, Matthias Kaehlcke wrote:
> On Wed, Jun 20, 2018 at 03:11:37PM +0300, Georgi Djakov wrote:
>> On some Qualcomm SoCs, there is a remote processor, which controls some of
>> the Network-On-Chip interconnect resources. Other CPUs express th
Hi Evan,
On 06/26/2018 11:48 PM, Evan Green wrote:
> On Wed, Jun 20, 2018 at 5:11 AM Georgi Djakov
> wrote:
>>
>> Add driver for the Qualcomm interconnect buses found in msm8916 based
>> platforms.
>>
[..]
>> --- /dev/null
>> +++ b/drivers/int
consumer drivers, introduce a translation function
to help us get the board specific interconnect data from device-tree.
Signed-off-by: Georgi Djakov
---
drivers/interconnect/core.c | 62
include/linux/interconnect.h | 7
2 files changed, 69 insertions
Document the device-tree bindings Network-On-Chip interconnect driver
for Qualcomm msm8916 platforms.
Signed-off-by: Georgi Djakov
---
.../bindings/interconnect/qcom-msm8916.txt| 39 ++
include/dt-bindings/interconnect/qcom.h | 350 ++
2 files changed, 389 insertions
.
Signed-off-by: Georgi Djakov
---
.../bindings/interconnect/interconnect.txt| 27 +++
1 file changed, 27 insertions(+)
diff --git a/Documentation/devicetree/bindings/interconnect/interconnect.txt
b/Documentation/devicetree/bindings/interconnect/interconnect.txt
index 6e2b2971b094
Add driver for the Qualcomm interconnect buses found in msm8916 based
platforms.
Signed-off-by: Georgi Djakov
---
drivers/interconnect/Kconfig| 5 +
drivers/interconnect/Makefile | 1 +
drivers/interconnect/qcom/Kconfig | 10 +
drivers/interconnect/qcom/Makefile | 2
node according to the requested data flow path, physical links and
constraints. The topology could be complicated and multi-tiered and is SoC
specific.
Signed-off-by: Georgi Djakov
---
Documentation/interconnect/interconnect.rst | 96
drivers/Kconfig | 2
On some Qualcomm SoCs, there is a remote processor, which controls some of
the Network-On-Chip interconnect resources. Other CPUs express their needs
by communicating with this processor. Add a driver to handle communication
with this remote processor.
Signed-off-by: Georgi Djakov
Add a functionality to provide information about the current constraints
per each node and provider.
Signed-off-by: Georgi Djakov
---
drivers/interconnect/core.c | 78 +
1 file changed, 78 insertions(+)
diff --git a/drivers/interconnect/core.c b/drivers
arations of some structs.
* Now passing prev/next nodes to the vendor driver.
* Properly remove requests on _put().
* Added refcounting.
* Updated documentation.
* Changed struct interconnect_path to use array instead of linked list.
Georgi Djakov (8):
interconnect: Add generic on-chip in
This binding is intended to represent the interconnect hardware present
in some of the modern SoCs. Currently it consists only of a binding for
the interconnect hardware devices (provider).
Signed-off-by: Georgi Djakov
---
.../bindings/interconnect/interconnect.txt| 33
Add driver for the Qualcomm interconnect buses found in msm8916 based
platforms.
Signed-off-by: Georgi Djakov
---
drivers/interconnect/Kconfig| 5 +
drivers/interconnect/Makefile | 1 +
drivers/interconnect/qcom/Kconfig | 11 +
drivers/interconnect/qcom/Makefile | 2
This binding is intended to represent the interconnect hardware present
in some of the modern SoCs. Currently it consists only of a binding for
the interconnect hardware devices (provider).
Signed-off-by: Georgi Djakov
---
.../bindings/interconnect/interconnect.txt| 33
Document the device-tree bindings Network-On-Chip interconnect driver
for Qualcomm msm8916 platforms.
Signed-off-by: Georgi Djakov
---
.../bindings/interconnect/qcom-msm8916.txt| 39 ++
include/dt-bindings/interconnect/qcom.h | 350 ++
2 files changed, 389 insertions
consumer drivers, introduce a translation function
to help us get the board specific interconnect data from device-tree.
Signed-off-by: Georgi Djakov
---
drivers/interconnect/core.c | 62
include/linux/interconnect.h | 7
2 files changed, 69 insertions
On some Qualcomm SoCs, there is a remote processor, which controls some of
the Network-On-Chip interconnect resources. Other CPUs express their needs
by communicating with this processor. Add a driver to handle comminication
with this remote processor.
Signed-off-by: Georgi Djakov
lic declarations of some structs.
* Now passing prev/next nodes to the vendor driver.
* Properly remove requests on _put().
* Added refcounting.
* Updated documentation.
* Changed struct interconnect_path to use array instead of linked list.
Georgi Djakov (8):
interconnect: Add generic on-chip in
.
Signed-off-by: Georgi Djakov
---
.../bindings/interconnect/interconnect.txt| 27 +++
1 file changed, 27 insertions(+)
diff --git a/Documentation/devicetree/bindings/interconnect/interconnect.txt
b/Documentation/devicetree/bindings/interconnect/interconnect.txt
index 6e2b2971b094
according to the requested data flow path, physical links and
constraints. The topology could be complicated and multi-tiered and is SoC
specific.
Signed-off-by: Georgi Djakov
---
Documentation/interconnect/interconnect.rst | 96
drivers/Kconfig | 2 +
drivers
Add a functionality to provide information about the current constraints
per each node and provider.
Signed-off-by: Georgi Djakov
---
drivers/interconnect/core.c | 78 +
1 file changed, 78 insertions(+)
diff --git a/drivers/interconnect/core.c b/drivers
Suggested-by: Vijay Viswanath
Signed-off-by: Georgi Djakov
---
This can go for v4.18, as it's not a critical fix.
Tested on db410c and db820c.
---
drivers/mmc/host/sdhci-msm.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/drivers/mmc/host/sdhci-msm.c b/drivers/mmc/host/sdhci-msm.c
ind
Hi Vijay,
On 05/30/2018 10:11 AM, Vijay Viswanath wrote:
> Hi Georgi,
>
> Thanks for testing the patch on 8096 and pointing out this issue.
> The issue is coming because, when card is removed, the HOST_CONTROL2
> register is retaining the 1.8V Signalling enable bit till SDHCI reset
> happens afte
Hi Sravanthi,
Thanks for the patch!
On 11/22/18 11:06, Sravanthi Kollukuduru wrote:
> The interconnect framework is designed to provide a
> standard kernel interface to control the settings of
> the interconnects on a SoC.
>
> The interconnect API uses a consumer/provider-based model,
> where th
Hi Sravanthi,
Thanks for the patch!
On 11/22/18 11:06, Sravanthi Kollukuduru wrote:
> Add interconnect properties such as interconnect provider specifier
> , the edge source and destination ports which are required by the
> interconnect API to configure interconnect path for MDSS.
>
> Changes in
Hi Greg,
On 12/11/18 08:58, Greg Kroah-Hartman wrote:
> On Mon, Dec 10, 2018 at 04:50:00PM +0200, Georgi Djakov wrote:
>> On 12/10/18 13:00, Rafael J. Wysocki wrote:
>>> On Mon, Dec 10, 2018 at 11:18 AM Georgi Djakov
>>> wrote:
>>>>
>>>> Hi Raf
Hi Rafael,
On 12/10/18 11:04, Rafael J. Wysocki wrote:
> On Thu, Dec 6, 2018 at 3:55 PM Greg KH wrote:
>>
>> On Wed, Dec 05, 2018 at 12:41:35PM -0800, Evan Green wrote:
>>> On Tue, Nov 27, 2018 at 10:03 AM Georgi Djakov
>>> wrote:
>>>>
>>
On 12/10/18 13:00, Rafael J. Wysocki wrote:
> On Mon, Dec 10, 2018 at 11:18 AM Georgi Djakov
> wrote:
>>
>> Hi Rafael,
>>
>> On 12/10/18 11:04, Rafael J. Wysocki wrote:
>>> On Thu, Dec 6, 2018 at 3:55 PM Greg KH wrote:
>>>>
>>>
Hi Henry,
On 1/7/19 13:04, Henry Chen wrote:
> On Thu, 2019-01-03 at 14:53 -0800, Stephen Boyd wrote:
>> Quoting Henry Chen (2019-01-02 06:09:51)
>>> The patchsets add support for MediaTek hardware module named DVFSRC
>>> (dynamic voltage and frequency scaling resource collector). The DVFSRC is
>>
used for
data transfers by the SD host controller and report the needed bandwidth
based on the clock rate, bus width and mode.
Signed-off-by: Georgi Djakov
---
This depends on the interconnect API: https://lkml.org/lkml/2018/8/31/444
TODO: Use macros for converting and rounding to icc units
Hi Zhong and Greg,
On 09/17/2018 02:24 AM, Greg KH wrote:
> On Mon, Sep 17, 2018 at 05:19:18PM +0800, zhong jiang wrote:
>> On 2018/9/17 16:59, Greg KH wrote:
>>> On Mon, Sep 17, 2018 at 04:53:31PM +0800, zhong jiang wrote:
+to Greg and Andrew.
On 2018/9/16 22:31, zhong jiang wrote:
Some versions of this controller do not advertise their 3.0v and
8bit bus-width support capabilities. It is required to explicitly
set these capabilities for the specific controller versions.
Signed-off-by: Georgi Djakov
---
Tested on msm8916-mtp board.
drivers/mmc/host/sdhci-msm.c | 29
Hi Bjorn,
Thanks for taking a look.
On 03/19/2015 05:36 PM, Bjorn Andersson wrote:
> On Thu, Mar 19, 2015 at 5:55 AM, Georgi Djakov
> wrote:
> [..]
>
>> @@ -516,6 +527,22 @@ static int sdhci_msm_probe(struct platform_device *pdev)
>> host
On 03/19/2015 07:55 PM, Bjorn Andersson wrote:
> On Thu, Mar 19, 2015 at 9:21 AM, Georgi Djakov
> wrote:
> [..]
>>> Does the 8916 board you have work without bumping the
>>> regulator_set_load() (previously regulator_set_optimum_mode())? None
>>> of my
Currently configure_bank() returns void. Add some error
checking on the regmap calls and propagate if there is
any error.
Signed-off-by: Georgi Djakov
---
drivers/clk/qcom/clk-rcg.c | 62 +---
1 file changed, 41 insertions(+), 21 deletions(-)
diff
for finding the index of a clock
matching the specific PLL configuration.
- Update the {set,get}_parent RCG functions use the newly introduced
parent_map struct.
- Convert all existing drivers to the new parent_map tables.
Signed-off-by: Georgi Djakov
---
drivers/clk/qcom/clk-rcg.c | 13
using NULL terminated entries.
* Moved call to qcom_find_src_index() at the top.
Changes since v1:
* Squash the last patches to make this bisectable.
Georgi Djakov (3):
clk: qcom: Fix clk_get_parent function return value
clk: qcom: Do some error handling in configure_bank()
clk: qcom
According to the common clock framework API, the clk_get_parent() function
should return u8. Currently we are returning negative values on error. Fix
this and use the default parent in case of an error.
Signed-off-by: Georgi Djakov
---
drivers/clk/qcom/clk-rcg.c | 26
Some versions of this controller do not advertise their 3.0v and
8bit bus-width support capabilities. It is required to explicitly
set these capabilities for the specific controller versions.
Signed-off-by: Georgi Djakov
---
Changes since v1:
* Converted to separate read, modify, write
When we introduced the parent_map tables, we missed to update some
of the functions where mapping is translated. Fix this.
Signed-off-by: Georgi Djakov
---
drivers/clk/qcom/clk-rcg.c | 13 ++---
drivers/clk/qcom/clk-rcg2.c | 20 +++-
2 files changed, 25 insertions
On 1.04.15 17:22, Hai Li wrote:
> Hi Djakov,
>
> Georgi Djakov linaro.org> writes:
>
>>
>> In the current parent mapping code, we can get duplicate or
> inconsistent
>> indexes, which leads to discrepancy between the number of elements in
> the
>&g
When we introduced the parent_map tables, we missed to update some
of the functions where mapping is translated. Fix this.
Signed-off-by: Georgi Djakov
---
Changes since v1:
* Pass parent map to _freq_tbl_determine_rate()
drivers/clk/qcom/clk-rcg.c | 26 --
drivers
One of the video codec clock frequencies has incorrect divider value. Fix it.
Fixes: 3966fab8b6ab "clk: qcom: Add MSM8916 Global Clock Controller support"
Signed-off-by: Georgi Djakov
---
drivers/clk/qcom/gcc-msm8916.c |2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
di
The gfx3d_clk_src parents configuration is incorrect. Fix it.
Fixes: 3966fab8b6ab "clk: qcom: Add MSM8916 Global Clock Controller support"
Signed-off-by: Georgi Djakov
---
drivers/clk/qcom/gcc-msm8916.c |2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/cl
This patchset adds support for the A53 CPU clock to allow CPU
frequency scaling. It is used on platforms like Qualcomm's msm8916.
Georgi Djakov (4):
clk: qcom: Add support for SR2 PLLs
clk: qcom: Add support for regmap mux-div clocks
clk: qcom: Add A53 clock driver
arm64: dts:
orgi: updated patch to support safe frequency]
Signed-off-by: Georgi Djakov
---
drivers/clk/clk.c| 76 +-
include/linux/clk-provider.h |2 ++
2 files changed, 70 insertions(+), 8 deletions(-)
diff --git a/drivers/clk/clk.c b/drivers/clk/clk
Add support for hardware that support switching both parent clocks and the
divider at the same time. This avoids generating intermediate frequencies
from either the old parent clock and new divider or new parent clock and
old divider combinations.
Signed-off-by: Georgi Djakov
---
drivers/clk
Add a driver for the A53 subsystem PLL, so that we can provide higher
frequency clocks for use by the system.
Signed-off-by: Georgi Djakov
---
Documentation/devicetree/bindings/clock/qcom,a53cc | 22 +++
drivers/clk/qcom/Kconfig |8 +
drivers/clk/qcom/Makefile
Add nodes for the A53 clocks and apcs, so that the driver
can probe and register the clocks.
Signed-off-by: Georgi Djakov
---
arch/arm64/boot/dts/qcom/msm8916.dtsi | 12
1 file changed, 12 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/msm8916.dtsi
b/arch/arm64/boot/dts
Add support for SR2 type pll operations. SR2 is optimized for Time Interval
Error (TIE) or absolute jitter.
Signed-off-by: Georgi Djakov
---
drivers/clk/qcom/clk-pll.c | 75
drivers/clk/qcom/clk-pll.h |1 +
2 files changed, 76 insertions
On 06/15/2015 04:58 PM, Paul Bolle wrote:
> On Fri, 2015-06-12 at 11:41 +0300, Georgi Djakov wrote:
>> --- /dev/null
>> +++ b/drivers/clk/qcom/clk-a53.c
>
>> +static int __init qcom_a53_init(void)
>> +{
>> +return platform_driver_register(&q
This patchset adds support for the iommu, gpu and audio clocks on
the MSM8916 platforms.
Changes since v1:
* Added a set of ops for read-only RCGs and RCGs with shared branches.
Patchset based on clk-next.
Georgi Djakov (5):
clk: qcom: Add support for read-only rcg2 ops
clk: qcom: Add
Some root clock generators may have child branches that are controlled
by different CPUs. These RCGs require special operations.
Signed-off-by: Georgi Djakov
---
drivers/clk/qcom/clk-rcg.h |1 +
drivers/clk/qcom/clk-rcg2.c | 64 +++
2 files changed
Add support for the msm8916 TCU clocks that are needed for IOMMU.
Signed-off-by: Georgi Djakov
---
drivers/clk/qcom/gcc-msm8916.c | 48 ++
include/dt-bindings/clock/qcom,gcc-msm8916.h |3 ++
2 files changed, 51 insertions(+)
diff --git a/drivers/clk
Add support for the msm8916 bimc clocks that are needed for GPU.
Signed-off-by: Georgi Djakov
---
drivers/clk/qcom/gcc-msm8916.c | 59 ++
include/dt-bindings/clock/qcom,gcc-msm8916.h |3 ++
2 files changed, 62 insertions(+)
diff --git a/drivers/clk
Add support for the msm8916 audio clocks. This includes core bus,
low-power audio and codec clocks. They are required for audio playback.
Signed-off-by: Georgi Djakov
---
drivers/clk/qcom/gcc-msm8916.c | 388 ++
include/dt-bindings/clock/qcom,gcc-msm8916.h
Some root clock generators can be controlled by other processors. In this
case modifying them is not recommended. By using the read-only operations,
the child clocks will be able to get information about their parent - like
rate etc.
Suggested-by: Stephen Boyd
Signed-off-by: Georgi Djakov
Hello Vijay,
On 09/27/2017 08:34 AM, Vijay Viswanath wrote:
> Register writes which change voltage of IO lines or turn the IO bus
> on/off require controller to be ready before progressing further. When
> the controller is ready, it will generate a power irq which needs to be
> handled. The thread
Hi Evan,
Thanks for the detailed review!
On 12.05.18 г. 0:30, Evan Green wrote:
> Hi Georgi,
>
> On Fri, Mar 9, 2018 at 1:12 PM Georgi Djakov
> wrote:
>
>> This patch introduce a new API to get requirements and configure the
>> interconnect buses across the ent
Hi Evan,
On 12.05.18 г. 0:30, Evan Green wrote:
> On Fri, Mar 9, 2018 at 1:11 PM Georgi Djakov
> wrote:
>
>> On some Qualcomm SoCs, there is a remote processor, which controls some of
>> the Network-On-Chip interconnect resources. Other CPUs express their needs
>>
Hi Evan,
On 12.05.18 г. 0:29, Evan Green wrote:
> Hi Georgi,
>
> On Fri, Mar 9, 2018 at 1:11 PM Georgi Djakov
> wrote:
>
>> Add driver for the Qualcomm interconnect buses found in msm8916 based
>> platforms.
>
>> Signed-off-by: Georgi Djakov
>&
Hi Amit,
On 25.05.18 г. 11:26, Amit Kucheria wrote:
> On Fri, Mar 9, 2018 at 11:09 PM, Georgi Djakov
> wrote:
>> This patch introduce a new API to get requirements and configure the
>> interconnect buses across the entire chipset to fit with the current
>> demand.
Hi Amit,
On 25.05.18 г. 11:27, Amit Kucheria wrote:
> On Fri, Mar 9, 2018 at 11:09 PM, Georgi Djakov
> wrote:
>> Add driver for the Qualcomm interconnect buses found in msm8916 based
>> platforms.
>>
>> Signed-off-by: Georgi Djakov
>> ---
>>
Hi Neil,
Apologies for the delayed response.
On 12.04.18 г. 16:15, Neil Armstrong wrote:
> On 09/03/2018 22:09, Georgi Djakov wrote:
>> This binding is intended to represent the interconnect hardware present
>> in some of the modern SoCs. Currently it consists only of a bin
Hi Evan,
On 06/06/2018 05:59 PM, Georgi Djakov wrote:
>>> +
>>> +/**
>>> + * icc_node_create() - create a node
>>> + * @id: node id
>>> + *
>>> + * Return: icc_node pointer on success, or ERR_PTR() on error
>>> + */
>>> +str
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