On Wed, Apr 14, 2021 at 01:16:52AM -0600, Yu Zhao wrote:
> On Tue, Apr 13, 2021 at 10:50 PM Dave Chinner wrote:
> >
> > On Tue, Apr 13, 2021 at 09:40:12PM -0600, Yu Zhao wrote:
> > > On Tue, Apr 13, 2021 at 5:14 PM Dave Chinner wrote:
> > > > On Tue, Apr 13, 2021 at 10:13:24AM -0600, Jens Axboe w
Since commit e085b51c74cc ("mmc: meson-gx: check for scatterlist size alignment
in block mode"),
support for SDIO SD_IO_RW_EXTENDED transferts are properly filtered but some
driver
like brcmfmac still gives a block sg buffer size not aligned with SDIO block,
triggerring a warning even if the tran
Many architectures implement the trap_init() as NOP, since there is
no such default for trap_init(), this empty stub is duplicated among
these architectures. Provide a generic but weak NOP implementation
to drop the empty stubs of trap_init() in these architectures.
The alpha, microblaze and sparc
On Wed, Apr 14, 2021 at 5:44 PM Michal Hocko wrote:
>
> On Tue 13-04-21 14:51:50, Muchun Song wrote:
> > We already have a helper lruvec_memcg() to get the memcg from lruvec, we
> > do not need to do it ourselves in the lruvec_holds_page_lru_lock(). So use
> > lruvec_memcg() instead. And if mem_cg
On Wed, Apr 14, 2021 at 10:28:33AM +0200, Michal Hocko wrote:
> You are right it doesn't do it there. But all struct pages, even those
> that are allocated by the bootmem allocator should initialize its struct
> pages. They would be poisoned otherwise, right? I would have to look at
> the exact cod
On Wed, Apr 14, 2021 at 12:01:47PM +0200, Oscar Salvador wrote:
> but it seems that does not the memmap struct page.
that sould read as "but it seems that that does not affect the memmap struct
page"
--
Oscar Salvador
SUSE L3
On Mon, 29 Mar 2021, Quan Nguyen wrote:
> Adds an MFD driver for SMpro found on the Mt.Jade hardware reference
> platform with Ampere's Altra processor family.
>
> Signed-off-by: Quan Nguyen
> ---
> drivers/mfd/Kconfig | 10 ++
> drivers/mfd/simple-mfd-i2c.c | 6 ++
> 2 fi
On Wed, Apr 14, 2021 at 5:24 PM Michal Hocko wrote:
>
> On Tue 13-04-21 14:51:48, Muchun Song wrote:
> > When mm is NULL, we do not need to hold rcu lock and call css_tryget for
> > the root memcg. And we also do not need to check !mm in every loop of
> > while. So bail out early when !mm.
>
> mem
On Mon, 12 Apr 2021, Russ Weight wrote:
> Add macros and definitions required by the MAX10 BMC
> Secure Update driver.
>
> Signed-off-by: Russ Weight
> Acked-by: Lee Jones
> ---
> v9:
> - Rebased on next-20210412
> v8:
> - Previously patch 1/6 in "Intel MAX10 BMC Secure Update Driver"
> -
On Wed, Apr 14, 2021 at 11:58:04AM +0200, Borislav Petkov wrote:
> On Tue, Apr 13, 2021 at 03:51:50PM -0400, Len Brown wrote:
> > AMX does the type of matrix multiplication that AI algorithms use. In
> > the unlikely event that you or one of the libraries you call are doing
> > the same, then you w
On Tue, 30 Mar 2021 04:57:50 -0700, zhouchuangao wrote:
> It can be optimized at compile time.
Applied to arm64 (for-next/misc), it saves one line ;). Thanks!
[1/1] arm64/kernel/probes: Use BUG_ON instead of if condition followed by BUG.
https://git.kernel.org/arm64/c/839157876f97
--
Cata
On Wed, Apr 14, 2021 at 12:06:39PM +0200, Willy Tarreau wrote:
> And change jobs :-)
I think by the time that happens, we'll be ready to go to the eternal
vacation. Which means: not my problem.
:-)))
--
Regards/Gruss,
Boris.
https://people.kernel.org/tglx/notes-about-netiquette
On Tue, 13 Apr 2021 21:00:57 +0100,
Nathan Chancellor wrote:
[...]
> I just ran into this again. It is not a clang specific issue, it
> reproduces quite easily with arm64 defconfig minus CONFIG_PERF_EVENTS
> and gcc 10.3.0:
>
> arch/arm64/kvm/perf.c: In function 'kvm_perf_init':
> arch/arm64/kv
On Mon, Apr 12, 2021 at 10:30:23PM +, Bae, Chang Seok wrote:
> On Mar 26, 2021, at 03:30, Borislav Petkov wrote:
> > On Thu, Mar 25, 2021 at 09:56:53PM -0700, Andy Lutomirski wrote:
> >> We really ought to have a SIGSIGFAIL signal that's sent, double-fault
> >> style, when we fail to send a si
On Wed 14-04-21 18:04:35, Muchun Song wrote:
> On Wed, Apr 14, 2021 at 5:24 PM Michal Hocko wrote:
> >
> > On Tue 13-04-21 14:51:48, Muchun Song wrote:
> > > When mm is NULL, we do not need to hold rcu lock and call css_tryget for
> > > the root memcg. And we also do not need to check !mm in every
Hi,
On 4/13/21 9:00 PM, Nathan Chancellor wrote:
> On Fri, Mar 26, 2021 at 08:27:13PM +0800, kernel test robot wrote:
>> Hi Marc,
>>
>> FYI, the error/warning still remains.
>>
>> tree: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
>> master
>> head: db24726bfefa68c606947
On Wed, Apr 14, 2021 at 11:05:24AM +0200, Peter Zijlstra wrote:
> That made me look at the qspinlock code, and queued_spin_*lock() uses
> atomic_try_cmpxchg_acquire(), which means any arch that uses qspinlock
> and has RCpc atomics will give us massive pain.
>
> Current archs using qspinlock are:
在 2021/4/14 17:47, Miklos Szeredi 写道:
On Wed, Apr 14, 2021 at 11:22 AM Baolin Wang
wrote:
在 2021/4/14 17:02, Miklos Szeredi 写道:
On Wed, Apr 14, 2021 at 10:42 AM Baolin Wang
wrote:
Sorry I missed this patch before, and I've tested this patch, it seems
can solve the deadlock issue I met
Em Tue, Apr 13, 2021 at 02:07:57PM -0500, Rob Herring escreveu:
> On Tue, Apr 13, 2021 at 1:39 PM Arnaldo Carvalho de Melo
> wrote:
> > > --- a/tools/lib/perf/evsel.c
> > > +int perf_evsel__mmap(struct perf_evsel *evsel, int pages)
> > > +{
> > > + int ret, cpu, thread;
> > Where is the count
On 4/13/21 6:02 AM, Mark Brown wrote:
> On Mon, Apr 12, 2021 at 02:55:35PM -0500, Madhavan T. Venkataraman wrote:
>
>>
>> OK. Just so I am clear on the whole picture, let me state my understanding
>> so far.
>> Correct me if I am wrong.
>
>> 1. We are hoping that we can convert a significant
On Tue, Apr 13, 2021 at 05:57:15PM +0800, Jiapeng Chong wrote:
> Fix the following coccicheck warnings:
>
> ./net/ipv6/esp6_offload.c:321:32-34: WARNING !A || A && B is equivalent
> to !A || B.
>
> Reported-by: Abaci Robot
> Signed-off-by: Jiapeng Chong
> ---
> net/ipv6/esp6_offload.c | 2 +-
>
* Andrei Vagin:
> We already have process_vm_readv and process_vm_writev to read and write
> to a process memory faster than we can do this with ptrace. And now it
> is time for process_vm_exec that allows executing code in an address
> space of another process. We can do this with ptrace but it i
On Mon, Mar 29, 2021 at 03:50:56PM +0100, Will Deacon wrote:
> On Mon, Mar 29, 2021 at 12:15:16AM -0700, Nikitas Angelinas wrote:
> > Since __MUTEX_INITIALIZER() is used on memory that is initialized to 0
> > anyway this change should not have an effect, but it seems better to
> > initialize osq ex
On Wed, Apr 14, 2021 at 11:43:41AM +0200, Fabio Aiuto wrote:
> On Wed, Apr 14, 2021 at 10:26:01AM +0200, Greg KH wrote:
> > > - DBG_871X_SEL_NL(sel, "%10s %16s %8s %10s %11s %14s\n",
> > > - "TH_L2H_ini", "TH_EDCCA_HL_diff", "IGI_Base",
> > > - "ForceEDCCA", "AdapEn_
On Wed 14-04-21 12:01:47, Oscar Salvador wrote:
> On Wed, Apr 14, 2021 at 10:28:33AM +0200, Michal Hocko wrote:
> > You are right it doesn't do it there. But all struct pages, even those
> > that are allocated by the bootmem allocator should initialize its struct
> > pages. They would be poisoned o
Am 13.04.21 um 21:50 schrieb Mitali Borkar:
Added #include and replaced bit shifts by BIT() macro.
This BIT() macro from linux/bitops.h is used to define ZR36057_VFESPFR_*
bitmasks.
Use of macro is better and neater. It maintains consistency.
Removed comments from the same line and added them t
Fix a regression caused by making the 486SX a separate processor family,
for which the HIGHMEM64G setting has not been updated and therefore has
become exposed as a user selectable option for the M486SX configuration
setting unlike with original M486 and all the other settings that choose
non-P
[CCing Rafael]
Beforehand: many thx for your feedback and for reporting the bug you
faced, much appreciated.
On 13.04.21 23:18, w4v3 wrote:
> I would like to make some suggestions regarding the "Reporting
> issues" document
> (https://www.kernel.org/doc/html/latest/admin-guide/reporting-issue
On Wed, Apr 14, 2021 at 05:25:43PM +0800, Kai Shen wrote:
> Performance decreases happen in __arch_clear_user when this
> function is not correctly aligned on HISI-HIP08 arm64 SOC which
> fetches 32 bytes (8 instructions) from icache with a 32-bytes
> aligned end address. As a result, if the hot lo
On Wed, Apr 14, 2021 at 10:13 AM Mike Rapoport wrote:
>
> On Wed, Apr 14, 2021 at 09:42:01AM +0200, David Hildenbrand wrote:
> > On 13.04.21 19:53, Rafael J. Wysocki wrote:
> > > On Tue, Apr 13, 2021 at 7:43 PM David Hildenbrand
> > > wrote:
> > > >
> > > > On 13.04.21 16:01, Rafael J. Wysocki w
On Wed, Apr 14, 2021 at 12:32:58PM +0200, Michal Hocko wrote:
> Well, to be precise it does the very same thing with memamp struct pages
> but that is before the initialization code you have pointed out above.
> In this context it just poisons the allocated content which is the GB
> page storage.
The legacy driver of aspeed pwm is binding with tach controller and it
doesn't follow the pwm framworks usage. In addition, the pwm register
usage of the 6th generation of ast26xx has drastic change. So these
patch serials add the new aspeed pwm driver to fix up the problem above.
Changes since v1
This patch add the support of PWM controller which can be found at aspeed
ast2600 soc. The pwm supoorts up to 16 channels and it's part function
of multi-funciton device "pwm-tach controller".
Signed-off-by: Billy Tsai
---
drivers/pwm/Kconfig | 7 +
drivers/pwm/Makefile| 1 +
On 13.04.2021 15:47, Arseny Krasnov wrote:
> This add logic, that serializes write access to single socket
> by multiple threads. It is implemented be adding field with TID
> of current writer. When writer tries to send something, it checks
> that field is -1(free), else it sleep in the same way
This patch adds device bindings for aspeed pwm-tach device which is a
multi-function device include pwn and tach function and pwm device which
should be the sub-node of pwm-tach device.
Signed-off-by: Billy Tsai
Change-Id: I18d9dea14c3a04e1b7e38ffecd49d45917b9b545
---
.../bindings/mfd/aspeed,ast
On Mon, Apr 12, 2021 at 10:59:56AM +0200, Raoul Strackx wrote:
> Creation of an SGX enclave consists of three steps. First, a new enclave
> environment is created by the ECREATE leaf function. Some enclave settings
> are specified at this step by passing an SGX Enclave Control Structure
> (SECS) th
Hi,
Am 2021-04-14 08:53, schrieb Ikjoon Jang:
On Tue, Apr 13, 2021 at 8:26 PM Michael Walle wrote:
Am 2021-04-13 14:02, schrieb Ikjoon Jang:
> This patch adds block protection support to Macronix mx25u6432f and
> mx25u6435f. Two different chips share the same JEDEC ID while only
> mx25u6423f s
On Wed, Apr 14, 2021 at 11:56 AM Florent Revest wrote:
> On Wed, Apr 14, 2021 at 1:01 AM Andrii Nakryiko
> wrote:
> > On Mon, Apr 12, 2021 at 8:38 AM Florent Revest wrote:
> > > + err = 0;
> > > +out:
> > > + put_fmt_tmp_buf();
> >
> > so you are putting tmp_buf unconditionally, even
Andrii Nakryiko writes:
> On Tue, Apr 6, 2021 at 3:06 AM Toke Høiland-Jørgensen wrote:
>>
>> Andrii Nakryiko writes:
>>
>> > On Sat, Apr 3, 2021 at 10:47 AM Alexei Starovoitov
>> > wrote:
>> >>
>> >> On Sat, Apr 03, 2021 at 12:38:06AM +0530, Kumar Kartikeya Dwivedi wrote:
>> >> > On Sat, Apr 0
On 2021-04-14 12:52, Jarkko Sakkinen wrote:
> On Mon, Apr 12, 2021 at 10:59:56AM +0200, Raoul Strackx wrote:
>> Creation of an SGX enclave consists of three steps. First, a new enclave
>> environment is created by the ECREATE leaf function. Some enclave settings
>> are specified at this step by pas
On Sat, Apr 10, 2021 at 10:45 PM Ezequiel Garcia wrote:
> Add RK3568/RK3566 SoC support to pinctrl.
>
> Signed-off-by: Ezequiel Garcia
Patch applied.
Yours,
Linus Walleij
Fix the following coccicheck warning:
./drivers/net/ethernet/sfc/enum.h:80:7-28: duplicated argument to |
Signed-off-by: Wan Jiabing
---
drivers/net/ethernet/sfc/enum.h | 1 -
1 file changed, 1 deletion(-)
diff --git a/drivers/net/ethernet/sfc/enum.h b/drivers/net/ethernet/sfc/enum.h
index 333
On Mon, Apr 12, 2021 at 07:01:39PM +0200, Jethro Beekman wrote:
> On 2021-04-12 18:47, Dave Hansen wrote:
> > On 4/12/21 9:41 AM, Jethro Beekman wrote:
> >> Yes this still doesn't let one execute all possible ECREATE, EADD,
> >> EEXTEND, EINIT sequences.
> >
> > OK, so we're going in circles now.
On Mon, Apr 12, 2021 at 05:01:01PM +0100, Colin King wrote:
> From: Colin Ian King
>
> The kzalloc call can return null with the GFP_KERNEL flag so
> add a null check and exit via a new error exit label. Use the
> same exit error label for another error path too.
>
> Addresses-Coverity: ("Derefe
From: Xiongwei Song
Define macros to list ppc interrupt types in interttupt.h, replace the
reference of the trap hex values with these macros.
Referred the hex numbers in arch/powerpc/kernel/exceptions-64e.S,
arch/powerpc/kernel/exceptions-64s.S, arch/powerpc/kernel/head_*.S,
arch/powerpc/kernel
On Wed 14-04-21 12:49:53, Oscar Salvador wrote:
> On Wed, Apr 14, 2021 at 12:32:58PM +0200, Michal Hocko wrote:
[...]
> > > I checked, and when we get there in __alloc_bootmem_huge_page,
> > > page->private is
> > > still zeroed, so I guess it should be safe to assume that we do not
> > > really
On 2021/04/14 9:45, Tetsuo Handa wrote:
> On 2021/04/12 21:04, Greg Kroah-Hartman wrote:
>>> Since syzkaller is a fuzzer, syzkaller happily opens /dev/ttyprintk from
>>> multiple threads. Should we update syzkaller to use CONFIG_TTY_PRINTK=n ?
>>
>> Why? Can you not hit the same tty code paths fro
Add temp-alarm node for PMR735A pmic and also modify gpio
node to add gpio ranges and "qcom,spmi-gpio" compatible.
Signed-off-by: satya priya
---
arch/arm64/boot/dts/qcom/pmr735a.dtsi | 32 +++-
1 file changed, 31 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/
Add PON, RTC and other PMIC infra modules support for PMK8350.
Signed-off-by: satya priya
---
arch/arm64/boot/dts/qcom/pmk8350.dtsi | 55 ++-
1 file changed, 54 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/qcom/pmk8350.dtsi
b/arch/arm64/boot/dts
Add base DTS file for pm7325 along with GPIOs and temp-alarm nodes.
Signed-off-by: satya priya
---
arch/arm64/boot/dts/qcom/pm7325.dtsi | 53
1 file changed, 53 insertions(+)
create mode 100644 arch/arm64/boot/dts/qcom/pm7325.dtsi
diff --git a/arch/arm64/bo
Hi All,
Resending V3 as there was a mistake earlier, changes in patches 4 and 5
got clubbed unknowingly. Apologies for that.
Thanks,
Satya Priya
Add PM7325 DT file with gpio and temp-alarm nodes.
For PM8350C, PMR735A and PMK8350 add the required peripherals
as the base DT files are already added
Include pm7325, pm8350c, pmk8350 and pmr735a DT files. Add
channel nodes for pmk8350_vadc. Also, add the thermal_zones
node in dtsi.
Signed-off-by: satya priya
---
arch/arm64/boot/dts/qcom/sc7280-idp.dts | 30 ++
arch/arm64/boot/dts/qcom/sc7280.dtsi| 3 +++
2 fil
Add temp-alarm node for PM8350C pmic and also modify gpio
node to add gpio ranges and "qcom,spmi-gpio" compatible.
Signed-off-by: satya priya
---
arch/arm64/boot/dts/qcom/pm8350c.dtsi | 32 +++-
1 file changed, 31 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/
There exist some errors "404 Not Found" when I click the link
of "MAINTAINERS" [1], "samples/bpf/" [2] and "selftests" [3]
in the documentation "HOWTO interact with BPF subsystem" [4].
Use correct link of "MAINTAINERS" and just remove the links of
"samples/bpf/" and "selftests" because there are n
[Cc linux-api]
On Wed 17-03-21 11:39:57, Feng Tang wrote:
> This patch series introduces the concept of the MPOL_PREFERRED_MANY mempolicy.
> This mempolicy mode can be used with either the set_mempolicy(2) or mbind(2)
> interfaces. Like the MPOL_PREFERRED interface, it allows an application to
>
Commit a14d273ba159 ("net: macb: restore cmp registers on resume path")
introduces the restore of CMP registers on resume path. In case the IP
doesn't support type 2 screeners (zero on DCFG8 register) the
struct macb::rx_fs_list::list is not initialized and thus the
list_for_each_entry(item, &bp->r
Hi Peter, Dmitry,
On 4/14/21 8:46 AM, Peter Hutterer wrote:
On Tue, Apr 13, 2021 at 10:44:07PM -0700, Dmitry Torokhov wrote:
Hi Giulio,
On Tue, Apr 13, 2021 at 04:44:46PM +0200, Giulio Benetti wrote:
+
+ input_mt_report_pointer_emulation(tsdata->input, true);
For touchscreens it does
On 4/14/21 12:28 AM, Wang Qing wrote:
> Use the bark interrupt as the pretimeout notifier if available.
>
> By default, the pretimeout notification shall occur one second earlier
> than the timeout.
>
> V2:
> - panic() by default if WATCHDOG_PRETIMEOUT_GOV is not enabled
>
> Signed-off-by: Wang
On 4/14/21 7:44 AM, Dmitry Torokhov wrote:
Hi Giulio,
On Tue, Apr 13, 2021 at 04:44:46PM +0200, Giulio Benetti wrote:
+
+ input_mt_report_pointer_emulation(tsdata->input, true);
For touchscreens it does not make much sense to report BTN_DOUBLETAP,
BTN_TRIPLETAP, etc, events (they are re
Hi,
This is an attempt to revive this series originally posted by
Julien Grall[1]. The main motive to work on this now is because
of the requirement to have Pinned KVM VMIDs and the RFC discussion
for the same basically suggested[2] to have a common/better vmid
allocator for KVM which this series
From: Julien Grall
In an attempt to make the ASID allocator generic, create a new structure
asid_info to store all the information necessary for the allocator.
For now, move the variables asid_generation, asid_map, cur_idx to the
new structure asid_info. Follow-up patches will move more variable
From: Julien Grall
The variable bits hold information for a given ASID allocator. So move
it to the asid_info structure.
Because most of the macros were relying on bits, they are now taking an
extra parameter that is a pointer to the asid_info structure.
Signed-off-by: Julien Grall
Signed-off-
From: Julien Grall
The variables lock and tlb_flush_pending holds information for a given
ASID allocator. So move them to the asid_info structure.
Signed-off-by: Julien Grall
Signed-off-by: Shameer Kolothum
---
arch/arm64/mm/context.c | 23 ---
1 file changed, 12 insertion
From: Julien Grall
The variables active_asids and reserved_asids hold information for a
given ASID allocator. So move them to the structure asid_info.
At the same time, introduce wrappers to access the active and reserved
ASIDs to make the code clearer.
Signed-off-by: Julien Grall
Signed-off-
From: Julien Grall
The function new_context will be part of a generic ASID allocator. At
the moment, the MM structure is currently used to fetch the ASID and
pinned refcount.
To remove the dependency on MM, it is possible to just pass a pointer to
the current ASID and pinned refcount. Also pleas
The Pinned ASID variables hold information for a given ASID
allocator. So move them to the structure asid_info.
Signed-off-by: Shameer Kolothum
---
arch/arm64/mm/context.c | 38 +++---
1 file changed, 19 insertions(+), 19 deletions(-)
diff --git a/arch/arm64/mm/c
From: Julien Grall
At the moment ASID_FIRST_VERSION is used to know the number of ASIDs
supported. As we are going to move the ASID allocator to a separate file,
it would be better to use a different name for external users.
Signed-off-by: Julien Grall
Signed-off-by: Shameer Kolothum
---
v3-->
From: Julien Grall
The function check_and_switch_context is used to:
1) Check whether the ASID is still valid
2) Generate a new one if it is not valid
3) Switch the context
While the latter is specific to the MM subsystem, the rest could be part
of the generic ASID allocator.
After
From: Julien Grall
Move out the common initialization of the ASID allocator in a separate
function.
Signed-off-by: Julien Grall
Signed-off-by: Shameer Kolothum
---
v3-->v4
-dropped asid_per_ctxt and added pinned asid map init.
---
arch/arm64/mm/context.c | 44 +++
From: Julien Grall
Flushing the local context will vary depending on the actual user
of the ASID allocator. Introduce a new callback to flush the local
context and move the call to flush local TLB in it.
Signed-off-by: Julien Grall
Signed-off-by: Shameer Kolothum
---
arch/arm64/mm/context.c |
Keep only the mm specific part in arm64_mm_context_get/put
and move the rest to generic functions.
Signed-off-by: Shameer Kolothum
---
arch/arm64/mm/context.c | 53 +++--
1 file changed, 35 insertions(+), 18 deletions(-)
diff --git a/arch/arm64/mm/context.c b
On Wed, Apr 14, 2021 at 12:27 PM Florian Weimer wrote:
>
> * Andrei Vagin:
>
> > We already have process_vm_readv and process_vm_writev to read and write
> > to a process memory faster than we can do this with ptrace. And now it
> > is time for process_vm_exec that allows executing code in an addr
From: Julien Grall
We will want to re-use the ASID allocator in a separate context (e.g
allocating VMID). So move the code in a new file.
The function asid_check_context has been moved in the header as a static
inline function because we want to avoid add a branch when checking if the
ASID is st
Setting the reserved asid bits will vary depending on the actual
user of the ASID allocator. Introduce a new callback.
Signed-off-by: Shameer Kolothum
---
arch/arm64/mm/context.c | 6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/mm/context.c b/arch/arm64/mm/cont
From: Julien Grall
At the moment, the VMID algorithm will send an SGI to all the CPUs to
force an exit and then broadcast a full TLB flush and I-Cache
invalidation.
This patch re-use the new ASID allocator. The
benefits are:
- CPUs are not forced to exit at roll-over. Instead the VMID will b
From: Julien Grall
Some users of the ASID allocator (e.g VMID) may need to free any
resources if the initialization fail. So introduce a function that
allows freeing of any memory allocated by the ASID allocator.
Signed-off-by: Julien Grall
Signed-off-by: Shameer Kolothum
---
arch/arm64/inclu
From: Julien Grall
At the moment, the function kvm_get_vmid_bits() is looking up for the
sanitized value of ID_AA64MMFR1_EL1 and extract the information
regarding the number of VMID bits supported.
This is fine as the function is mainly used during VMID roll-over. New
use in a follow-up patch wi
On Wed, Apr 14, 2021 at 02:22:09PM +0800, Lu Baolu wrote:
> I still worry about supervisor pasid allocation.
>
> If we use iommu_sva_alloc_pasid() to allocate a supervisor pasid, which
> mm should the pasid be set? I've ever thought about passing &init_mm to
> iommu_sva_alloc_pasid(). But if you
From: Bernard Zhao
Add new zh translations
* zh_CN/dev-tools/gcov.rst
* zh_CN/dev-tools/index.rst
and link them to zh_CN/index.rst
Signed-off-by: Bernard Zhao
Reviewed-by: Wu Xiangcheng
Signed-off-by: Wu XiangCheng
---
base: linux-next
commit 269dd42f4776 ("docs/zh_CN: add riscv to zh_CN inde
Dietmar Eggemann 于2021年4月14日周三 下午5:43写道：
>
> On 13/04/2021 15:26, Ruifeng Zhang wrote:
> > Thanks for your review. Patch-v2 that solve the capacity issue will be
> > uploaded as soon as possible. : )
> >
> > Valentin Schneider 于2021年4月13日周二 下午7:40写道：
> >>
> >> On 13/04/21 14:13, Ruifeng Zhang wro
Hi,
On Wed, 14 Apr 2021, xiaojun.zhao...@gmail.com wrote:
> I found the qemu-nbd process(started with qemu-nbd -t -c /dev/nbd0
> nbd.qcow2) will automatically exit when I patched for functions of
> the nbd with livepatch.
>
> The nbd relative source:
> static int nbd_start_device_ioctl(struct nb
This series adds support for showing observed value changes in reports.
Several clean up and refactors of KCSAN reporting code are done as a
pre-requisite. An example of the new KCSAN reports:
==
BUG: KCSAN: data-race
From: Mark Rutland
So that we can add more callers of print_report(), lets fold the panic()
call into print_report() so the caller doesn't have to handle this
explicitly.
There should be no functional change as a result of this patch.
Signed-off-by: Mark Rutland
Signed-off-by: Marco Elver
---
From: Mark Rutland
Currently kcsan_report() is used to handle three distinct cases:
* The caller hit a watchpoint when attempting an access. Some
information regarding the caller and access are recorded, but no
output is produced.
* A caller which previously setup a watchpoint detected that
From: Mark Rutland
When a thread detects that a memory location was modified without its
watchpoint being hit, the report notes that a change was detected, but
does not provide concrete values for the change. Knowing the concrete
values can be very helpful in tracking down any racy writers (e.g.
Update the example reports based on the latest reports generated by
kcsan_test module, which now include the "value changed" line. Add a
brief description of the "value changed" line.
Signed-off-by: Marco Elver
---
Documentation/dev-tools/kcsan.rst | 88 ---
1 file ch
From: Mark Rutland
In kcsan_setup_watchpoint() we store snapshots of a watched value into a
union of u8/u16/u32/u64 sized fields, modify this in place using a
consistent field, then later check for any changes via the u64 field.
We can achieve the safe effect more simply by always treating the f
From: Mark Rutland
The `watchpoint_idx` argument to kcsan_report() isn't meaningful for
races which were not detected by a watchpoint, and it would be clearer
if callers passed the other_info directly so that a NULL value can be
passed in this case.
Given that callers manipulate their watchpoint
From: Mark Rutland
Now that the reporting code has been refactored, it's clear by
construction that print_report() can only be passed
KCSAN_REPORT_RACE_SIGNAL or KCSAN_REPORT_RACE_UNKNOWN_ORIGIN, and these
can also be distinguished by the presence of `other_info`.
Let's simplify things and remov
From: Mark Rutland
Now that we have separate kcsan_report_*() functions, we can factor the
distinct logic for each of the report cases out of kcsan_report(). While
this means each case has to handle mutual exclusion independently, this
minimizes the conditionality of code and makes it easier to r
From: Mark Rutland
In subsequent patches we'll want to split kcsan_report() into distinct
handlers for each report type. The largest bit of common work is
initializing the `access_info`, so let's factor this out into a helper,
and have the kcsan_report_*() functions pass the `aaccess_info` as a
p
* Borislav Petkov:
> On Mon, Apr 12, 2021 at 10:30:23PM +, Bae, Chang Seok wrote:
>> On Mar 26, 2021, at 03:30, Borislav Petkov wrote:
>> > On Thu, Mar 25, 2021 at 09:56:53PM -0700, Andy Lutomirski wrote:
>> >> We really ought to have a SIGSIGFAIL signal that's sent, double-fault
>> >> style,
Fix the following coccicheck warning:
./drivers/net/ethernet/cavium/liquidio/cn66xx_regs.h:413:6-28:
duplicated argument to & or |
The CN6XXX_INTR_M1UPB0_ERR here is duplicate.
Here should be CN6XXX_INTR_M1UNB0_ERR.
Signed-off-by: Wan Jiabing
---
drivers/net/ethernet/cavium/liquidio/cn66xx_reg
On Wed, Apr 14, 2021 at 11:17:55AM +0200, Greg Kroah-Hartman wrote:
> On Wed, Apr 14, 2021 at 12:13:35PM +0300, Heikki Krogerus wrote:
> > +Greg
> >
> > Sorry about that. Should I resend this?
>
> No worries, I can pick it up, thanks
>
> `b4` really is nice to use :)
Yes, it's a really nice too
This exports serial number of FRAM in sysfs file named "sernum".
Formatted in hex, each byte separated by space.
Example:
$ cat /sys/class/spi_master/spi0/spi0.0/sernum
a4 36 44 f2 ae 6c 00 00
Signed-off-by: Jiri Prchal
---
drivers/misc/eeprom/at25.c | 28 +++-
1 file cha
Fix the following coccicheck warning:
./drivers/crypto/ux500/cryp/cryp_p.h:84:6-27:duplicated argument to |
Signed-off-by: Wan Jiabing
---
drivers/crypto/ux500/cryp/cryp_p.h | 1 -
1 file changed, 1 deletion(-)
diff --git a/drivers/crypto/ux500/cryp/cryp_p.h
b/drivers/crypto/ux500/cryp/cryp_p
On Tue, Apr 13, 2021 at 11:51 AM Marc Zyngier wrote:
>
> On Tue, 13 Apr 2021 16:03:51 +0100,
> Peter Geis wrote:
> >
> > On Tue, Apr 13, 2021 at 10:01 AM Marc Zyngier wrote:
>
> [...]
>
> > > What happens if you hack all the allocations to happen in the low 4GB
> > > of the PA space?
> >
> > It
On 4/14/21 2:46 PM, Jiapeng Chong wrote:
> Fix the following clang warning:
>
> fs/ocfs2/dlm/dlmrecovery.c:129:20: warning: unused function
> 'dlm_reset_recovery' [-Wunused-function].
>
> Reported-by: Abaci Robot
> Signed-off-by: Jiapeng Chong
Seems after commit ded2cf71419b ("ocfs2: dlm: f
On Mon, Mar 29, 2021 at 2:45 PM Shixin Liu wrote:
>
> spinlock can be initialized automatically with DEFINE_SPINLOCK()
> rather than explicitly calling spin_lock_init().
Acked-by: Sumit Saxena
>
> Signed-off-by: Shixin Liu
> ---
> drivers/scsi/megaraid/megaraid_sas_base.c | 4 +---
> 1 file cha
Use the bark interrupt as the pretimeout notifier if available.
By default, the pretimeout notification shall occur one second earlier
than the timeout.
V2:
- panic() by default if WATCHDOG_PRETIMEOUT_GOV is not enabled.
V3:
- Modify the pretimeout behavior, manually reset after the pretimeout
-
201 - 300 of 1336 matches
Mail list logo
