On Fri, Mar 26, 2021 at 09:14:32AM +0800, Kai Ye wrote:
> The memory not needed to clear that will be freed. and the memset is useless
> after the dma is freed.
I don't doubt that this memory probably doesn't need to be zeroed
since all it contains is a bunch of pointers instead of actual data.
B
On Fri, 2021-04-02 at 00:48 +0200, Ulf Hansson wrote:
> On Thu, 1 Apr 2021 at 15:29, Bean Huo wrote:
>
> > From: Bean Huo
> > As the density increases, the 4-minute timeout value for
> > sanitize is no longer feasible. At the same time, devices
> > of different densities have different timeout v
RDPM (Rail digital power meter) hardware for a shared rail will
monitor for peak current management. It allocates one simple digital
power monitor(SDPM) for each major consumer of that rail. Each SDPM
estimates the power consumption of the consumer based on operating
frequency for that consumer. Th
Add yaml documentation for SDPM clock monitor driver which will
register for clock rate change notification and writes the clock rate
into SDPM CSR register.
Signed-off-by: Ram Chandrasekar
Signed-off-by: Manaf Meethalavalappu Pallikunhi
---
.../devicetree/bindings/soc/qcom/qcom-sdpm.yaml|
Add SDPM clock monitor driver, which will register for clock rate
change notification and write the clock rate into SDPM CSR register.
Signed-off-by: Ram Chandrasekar
Signed-off-by: Manaf Meethalavalappu Pallikunhi
---
drivers/soc/qcom/Kconfig| 8 ++
drivers/soc/qcom/Makefile
This patch fixes a spelling typo in kernel-chktaint
Signed-off-by: Masanari Iida
---
tools/debugging/kernel-chktaint | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/tools/debugging/kernel-chktaint b/tools/debugging/kernel-chktaint
index 607b2b280945..719f18b1edf0 100755
--- a
On Fri, Mar 26, 2021 at 09:20:45AM +0800, Kai Ye wrote:
> use memzero_explicit instead of memset to clear sensitive data,
> such as buffer or key.
Does this fix a real issue? If not then it's just unnecessary
churn.
Thanks,
--
Email: Herbert Xu
Home Page: http://gondor.apana.org.au/~herbert/
In get_initial_state, it calls notify_initial_state_done(skb,..) if
cb->args[5]==1. I see that if genlmsg_put() failed in
notify_initial_state_done(), the skb will be freed by nlmsg_free(skb).
Then get_initial_state will goto out and the freed skb will be used by
return value skb->len.
My patch co
On Fri, Mar 26, 2021 at 02:13:32PM +0800, Meng Yu wrote:
> We should ensure key is not empty before we set key.
>
> Signed-off-by: Meng Yu
> ---
> drivers/crypto/hisilicon/hpre/hpre_crypto.c | 6 ++
> 1 file changed, 6 insertions(+)
>
> diff --git a/drivers/crypto/hisilicon/hpre/hpre_crypto
On Thu, Apr 01, 2021 at 01:04:58PM -0700, Josh Don wrote:
> > +/*
> > + * sched_core_update_cookie - Common helper to update a task's core
> > cookie. This
> > + * updates the selected cookie field.
> > + * @p: The task whose cookie should be updated.
> > + * @cookie: The new cookie.
> > + * @cook
On 02/04/21 01:05, Sean Christopherson wrote:
+struct kvm_queued_exception {
+ bool valid;
+ u8 nr;
If we're refactoring all this code anyways, maybe change "nr" to something a
bit more descriptive? E.g. vector.
"nr" is part of the userspace structure, so consistency is an advan
On Sat, Mar 27, 2021 at 04:32:26PM +0800, Hui Tang wrote:
> 'hpre_cfg_by_dsm' has checked and printed error path, so it is not
> necessary at all.
>
> Signed-off-by: Hui Tang
> ---
> drivers/crypto/hisilicon/hpre/hpre_main.c | 5 +
> 1 file changed, 1 insertion(+), 4 deletions(-)
>
> diff -
> From: Jason Gunthorpe
> Sent: Friday, April 2, 2021 12:04 AM
>
> On Thu, Apr 01, 2021 at 02:08:17PM +, Liu, Yi L wrote:
>
> > DMA page faults are delivered to root-complex via page request message
> and
> > it is per-device according to PCIe spec. Page request handling flow is:
> >
> > 1)
On 01/04/2021 at 16:42, Claudiu Beznea - M18063 wrote:
+unmap:
+ iounmap(reset->rstc_base);
+ for (idx = 0; idx < ARRAY_SIZE(reset->ramc_base); idx++)
+ iounmap(reset->ramc_base[idx]);
But if we keep this loop, I have the feeling that some kind of
"of_node_put()" is needed as well.
spinlock can be initialized automatically with DEFINE_SPINLOCK()
rather than explicitly calling spin_lock_init().
Reported-by: Hulk Robot
Signed-off-by: Zucheng Zheng
---
drivers/block/aoe/aoenet.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/drivers/block/aoe/aoenet.c
(Missed cc'ing Cc Peter in the original posting)
On Fri, Apr 02, 2021 at 11:07:54AM +0530, Gautham R. Shenoy wrote:
> From: "Gautham R. Shenoy"
>
> On POWER10 systems, the L2 cache is at the SMT4 small core level. The
> following commits ensure that L2 cache gets correctly discovered and
> the L
Fix the error:
drivers/staging/media/tegra-video/vi.c:1180:4:
error: implicit declaration of function 'host1x_syncpt_free'
[-Werror,-Wimplicit-function-declaration]
Fixes: 3028a00c55bf ('gpu: host1x: Cleanup and refcounting for syncpoints')
Reported-by: Hulk Robot
Signed-off-by: Bixuan Cui
---
Hi Hao Fang,
On 2021/3/30 14:51, Hao Fang wrote:
> s/Hisilicon/HiSilicon/
> It should use capital S, according to
> https://www.hisilicon.com/en/terms-of-use.
>
> Signed-off-by: Hao Fang
Thanks!
Applied to the hisilicon arm32 SoC tree.
Best Regards,
Wei
> ---
> arch/arm/mach-hisi/hisilicon.c
> > + /* 2.5G mode only support 2500baseT full duplex only */
> > + if (priv->plat->has_gmac4 && priv->plat->speed_2500_en) {
> > + phylink_set(mac_supported, 2500baseT_Full);
> > + phylink_set(mask, 10baseT_Half);
> > + phylink_set(mask, 10baseT_Full);
> > +
> + if (!pmd)
> + return dax_load_hole(xas, mapping, &entry, vmf);
> + else
> + return dax_pmd_load_hole(xas, vmf, iomap, &entry);
> + if (pmd)
> + return vmf_insert_pfn_pmd(vmf, pfn, write);
> + if (write)
> +
>> @@ -1473,6 +1473,9 @@ static int mmc_blk_cqe_issue_flush(struct mmc_queue
>> *mq, struct request *req)
>> struct mmc_queue_req *mqrq = req_to_mmc_queue_req(req);
>> struct mmc_request *mrq = mmc_blk_cqe_prep_dcmd(mqrq, req);
>>
>> +if (mmc_card_mmc(mq->card) && !mmc_flush_allowe
intel_dsm_platform_mux_info() tries to parse the ACPI package data
from _DSM for the debug information, but it assumes the fixed format
without checking what values are stored in the elements actually.
When an unexpected value is returned from BIOS, it may lead to GPF or
NULL dereference, as report
Shiyang, Dan:
given that the whole reflink+dax thing is going to take a while and thus
not going to happen for this merge window, what about queueing up the
cleanup patches 1,2 and 3 so that we can reduce the patch load a little?
On 02/04/21 01:37, Ben Gardon wrote:
+void kvm_tdp_mmu_put_root(struct kvm *kvm, struct kvm_mmu_page *root,
+ bool shared)
{
gfn_t max_gfn = 1ULL << (shadow_phys_bits - PAGE_SHIFT);
- lockdep_assert_held_write(&kvm->mmu_lock);
+ kvm_lockdep_assert_mmu_l
On Thu, Apr 01, 2021 at 11:59:25PM +, Luis Chamberlain wrote:
> As for the syfs deadlock possible with drivers, this fixes it in a generic
> way:
>
> commit fac43d8025727a74f80a183cc5eb74ed902a5d14
> Author: Luis Chamberlain
> Date: Sat Mar 27 14:58:15 2021 +
>
> sysfs: add option
> From: Jason Gunthorpe
> Sent: Thursday, April 1, 2021 9:47 PM
>
> On Thu, Apr 01, 2021 at 01:43:36PM +, Liu, Yi L wrote:
> > > From: Jason Gunthorpe
> > > Sent: Thursday, April 1, 2021 9:16 PM
> > >
> > > On Thu, Apr 01, 2021 at 01:10:48PM +, Liu, Yi L wrote:
> > > > > From: Jason Gunt
>> @@ -571,6 +571,14 @@ static int __mmc_blk_ioctl_cmd(struct mmc_card *card,
>> struct mmc_blk_data *md,
>> main_md->part_curr = value & EXT_CSD_PART_CONFIG_ACC_MASK;
>> }
>>
>> +/* Make sure to update CACHE_CTRL in case it was changed */
> It might be worth noting that t
On Fri, Apr 02, 2021 at 12:08:49AM +0200, Daniel Lezcano wrote:
>
> Hi Greg,
>
> On 01/04/2021 21:28, Greg KH wrote:
> > On Thu, Apr 01, 2021 at 08:36:49PM +0200, Daniel Lezcano wrote:
> >> A SoC can be differently structured depending on the platform and the
> >> kernel can not be aware of all t
The following commit has been merged into the perf/core branch of tip:
Commit-ID: cface0326a6c2ae5c8f47bd466f07624b3e348a7
Gitweb:
https://git.kernel.org/tip/cface0326a6c2ae5c8f47bd466f07624b3e348a7
Author:Alexander Antonov
AuthorDate:Tue, 23 Mar 2021 18:05:07 +03:00
Commi
The following commit has been merged into the perf/core branch of tip:
Commit-ID: c4c55e362a521d763356b9e02bc9a4348c71a471
Gitweb:
https://git.kernel.org/tip/c4c55e362a521d763356b9e02bc9a4348c71a471
Author:Kan Liang
AuthorDate:Wed, 17 Mar 2021 10:59:37 -07:00
Committer:
The following commit has been merged into the perf/core branch of tip:
Commit-ID: 6477dc3934775f82a571fac469fd8c348e611095
Gitweb:
https://git.kernel.org/tip/6477dc3934775f82a571fac469fd8c348e611095
Author:Kan Liang
AuthorDate:Wed, 17 Mar 2021 10:59:35 -07:00
Committer:
The following commit has been merged into the perf/core branch of tip:
Commit-ID: edae1f06c2cda41edffc93de6aedc8ba8dc883c3
Gitweb:
https://git.kernel.org/tip/edae1f06c2cda41edffc93de6aedc8ba8dc883c3
Author:Kan Liang
AuthorDate:Wed, 17 Mar 2021 10:59:33 -07:00
Committer:
The following commit has been merged into the perf/core branch of tip:
Commit-ID: 42839ef4a20a4bda415974ff0e7d85ff540fffa4
Gitweb:
https://git.kernel.org/tip/42839ef4a20a4bda415974ff0e7d85ff540fffa4
Author:Kan Liang
AuthorDate:Wed, 17 Mar 2021 10:59:36 -07:00
Committer:
The following commit has been merged into the perf/core branch of tip:
Commit-ID: d6c754130435ab786711bed75d04a2388a6b4da8
Gitweb:
https://git.kernel.org/tip/d6c754130435ab786711bed75d04a2388a6b4da8
Author:Kan Liang
AuthorDate:Wed, 17 Mar 2021 10:59:34 -07:00
Committer:
On 4/1/21 11:16 AM, Puranjay Mohan wrote:
TMP117 is a Digital temperature sensor with integrated NV memory.
Add support for tmp117 driver in iio subsystem.
Datasheet:-https://www.ti.com/lit/gpn/tmp117
Signed-off-by: Puranjay Mohan
Nice and clean driver. Just some comments about the CALIBBIAS
On Thu, Apr 01, 2021 at 11:51:15PM +0200, Fabio Aiuto wrote:
> On Thu, Apr 01, 2021 at 05:32:36PM +0300, Dan Carpenter wrote:
> > On Thu, Apr 01, 2021 at 03:55:37PM +0200, Fabio Aiuto wrote:
> > >
> > > Hi Dan,
> > >
> > > I have the following:
> > >
> > > if (rtw_createbss_cmd(adapter) != _SU
On 4/1/21 11:36 AM, Andy Shevchenko wrote:
[...]
+ case IIO_CHAN_INFO_SCALE:
+ /* Conversion from 10s of uC to mC
+* as IIO reports temperature in mC
+*/
+ *val = TMP117_RESOLUTION_10UC / 1;
+ *val2 = (TMP117_RES
Yang,
Thank you for the patch.
Yang Yingliang wrote on Thu [2021-Apr-01 18:28:50
+0800]:
> There is an error message within devm_ioremap_resource
> already, so remove the dev_err call to avoid redundant
> error message.
>
> Reported-by: Hulk Robot
> Signed-off-by: Yang Yingliang
> ---
> dri
Yang,
Thank you for the patch.
Yang Yingliang wrote on Thu [2021-Apr-01 18:30:15
+0800]:
> There is an error message within devm_ioremap_resource
> already, so remove the dev_err call to avoid redundant
> error message.
>
> Reported-by: Hulk Robot
> Signed-off-by: Yang Yingliang
> ---
> dri
> -Original Message-
> From: Christoph Hellwig
> Sent: Friday, April 2, 2021 3:50 PM
> Subject: Re: [PATCH v3 00/10] fsdax,xfs: Add reflink&dedupe support for fsdax
>
> Shiyang, Dan:
>
> given that the whole reflink+dax thing is going to take a while and thus not
> going
> to happen f
mx25l51245g and mx66l51235l have the same flash ID. The flash
detection returns the first entry in the flash_info array that
matches the flash ID that was read, thus for the 0xc2201a ID,
mx25l51245g was always hit, introducing a regression for
mx66l51235l. Revert mx25l51245g addition. A solution fo
This reverts commit 04b8edad262eec0d153005973dfbdd83423c0dcb.
mx25l51245g and mx66l51235l have the same flash ID. The flash
detection returns the first entry in the flash_info array that
matches the flash ID that was read, thus for the 0xc2201a ID,
mx25l51245g was always hit, introducing a regress
According to macronix website, there is no mx66l51235l part number.
The chip detected as such is actually mx66l51235f. Rename the flash.
Do not update the mx66l51235l name from the spi_nor_dev_ids[], since
there are dt that are using this compatible.
Signed-off-by: Tudor Ambarus
---
drivers/mtd/
From: zuoqilin
Use DEFINE_SHOW_ATTRIBUTE macro to simplify the code.
Signed-off-by: zuoqilin
---
arch/arm/mm/ptdump_debugfs.c | 12 +---
1 file changed, 1 insertion(+), 11 deletions(-)
diff --git a/arch/arm/mm/ptdump_debugfs.c b/arch/arm/mm/ptdump_debugfs.c
index 598b636..6a62bce 1006
On Fri, 02 Apr 2021 09:47:49 +0200,
Takashi Iwai wrote:
>
> intel_dsm_platform_mux_info() tries to parse the ACPI package data
> from _DSM for the debug information, but it assumes the fixed format
> without checking what values are stored in the elements actually.
> When an unexpected value is re
> From: Jason Gunthorpe
> Sent: Tuesday, March 30, 2021 9:29 PM
>
> >
> > First, userspace may use ioasid in a non-SVA scenario where ioasid is
> > bound to specific security context (e.g. a control vq in vDPA) instead of
> > tying to mm. In this case there is no pgtable binding initiated from us
intel_dsm_platform_mux_info() tries to parse the ACPI package data
from _DSM for the debug information, but it assumes the fixed format
without checking what values are stored in the elements actually.
When an unexpected value is returned from BIOS, it may lead to GPF or
NULL dereference, as report
On 2021/4/2 15:19, Herbert Xu wrote:
On Sat, Mar 27, 2021 at 04:32:26PM +0800, Hui Tang wrote:
'hpre_cfg_by_dsm' has checked and printed error path, so it is not
necessary at all.
Signed-off-by: Hui Tang
---
drivers/crypto/hisilicon/hpre/hpre_main.c | 5 +
1 file changed, 1 insertion(+
With NUMA balancing, in hint page fault handler, the faulting page
will be migrated to the accessing node if necessary. During the
migration, TLB will be shot down on all CPUs that the process has run
on recently. Because in the hint page fault handler, the PTE will be
made accessible before the
Add a blank line after declarations, reported by checkpatch.pl.
Signed-off-by: Xiaofei Tan
---
drivers/tty/pty.c | 4
1 file changed, 4 insertions(+)
diff --git a/drivers/tty/pty.c b/drivers/tty/pty.c
index 5e23745..106265a 100644
--- a/drivers/tty/pty.c
+++ b/drivers/tty/pty.c
@@ -159,6 +
Dear Linux folks,
On an two socket AMD EPYC 7601, we noticed a decrease in raid6 avx2x4
speed shown at the beginning of the boot.
5.4.955.10.24
--
raid6: avx2x4 gen() 18429 MB/s 6155 MB/s
raid6: avx2x4 xor()6
On Fri, Apr 02, 2021 at 01:03:57AM +0200, Giulio Benetti wrote:
> This adds device tree bindings for the Hycon HY46XX touchscreen series.
>
> Signed-off-by: Giulio Benetti
> ---
> V1->V2:
> As suggested by Rob Herring:
> * fixed $id: address
> * added "hycon," in front of every custom property
>
On 2021-04-01 20:40, Dave Hansen wrote:
> On 4/1/21 10:49 AM, Raoul Strackx wrote:
>> On 4/1/21 6:11 PM, Dave Hansen wrote:
>>> On 4/1/21 7:56 AM, Raoul Strackx wrote:
SOLUTION OF THIS PATCH
This patch adds a new ioctl to enable userspace to execute EEXTEND leaf
functions per 256 by
On Fri, Apr 2, 2021 at 6:37 AM Palmer Dabbelt wrote:
>
> On Tue, 30 Mar 2021 13:31:45 PDT (-0700), ma...@orcam.me.uk wrote:
> > On Mon, 29 Mar 2021, Palmer Dabbelt wrote:
> >
> >> > --- /dev/null
> >> > +++ b/arch/riscv/include/uapi/asm/setup.h
> >> > @@ -0,0 +1,8 @@
> >> > +/* SPDX-License-Identi
On Thu, 1 Apr 2021 21:46:22 +0530
Manivannan Sadhasivam wrote:
> On Thu, Apr 01, 2021 at 05:54:21PM +0200, Boris Brezillon wrote:
> > On Thu, 1 Apr 2021 20:49:54 +0530
> > Manivannan Sadhasivam wrote:
> >
> > > @@ -565,6 +608,11 @@ static int nand_block_isreserved(struct mtd_info
> > > *mtd
On 2/3/2021 12:05 AM, Paolo Bonzini wrote:
On 02/02/21 16:02, Xiaoyao Li wrote:
On 2/2/2021 10:49 PM, Paolo Bonzini wrote:
On 02/02/21 10:04, Chenyi Qiang wrote:
#define DR6_FIXED_1 0xfffe0ff0
-#define DR6_INIT 0x0ff0
+/*
+ * DR6_ACTIVE_LOW is actual the result of DR6_FIXED_1 |
AC
Fix coccicheck warning:
drivers/gpu/drm/amd/amdgpu/mmhub_v2_3.c:573:39-44: WARNING: conversion to bool
not needed here
drivers/gpu/drm/amd/amdgpu/mmhub_v2_3.c:575:39-44: WARNING: conversion to bool
not needed here
Signed-off-by: Bernard Zhao
---
drivers/gpu/drm/amd/amdgpu/mmhub_v2_3.c | 4 ++--
Fix coccicheck warning:
drivers/gpu/drm/gud/gud_internal.h:89:2-3: Unneeded semicolon
drivers/gpu/drm/gud/gud_internal.h:107:2-3: Unneeded semicolon
Signed-off-by: Bernard Zhao
---
drivers/gpu/drm/gud/gud_internal.h | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/
On Thu, Mar 11, 2021 at 7:23 AM Daniel Latypov wrote:
>
> From: Uriel Guajardo
>
> Add a kunit_fail_current_test() function to fail the currently running
> test, if any, with an error message.
>
> This is largely intended for dynamic analysis tools like UBSAN and for
> fakes.
> E.g. say I had a f
Fix coccicheck warning:
drivers/gpu/drm/kmb/kmb_dsi.c:284:3-4: Unneeded semicolon
drivers/gpu/drm/kmb/kmb_dsi.c:304:3-4: Unneeded semicolon
drivers/gpu/drm/kmb/kmb_dsi.c:321:3-4: Unneeded semicolon
drivers/gpu/drm/kmb/kmb_dsi.c:340:3-4: Unneeded semicolon
drivers/gpu/drm/kmb/kmb_dsi.c:364:2-3: Unne
Fix coccicheck warning:
drivers/gpu/drm/nouveau/nvkm/engine/fifo/base.c:115:3-9: preceding lock on line
109
drivers/gpu/drm/nouveau/nvkm/engine/fifo/base.c:98:2-8: preceding lock on line
95
As we see, function nvkm_fifo_chan_inst & nvkm_fifo_chan_chid both
use spin_lock_irqsave, but no spin_unlo
On Thu, Apr 01, 2021 at 11:55:50AM +0200, Geert Uytterhoeven wrote:
> On Thu, Apr 1, 2021 at 12:09 AM Phillip Potter wrote:
> > Use kzalloc() rather than kmalloc() for the dynamically allocated parts
> > of the colormap in fb_alloc_cmap_gfp, to prevent a leak of random kernel
> > data to userspace
On Fri, Apr 2, 2021 at 11:43 AM Dmitry Vyukov wrote:
>
> On Fri, Apr 2, 2021 at 6:37 AM Palmer Dabbelt wrote:
> >
> > On Tue, 30 Mar 2021 13:31:45 PDT (-0700), ma...@orcam.me.uk wrote:
> > > On Mon, 29 Mar 2021, Palmer Dabbelt wrote:
> > >
> > >> > --- /dev/null
> > >> > +++ b/arch/riscv/include/
Hi,
a few remarks below.
On Fri, Apr 02, 2021 at 01:03:58AM +0200, Giulio Benetti wrote:
> This patch adds support for Hycon HY46XX.
>
> Signed-off-by: Giulio Benetti
> ---
> V1->V2:
> * removed proximity-sensor-switch property according to previous patch
> As suggested by Dmitry Torokhov
> * m
Hi Xin,
On Fri, Apr 02, 2021 at 10:27:08AM +0800, Xin Ji wrote:
> On Mon, Mar 29, 2021 at 02:02:08PM -0400, Sean Paul wrote:
> > On Mon, Mar 29, 2021 at 6:27 AM Xin Ji wrote:
> > >
> > > On Thu, Mar 25, 2021 at 02:19:23PM -0400, Sean Paul wrote:
> > > > On Fri, Mar 19, 2021 at 2:35 AM Xin Ji wro
On 02/04/21 10:53, Xiaoyao Li wrote:
Hi Paolo,
Fenghua's bare metal support is in tip tree now.
https://lore.kernel.org/lkml/20210322135325.682257-1-fenghua...@intel.com/
Will the rest KVM patches get into 5.13 together?
Yes, they will.
Thanks for the notice!
Paolo
Hi Mauro,
Thank you for the patch.
On Thu, Apr 01, 2021 at 02:17:44PM +0200, Mauro Carvalho Chehab wrote:
> The file name: Documentation/devicetree/bindings/media/i2c/rdacm2x-gmsl.yaml
> should be, instead:
> Documentation/devicetree/bindings/media/i2c/imi,rdacm2x-gmsl.yaml.
While at it, should
On Fri, Apr 02, 2021 at 12:01:35PM +0300, Laurent Pinchart wrote:
> Hi Mauro,
>
> Thank you for the patch.
>
> On Thu, Apr 01, 2021 at 02:17:44PM +0200, Mauro Carvalho Chehab wrote:
> > The file name: Documentation/devicetree/bindings/media/i2c/rdacm2x-gmsl.yaml
> > should be, instead:
> > Docum
On Sun, Mar 21, 2021 at 10:13:47PM -0700, Eric Biggers wrote:
> From: Eric Biggers
>
> On big endian CPUs, the ChaCha20-based CRNG is using the wrong
> endianness for the ChaCha20 constants.
>
> This doesn't matter cryptographically, but technically it means it's not
> ChaCha20 anymore. Fix it
On Thu, 1 Apr 2021 14:17:21 +0200
Mauro Carvalho Chehab wrote:
> Changeset 1e6536ee349b ("dt-bindings:iio:dac:adi,ad5758 yaml conversion")
> renamed: Documentation/devicetree/bindings/iio/dac/ad5758.txt
> to: Documentation/devicetree/bindings/iio/dac/adi,ad5758.yaml.
>
> Update its cross-refere
From: Xuezhi Zhang
show() must not use snprintf() when formatting the value to
be returned to user space.
Signed-off-by: Xuezhi Zhang
---
drivers/staging/fbtft/fbtft-sysfs.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/staging/fbtft/fbtft-sysfs.c
b/drivers/stagi
This series brings up initial support for the Apple M1 SoC, used in the
2020 Mac Mini, MacBook Pro, and MacBook Air models.
The following features are supported in this initial port:
- UART (samsung-style) with earlycon support
- Interrupts, including affinity and IPIs (Apple Interrupt Controller
This is different from the legacy AAPL prefix used on PPC, but
consensus is that we prefer `apple` for these new platforms.
Reviewed-by: Krzysztof Kozlowski
Reviewed-by: Linus Walleij
Reviewed-by: Rob Herring
Signed-off-by: Hector Martin
---
Documentation/devicetree/bindings/vendor-prefixes.y
This introduces bindings for all three 2020 Apple M1 devices:
* apple,j274 - Mac mini (M1, 2020)
* apple,j293 - MacBook Pro (13-inch, M1, 2020)
* apple,j313 - MacBook Air (M1, 2020)
Reviewed-by: Linus Walleij
Reviewed-by: Rob Herring
Signed-off-by: Hector Martin
---
.../devicetree/bindings/ar
These are the CPU cores in the "Apple Silicon" M1 SoC.
Reviewed-by: Rob Herring
Signed-off-by: Hector Martin
---
Documentation/devicetree/bindings/arm/cpus.yaml | 2 ++
1 file changed, 2 insertions(+)
diff --git a/Documentation/devicetree/bindings/arm/cpus.yaml
b/Documentation/devicetree/bind
The implementor will be used to condition the FIQ support quirk.
The specific CPU types are not used at the moment, but let's add them
for documentation purposes.
Acked-by: Will Deacon
Signed-off-by: Hector Martin
---
arch/arm64/include/asm/cputype.h | 6 ++
1 file changed, 6 insertions(+)
Not all platforms provide the same set of timers/interrupts, and Linux
only needs one (plus kvm/guest ones); some platforms are working around
this by using dummy fake interrupts. Implementing interrupt-names allows
the devicetree to specify an arbitrary set of available interrupts, so
the timer co
This allows the devicetree to correctly represent the available set of
timers, which varies from device to device, without the need for fake
dummy interrupts for unavailable slots.
Also add the hyp-virt timer/PPI, which is not currently used, but worth
representing.
Reviewed-by: Tony Lindgren
Re
Hi Meng,
> Remove 'return' in void function and fix some coding style
>
> Meng Yu (2):
> Bluetooth: Remove 'return' in void function
> Bluetooth: Coding style fix
>
> net/bluetooth/6lowpan.c | 5 +
> net/bluetooth/hci_debugfs.c | 8
> net/bluetooth/hci_event.c | 2 +-
> net/blu
ARM64 currently defaults to posted MMIO (nGnRE), but some devices
require the use of non-posted MMIO (nGnRnE). Introduce a new ioremap()
variant to handle this case. ioremap_np() returns NULL on arches that
do not implement this variant.
sparc64 is the only architecture that needs to be touched di
From: Arnd Bergmann
This adds more detailed descriptions of the various read/write
primitives available for use with I/O memory/ports.
Reviewed-by: Linus Walleij
Signed-off-by: Arnd Bergmann
Signed-off-by: Hector Martin
---
Documentation/driver-api/device-io.rst | 138 +++
This documents the newly introduced ioremap_np() along with all the
other common ioremap() variants, and some higher-level abstractions
available.
Reviewed-by: Linus Walleij
Signed-off-by: Hector Martin
---
Documentation/driver-api/device-io.rst | 218 +
1 file changed,
Now that we have ioremap_np(), we can make pci_remap_cfgspace() default
to it, falling back to ioremap() on platforms where it is not available.
Remove the arm64 implementation, since that is now redundant. Future
cleanups should be able to do the same for other arches, and eventually
make the gen
This is used on Apple ARM platforms, which require most MMIO
(except PCI devices) to be mapped as nGnRnE.
Acked-by: Marc Zyngier
Acked-by: Will Deacon
Signed-off-by: Hector Martin
---
arch/arm64/include/asm/io.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/include/asm/io.h b/
On Thu, 1 Apr 2021 14:17:25 +0200
Mauro Carvalho Chehab wrote:
> Changeset 9a6ac3138258 ("dt-bindings:iio:humidity:st,hts221 yaml conversion.")
> renamed: Documentation/devicetree/bindings/iio/humidity/hts221.txt
> to: Documentation/devicetree/bindings/iio/humidity/st,hts221.yaml.
>
> Update it
This implements the 'nonposted-mmio' boolean property. Placing this
property in a bus marks all direct child devices as requiring
non-posted MMIO mappings. If no such property is found, the default
is posted MMIO.
of_mmio_is_nonposted() performs this check to determine if a given
device has reques
These definitions are in arm-gic-v3.h for historical reasons which no
longer apply. Move them to sysreg.h so the AIC driver can use them, as
it needs to peek into vGIC registers to deal with the GIC maintentance
interrupt.
Acked-by: Marc Zyngier
Acked-by: Will Deacon
Signed-off-by: Hector Martin
This is the root interrupt controller used on Apple ARM SoCs such as the
M1. This irqchip driver performs multiple functions:
* Handles both IRQs and FIQs
* Drives the AIC peripheral itself (which handles IRQs)
* Dispatches FIQs to downstream hard-wired clients (currently the ARM
timer).
* Im
AIC is the Apple Interrupt Controller found on Apple ARM SoCs, such as
the M1.
Reviewed-by: Linus Walleij
Reviewed-by: Rob Herring
Signed-off-by: Hector Martin
---
.../interrupt-controller/apple,aic.yaml | 88 +++
MAINTAINERS | 1 +
.../
This adds a Kconfig option to toggle support for Apple ARM SoCs.
At this time this targets the M1 and later "Apple Silicon" Mac SoCs.
Signed-off-by: Hector Martin
---
arch/arm64/Kconfig.platforms | 7 +++
arch/arm64/configs/defconfig | 1 +
2 files changed, 8 insertions(+)
diff --git a/arch
On 31/03/2021 14:21, Joel Stanley wrote:
On Mon, 29 Mar 2021 at 12:18, Quan Nguyen wrote:
The SMBus system interface (SSIF) IPMI BMC driver can be used to perform
in-band IPMI communication with their host in management (BMC) side.
This commits adds support specifically for Aspeed AST2500 whi
This currently supports:
* SMP (via spin-tables)
* AIC IRQs
* Serial (with earlycon)
* Framebuffer
A number of properties are dynamic, and based on system firmware
decisions that vary from version to version. These are expected
to be filled in by the loader.
Signed-off-by: Hector Martin
---
MA
Apple SoCs run firmware that sets up a simplefb-compatible framebuffer
for us. Add a compatible for it, and two missing supported formats.
Reviewed-by: Rob Herring
Reviewed-by: Linus Walleij
Signed-off-by: Hector Martin
---
.../devicetree/bindings/display/simple-framebuffer.yaml | 5 +
There are few error about open brace is reported by checkpatch.pl:
ERROR: that open brace { should be on the previous line
+static struct error_fw flash_error_table[] =
+{
So fix them all.
Signed-off-by: Jianqin Xie
Signed-off-by: Luo Jiaxing
---
drivers/scsi/pm8001/pm8001_ctl.c | 6 ++
1
Several error is reported by checkpatch.pl, here are two patches to clean
them up.
Luo Jiaxing (2):
scsi: pm8001: clean up for white space
scsi: pm8001: clean up for open brace
drivers/scsi/pm8001/pm8001_ctl.c | 8 +++-
drivers/scsi/pm8001/pm8001_hwi.c | 14 +++---
drivers/scsi/
Many error are found like below when run checkpatch.pl
ERROR: space prohibited before that ',' (ctx:WxW)
+int pm8001_mpi_general_event(struct pm8001_hba_info *pm8001_ha , void *piomb);
It all about white space, so fix them.
Signed-off-by: Jianqin Xie
Signed-off-by: Luo Jiaxing
---
drivers/scs
On Thu, 1 Apr 2021 14:17:26 +0200
Mauro Carvalho Chehab wrote:
> Changeset 06d2ff6fe11e ("dt-bindings:iio:dac:dpot-dac: yaml conversion.")
> renamed: Documentation/devicetree/bindings/iio/dac/dpot-dac.txt
> to: Documentation/devicetree/bindings/iio/dac/dpot-dac.yaml.
>
> Update its cross-refere
On Thu, 1 Apr 2021 14:17:27 +0200
Mauro Carvalho Chehab wrote:
> Changeset 66a6dcc20e63 ("dt-bindings:iio:adc:envelope-detector: txt to yaml
> conversion.")
> renamed: Documentation/devicetree/bindings/iio/adc/envelope-detector.txt
> to: Documentation/devicetree/bindings/iio/adc/envelope-detect
Hi Archie,
> There is a possibility where HCI_INQUIRY flag is set but we still
> send HCI_OP_INQUIRY anyway.
>
> Such a case can be reproduced by connecting to an LE device while
> active scanning. When the device is discovered, we initiate a
> connection, stop LE Scan, and send Discovery MGMT wi
Dear Linux folks,
Am 08.04.19 um 18:34 schrieb Paul Menzel:
On 04/08/19 12:33, Paul Menzel wrote:
Can you share your experiences, which processors you choose for
your RAID6 systems? I am particularly interested in Intel
alternatives? Are AMD EPYC processors good alternatives for file
servers
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