On Sun, 21 Mar 2021 00:55:53 +0530, Bhaskar Chowdhury wrote:
>
> s/Subsytem/Subsystem/
> s/contoller/controller/
>
> Signed-off-by: Bhaskar Chowdhury
> ---
> Documentation/devicetree/bindings/display/msm/dpu.txt | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
Applied, thanks!
On Wed, 24 Mar 2021 18:05:46 +,
Will Deacon wrote:
>
> On Fri, Mar 05, 2021 at 06:38:36AM +0900, Hector Martin wrote:
> > From: Marc Zyngier
> >
> > It seems that the CPU known as Apple M1 has the terrible habit
> > of being stuck with HCR_EL2.E2H==1, in violation of the architecture.
> >
On Mon, 22 Mar 2021 19:21:39 +0100, Julia Lawall wrote:
> From: kernel test robot
>
> Function "for_each_child_of_node" should have of_node_put() before goto.
>
> Generated by: scripts/coccinelle/iterators/for_each_child.cocci
>
> Fixes: 82c2d81361ec ("coccinelle: iterators: Add for_each_child.
On Mon, Mar 22, 2021 at 08:23:43AM +0100, Lukas Bulwahn wrote:
> The opening comment mark '/**' is used for indicating the beginning of
> kernel-doc comments.
>
> Replace uses of '/**' for invalid cases in dt-binding headers and dts.
>
> Signed-off-by: Lukas Bulwahn
> ---
> Rob, please pick this
Hi Rob,
Thanks for the feedback !
>From the feedback that I received from the other patches in the stack,
we have identified an alternate approach of doing this without
introducing this device tree addition.
So, for now this patch is no longer needed. While the alternate
approach is still being va
24.03.2021 22:57, Minchan Kim пишет:
> On Wed, Mar 24, 2021 at 10:49:58PM +0300, Dmitry Osipenko wrote:
>> 24.03.2021 22:43, Dmitry Osipenko пишет:
>>> 24.03.2021 22:20, Minchan Kim пишет:
static int __init cma_sysfs_init(void)
{
- int i = 0;
+ struct kobject *cma_kobj_root;
On Wed, 2021-03-24 at 10:36 -0700, syzbot wrote:
> Hello,
>
> syzbot found the following issue on:
>
> HEAD commit:84196390 Merge tag 'selinux-pr-20210322' of git://git.kern..
> git tree: upstream
> console output: https://syzkaller.appspot.com/x/log.txt?x=12ea778ad0
> kernel config
On 3/24/21 7:31 PM, Christian König wrote:
Am 24.03.21 um 17:38 schrieb Jason Gunthorpe:
On Wed, Mar 24, 2021 at 04:50:14PM +0100, Thomas Hellström (Intel)
wrote:
On 3/24/21 2:48 PM, Jason Gunthorpe wrote:
On Wed, Mar 24, 2021 at 02:35:38PM +0100, Thomas Hellström (Intel)
wrote:
In an id
On Mon, Mar 22, 2021 at 11:43 AM Arnd Bergmann wrote:
>
> From: Arnd Bergmann
>
> There are a few warnings about empty debug macros in this driver:
>
> drivers/net/ethernet/neterion/vxge/vxge-main.c: In function 'vxge_probe':
> drivers/net/ethernet/neterion/vxge/vxge-main.c:4480:76: error: sugges
Hi Matthew,
Às 17:15 de 23/03/21, Matthew Wilcox escreveu:
On Tue, Mar 23, 2021 at 04:59:38PM -0300, André Almeida wrote:
This reverts commit 794c43f716845e2d48ce195ed5c4179a4e05ce5f.
For implementing casefolding support at tmpfs, it needs to set dentry
operations at superblock level, given th
On 3/21/21 1:46 PM, Krzysztof Kozlowski wrote:
The Stratix10 service layer and RCU drivers are useful only on
Stratix10, so on ARMv8. Compile testing the RCU driver on 32-bit ARM
fails:
drivers/firmware/stratix10-rsu.c: In function 'rsu_status_callback':
include/linux/compiler_types.h:
Acked-by: Michal Hocko
for the series.
Thanks!
--
Michal Hocko
SUSE Labs
On Mon, 8 Mar 2021, Denis Efremov wrote:
> Skip patches generation for structs/unions with a single field.
> Changing a zero-length array to a flexible array member in a struct
> with no named members breaks the compilation. However, reporting
> such cases is still valuable, e.g. commit 637464c
Às 17:18 de 23/03/21, Gabriel Krisman Bertazi escreveu:
André Almeida writes:
opt = fs_parse(fc, shmem_fs_parameters, param, &result);
if (opt < 0)
@@ -3468,6 +3519,23 @@ static int shmem_parse_one(struct fs_context *fc, struct
fs_parameter *param)
ctx->full_inu
On 3/24/21 5:34 PM, Dave Hansen wrote:
On 3/24/21 3:05 AM, Thomas Hellström (Intel) wrote:
Yes, I agree. Seems like the special (SW1) is available also for huge
page table entries on x86 AFAICT, although just not implemented.
Otherwise the SW bits appear completely used up.
Although the _PAGE
The example in video-interfaces.yaml uses a bunch of undocumented
bindings which will cause warnings when undocumented compatible checks
are enabled. The example could be fixed to use documented bindings, but
doing so would just duplicate other examples. So let's just remove the
example.
Cc: Mauro
On Wed, 2021-03-24 at 21:50 +0300, Dan Carpenter wrote:
> On Wed, Mar 24, 2021 at 10:26:04PM +0500, Muhammad Usama Anjum wrote:
> > Return value of usb_driver_claim_interface should not be ignored.
> > Instead it should be stored in err variable and returned from
> > this function.
> >
> > Signed-
On 3/24/21 1:22 PM, Thomas Hellström (Intel) wrote:
>> We also have not been careful at *all* about how _PAGE_BIT_SOFTW* are
>> used. It's quite possible we can encode another use even in the
>> existing bits.
>>
>> Personally, I'd just try:
>>
>> #define _PAGE_BIT_SOFTW5 57 /* availab
On Mon, 8 Mar 2021, Denis Efremov wrote:
> Remove the documentation link from the warning message because commit
> 3942ea7a10c9 ("deprecated.rst: Remove now removed uninitialized_var")
> removed the section from documentation. Update the rule documentation
> accordingly.
>
> Signed-off-by: Deni
On Fri, 19 Mar 2021, Mickaël Salaün wrote:
>
> >> Cc: Kees Cook
> >> Signed-off-by: Mickaël Salaün
> >> Acked-by: Serge Hallyn
> >> Link: https://lore.kernel.org/r/20210316204252.427806-3-...@digikod.net
> >
> > (Aside: you appear to be self-adding your Link: tags -- AIUI, this is
> > normall
On 3/24/21 12:47 PM, Andy Lutomirski wrote:
> On Wed, Mar 24, 2021 at 10:04 AM Brijesh Singh wrote:
>> If hardware detects an RMP violation, it will raise a page-fault exception
>> with the RMP bit set. To help the debug, dump the RMP entry of the faulting
>> address.
>>
>> Cc: Thomas Gleixner
On Mon, 15 Mar 2021 11:56:23 +, Mark Rutland wrote:
> Hector's M1 support series [1] shows that some platforms have critical
> interrupts wired to FIQ, and to support these platforms we need to support
> handling FIQ exceptions. Other contemporary platforms don't use FIQ (since
> e.g.
> this i
On Wed, Mar 24, 2021 at 2:12 AM Michal Hocko wrote:
>
> On Tue 23-03-21 11:47:54, Arjun Roy wrote:
> > On Tue, Mar 23, 2021 at 7:34 AM Michal Hocko wrote:
> > >
> > > On Wed 17-03-21 18:12:55, Johannes Weiner wrote:
> > > [...]
> > > > Here is an idea of how it could work:
> > > >
> > > > struct
On 3/24/21 2:05 PM, Muhammad Usama Anjum wrote:
On Wed, 2021-03-24 at 10:36 -0700, syzbot wrote:
Hello,
syzbot found the following issue on:
HEAD commit:84196390 Merge tag 'selinux-pr-20210322' of git://git.kern..
git tree: upstream
console output: https://syzkaller.appspot.com/x/log
tree: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
master
head: 4ee998b0ef8b6d7b1267cd4d953182224929abba
commit: 57baf8cc70ea4cf5503c9d42f31f6a86d7f5ff1a net: axienet: Handle deferred
probe on clock properly
date: 6 weeks ago
config: s390-randconfig-m031-20210325 (atta
Hi Al Viro,
Às 20:19 de 23/03/21, Al Viro escreveu:
On Tue, Mar 23, 2021 at 04:59:39PM -0300, André Almeida wrote:
* dcache handling:
For now, negative lookups are not inserted in the dcache, since they
would need to be invalidated anyway, because we can't trust missing file
dentries. This is
Hi Gabriel,
Às 19:19 de 23/03/21, Gabriel Krisman Bertazi escreveu:
André Almeida writes:
Document mounting options to enable casefold support in tmpfs.
Signed-off-by: André Almeida
---
Documentation/filesystems/tmpfs.rst | 26 ++
1 file changed, 26 insertions(+)
On Wed, 2021-03-24 at 09:14 -0700, James Bottomley wrote:
> On Tue, 2021-03-23 at 14:07 -0400, Mimi Zohar wrote:
> > On Tue, 2021-03-23 at 17:35 +0100, Ahmad Fatoum wrote:
> > > Hello Horia,
> > >
> > > On 21.03.21 21:48, Horia Geantă wrote:
> > > > On 3/16/2021 7:02 PM, Ahmad Fatoum wrote:
> > >
In accordance with the Generic EHCI/OHCI bindings the corresponding node
name is suppose to comply with the Generic USB HCD DT schema, which
requires the USB nodes to have the name acceptable by the regexp:
"^usb(@.*)?" . Make sure the "generic-ehci" and "generic-ohci"-compatible
nodes are correctl
In accordance with the DWC USB3 bindings the corresponding node
name is suppose to comply with the Generic USB HCD DT schema, which
requires the USB nodes to have the name acceptable by the regexp:
"^usb(@.*)?" . Make sure the "snps,dwc3"-compatible nodes are correctly
named.
Signed-off-by: Serge
As the subject states this series is an attempt to harmonize the xHCI,
EHCI, OHCI and DWC USB3 DT nodes with the DT schema introduced in the
framework of the patchset [1].
Firstly as Krzysztof suggested we've deprecated a support of DWC USB3
controllers with "synopsys,"-vendor prefix compatible st
In accordance with the DWC USB3 bindings the corresponding node
name is suppose to comply with the Generic USB HCD DT schema, which
requires the USB nodes to have the name acceptable by the regexp:
"^usb(@.*)?" . Make sure the "snps,dwc3"-compatible nodes are correctly
named despite of the warning
In accordance with the Generic EHCI/OHCI bindings the corresponding node
name is suppose to comply with the Generic USB HCD DT schema, which
requires the USB nodes to have the name acceptable by the regexp:
"^usb(@.*)?" . Make sure the "generic-ehci" and "generic-ohci"-compatible
nodes are correctl
In accordance with the USB HCD/DRD schema all the USB controllers are
supposed to have DT-nodes named with prefix "^usb(@.*)?". Since the
existing DT-nodes will be renamed in a subsequent patch let's fix the DWC3
Qcom-specific code to detect the DWC3 sub-node just by checking its
compatible string
In accordance with the DWC USB3 bindings the corresponding node
name is suppose to comply with the Generic USB HCD DT schema, which
requires the USB nodes to have the name acceptable by the regexp:
"^usb(@.*)?" . Make sure the "snps,dwc3"-compatible nodes are correctly
named.
Signed-off-by: Serge
In accordance with the Generic EHCI/OHCI bindings the corresponding node
name is suppose to comply with the Generic USB HCD DT schema, which
requires the USB nodes to have the name acceptable by the regexp:
"^usb(@.*)?" . Make sure the "generic-ehci" and "generic-ohci"-compatible
nodes are correctl
On Wed, Mar 24, 2021 at 1:39 PM Arjun Roy wrote:
>
> On Wed, Mar 24, 2021 at 2:12 AM Michal Hocko wrote:
> >
> > On Tue 23-03-21 11:47:54, Arjun Roy wrote:
> > > On Tue, Mar 23, 2021 at 7:34 AM Michal Hocko wrote:
> > > >
> > > > On Wed 17-03-21 18:12:55, Johannes Weiner wrote:
> > > > [...]
> >
On Mon, 22 Mar 2021, Arnd Bergmann wrote:
> From: Arnd Bergmann
>
> gcc-11 introdces a harmless warning for cap_inode_getsecurity:
>
> security/commoncap.c: In function ‘cap_inode_getsecurity’:
> security/commoncap.c:440:33: error: ‘memcpy’ reading 16 bytes from a region
> of size 0 [-Werror=s
Since CMA is getting used more widely, it's more important to
keep monitoring CMA statistics for system health since it's
directly related to user experience.
This patch introduces sysfs statistics for CMA, in order to provide
some basic monitoring of the CMA allocator.
* the number of CMA page
On Wed, Mar 24, 2021 at 11:02:47PM +0300, Dmitry Osipenko wrote:
> 24.03.2021 22:57, Minchan Kim пишет:
> > On Wed, Mar 24, 2021 at 10:49:58PM +0300, Dmitry Osipenko wrote:
> >> 24.03.2021 22:43, Dmitry Osipenko пишет:
> >>> 24.03.2021 22:20, Minchan Kim пишет:
> static int __init cma_sysfs_i
There is no power management of cxl virtual devices, disable
device-power-management and runtime-power-management to prevent
userspace from growing expectations of those attributes appearing. They
can be added back in the future if needed.
Reviewed-by: Ben Widawsky
Signed-off-by: Dan Williams
--
While none the CXL sysfs attributes are threatening to overrun a
PAGE_SIZE of output, it is good form to use the recommended helpers.
Fixes: b39cb1052a5c ("cxl/mem: Register CXL memX devices")
Reviewed-by: Ben Widawsky
Reported-by: Jason Gunthorpe
Signed-off-by: Dan Williams
---
drivers/cxl/me
While device_add() will happen to catch dev_set_name() failures it is a
broken pattern to follow given that the core may try to fall back to a
different name.
Add explicit checking for dev_set_name() failures to be cleaned up by
put_device(). Skip cdev_device_add() and proceed directly to
put_devi
If cdev_device_add() fails then the allocation performed by
dev_set_name() is leaked. Use put_device(), not open coded release, for
device_add() failures.
The comment is obsolete because direct err_id failures need not worry
about the device being live.
The release method expects the percpu_ref i
A small collection of fixes mostly inspired by Jason's recognition of
dev_set_name() error handling mistakes on other driver review.
dev_set_name() can fail and although device_add() might catch it that's
not a reliable assumption. While fixing that I noticed that the unwind
handling for cdev_devi
Hello,
syzbot has tested the proposed patch and the reproducer did not trigger any
issue:
Reported-and-tested-by: syzbot+3dea30b047f41084d...@syzkaller.appspotmail.com
Tested on:
commit: 84196390 Merge tag 'selinux-pr-20210322' of git://git.kern..
git tree:
https://git.kernel.or
On Tue, Mar 23, 2021 at 11:15 PM Liu, Jing2 wrote:
> > IMO, the problem with AVX512 state
> > is that we guaranteed it will be zero for XINUSE=0.
> > That means we have to write 0's on saves.
> why "we have to write 0's on saves" when XINUSE=0.
>
> Since due to SDM, if XINUSE=0, the XSAVES will
Hi Xu,
On Wed, Mar 24, 2021 at 04:22:17PM +0800, Xu Yilun wrote:
> Hi Moritz:
>
> Sorry I need to get back to you again, seems no more comments from Greg.
>
> The patchset is stuck here for more than 1 month. Do you have some
> more suggestion that could make it move forward? Do you have some mo
Ok,
some more experimenting Babu and I did lead us to:
---
diff --git a/arch/x86/include/asm/tlbflush.h b/arch/x86/include/asm/tlbflush.h
index f5ca15622dc9..259aa4889cad 100644
--- a/arch/x86/include/asm/tlbflush.h
+++ b/arch/x86/include/asm/tlbflush.h
@@ -250,6 +250,9 @@ static inline void __na
Add support for the GPIO controller employed by Realtek in multiple series of
MIPS SoCs. These include the supported RTL838x and RTL839x. The register layout
also matches the one found in the GPIO controller of other (Lexra-based) SoCs
such as RTL8196E, RTL8197D, and RTL8197F.
For the platform nam
Realtek MIPS SoCs (platform name Otto) have GPIO controllers with up to
64 GPIOs, divided over two banks. Each bank has a set of registers for
32 GPIOs, with support for edge-triggered interrupts.
Each GPIO bank consists of four 8-bit GPIO ports (ABCD and EFGH). Most
registers pack one bit per GPI
Add a binding description for Realtek's GPIO controller found on several
of their MIPS-based SoCs (codenamed Otto), such as the RTL838x and
RTL839x series of switch SoCs.
A fallback binding 'realtek,otto-gpio' is provided for cases where the
actual port ordering is not known yet, and enabling the
On Wed, Mar 24, 2021 at 10:12:46AM +0100, Michal Hocko wrote:
> On Tue 23-03-21 11:47:54, Arjun Roy wrote:
> > On Tue, Mar 23, 2021 at 7:34 AM Michal Hocko wrote:
> > >
> > > On Wed 17-03-21 18:12:55, Johannes Weiner wrote:
> > > [...]
> > > > Here is an idea of how it could work:
> > > >
> > > >
If GPIO controller is not available yet we need to defer
the probe of GBE until provider will become available.
While here, drop GPIOF_EXPORT because it's deprecated and
may not be available.
Fixes: f1a26fdf5944 ("pch_gbe: Add MinnowBoard support")
Signed-off-by: Andy Shevchenko
---
drivers/net
> On Mar 24, 2021, at 2:09 PM, Len Brown wrote:
>
> On Tue, Mar 23, 2021 at 11:15 PM Liu, Jing2
> wrote:
>
>>> IMO, the problem with AVX512 state
>>> is that we guaranteed it will be zero for XINUSE=0.
>>> That means we have to write 0's on saves.
>
>> why "we have to write 0's on saves"
On 24/03/2021 20.24, Joe Perches wrote:
> On Wed, 2021-03-24 at 18:33 +0100, Rasmus Villemoes wrote:
>> On 24/03/2021 18.20, Joe Perches wrote:
>>
>>>
>>> Maybe it's better to output non PTR_ERR %pe uses as decimal so this
>>> sort of code would work.
>>
>> No, because that would leak the pointer v
On Wed, 2021-03-24 at 17:33 +, Lee Jones wrote:
> This set is part of a larger effort attempting to clean-up W=1
> kernel builds, which are currently overwhelmingly riddled with
> niggly little warnings.
>
For changes in drivers/hid/intel-ish-hid folder
Acked-by: Srinivas Pandruvada
> Lee
On Wed, 2021-03-24 at 22:22 +0100, Sander Vanheule wrote:
> +static inline u8 read_u8_reg(void __iomem* reg, unsigned int port)
> +{
> + return ioread8(reg + port);
> +}
> +
> +static inline void write_u8_reg(void __iomem* reg, unsigned int port,
> u8 value)
> +{
> + iowrite8(value, reg
On 3/24/21 2:26 PM, Andy Lutomirski wrote:
>> 3. user space always uses fully uncompacted XSAVE buffers.
>>
> There is no reason we have to do this for new states. Arguably we
> shouldn’t for AMX to avoid yet another altstack explosion.
The thing that's worried me is that the list of OS-enabled s
This series is a preview of the proposed infrastructure for enabling
dynamic mapping of Host-managed Device Memory (HDM) Decoders. It
includes a not-for-upstream hack at the tail of the series to stand-in
for the in-flight ACPICA enabling. The goal is to get review of the
proposal in parallel with
In preparation for sharing cxl.h with other generic CXL consumers,
move / consolidate some of the memory device specifics to mem.h.
Reviewed-by: Ben Widawsky
Signed-off-by: Dan Williams
---
drivers/cxl/cxl.h | 57
drivers/cxl/mem.c | 25 +---
While CXL Memory Device endpoints locate the CXL MMIO registers in a PCI
BAR, CXL root bridges have their MMIO base address described by platform
firmware. Refactor the existing register lookup into a generic facility
for endpoints and bridges to share.
Reviewed-by: Ben Widawsky
Signed-off-by: Da
CONFIG_CXL_BUS is default 'n' as expected for new functionality. When
that is enabled do not make the end user hunt for all the expected
sub-options to enable. For example CONFIG_CXL_BUS without CONFIG_CXL_MEM
is an odd/expert configuration, so is CONFIG_CXL_MEM without
CONFIG_CXL_ACPI (on ACPI cap
Once the cxl_root is established then other ports in the hierarchy can
be attached. The cxl_port object, unlike cxl_root that is associated
with host bridges, is associated with PCIE Root Ports or PCIE Switch
Ports. Add cxl_port instances for all PCIE Root Ports in an ACPI0016
host bridge. The cxl_
In preparation for common register mapping facility, introduce a generic
container, 'struct cxl_regs', for CXL device register and later
component register block base pointers. Some CXL device types implement
both.
Reviewed-by: Ben Widawsky
Signed-off-by: Dan Williams
---
drivers/cxl/cxl.h |
While CXL builds upon the PCI software model for dynamic enumeration and
control, a static platform component is required to bootstrap the CXL
memory layout. In addition to identifying the host bridges ACPI is
responsible for enumerating the CXL memory space that can be addressed
by decoders. This
[debug / to-be-replaced / not-for-upstream]
Given ACPICA support is needed before drivers can integrate ACPI
functionality add some module parameters as proxies.
---
drivers/cxl/acpi.c | 81 +++-
1 file changed, 79 insertions(+), 2 deletions(-)
d
In preparation for more generic shared functionality across endpoint
consumers of core cxl resources, and platform-firmware producers of
those resources, rename bus.c to core.c. In addition to the central
rendezvous for interleave coordination, the core will also define common
routines like CXL reg
24.03.2021 23:55, Minchan Kim пишет:
> Since CMA is getting used more widely, it's more important to
> keep monitoring CMA statistics for system health since it's
> directly related to user experience.
>
> This patch introduces sysfs statistics for CMA, in order to provide
> some basic monitoring
On Tue, Mar 23, 2021 at 12:04:34PM -0700, Dmitry Torokhov wrote:
> On Tue, Mar 23, 2021 at 05:36:06PM +, Mark Brown wrote:
> No it is ordering issue. I do not have a proven real-life example for
> SPI, but we do have one for I2C:
> https://lore.kernel.org/linux-devicetree/20210305041236.3489-
This patchset is against Mel's tree:
- git://git.kernel.org/pub/scm/linux/kernel/git/mel/linux.git
- Branch: mm-bulk-rebase-v6r5
-
https://git.kernel.org/pub/scm/linux/kernel/git/mel/linux.git/log/?h=mm-bulk-rebase-v6r5
The benchmarks are here:
-
https://github.com/xdp-project/xdp-project/bl
There are cases where the page_pool need to refill with pages from the
page allocator. Some workloads cause the page_pool to release pages
instead of recycling these pages.
For these workload it can improve performance to bulk alloc pages from
the page-allocator to refill the alloc cache.
For XDP
In preparation for next patch, move the dma mapping into its own
function, as this will make it easier to follow the changes.
V2: make page_pool_dma_map return boolean (Ilias)
Signed-off-by: Jesper Dangaard Brouer
Signed-off-by: Mel Gorman
Reviewed-by: Ilias Apalodimas
---
net/core/page_pool.
Using the API variant alloc_pages_bulk_array from page_pool
was done in a separate patch to ease benchmarking the
variants separately. Maintainers can squash patch if preferred.
Signed-off-by: Jesper Dangaard Brouer
---
include/net/page_pool.h |2 +-
net/core/page_pool.c| 22 +
25.03.2021 00:31, Dmitry Osipenko пишет:
>> Reported-by: Dmitry Osipenko
>> Tested-by: Dmitry Osipenko
>> Suggested-by: Dmitry Osipenko
> The tags are incorrect, I haven't suggested this change.
The reported-by also should be removed.
Core-Scheduling (resend based on peter's queue.git sched/core-sched branch).
===
Enclosed is interface related core scheduling patches and one for migration.
The main core scheduling patches were already pulled in by Peter with these
bits left.
Main changes are the simplification of th
From: Aubrey Li
- Don't migrate if there is a cookie mismatch
Load balance tries to move task from busiest CPU to the
destination CPU. When core scheduling is enabled, if the
task's cookie does not match with the destination CPU's
core cookie, this task may be skipped by this
From: Josh Don
A single unsigned long is insufficient as a cookie value for core
scheduling. We will minimally have cookie values for a per-task and a
per-group interface, which must be combined into an overall cookie.
This patch adds the infrastructure necessary for setting task and group
cooki
From: chris hyser
This patch provides support for setting, clearing and copying core
scheduling 'task cookies' between threads (PID), processes (TGID), and
process groups (PGID).
The value of core scheduling isn't that tasks don't share a core, 'nosmt'
can do that. The value lies in exploiting a
Add a kselftest test to ensure that the core-sched interface is working
correctly.
Co-developed-by: Chris Hyser
Signed-off-by: Chris Hyser
Co-developed-by: Josh Don
Signed-off-by: Josh Don
Tested-by: Julien Desfossez
Signed-off-by: Joel Fernandes (Google)
Signed-off-by: chris hyser
---
too
Document the usecases, design and interfaces for core scheduling.
Co-developed-by: Chris Hyser
Co-developed-by: Vineeth Pillai
Co-developed-by: Josh Don
Signed-off-by: Josh Don
Signed-off-by: Vineeth Pillai
Signed-off-by: Chris Hyser
Tested-by: Julien Desfossez
Reviewed-by: Randy Dunlap
Si
From: chris hyser
Provides a selftest and examples of using the interface.
Signed-off-by: Chris Hyser
Signed-off-by: Josh Don
---
tools/testing/selftests/sched/.gitignore | 1 +
tools/testing/selftests/sched/Makefile| 14 +
tools/testing/selftests/sched/config | 1 +
Tested-by: Julien Desfossez
Not-Signed-off-by: Peter Zijlstra (Intel)
---
kernel/sched/core.c | 40 +++-
kernel/sched/fair.c | 12
2 files changed, 51 insertions(+), 1 deletion(-)
diff --git a/kernel/sched/core.c b/kernel/sched/core.c
index a7338
From: Josh Don
This adds the API to set/get the cookie for a given cgroup. This
interface lives at cgroup/cpu.core_tag.
The cgroup interface can be used to toggle a unique cookie value for all
descendent tasks, preventing these tasks from sharing with any others.
See Documentation/admin-guide/hw
> On Mar 24, 2021, at 2:30 PM, Dave Hansen wrote:
>
> On 3/24/21 2:26 PM, Andy Lutomirski wrote:
>>> 3. user space always uses fully uncompacted XSAVE buffers.
>>>
>> There is no reason we have to do this for new states. Arguably we
>> shouldn’t for AMX to avoid yet another altstack explosion
On 3/24/21 6:56 AM, Bhaskar Chowdhury wrote:
>
> s/miror/mirror/
>
> Signed-off-by: Bhaskar Chowdhury
Acked-by: Randy Dunlap
> ---
> drivers/staging/media/atomisp/i2c/ov2680.h | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/staging/media/atomisp/i2c/ov2680.h
On 3/23/21 11:34 PM, Bhaskar Chowdhury wrote:
>
> s/conditon/condition/
>
> Signed-off-by: Bhaskar Chowdhury
Acked-by: Randy Dunlap
> ---
> drivers/gpu/drm/nouveau/nvkm/subdev/bios/init.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/nouveau/nvkm/s
This patchset convert msm8960 to reg_filed, use int_common instead
of a custom function and fix wrong tsens get_temp function for msm8960.
Ipq8064 SoCs tsens driver is based on 8960 tsens driver. Ipq8064 needs
to be registered as a gcc child as the tsens regs on this platform are
shared with the c
Convert msm9860 driver to reg_field to use the init_common
function.
Signed-off-by: Ansuel Smith
Acked-by: Thara Gopinath
---
drivers/thermal/qcom/tsens-8960.c | 80 ++-
1 file changed, 79 insertions(+), 1 deletion(-)
diff --git a/drivers/thermal/qcom/tsens-8960.c
Device based on tsens VER_0 contains a hardware bug that results in some
problem with sensor enablement. Sensor id 6-11 can't be enabled
selectively and all of them must be enabled in one step.
Signed-off-by: Ansuel Smith
Acked-by: Thara Gopinath
---
drivers/thermal/qcom/tsens-8960.c | 23 +
Drop unused define for msm8960 replaced by generic api and reg_field.
Signed-off-by: Ansuel Smith
Reviewed-by: Thara Gopinath
---
drivers/thermal/qcom/tsens-8960.c | 24 +---
1 file changed, 1 insertion(+), 23 deletions(-)
diff --git a/drivers/thermal/qcom/tsens-8960.c
b/d
Use init_common and drop custom init for msm8960.
Signed-off-by: Ansuel Smith
Reviewed-by: Thara Gopinath
---
drivers/thermal/qcom/tsens-8960.c | 52 +--
1 file changed, 1 insertion(+), 51 deletions(-)
diff --git a/drivers/thermal/qcom/tsens-8960.c
b/drivers/therma
VER_0 is used to describe device based on tsens version before v0.1.
These device are devices based on msm8960 for example apq8064 or
ipq806x.
Signed-off-by: Ansuel Smith
Reviewed-by: Thara Gopinath
---
drivers/thermal/qcom/tsens.c | 145 ---
drivers/thermal/qcom
Add support for tsens present in ipq806x SoCs based on generic msm8960
tsens driver.
Signed-off-by: Ansuel Smith
Reviewed-by: Thara Gopinath
---
drivers/thermal/qcom/tsens.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/thermal/qcom/tsens.c b/drivers/thermal/qcom/tsens.c
index
Document the use of bindings used for msm8960 tsens based devices.
msm8960 use the same gcc regs and is set as a child of the qcom gcc.
Signed-off-by: Ansuel Smith
Reviewed-by: Rob Herring
---
.../bindings/thermal/qcom-tsens.yaml | 56 ---
1 file changed, 48 insertions(
Rework calibrate function to use common function. Derive the offset from
a missing hardcoded slope table and the data from the nvmem calib
efuses.
Drop custom get_temp function and use generic api.
Signed-off-by: Ansuel Smith
Acked-by: Thara Gopinath
---
drivers/thermal/qcom/tsens-8960.c | 56 +
Function compute_intercept_slope hardcode the sensor slope to
SLOPE_DEFAULT. Change this and use the default value only if a slope is
not defined. This is needed for tsens VER_0 that has a hardcoded slope
table.
Signed-off-by: Ansuel Smith
Reviewed-by: Thara Gopinath
---
drivers/thermal/qcom/ts
On 3/23/21 11:28 PM, Bhaskar Chowdhury wrote:
>
> s/requsted/requested/ .two different places.
> s/equests/requests/
> s/occured/occurred/..two different places.
> s/conditon/condition/
> s/requestors/requesters/
>
>
> Signed-off-by: Bhaskar Chowdhury
> ---
> drivers/misc/genwqe/c
On Wed, Mar 24, 2021 at 10:28:35AM +0100, Lorenzo Bianconi wrote:
> [...]
> > > diff --git a/drivers/net/ethernet/marvell/mvneta.c
> > > b/drivers/net/ethernet/marvell/mvneta.c
> > > index a635cf84608a..8b3250394703 100644
> > > --- a/drivers/net/ethernet/marvell/mvneta.c
> > > +++ b/drivers/net/e
On 3/24/21 6:50 AM, Bhaskar Chowdhury wrote:
>
> s/miror/mirror/
> s/needind/needing/
>
> Signed-off-by: Bhaskar Chowdhury
> ---
> drivers/gpu/drm/radeon/r600_cs.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/radeon/r600_cs.c
> b/drivers/gpu/drm
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