On Mon, Mar 22, 2021 at 08:32:54PM +, Chuck Lever III wrote:
> > It's not expected that the array implementation would be worse *unless*
> > you are passing in arrays with holes in the middle. Otherwise, the success
> > rate should be similar.
>
> Essentially, sunrpc will always pass an array
On Mon, Sep 07, 2020 at 01:37:54PM +0800, Zhiqiang Hou wrote:
> From: Hou Zhiqiang
>
> This patch series is to add PCIe power management support for NXP
> Layerscape platfroms.
>
> Hou Zhiqiang (7):
> PCI: dwc: Fix a bug of the case dw_pci->ops is NULL
> PCI: layerscape: Change to use the DW
Hi,
On Tue, Mar 23, 2021 at 05:34:53PM +0800, Yang Li wrote:
> fixed the following coccicheck:
> ./drivers/gpu/drm/omapdrm/dss/dsi.c:4329:7-27: ERROR: Threaded IRQ with
> no primary handler requested without IRQF_ONESHOT
>
> Reported-by: Abaci Robot
> Signed-off-by: Yang Li
> ---
Reviewed-by:
Alexander, Ahmad,
On 23/03/2021 at 11:55, Ahmad Fatoum wrote:
Hello Alexander,
On 23.03.21 11:45, Alexander Dahl wrote:
Hei hei,
I could not get ethernet to work on SAMA5D27-SOM1-EK1 with kernels v5.10 and
v5.11 built by a recent ptxdist based DistroKit BSP, while it used to work with
an ol
Ping.
> -Original Message-
> From: Bharat Kumar Gogada
> Sent: Monday, March 15, 2021 11:43 AM
> To: Bharat Kumar Gogada ; linux-
> p...@vger.kernel.org; linux-kernel@vger.kernel.org
> Cc: bhelg...@google.com
> Subject: RE: [PATCH v3 1/2] PCI: xilinx-nwl: Enable coherent PCIe DMA traffic
>
* Paul E. McKenney wrote:
> > > * there are no read-side primitives analogous to rcu_read_lock() and
> > > * rcu_read_unlock() because this primitive is intended to determine
> > > * that all tasks have passed through a safe state, not so much for
> > > - * data-strcuture synchronization.
>
On 23.03.21 12:11, Andy Shevchenko wrote:
On Mon, Mar 22, 2021 at 05:02:00PM +0100, David Hildenbrand wrote:
All IORESOURCE_SYSTEM_RAM and IORESOURCE_MEM now properly consider the
whole resource tree, not just the first level. Let's drop the unused
first_lvl / siblings_only logic.
All functions
Hi,Oleg
> You certainly don't understand me :/
> Please read my email you quoted below. I didn't mean the current logic.
> I meant the logic after your patch which moves atomic_dec_and_test() and
> panic() before exit_signals().
Sorry, I think I see what you mean now.
You mean that after apply
* Shaokun Zhang wrote:
> Commit 0cd39f4600ed ("locking/seqlock, headers: Untangle the spaghetti
> monster")
> introduces 'struct ww_acquire_ctx' again, remove the repeated declaration.
>
> Cc: Peter Zijlstra
> Cc: Ingo Molnar
> Cc: Will Deacon
> Cc: Waiman Long
> Cc: Boqun Feng
> Signed-
Hi:
On 2021/3/23 18:26, David Hildenbrand wrote:
> On 20.03.21 10:36, Miaohe Lin wrote:
>> If the zone device page does not belong to un-addressable device memory,
>> the variable entry will be uninitialized and lead to indeterminate pte
>> entry ultimately. Fix this unexpectant case and warn about
On Mon, Mar 22, 2021 at 03:33:38PM -0700, Darrick J. Wong wrote:
> On Mon, Mar 22, 2021 at 03:48:59PM +0100, Miklos Szeredi wrote:
> > --- a/Documentation/filesystems/vfs.rst
> > +++ b/Documentation/filesystems/vfs.rst
> > @@ -441,6 +441,9 @@ As of kernel 2.6.22, the following members are defined:
The following commit has been merged into the locking/urgent branch of tip:
Commit-ID: 291da9d4a9eb3a1cb0610b7f4480f5b52b1825e7
Gitweb:
https://git.kernel.org/tip/291da9d4a9eb3a1cb0610b7f4480f5b52b1825e7
Author:Thomas Gleixner
AuthorDate:Mon, 22 Mar 2021 09:46:13 +01:00
Co
On 23.03.21 12:06, Andy Shevchenko wrote:
On Mon, Mar 22, 2021 at 05:01:58PM +0100, David Hildenbrand wrote:
It used to be true that we can have busy system RAM only on the first level
in the resourc tree. However, this is no longer holds for driver-managed
system RAM (i.e., added via dax/kmem a
On 23.03.21 12:08, Andy Shevchenko wrote:
On Mon, Mar 22, 2021 at 05:01:59PM +0100, David Hildenbrand wrote:
It used to be true that we can have system RAM only on the first level
in the resourc tree. However, this is no longer holds for driver-managed
system RAM (i.e., dax/kmem and virtio-mem).
On 2021/3/23 19:07, Alistair Popple wrote:
> On Tuesday, 23 March 2021 9:26:43 PM AEDT David Hildenbrand wrote:
>> On 20.03.21 10:36, Miaohe Lin wrote:
>>> If the zone device page does not belong to un-addressable device memory,
>>> the variable entry will be uninitialized and lead to indeterminate
Thanks for your patch.
I would like to change the prefix to "video: hyperv_fb:" to be more
specific.
On Tue, Mar 23, 2021 at 12:33:50AM -0700, Lv Yunlong wrote:
> In function hvfb_probe in hyperv_fb.c, it calls hvfb_getmem(hdev, info)
> and return err when info->apertures is freed.
>
> In the er
On Thu, Feb 18, 2021 at 06:40:51PM +0300, Serge Semin wrote:
> On Thu, Feb 18, 2021 at 04:32:29PM +0100, Greg Kroah-Hartman wrote:
> > On Thu, Feb 18, 2021 at 06:29:04PM +0300, Serge Semin wrote:
> > > Bjorn, Greg, Felippe, Andy,
> > > Any comments on this series? Bjorn, Greg you asked me to resend
Hi Johannes,
FYI, the error/warning still remains.
tree: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
master
head: 84196390620ac0e5070ae36af84c137c6216a7dc
commit: 44f3625bc61653ea3bde9960298faf2f5518fda5 netlink: export policy in
extended ACK
date: 5 months ago
conf
Matthew Wilcox (Oracle) wrote:
> Open-coding this function meant it missed out on the recent bugfix
Would that be:
c2407cf7d22d0c0d94cf20342b3b8f06f1d904e7
mm: make wait_on_page_writeback() wait for multiple pending writebacks
David
The function tick_check_replacement() is the combination of
tick_check_percpu() and tick_check_preferred(). It make the code easy to
understand to use the self-described one function.
Signed-off-by: Wang Wensheng
---
kernel/time/tick-common.c | 7 +--
1 file changed, 1 insertion(+), 6 deleti
This patchset is separated from this series:
https://lore.kernel.org/patchwork/cover/1353321/
v7->v8:
Mainly address Stephen's comments
1. Add const for some function and variables
2. Remove the useless function and variables
3. Add a define for a mask width
Dongjiu Geng (2):
dt-bindings: Doc
From: Dongjiu Geng
Add clock drivers for hi3559A SoC, this driver
controls the SoC registers to supply different
clocks to different IPs in the SoC.
Signed-off-by: Dongjiu Geng
---
drivers/clk/hisilicon/Kconfig | 7 +
drivers/clk/hisilicon/Makefile | 1 +
drivers/clk/hisilicon/c
From: Dongjiu Geng
Add DT bindings documentation for hi3559a SoC clock.
Signed-off-by: Dongjiu Geng
Reviewed-by: Rob Herring
---
.../clock/hisilicon,hi3559av100-clock.yaml | 59
include/dt-bindings/clock/hi3559av100-clock.h | 165 +
2 files changed,
x86_64 randconfig-a002-20210323
x86_64 randconfig-a003-20210323
x86_64 randconfig-a006-20210323
x86_64 randconfig-a001-20210323
x86_64 randconfig-a004-20210323
x86_64 randconfig-a005-20210323
i386
Do trivial comment fix of nat_tree_lock.
Signed-off-by: qiulaibin
---
fs/f2fs/f2fs.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/fs/f2fs/f2fs.h b/fs/f2fs/f2fs.h
index 165bfe2a5a0e..eb154d9cb063 100644
--- a/fs/f2fs/f2fs.h
+++ b/fs/f2fs/f2fs.h
@@ -865,7 +865,7 @@ struct f2
On Tue, Mar 23, 2021 at 10:50:13AM +0800, Xu Yihang wrote:
> Fixes the following W=1 kernel build warning(s):
> arch/x86/hyperv/hv_apic.c:58:15: warning: variable ‘hi’ set but not used
> [-Wunused-but-set-variable]
>
> Compiled with CONFIG_HYPERV enabled:
> make allmodconfig ARCH=x86_64 CROSS_COM
tree: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
master
head: 84196390620ac0e5070ae36af84c137c6216a7dc
commit: e5d1bc0a91f16959aa279aa3ee9fdc246d4bb382 io_uring: defer flushing
cached reqs
date: 6 weeks ago
config: powerpc64-randconfig-r023-20210323 (attached as
On Tue, Mar 23, 2021 at 01:13:03AM +0100, Ingo Molnar wrote:
>
> * Michael Kelley wrote:
>
> > From: Ingo Molnar Sent: Monday, March 22, 2021
> > 2:08 PM
> > >
> > > * Xu Yihang wrote:
> > >
> > > > Fixes the following W=1 kernel build warning(s):
> > > > arch/x86/hyperv/hv_spinlock.c:28:16
On 2021/3/23 14:37, Ahmad Fatoum wrote:
> Hi,
>
> On 22.03.21 10:09, Yunsheng Lin wrote:
>> Currently pfifo_fast has both TCQ_F_CAN_BYPASS and TCQ_F_NOLOCK
>> flag set, but queue discipline by-pass does not work for lockless
>> qdisc because skb is always enqueued to qdisc even when the qdisc
>> i
On Sun, Mar 21, 2021 at 07:45:28PM +0100, Thomas Hellström (Intel) wrote:
> TTM sets up huge page-table-entries both to system- and device memory,
> and we don't want gup to assume there are always valid backing struct
> pages for these. For PTEs this is handled by setting the pte_special bit,
> bu
The variable "info_element" is of the following type:
struct rtllib_info_element *info_element
defined in drivers/staging/rtl8192e/rtllib.h:
struct rtllib_info_element {
u8 id;
u8 len;
u8 data[];
} __packed;
The "len" field
On Sun, Mar 07, 2021 at 12:49:15AM -0800, Jia-Ju Bai wrote:
> When usb_otg_descriptor_alloc() returns NULL to usb_desc, no error
> return code of msg_bind() is assigned.
> To fix this bug, status is assigned with -ENOMEM in this case.
>
> Reported-by: TOTE Robot Reported-by: TOTE Robot >
These l
On Sun, Mar 07, 2021 at 12:52:19AM -0800, Jia-Ju Bai wrote:
> When usb_otg_descriptor_alloc() returns NULL to usb_desc, no error
> return code of msg_bind() is assigned.
> To fix this bug, status is assigned with -ENOMEM in this case.
>
> Reported-by: TOTE Robot >
You have 2 '>' on the end of thi
The "u16 CcxRmState[2];" array field in struct "rtllib_network" has 4
bytes in total while the operations performed on this array through-out
the code base are only 2 bytes.
The "CcxRmState" field is fed only 2 bytes of data using memcpy():
(In rtllib_rx.c:1972)
memcpy(network->CcxRmState
On Tue, 23 Mar 2021 11:51:04 +0200
Alexandru Ardelean wrote:
> On Sun, Mar 21, 2021 at 7:37 PM Jonathan Cameron
> wrote:
> >
> > On Sat, 20 Mar 2021 17:41:00 +
> > Jonathan Cameron wrote:
> >
> > > On Mon, 15 Mar 2021 09:58:08 +
> > > "Sa, Nuno" wrote:
> > >
> > > > > -Original
On Wed, Jan 06, 2021 at 02:55:40PM +0100, Martin Blumenstingl wrote:
> The legacy PCI interrupt lines need to be enabled using PCIE_APP_IRNEN
> bits 13 (INTA), 14 (INTB), 15 (INTC) and 16 (INTD). The old code however
> was taking (for example) "13" as raw value instead of taking BIT(13).
> Define t
On 23/03/2021 08.45, Oliver Hartkopp wrote:
> IMO we facing a compiler problem here - and we should be very happy that
> the BUILD_BUG_ON() triggered an issue after years of silence.
>
> I do not have a good feeling about what kind of strange effects this
> compiler issue might have in other code
On Mon, Mar 22, 2021 at 10:00:33PM +0200, Vladimir Oltean wrote:
> Hi Yunsheng,
>
> On Mon, Mar 22, 2021 at 05:09:16PM +0800, Yunsheng Lin wrote:
> > Currently pfifo_fast has both TCQ_F_CAN_BYPASS and TCQ_F_NOLOCK
> > flag set, but queue discipline by-pass does not work for lockless
> > qdisc beca
Am Di., 23. März 2021 um 03:46 Uhr schrieb Jiapeng Chong
:
>
> Fix the following coccicheck warnings:
>
> ./drivers/gpu/drm/etnaviv/etnaviv_gem_submit.c:622:2-8: WARNING: NULL
> check before some freeing functions is not needed.
>
> ./drivers/gpu/drm/etnaviv/etnaviv_gem_submit.c:618:2-8: WARNING: N
On Tue, Mar 16, 2021 at 04:36:57AM +0800, Hongren Zheng (Zenithal) wrote:
> The commit e0546fd8b748b19d8edd1550530da8ebad6e4b31 implemented device
> mode for user space tools, however the corresponding options are not
> documented in man page.
When referring to commits in the kernel, they should b
The following commit has been merged into the x86/urgent branch of tip:
Commit-ID: 8249d17d3194eac064a8ca5bc5ca0abc86feecde
Gitweb:
https://git.kernel.org/tip/8249d17d3194eac064a8ca5bc5ca0abc86feecde
Author:Isaku Yamahata
AuthorDate:Thu, 18 Mar 2021 13:26:57 -07:00
Committ
HW constraints are needed to set limitations for HW parameters used to
configure the DAIs. All DAIs on the same link must agree upon the HW
parameters, so the parameters are affected by the DAIs' features and
their limitations. In case of DPCM, the FE DAIs can be used to perform
different kind of c
Add a new struct snd_pcm_hw_constraints under struct snd_soc_dpcm_runtime.
The BE DAIs can use the new structure to add constraints that will not
affect the FE of the PCM and will only apply to BE HW parameters.
Signed-off-by: Codrin Ciubotariu
---
include/sound/pcm.h | 9
include
On Mon, Mar 22, 2021 at 03:49:02PM +0100, Miklos Szeredi wrote:
> Use the miscattr API to let the VFS handle locking, permission checking and
> conversion.
>
> Signed-off-by: Miklos Szeredi
> Cc: David Sterba
> ---
> fs/btrfs/ctree.h | 3 +
> fs/btrfs/inode.c | 4 +
> fs/btrfs/ioctl.c | 249
Apply the HW constraint rules added by the BE DAIs. The constraint rules
are applied after the fixup is called for the HW parameters. This way, if
the HW parameters do not correspond with the HW capabilities, the
constraint rules will return an error. The mask and the interval
constraints are the s
On 2021-03-22 18:46, Marc Zyngier wrote:
The new 'no_msi' attribute solves the problem of advertising the lack
of MSI capability for host bridges that know for sure that there will
be no MSI for their end-points.
However, there is a whole class of host bridges that cannot know
whether MSIs will
Hi Miquel,
On Tue, 23 Mar 2021 at 19:32, Miquel Raynal wrote:
> You can run nandbiterrs -i /dev/mtdX
>
> You'll see if there is ECC correction or not (and its level).
These are results I get for both of the nandbiterrs tests.
# nandbiterrs -i /dev/mtd1
incremental biterrors test
Successfully co
On Sun, Mar 21, 2021 at 07:45:29PM +0100, Thomas Hellström (Intel) wrote:
> To block fast gup we need to make sure TTM ptes are always special.
> With MIXEDMAP we, on architectures that don't support pte_special,
> insert normal ptes, but OTOH on those architectures, fast is not
> supported.
> At t
On Wed, Mar 17, 2021 at 05:50:22PM +0800, kernel test robot wrote:
> Hi Manish,
>
> Thank you for the patch! Perhaps something to improve:
>
> [auto build test WARNING on usb/usb-testing]
> [also build test WARNING on robh/for-next v5.12-rc3 next-20210316]
> [If your patch is applied to the wrong
Hi all.
It seems to me that the __submit_bio_noacct_mq() function incorrectly
processes the return code of the blk_crypto_bio_prep() function.
If the blk_crypto_bio_prep() function returns false, it means that
the processing of the bio request was completed with an error and
further processing of
When the blk_crypto_bio_prep() function returns false, the processing
of the bio request must end. Repeated access to blk_crypto_bio_prep()
for this same bio may lead to access to already released data, since in
this case the bio_endio() function was already called for bio.
The changes allow to le
From: Matthew Wilcox (Oracle)
Cachefiles was relying on wait_page_key and wait_bit_key being the
same layout, which is fragile. Now that wait_page_key is exposed in
the pagemap.h header, we can remove that fragility
A comment on the need to maintain structure layout equivalence was added by
Lin
Here are some patches to fix page waiting-related issues in cachefiles and
afs[1]:
(1) In cachefiles, remove the use of the wait_bit_key struct to access
something that's actually in wait_page_key format. The proper struct
is now available in the header, so that should be used instea
From: Matthew Wilcox (Oracle)
This is the killable version of wait_on_page_writeback.
Signed-off-by: Matthew Wilcox (Oracle)
Reviewed-by: Christoph Hellwig
Signed-off-by: David Howells
cc: linux-...@lists.infradead.org
cc: linux...@kvack.org
Link: https://lore.kernel.org/r/20210320054104.1300
From: Matthew Wilcox (Oracle)
Open-coding this function meant it missed out on the recent bugfix
for waiters being woken by a delayed wake event from a previous
instantiation of the page.
[DH: Changed the patch to use vmf->page rather than variable page which
doesn't exist yet upstream]
Fixes:
From: caizhichao
vaules -> values
Signed-off-by: Zhichao Cai
---
v3: use full name and capitalize personal name.
drivers/tty/serial/8250/8250_mtk.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/tty/serial/8250/8250_mtk.c
b/drivers/tty/serial/8250/8250_mtk.c
index
Maybe it's easier for us to understand the function of
check_kill_permission().
Signed-off-by: zhouchuangao
---
kernel/signal.c | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/kernel/signal.c b/kernel/signal.c
index f2a1b89..e6b6277 100644
--- a/kernel/signal.c
+++ b/ke
On Wed, Mar 03, 2021 at 06:49:44PM +0200, Andy Shevchenko wrote:
> The IRQ support for SCH GPIO is not specific to the Intel Quark SoC.
> Moreover the IRQ routing is quite interesting there, so while it's
> needs a special support, the driver haven't it anyway yet.
>
> Due to above remove basicall
On Mon, Mar 01, 2021 at 03:05:35PM +0200, Ruslan Bilovol wrote:
> This is extendend version of "UAC2 Feedback endpoint" patch set
> I've sent back in 2020 [1]. It is extended with
> bi-directional Volume/Mute controls support for both UAC1
> and UAC2 gadgets.
>
> It fixes issues with enumeration i
Am 22.03.21 um 09:13 schrieb Thomas Hellström (Intel):
Hi!
On 3/22/21 8:47 AM, Christian König wrote:
Am 21.03.21 um 19:45 schrieb Thomas Hellström (Intel):
To block fast gup we need to make sure TTM ptes are always special.
With MIXEDMAP we, on architectures that don't support pte_special,
On Mon, Mar 22, 2021 at 11:11:44PM +0200, Andy Shevchenko wrote:
> Either way ~0 will be in the correct byte order,
> hence drop unneeded cpu_to_le32() call. Moreover,
> it makes sparse happy, otherwise it complains:
>
> pch_udc.c:1813:27: warning: incorrect type in assignment (different base
> t
allmodconfig
x86_64 randconfig-a002-20210323
x86_64 randconfig-a003-20210323
x86_64 randconfig-a006-20210323
x86_64 randconfig-a001-20210323
x86_64 randconfig-a004-20210323
x86_64 randconfig-a005
allmodconfig
powerpc allnoconfig
x86_64 randconfig-a002-20210323
x86_64 randconfig-a003-20210323
x86_64 randconfig-a006-20210323
x86_64 randconfig-a001-20210323
x86_64 randconfig
On 23/03/2021 01:51, Vladimir Oltean wrote:
> From: Vladimir Oltean
>
> I have a system with DSA ports, and udhcpcd is configured to bring
> interfaces up as soon as they are created.
>
> I create a bridge as follows:
>
> ip link add br0 type bridge
>
> As soon as I create the bridge and udhcp
On Wed 2021-03-17 00:33:26, John Ogness wrote:
> @syslog_log was a raw_spin_lock to simplify the transition of
s/syslog_log/syslog_lock/
Same problem is also below.
> removing @logbuf_lock and the safe buffers. With that transition
> complete, @syslog_log can become a spin_lock.
I know that we
On Mon, Mar 22, 2021 at 11:03:11PM +, Matthew Wilcox wrote:
> On Mon, Mar 22, 2021 at 11:36:19PM +0100, Uladzislau Rezki wrote:
> > On Mon, Mar 22, 2021 at 07:38:20PM +, Matthew Wilcox (Oracle) wrote:
> > > If we're trying to allocate 4MB of memory, the table will be 8KiB in size
> > > (102
On 22/03/21 13:11, Greg KH wrote:
XILLYBUS and XILLYBUS_PCIE are currently enabled as M in several Linux
distributions. Making them depend on, rather than select XILLYBUS_CLASS is
likely to disable the driver in those distributions.
That's not an issue here, depends-on will allow those d
Thanks,
Reviewed-by: Jyri Sarha
for the series.
I'll merge these later today.
Best regards,
Jyri
On 2021-03-22 23:33, Dario Binacchi wrote:
The series was born from a patch to fix the LCD pixel clock setting.
Two additional patches have been added to this. One renames a
misleading
variable
This series enables future IP trace features Embedded Trace Extension
(ETE) and Trace Buffer Extension (TRBE). This series applies on
v5.12-rc4 + some patches queued. A standalone tree is also available here [0].
The queued patches (almost there) are included in this posting for
the sake of constru
tsb csync synchronizes the trace operation of instructions.
The instruction is a nop when FEAT_TRF is not implemented.
Cc: Mathieu Poirier
Cc: Mike Leach
Cc: Catalin Marinas
Cc: Will Deacon
Signed-off-by: Suzuki K Poulose
---
arch/arm64/include/asm/barrier.h | 1 +
1 file changed, 1 insertio
CoreSight PMU supports aux-buffer for the ETM tracing. The trace
generated by the ETM (associated with individual CPUs, like Intel PT)
is captured by a separate IP (CoreSight TMC-ETR/ETF until now).
The TMC-ETR applies formatting of the raw ETM trace data, as it
can collect traces from multiple ET
Currently we advertise the ID_AA6DFR0_EL1.TRACEVER for the guest,
when the trace register accesses are trapped (CPTR_EL2.TTA == 1).
So, the guest will get an undefined instruction, if trusts the
ID registers and access one of the trace registers.
Lets be nice to the guest and hide the feature to av
For a nvhe host, the EL2 must allow the EL1&0 translation
regime for TraceBuffer (MDCR_EL2.E2TB == 0b11). This must
be saved/restored over a trip to the guest. Also, before
entering the guest, we must flush any trace data if the
TRBE was enabled. And we must prohibit the generation
of trace while w
If the CPU implements Arm v8.4 Trace filter controls (FEAT_TRF),
move the ETM to trace prohibited region using TRFCR, while disabling.
Cc: Mathieu Poirier
Cc: Mike Leach
Cc: Anshuman Khandual
Reviewed-by: Mike Leach
Reviewed-by: Mathieu Poirier
Signed-off-by: Suzuki K Poulose
---
.../coresi
If a graph node is not found for a given node, of_get_next_endpoint()
will emit the following error message :
OF: graph: no port node found in /
If the given component doesn't have any explicit connections (e.g,
ETE) we could simply ignore the graph parsing. As for any legacy
component where thi
Allocate a byte for advertising the PMU specific format type
of the given AUX record. A PMU could end up providing hardware
trace data in multiple format in a single session.
e.g, The format of hardware buffer produced by CoreSight ETM
PMU depends on the type of the "sink" device used for collecti
From: Anshuman Khandual
This adds TRBE related registers and corresponding feature macros.
Cc: Mathieu Poirier
Cc: Mike Leach
Cc: Suzuki K Poulose
Reviewed-by: Suzuki K Poulose
Reviewed-by: Mike Leach
Reviewed-by: Mathieu Poirier
Acked-by: Catalin Marinas
Signed-off-by: Anshuman Khandual
When a sink is not specified by the user, the etm perf driver
finds a suitable sink automatically, based on the first ETM
where this event could be scheduled. Then we allocate the
sink buffer based on the selected sink. This is fine for a
CPU bound event as the "sink" is always guaranteed to be
rea
Disable guest access to the Trace Filter control registers.
We do not advertise the Trace filter feature to the guest
(ID_AA64DFR0_EL1: TRACE_FILT is cleared) already, but the guest
can still access the TRFCR_EL1 unless we trap it.
This will also make sure that the guest cannot fiddle with
the fil
tree: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
master
head: 84196390620ac0e5070ae36af84c137c6216a7dc
commit: baec970aa5ba11099ad7a91773350c91fb2113f0 mips: Add N64 machine type
date: 9 weeks ago
config: mips-randconfig-r014-20210323 (attached as .config)
compiler
The context associated with an ETM for a given perf event
includes :
- handle -> the perf output handle for the AUX buffer.
- the path for the trace components
- the buffer config for the sink.
The path and the buffer config are part of the "aux_priv" data
(etm_event_data) setup by the setup
ETE may not implement the OS lock and instead could rely on
the PE OS Lock for the trace unit access. This is indicated
by the TRCOLSR.OSM == 0b100. Add support for handling the
PE OS lock
Cc: Mike Leach
Reviewed-by: mike.leach
Reviewed-by: Mathieu Poirier
Signed-off-by: Suzuki K Poulose
---
Document the device tree bindings for Embedded Trace Extensions.
ETE can be connected to legacy coresight components and thus
could optionally contain a connection graph as described by
the CoreSight bindings.
Cc: devicet...@vger.kernel.org
Cc: Mathieu Poirier
Cc: Mike Leach
Cc: Rob Herring
Sig
Add ETE as one of the supported device types we support
with ETM4x driver. The devices are named following the
existing convention as ete.
ETE mandates that the trace resource status register is programmed
before the tracing is turned on. For the moment simply write to
it indicating TraceActive.
From: Anshuman Khandual
Add support for dedicated sinks that are bound to individual CPUs. (e.g,
TRBE). To allow quicker access to the sink for a given CPU bound source,
keep a percpu array of the sink devices. Also, add support for building
a path to the CPU local sink from the ETM.
This adds a
From: Anshuman Khandual
Add documentation for the TRBE under trace/coresight.
Cc: Jonathan Corbet
Cc: linux-...@vger.kernel.org
Reviewed-by: Mathieu Poirier
Signed-off-by: Anshuman Khandual
[ Split from the TRBE driver patch ]
Signed-off-by: Suzuki K Poulose
---
.../trace/coresight/coresig
Document the device tree bindings for Trace Buffer Extension (TRBE).
Cc: Anshuman Khandual
Cc: Mathieu Poirier
Cc: Rob Herring
Cc: devicet...@vger.kernel.org
Reviewed-by: Rob Herring
Signed-off-by: Suzuki K Poulose
---
.../devicetree/bindings/arm/trbe.yaml | 49 +++
M
From: Anshuman Khandual
Add sysfs ABI documentation for the TRBE devices.
Cc: Mathieu Poirier
Cc: Mike Leach
Cc: Jonathan Corbet
Cc: linux-...@vger.kernel.org
Reviewed-by: Mathieu Poirier
Signed-off-by: Anshuman Khandual
[ Split from the TRBE driver patch ]
Signed-off-by: Suzuki K Poulose
From: Anshuman Khandual
Trace Buffer Extension (TRBE) implements a trace buffer per CPU which is
accessible via the system registers. The TRBE supports different addressing
modes including CPU virtual address and buffer modes including the circular
buffer mode. The TRBE buffer is addressed by a b
On Mon, Mar 22, 2021 at 11:01:18PM +0530, Sandeep Maheswaram wrote:
> Adding suspend quirk function for dwc3 host which will be called
> during xhci suspend.
What does xhci have to do with this?
And where is the user of this quirk function in this series?
> Setting hs_phy_mode, ss_phy_mode , phy
On 2021-03-23 07:34, Yang Yingliang wrote:
When copy over 128 bytes, src/dst is added after
each ldp/stp instruction, it will cost more time.
To improve this, we only add src/dst after load
or store 64 bytes.
This breaks the required behaviour for copy_*_user(), since the fault
handler expects
On Tue, Mar 23, 2021 at 11:41AM +0100, Marco Elver wrote:
> On Tue, 23 Mar 2021 at 11:32, Peter Zijlstra wrote:
[...]
> > > + if (parent_event) {
> > > /*
> > > + * Remove event from parent, to avoid race where the
> > > +
On Mon, Mar 22, 2021 at 11:01:18PM +0530, Sandeep Maheswaram wrote:
> Adding suspend quirk function for dwc3 host which will be called
> during xhci suspend.
> Setting hs_phy_mode, ss_phy_mode , phy_power_off flags and phy mode
> during host suspend.
>
> Signed-off-by: Sandeep Maheswaram
> ---
>
On Tue, 2021-03-23 at 10:46 +0900, Tetsuo Handa wrote:
> On 2021/03/20 5:03, Mimi Zohar wrote:
> > The integrity's "iint_cache" is initialized at security_init(). Only
> > after an IMA policy is loaded, which is initialized at late_initcall,
> > is a file's integrity status stored in the "iint_cac
On Mon, Mar 22, 2021 at 11:01:17PM +0530, Sandeep Maheswaram wrote:
> Avoiding phy powerdown when wakeup capable devices are connected.
That says "what" (in a very abbreviated way), but not _WHY_ you want to
do this. Please fix this up.
thanks,
greg k-h
On Tue, Mar 23, 2021 at 11:53:22AM +, David Howells wrote:
>
> Here are some patches to fix page waiting-related issues in cachefiles and
> afs[1]:
>
> (1) In cachefiles, remove the use of the wait_bit_key struct to access
> something that's actually in wait_page_key format. The proper
On Mon, Mar 22, 2021 at 11:01:19PM +0530, Sandeep Maheswaram wrote:
> Configure interrupts based on hs_phy_mode to avoid triggering of
> interrupts during system suspend and suspends successfully.
> Set genpd active wakeup flag for usb gdsc if wakeup capable devices
> are connected so that wake up
From: Jian Dong
Fixes coccicheck error:
drivers/regulator/mt6360-regulator.c:388:8-33: ERROR:
drivers/regulator/pca9450-regulator.c:781:7-32: ERROR:
drivers/regulator/slg51000-regulator.c:480:8-33: ERROR:
drivers/regulator/qcom-labibb-regulator.c:364:8-33: ERROR:
Threaded IRQ with no primary han
Miguel Ojeda writes:
> Hi Michael,
>
> On Tue, Mar 23, 2021 at 4:27 AM Michael Ellerman wrote:
>>
>> Hi all,
>>
>> Here's a first attempt at getting the kernel Rust support building on
>> powerpc.
>
> Thanks a *lot*! It is great to have more architectures rolling.
No worries.
>> It's powerpc64
On 2021/3/23 19:28, Miaohe Lin wrote:
> On 2021/3/23 19:07, Alistair Popple wrote:
>> On Tuesday, 23 March 2021 9:26:43 PM AEDT David Hildenbrand wrote:
>>> On 20.03.21 10:36, Miaohe Lin wrote:
If the zone device page does not belong to un-addressable device memory,
the variable entry wil
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