When this was rewriten to get mainlined and start to
use 'linux/bitfield.h' headers, XTAL_MASK was wrong.
It must mask three bits but only two were used. Hence
properly fix it to make things work.
Fixes: d87da32372a0 ("phy: ralink: Add PHY driver for MT7621 PCIe PHY")
Signed-off-by: Sergio Paracue
On 2021/3/2 5:47 下午, Michael S. Tsirkin wrote:
On Mon, Mar 01, 2021 at 11:56:50AM +0800, Jason Wang wrote:
On 2021/3/1 5:34 上午, Michael S. Tsirkin wrote:
On Wed, Feb 24, 2021 at 10:24:41AM -0800, Si-Wei Liu wrote:
Detecting it isn't enough though, we will need a new ioctl to notify
the kerne
On Tue, Mar 2, 2021 at 10:51 AM Stefan Hajnoczi wrote:
> On Tue, Mar 02, 2021 at 10:42:06AM +0800, Jie Deng wrote:
> > > > +/*
> > > > + * Definitions for virtio I2C Adpter
> > > > + *
> > > > + * Copyright (c) 2021 Intel Corporation. All rights reserved.
> > > > + */
> > > > +
> > > > +#ifndef _U
On 3/2/21 11:50 AM, Dario Binacchi wrote:
> Hi Marc,
>
>> Il 01/03/2021 20:45 Marc Kleine-Budde ha scritto:
>>
>>
>> On 01.03.2021 18:21:42, Dario Binacchi wrote:
> @@ -730,7 +728,7 @@ static void c_can_do_tx(struct net_device *dev)
> while ((idx = ffs(pend))) {
> idx--;
On Wed, Feb 24, 2021 at 04:09:44PM +1300, Barry Song wrote:
> As long as NUMA diameter > 2, building sched_domain by sibling's child
> domain will definitely create a sched_domain with sched_group which will
> span out of the sched_domain:
>
>+--+ +--++-
tree: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
master
head: 7a7fd0de4a9804299793e564a555a49c1fc924cb
commit: eff8728fe69880d3f7983bec3fb6cea4c306261f vmlinux.lds.h: Add PGO and
AutoFDO input sections
date: 6 months ago
config: parisc-randconfig-s031-20210228 (attac
This patchset includes SiFive FU740 PCIe host controller driver. We also
add pcie_aux clock and pcie_power_on_reset controller to prci driver for
PCIe driver to use it.
This is tested with e1000e: Intel(R) PRO/1000 Network Card and SP M.2 PCIe
Gen 3 SSD in SiFive Unmatched.
Greentime Hu (5):
cl
We add pcie_aux clock in this patch so that pcie driver can use
clk_prepare_enable() and clk_disable_unprepare() to enable and disable
pcie_aux clock.
Signed-off-by: Greentime Hu
---
drivers/clk/sifive/fu740-prci.c | 11 +
drivers/clk/sifive/fu740-prci.h | 2 +-
Hello,
syzbot found the following issue on:
HEAD commit:2c87f7a3 Merge tag 'pwm/for-5.12-rc1' of git://git.kernel...
git tree: upstream
console output: https://syzkaller.appspot.com/x/log.txt?x=155a6632d0
kernel config: https://syzkaller.appspot.com/x/.config?x=eb762f1df8da5074
das
Hello Suzuki,
On 3/2/21 10:01 AM, Suzuki K Poulose wrote:
> Hi Alex
>
> On 3/1/21 4:32 PM, Alexandru Elisei wrote:
>> Hello Suzuki,
>>
>> On 2/25/21 7:35 PM, Suzuki K Poulose wrote:
>>> The nvhe hyp saves the SPE context, flushing any unwritten
>>
>> Perhaps that can be reworded to "The nVHE world
Add PCIe host controller DT bindings of SiFive FU740.
Signed-off-by: Greentime Hu
---
.../bindings/pci/sifive,fu740-pcie.yaml | 119 ++
1 file changed, 119 insertions(+)
create mode 100644 Documentation/devicetree/bindings/pci/sifive,fu740-pcie.yaml
diff --git a/Documenta
We use reset-simple in this patch so that pcie driver can use
devm_reset_control_get() to get this reset data structure and use
reset_control_deassert() to deassert pcie_power_up_rst_n.
Signed-off-by: Greentime Hu
---
drivers/clk/sifive/Kconfig | 2 ++
drivers/clk/sifive/sifive-prci.c | 1
From: Paul Walmsley
Add driver for the SiFive FU740 PCIe host controller.
This controller is based on the DesignWare PCIe core.
Co-developed-by: Henry Styles
Signed-off-by: Henry Styles
Co-developed-by: Erik Danie
Signed-off-by: Erik Danie
Co-developed-by: Greentime Hu
Signed-off-by: Greent
Signed-off-by: Greentime Hu
---
arch/riscv/boot/dts/sifive/fu740-c000.dtsi | 34 ++
1 file changed, 34 insertions(+)
diff --git a/arch/riscv/boot/dts/sifive/fu740-c000.dtsi
b/arch/riscv/boot/dts/sifive/fu740-c000.dtsi
index d1bb22b11920..d0839739b425 100644
--- a/arch/riscv/
On 2021-02-26 14:03, Nicolas Saenz Julienne wrote:
Some arm SMMU implementations might sit on a bus that doesn't support
64bit memory accesses. In that case default to using hi_lo_{readq,
writeq}() and BUG if such platform tries to use AArch64 formats as they
rely on writeq()'s atomicity.
Signed
On Tue, Mar 2, 2021 at 12:01 PM syzbot
wrote:
>
> Hello,
>
> syzbot found the following issue on:
>
> HEAD commit:5695e516 Merge tag 'io_uring-worker.v3-2021-02-25' of git:..
> git tree: upstream
> console output: https://syzkaller.appspot.com/x/log.txt?x=168c27f2d0
> kernel config:
Hello,
syzbot found the following issue on:
HEAD commit:5695e516 Merge tag 'io_uring-worker.v3-2021-02-25' of git:..
git tree: upstream
console output: https://syzkaller.appspot.com/x/log.txt?x=168c27f2d0
kernel config: https://syzkaller.appspot.com/x/.config?x=e33ab2de74f48295
das
Here add maintainer information for SiFive FU740 PCIe driver.
Signed-off-by: Greentime Hu
---
MAINTAINERS | 8
1 file changed, 8 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index bfc1b86e3e73..4da888be6e80 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -13592,6 +13592,14 @@ S:
Randy Dunlap writes:
> When neither CONFIG_PCI nor CONFIG_IBMVIO is enabled:
>
> ../arch/powerpc/kernel/iommu.c:178:30: error: 'fail_iommu_bus_notifier'
> defined but not used [-Werror=unused-variable]
> 178 | static struct notifier_block fail_iommu_bus_notifier = {
>
> If only that struct is b
--
Dear,
I had sent you a mail but i don't think you received it that's why am
writing you again.It is important you get back to me as soon as you
can.
AbdWabbo Maddah
This may sound like a contradiction but some SPI-NOR flashes really
support erasing their OTP region until it is finally locked. Having the
possibility to erase an OTP region might come in handy during
development.
The ioctl argument follows the OTPLOCK style.
Signed-off-by: Michael Walle
---
OT
Hello everyone,
On Mon, 1 Mar 2021 at 14:36, Fabrizio Castro
wrote:
>
> Hi Arnd,
>
> Thanks for your feedback!
>
> > From: Arnd Bergmann
> > Sent: 26 February 2021 10:38
> > Subject: Re: [PATCH 4/7] misc: Add driver for DAB IP found on Renesas R-
> > Car devices
> >
> > On Thu, Feb 25, 2021 at 1
On Tue, Mar 02, 2021 at 07:22:04AM +0100, Jiri Slaby wrote:
> These drivers check tty_unregister_driver return value. But they don't
> handle a failure correctly (they free the driver in any case). So stop
> checking tty_unregister_driver return value and remove also the prints.
>
> In the next pa
In TCODE_STREAM_DATA mode, on 32bit systems, the "sizeof(*e) +
request->length" operation can overflow leading to memory corruption.
Fixes: 18e9b10fcdc0 ("firewire: cdev: add closure to async stream ioctl")
Signed-off-by: Dan Carpenter
---
drivers/firewire/core-cdev.c | 3 +++
1 file changed, 3
__ext4_journalled_writepage should drop bhs' ref count on error paths
Signed-off-by: Zhaolong Zhang
---
fs/ext4/inode.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/fs/ext4/inode.c b/fs/ext4/inode.c
index 650c5acd2f2d..a79a9ea58c56 100644
--- a/fs/ext4/inode.c
+++ b/
Le 02/03/2021 à 10:53, Marco Elver a écrit :
On Tue, 2 Mar 2021 at 10:27, Christophe Leroy
wrote:
Le 02/03/2021 à 10:21, Alexander Potapenko a écrit :
[ 14.998426] BUG: KFENCE: invalid read in finish_task_switch.isra.0+0x54/0x23c
[ 14.998426]
[ 15.007061] Invalid read at 0x(ptrval):
[
Allow devm_reset_control_array_get() to get resets in a released state
in order to make it possible to extend reset-API with resource-managed
variants of retrieving resets array in a released state. In particular
this is needed by NVIDIA Tegra drivers.
Signed-off-by: Dmitry Osipenko
---
drivers/
The I2S reset may be asserted at a boot time, in particular this is the
case on Tegra20 AC100 netbook. Tegra20 I2S driver doesn't manage the
reset control and currently it happens to work because reset is implicitly
deasserted by the tegra-clk driver when I2S clock is enabled. The I2S
permanently s
The I2S reset may be asserted at a boot time. Tegra30 I2S driver doesn't
manage the reset control and currently it happens to work because reset
is implicitly deasserted by the Tegra AHUB driver, but the reset of I2C
controller should be synchronous and I2S clock is disabled when AHUB is
reset. Add
From: Werner Sembach
ALSA: hda/realtek: Add quirk for Intel NUC 10
This adds a new SND_PCI_QUIRK(...) and applies it to the Intel NUC 10
devices. This fixes the issue of the devices not having audio input and
output on the headset jack because the kernel does not recognize when
something is plug
Add devm_reset_control_array_get_exclusive_released() which is wanted by
NVIDIA Tegra drivers.
Signed-off-by: Dmitry Osipenko
---
include/linux/reset.h | 6 ++
1 file changed, 6 insertions(+)
diff --git a/include/linux/reset.h b/include/linux/reset.h
index 3bee086f1f06..ab240a8648ee 100644
On Tue, Mar 02, 2021 at 07:23:06AM +0200, Eli Cohen wrote:
> On Mon, Mar 01, 2021 at 10:33:14AM -0500, Michael S. Tsirkin wrote:
> > On Mon, Mar 01, 2021 at 03:52:45PM +0800, Jason Wang wrote:
> > >
> > > On 2021/3/1 2:28 下午, Eli Cohen wrote:
> > > > VIRTIO_F_VERSION_1 is a bit number. Use BIT_ULL
On 2021-02-26 14:02, Nicolas Saenz Julienne wrote:
Some devices might inadvertently sit on buses that don't support 64bit
MMIO access, and need a mechanism to query these limitations without
prejudice to other buses in the system (i.e. defaulting to 32bit access
system wide isn't an option).
Int
From: Eckhart Mohr
ALSA: hda/realtek: Add quirk for Clevo NH55RZQ
This applies a SND_PCI_QUIRK(...) to the Clevo NH55RZQ barebone. This
fixes the issue of the device not recognizing a pluged in microphone.
The device has both, a microphone only jack, and a speaker + microphone
combo jack. The c
Hi Qii,
On Wed, Feb 3, 2021 at 6:43 PM wrote:
>
> From: Qii Wang
>
> tSU,STA/tHD,STA/tSU,STOP maybe out of spec due to device
> clock-stretching or circuit loss, we could get device
> clock-stretch time from dts to adjust these parameters
> to meet the spec via EXT_CONF register.
>
> Signed-off-
On Tue, 02 Mar 2021 10:28:45 +,
Claudiu Beznea wrote:
>
> Add DT bindings for Microchip External Interrupt Controller.
>
> Signed-off-by: Claudiu Beznea
> ---
> .../interrupt-controller/mchp,eic.yaml| 74 +++
> 1 file changed, 74 insertions(+)
> create mode 100644
On Tue, Mar 02, 2021 at 01:51:42PM +0800, DENG Qingfang wrote:
> Since commit 7b9a2f4bac68 ("net: dsa: use ports list to find slave"),
> dsa_master_find_slave() has been iterating over a linked list instead
> of accessing arrays, making its time complexity O(n).
> The said function is called freque
Tegra20 AC97 driver doesn't manage the AC97 controller reset, relying on
implicit deassertion of the reset by tegra-clk driver, which needs to be
fixed since this behaviour is unacceptable by other Tegra drivers. Add
explicit reset control to the Tegra20 AC97 driver.
Note that AC97 reset was alway
On Tue, Mar 02, 2021 at 10:44:10AM +, Lee Jones wrote:
> On Tue, 02 Mar 2021, Leon Romanovsky wrote:
>
> > On Tue, Mar 02, 2021 at 09:31:09AM +, Lee Jones wrote:
> > > On Tue, 02 Mar 2021, Leon Romanovsky wrote:
> > >
> > > > From: Leon Romanovsky
> > > >
> > > > The W=1 allmodconfig build
Hi,
This series adds missing hardware reset controls to I2S and AC97 drivers.
Currently drivers happen to work properly because reset is implicitly
deasserted by tegra-clk driver, but clk driver shouldn't touch the resets
and we need to fix it because this breaks other Tegra drivers. Previously
we
Add decoder v4l2 control to set conceal color.
Signed-off-by: Stanimir Varbanov
---
.../media/v4l/ext-ctrls-codec.rst | 33 +++
drivers/media/v4l2-core/v4l2-ctrls.c | 9 +
include/uapi/linux/v4l2-controls.h| 1 +
3 files changed, 43 insertio
Hi everyone,
Any comments are welcome :).
Thanks,
Keqian
On 2021/1/26 20:44, Keqian Zhu wrote:
> The intention:
>
> On arm64 platform, we tracking dirty log of vCPU through guest memory abort.
> KVM occupys some vCPU time of guest to change stage2 mapping and mark dirty.
> This leads to heavy s
Hi,
The changes in v2 includes:
* reformat the table in documetation to define Bits for different
bit-depths of color formats.
regards,
Stan
Stanimir Varbanov (2):
v4l2-ctrl: Add decoder conceal color control
venus: vdec: Add support for conceal control
.../media/v4l/ext-ctrls-codec.rs
Adds support for decoder conceal color control.
Signed-off-by: Stanimir Varbanov
---
drivers/media/platform/qcom/venus/core.h | 1 +
drivers/media/platform/qcom/venus/hfi_cmds.c | 18 --
drivers/media/platform/qcom/venus/hfi_helper.h | 10 ++
drivers/media/platfo
On 2021/2/10 14:53, Miaohe Lin wrote:
> We could use pages_per_huge_page to get the number of pages per hugepage,
> use get_hstate_idx to calculate hstate index, and use hstate_is_gigantic
> to check if a hstate is gigantic to make code more succinct.
> > Signed-off-by: Miaohe Lin
friendly ping a
On 01/03/2021 19:37, Greg Kroah-Hartman wrote:
> This is the start of the stable review cycle for the 5.10.20 release.
> There are 661 patches in this series, all will be posted as a response
> to this one. If anyone has any issues with these being applied, please
> let me know.
>
> Responses sho
The PLLU (USB) consists of the PLL configuration itself and configuration
of the PLLU outputs. The PLLU programming is inconsistent on T30 vs T114,
where T114 immediately bails out if PLLU is enabled and T30 re-enables
a potentially already enabled PLL (left after bootloader) and then fully
reprogr
Zero clock rate doesn't make sense for PLLs and tegra-clk driver enters
into infinite loop on trying to calculate PLL parameters for zero rate.
Make code to error out if requested rate is zero.
Originally this trouble was found by Robert Yang while he was trying to
bring up upstream kernel on Sams
On 2021-02-26 14:03, Nicolas Saenz Julienne wrote:
arm-smmu can now deal with integrations on buses that don't support
64bit MMIO accesses. No need to create a special case for that on
Marvell's integration.
This breaks compatibility with existing DTs.
Robin.
Signed-off-by: Nicolas Saenz Jul
Peter and Prashant aren't actively maintaining Tegra clock driver anymore.
Jonathan and Thierry will pick up maintaining of the driver from now on.
Acked-by: Thierry Reding
Signed-off-by: Dmitry Osipenko
---
CREDITS | 6 ++
MAINTAINERS | 4 ++--
2 files changed, 8 insertions(+), 2 delet
This series fixes couple minor standalone problems of the Tegra clk
driver.
Changelog:
v3: - Added acks from Thierry Reding that he gave to v2.
- Added new patch "clk: tegra: Don't allow zero clock rate for PLLs".
v2: - Added these new patches:
clk: tegra: Halve SCLK rate on Tegra20
On Tue, 2 Mar 2021 at 12:21, Christophe Leroy
wrote:
[...]
> >> Booting with 'no_hash_pointers" I get the following. Does it helps ?
> >>
> >> [ 16.837198]
> >> ==
> >> [ 16.848521] BUG: KFENCE: invalid read in
> >> finish_task_
Higher SCLK rates on Tegra20 require high core voltage. The higher
clock rate may have a positive performance effect only for AHB DMA
transfers and AVP CPU, but both aren't used by upstream kernel at all.
Halve SCLK rate on Tegra20 in order to remove the high core voltage
requirement.
Acked-by: Th
On Tue, Mar 02, 2021 at 10:14:01AM +0100, Peter Zijlstra wrote:
> On Tue, Mar 02, 2021 at 10:52:52AM +0800, Feng Tang wrote:
> > @@ -1193,6 +1193,17 @@ static void __init check_system_tsc_reliable(void)
> > #endif
> > if (boot_cpu_has(X86_FEATURE_TSC_RELIABLE))
> > tsc_clocksource_
From: Wolfram Sang
[ Upstream commit c7b514ec979e23a08c411f3d8ed39c7922751422 ]
To avoid the HW race condition on R-Car Gen2 and earlier, we need to
write to ICMCR as soon as possible in the interrupt handler. We can
improve this by writing a static value instead of masking out bits.
Signed-off
The 600MHz is a too high clock rate for some SoC versions for the video
decoder hardware and this may cause stability issues. Use 300MHz for the
video decoder by default, which is supported by all hardware versions.
Fixes: ed1a2459e20c ("clk: tegra: Add Tegra20/30 EMC clock implementation")
Acked-
From: Kiwoong Kim
[ Upstream commit b1d0d2eb89d4e3a25b212a9d836587503537067e ]
The UniPro specification states that attribute IDs of the following
parameters are vendor-specific so some SoCs could have no regions at the
defined addresses:
- DME_LocalFC0ProtectionTimeOutVal
- DME_LocalTC0Repla
From: akshatzen
[ Upstream commit 5d28026891c7041deec08cc5ddd8f3abd90195e1 ]
Tag was not freed in NVMD get/set data request failure scenario. This
caused a tag leak each time a request failed.
Link: https://lore.kernel.org/r/20210109123849.17098-5-viswa...@microchip.com
Acked-by: Jack Wang
Sig
On Tue, Mar 2, 2021 at 10:06 AM Hillf Danton wrote:
>
> On Mar 2, 2021 at 16:40 Dmitry Vyukov wrote:
>
> >I hoped this would get at least into 5.12. syzbot can't start testing
>
> >arm32 because of this.
>
>
>
> Or what is more feasible is you send a fix to Jakub today.
So far I can't figure out
From: Daniel Baluta
Using a higher bitclk then expected doesn't always work.
Here is an example:
aplay -Dhw:0,0 -d 5 -r 48000 -f S24_LE -c 2 audio48k24b2c.wav
In this case, the required bitclk is 48000 * 24 * 2 = 2304000
but the closest bitclk that can be derived is 3072000. Since
the clock is
Add calls to disable the clock and unmap the timer base address in case
of any failures.
Reported-by: kernel test robot
Reported-by: Dan Carpenter
Signed-off-by: Dinh Nguyen
---
drivers/clocksource/dw_apb_timer_of.c | 26 +-
1 file changed, 21 insertions(+), 5 deletions
The refcounting of the gate clocks has a bug causing the enable_refcnt
to underflow when unused clocks are disabled. This happens because clk
provider erroneously bumps the refcount if clock is enabled at a boot
time, which it shouldn't be doing, and it does this only for the gate
clocks, while per
From: Wolfram Sang
[ Upstream commit 25c2e0fb5fefb8d7847214cf114d94c7aad8e9ce ]
'flags' and 'io' are needed first, so they should be at the beginning of
the private struct.
Signed-off-by: Wolfram Sang
Reviewed-by: Niklas Söderlund
Signed-off-by: Wolfram Sang
Signed-off-by: Sasha Levin
---
From: Alain Volmat
[ Upstream commit c64e7efe46b7de21937ef4b3594d9b1fc74f07df ]
We do not expect to receive spurious interrupts so rise a warning
if it happens.
RX overrun is an error condition that signals a corrupted RX
stream both in dma and in irq modes. Report the error and
abort the trans
From: Suravee Suthikulpanit
[ Upstream commit 6778ff5b21bd8e78c8bd547fd66437cf2657fd9b ]
Certain AMD platforms enable power gating feature for IOMMU PMC,
which prevents the IOMMU driver from updating the counter while
trying to validate the PMC functionality in the init_iommu_perf_ctr().
This re
From: Hans de Goede
[ Upstream commit fc6a31b00739356809dd566e16f2c4325a63285d ]
The ITE8568 EC on the Voyo Winpad A15 presents itself as an I2C-HID
attached keyboard and mouse (which seems to never send any events).
This needs the I2C_HID_QUIRK_NO_IRQ_AFTER_RESET quirk, otherwise we get
the fo
From: AngeloGioacchino Del Regno
[ Upstream commit 8f03c30cb814213e36032084a01f49a9e604a3e3 ]
The PC_DBG_ECO_CNTL register on the Adreno A5xx family gets
programmed to some different values on a per-model basis.
At least, this is what we intend to do here;
Unfortunately, though, this register i
From: Krzysztof Wilczyński
[ Upstream commit 42814c438aac79746d310f413a27d5b0b959c5de ]
The for_each_available_child_of_node helper internally makes use of the
of_get_next_available_child() which performs an of_node_get() on each
iteration when searching for next available child node.
Should an
On Mon, Mar 01, 2021 at 05:43:43PM +0200, James Clark wrote:
[...]
> > I'd like to propose to add a new field "cs_etm_queue::buf_rec_len", it
> > stands for the record length based on the RECORD_AUX event. In
> > theory, this value should be always less than "cs_etm_queue::buf_len".
> >
> > Whe
From: Nadeem Athani
[ Upstream commit 4740b969aaf58adeca6829947a3ad8da423976cf ]
Cadence controller will not initiate autonomous speed change if strapped
as Gen2. The Retrain Link bit is set as quirk to enable this speed change.
Link: https://lore.kernel.org/r/20210209144622.26683-3-nad...@cade
From: Athira Rajeev
[ Upstream commit d137845c973147a22622cc76c7b0bc16f6206323 ]
While sampling for marked events, currently we record the sample only
if the SIAR valid bit of Sampled Instruction Event Register (SIER) is
set. SIAR_VALID bit is used for fetching the instruction address from
Sampl
From: Bjorn Helgaas
[ Upstream commit b4c7d2076b4e767dd2e075a2b3a9e57753fc67f5 ]
The PCIe Bandwidth Change Notification feature logs messages when the link
bandwidth changes. Some users have reported that these messages occur
often enough to significantly reduce NVMe performance. GPUs also see
From: Aswath Govindraju
[ Upstream commit f6f1f8e6e3eea25f539105d48166e91f0ab46dd1 ]
A dummy zero bit is sent preceding the data during a read transfer by the
Microchip 93LC46B eeprom (section 2.7 of[1]). This results in right shift
of data during a read. In order to ignore this bit a quirk can
On Tuesday, 2 March 2021 7:52:53 PM AEDT Alistair Popple wrote:
> On Saturday, 27 February 2021 2:59:09 AM AEDT Christoph Hellwig wrote:
> > > - struct page *page = migration_entry_to_page(entry);
> > > + struct page *page = pfn_to_page(swp_offset(entry));
> >
> > I wonder if keepi
From: Theodore Ts'o
[ Upstream commit 027f14f5357279655c3ebc6d14daff8368d4f53f ]
If we try to make any changes via the journal between when the journal
is initialized, but before the multi-block allocated is initialized,
we will end up deferencing a NULL pointer when the journal commit
callback
From: Hans de Goede
[ Upstream commit c27f3d011b08540e68233cf56274fdc34bebb9b5 ]
ACPICA commit c9e0116952363b0fa815143dca7e9a2eb4fefa61
The handling of the generic_serial_bus (I2C) and GPIO op_regions in
acpi_ev_address_space_dispatch() passes a number of extra parameters
to the address-space h
From: AngeloGioacchino Del Regno
[ Upstream commit 785c02eb35009a4be6dbc68f4f7d916e90b7177d ]
In some rare occasions, we want to only set the RETAIN_MEM bit, but
not the RETAIN_PERIPH one: this is seen on at least SDM630/636/660's
GPU-GX GDSC, where unsetting and setting back the RETAIN_PERIPH b
From: Ronald Tschalär
[ Upstream commit 0ce1ac23149c6da939a5926c098c270c58c317a0 ]
The response to a command may never arrive or it may be corrupted (and
hence dropped) for some reason. While exceedingly rare, when it did
happen it blocked all further commands. One way to fix this was to
do a su
From: Arnd Bergmann
[ Upstream commit 38009c766725a9877ea8866fc813a5460011817f ]
The structleak plugin causes the stack frame size to grow immensely:
drivers/base/test/property-entry-test.c: In function 'pe_test_reference':
drivers/base/test/property-entry-test.c:481:1: error: the frame size of
From: Hans de Goede
[ Upstream commit b7c20f3815985570ac71c39b1a3e68c201109578 ]
The Acer Aspire Switch 10E (SW3-016)'s keyboard-dock uses the same USB-ids
as the Acer One S1003 keyboard-dock. Yet they are not entirely the same:
1. The S1003 keyboard-dock has the same report descriptors as the
From: Michael Ellerman
[ Upstream commit e3de1e291fa58a1ab0f471a4b458eff2514e4b5f ]
In commit bf13718bc57a ("powerpc: show registers when unwinding
interrupt frames") we changed our stack dumping logic to show the full
registers whenever we find an interrupt frame on the stack.
However we didn'
From: Andreas Larsson
[ Upstream commit bda166930c37604ffa93f2425426af6921ec575a ]
Commit cca079ef8ac29a7c02192d2bad2ffe4c0c5ffdd0 changed sparc32 to use
memblocks instead of bootmem, but also made high memory available via
memblock allocation which does not work together with e.g. phys_to_virt
From: Filipe Laíns
[ Upstream commit fab3a95654eea01d6b0204995be8b7492a00d001 ]
This new connection type is the new iteration of the Lightspeed
connection and will probably be used in some of the newer gaming
devices. It is currently use in the G Pro X Superlight.
This patch should be backporte
From: Oliver O'Halloran
[ Upstream commit 5537fcb319d016ce387f818dd774179bc03217f5 ]
On many powerpc platforms the discovery and initalisation of
pci_controllers (PHBs) happens inside of setup_arch(). This is very early
in boot (pre-initcalls) and means that we're initialising the PHB long
befor
From: Nicholas Piggin
[ Upstream commit 11cb0a25f71818ca7ab4856548ecfd83c169aa4d ]
If an unrecoverable system reset hits in process context, the system
does not have to panic. Similar to machine check, call nmi_exit()
before die().
Signed-off-by: Nicholas Piggin
Signed-off-by: Michael Ellerman
From: Daniel Latypov
[ Upstream commit cfd607e43da4a20753744f134e201310262b827a ]
* Stop leaking file objects.
* Use self.addCleanup() to ensure we call cleanup functions even if
setUp() fails.
* use mock.patch.stopall instead of more error-prone manual approach
Signed-off-by: Daniel Latypov
R
From: Lubomir Rintel
[ Upstream commit cec551ea0d41c679ed11d758e1a386e20285b29d ]
Reset ec_priv if probe ends unsuccessfully.
Signed-off-by: Lubomir Rintel
Link: https://lore.kernel.org/r/20210126073740.10232-2-lkund...@v3.sk
Reviewed-by: Hans de Goede
Signed-off-by: Hans de Goede
Signed-off
From: Sami Tolvanen
[ Upstream commit 6dafca97803309c3cb5148d449bfa711e41ddef2 ]
Select HAVE_OBJTOOL_MCOUNT if STACK_VALIDATION is selected to use
objtool to generate __mcount_loc sections for dynamic ftrace with
Clang and gcc <5 (later versions of gcc use -mrecord-mcount).
Signed-off-by: Sami
From: Khalid Aziz
[ Upstream commit 147d8622f2a26ef34beacc60e1ed8b66c2fa457f ]
When userspace calls mprotect() to enable ADI on an address range,
do_mprotect_pkey() calls arch_validate_prot() to validate new
protection flags. arch_validate_prot() for sparc looks at the first
VMA associated with
Hi Timur,
On Sun, Feb 14, 2021 at 5:17 PM Timur Tabi wrote:
> If the no_hash_pointers command line parameter is set, then
> printk("%p") will print pointers as unhashed, which is useful for
> debugging purposes. This change applies to any function that uses
> vsprintf, such as print_hex_dump() a
From: Martin Kaiser
[ Upstream commit a93c00e5f975f23592895b7e83f35de2d36b7633 ]
Fix a race where a pending interrupt could be received and the handler
called before the handler's data has been setup, by converting to
irq_set_chained_handler_and_data().
See also 2cf5a03cb29d ("PCI/keystone: Fix
On Fri, Feb 26, 2021 at 12:48:19PM +0100, Borislav Petkov wrote:
> Yah, as mentioned on IRC and let me paste it here too, you need to
> supply mode with O_CREAT:
>
> d = open(name, O_CREAT|O_RDWR|O_TRUNC,S_IRUSR);
>
> or so. Also you could add perror("open") to those error paths so that it
From: Hans de Goede
[ Upstream commit c27f3d011b08540e68233cf56274fdc34bebb9b5 ]
ACPICA commit c9e0116952363b0fa815143dca7e9a2eb4fefa61
The handling of the generic_serial_bus (I2C) and GPIO op_regions in
acpi_ev_address_space_dispatch() passes a number of extra parameters
to the address-space h
From: Andreas Larsson
[ Upstream commit bda166930c37604ffa93f2425426af6921ec575a ]
Commit cca079ef8ac29a7c02192d2bad2ffe4c0c5ffdd0 changed sparc32 to use
memblocks instead of bootmem, but also made high memory available via
memblock allocation which does not work together with e.g. phys_to_virt
On Tue, Mar 02, 2021 at 04:57:56PM +0800, Yang Li wrote:
> These functions always return '0' and no callers use the return
> value. So make it a void function.
The reasoning needs to go the other way around: you can make a function
return void iff all callees also return void and don't do BUG_ON i
From: AngeloGioacchino Del Regno
[ Upstream commit 785c02eb35009a4be6dbc68f4f7d916e90b7177d ]
In some rare occasions, we want to only set the RETAIN_MEM bit, but
not the RETAIN_PERIPH one: this is seen on at least SDM630/636/660's
GPU-GX GDSC, where unsetting and setting back the RETAIN_PERIPH b
From: Hans de Goede
[ Upstream commit fc6a31b00739356809dd566e16f2c4325a63285d ]
The ITE8568 EC on the Voyo Winpad A15 presents itself as an I2C-HID
attached keyboard and mouse (which seems to never send any events).
This needs the I2C_HID_QUIRK_NO_IRQ_AFTER_RESET quirk, otherwise we get
the fo
From: Ronald Tschalär
[ Upstream commit 0ce1ac23149c6da939a5926c098c270c58c317a0 ]
The response to a command may never arrive or it may be corrupted (and
hence dropped) for some reason. While exceedingly rare, when it did
happen it blocked all further commands. One way to fix this was to
do a su
From: Daniel Latypov
[ Upstream commit cfd607e43da4a20753744f134e201310262b827a ]
* Stop leaking file objects.
* Use self.addCleanup() to ensure we call cleanup functions even if
setUp() fails.
* use mock.patch.stopall instead of more error-prone manual approach
Signed-off-by: Daniel Latypov
R
From: Sami Tolvanen
[ Upstream commit 6dafca97803309c3cb5148d449bfa711e41ddef2 ]
Select HAVE_OBJTOOL_MCOUNT if STACK_VALIDATION is selected to use
objtool to generate __mcount_loc sections for dynamic ftrace with
Clang and gcc <5 (later versions of gcc use -mrecord-mcount).
Signed-off-by: Sami
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