Clean up i2c-amd-mp2-{pci,plat} drivers:
* Use pci_* logging functions provided by the kernel's PCI API.
* Remove unused macros.
* Remove useless __func__ from logging.
Changes since v1:
* Remove useless __func__ from logging.
* Assign pci_dev to local variable where applicable.
Changes since v2:
Use pci_{info,warn,err,dbg} functions of the kernel's PCI API.
Remove unnecessary ndev_pdev(), ndev_name() and ndev_dev() macros.
While at it, remove useless __func__ from logging.
Signed-off-by: Richard Neumann
Reviewed-by: Andy Shevchenko
---
drivers/i2c/busses/i2c-amd-mp2-pci.c | 55 +++
Remove unused work_amd_i2c_common() macro.
Signed-off-by: Richard Neumann
Reviewed-by: Andy Shevchenko
---
drivers/i2c/busses/i2c-amd-mp2.h | 3 ---
1 file changed, 3 deletions(-)
diff --git a/drivers/i2c/busses/i2c-amd-mp2.h b/drivers/i2c/busses/i2c-amd-mp2.h
index 6b91e285745d..ddecd0c88656
Hi Andy & others,
I was reversing some NT stuff recently and marveling over how wild and
crazy things are over in Windows-land. A few things related to process
creation caught my interest:
- It's possible to create a new process with an *arbitrary parent
process*, which means it'll then inherit v
On 2/1/21 6:23 AM, Peter Zijlstra wrote:
On Mon, Feb 01, 2021 at 10:50:58AM +0100, Peter Zijlstra wrote:
queued_spin_unlock arch/x86/include/asm/qspinlock.h:56 [inline]
lockdep_unlock+0x10e/0x290 kernel/locking/lockdep.c:124
debug_locks_off_graph_unlock kernel/locking/lockdep.c:165 [inlin
> +#define cxl_doorbell_busy(cxlm)
> \
> + (cxl_read_mbox_reg32(cxlm, CXLDEV_MB_CTRL_OFFSET) &\
> + CXLDEV_MB_CTRL_DOORBELL)
> +
> +#define CXL_MAILBOX_TIMEOUT_US 2000
You been using the spec for the values. Is that numbe
From: Gustavo A. R. Silva Sent: Monday, February 1,
2021 9:44 AM
>
> There is a regular need in the kernel to provide a way to declare having
> a dynamically sized set of trailing elements in a structure. Kernel code
> should always use "flexible array members"[1] for these cases. The older
> st
On 1/29/2021 11:26 AM, Namhyung Kim wrote:
Hello,
On Tue, Jan 26, 2021 at 5:06 PM Alexander Antonov
wrote:
Introduce helper functions to control PCIe root ports list.
These helpers will be used in the follow-up patch.
Signed-off-by: Alexander Antonov
---
[SNIP]
+static int iio_root_ports
On Mon, Feb 1, 2021 at 6:34 PM Marco Elver wrote:
>
> On Mon, 1 Feb 2021 at 17:50, Christoph Paasch
> > just a few days ago we found out that this also fixes a syzkaller
> > issue on MPTCP (https://github.com/multipath-tcp/mptcp_net-next/issues/136).
> > I confirmed that this patch fixes the issu
On 01/02/2021 14:08, Vlastimil Babka wrote:
> On 1/8/21 3:39 PM, Milan Broz wrote:
>> On 08/01/2021 14:41, Michal Hocko wrote:
>>> On Wed 06-01-21 16:20:15, Milan Broz wrote:
Hi,
we use mlockall(MCL_CURRENT | MCL_FUTURE) / munlockall() in cryptsetup code
and someone tried to use
> int execve_parent(int parent_pidfd, int root_dirfd, int cgroup_fd, int
> namespace_fd, const char *pathname, char *const argv[], char *const
> envp[]);
A variant on the same scheme would be:
int execve_remote(int pidfd, int root_dirfd, int cgroup_fd, int
namespace_fd, const char *pathname, char
On Mon, Feb 01, 2021 at 05:50:45PM +0100, Lukas Bulwahn wrote:
>
> Dwaipayan, there are two ways:
> - We build a bot listening to mailing lists and check. I like that
> implementation idea for various other checks.
> - Stephen Rothwell could include this as a check on linux-next and
> inform the g
On Mon, Feb 01, 2021 at 09:26:42AM +, Timon Baetz wrote:
> On Sun, 31 Jan 2021 18:28:40 +0100, Krzysztof Kozlowski wrote:
> > On Sat, Jan 30, 2021 at 05:30:14PM +, Timon Baetz wrote:
> > > Get regulator from parent device's node and extcon by name.
> > >
> > > Signed-off-by: Timon Baetz
>
Hi Sven, see below
> >
> > If lan743x_rx_init_ring_element fails to allocate an skb, Then
> > lan743x_rx_reuse_ring_element will be called.
> > But that function expects the skb is already allocated and dma mapped.
> > But the dma was unmapped above.
>
> Good catch. I think you're right, the skb
On Mon, Feb 1, 2021 at 6:54 PM Waiman Long wrote:
>
> On 2/1/21 6:23 AM, Peter Zijlstra wrote:
> > On Mon, Feb 01, 2021 at 10:50:58AM +0100, Peter Zijlstra wrote:
> >
> >>> queued_spin_unlock arch/x86/include/asm/qspinlock.h:56 [inline]
> >>> lockdep_unlock+0x10e/0x290 kernel/locking/lockdep.c
On Mon, Feb 01, 2021 at 03:48:10PM +0100, Andrea Parri (Microsoft) wrote:
> Andrea Parri (Microsoft) (4):
> x86/hyperv: Load/save the Isolation Configuration leaf
> Drivers: hv: vmbus: Restrict vmbus_devices on isolated guests
> Drivers: hv: vmbus: Enforce 'VMBus version >= 5.2' on isolated g
Hi,
On 01/02/21 16:38, Barry Song wrote:
> A tricky thing is that we shouldn't use the sgc of the 1st CPU of node2
> for the sched_group generated by grandchild, otherwise, when this cpu
> becomes the balance_cpu of another sched_group of cpus other than node0,
> our sched_group generated by gra
On Mon, Feb 01, 2021 at 05:56:06PM +, Michael Kelley wrote:
> From: Gustavo A. R. Silva Sent: Monday, February 1,
> 2021 9:44 AM
[...]
> > struct shutdown_msg_data {
> > --
> > 2.27.0
>
> Reviewed-by: Michael Kelley
Applied to hyperv-next. Thanks.
Wei.
On Mon, Feb 01, 2021 at 09:50:41AM -0800, Ben Widawsky wrote:
> On 21-02-01 12:41:36, Konrad Rzeszutek Wilk wrote:
> > > +static int cxl_mem_setup_regs(struct cxl_mem *cxlm)
> > > +{
> > > + struct device *dev = &cxlm->pdev->dev;
> > > + int cap, cap_count;
> > > + u64 cap_array;
> > > +
> > > + ca
Hi Benson,
On Thu, Jan 28, 2021 at 10:14 PM Benson Leung wrote:
>
> cros_typec_handle_sop_prime_disc now takes the PD revision provided
> by the EC_CMD_TYPEC_STATUS command response for the SOP'.
>
> Attach the properly formatted pd_revision to the cable desc before
> registering the cable.
>
> S
On Thu, Jan 28, 2021 at 10:14 PM Benson Leung wrote:
>
> Status provides sop_revision. Process it, and set it using the new
> setter in the typec class.
>
> Signed-off-by: Benson Leung
Reviewed-by: Prashant Malani
> ---
> drivers/platform/chrome/cros_ec_typec.c | 14 --
> 1 file ch
From: Chunyan Zhang
Add AMBA UCI id to support Cortex-A55(Ananke) and Cortex-A75(Promethus).
Signed-off-by: Bin Ji
Signed-off-by: Chunyan Zhang
Reviewed by: Mike Leach
Link: https://lore.kernel.org/r/20210118065549.197489-1-zhang.l...@gmail.com
Signed-off-by: Mathieu Poirier
---
drivers/hwt
From: Markus Elfring
A local variable was used only within an else branch.
Thus move the definition for the variable “cs_fwnode” into
the corresponding code block.
This issue was detected by using the Coccinelle software.
Signed-off-by: Markus Elfring
Link: https://lore.kernel.org/r/c1b09b27-9
From: Suzuki K Poulose
TRCSSPCICR is present only if all of the following are true:
TRCIDR4.NUMSSCC > n.
TRCIDR4.NUMPC > 0b .
TRCSSCSR.PC == 0b1
Add a helper function to check all the conditions.
Cc: Mike Leach
Signed-off-by: Suzuki K Poulose
Link: https://lore.ker
From: Suzuki K Poulose
Prepare the TPIU driver to make use of the CoreSight device access
abstraction layer. The driver touches the device even before the
coresight device is registered. Thus we could be accessing the
devices without a csdev. As we are about to use the abstraction
layer for acces
From: Suzuki K Poulose
When the ETM is affected by Qualcomm errata, modifying the
TRCPDCR could cause the system hang. Even though this is
taken care of during enable/disable ETM, the ETM state
save/restore could still access the TRCPDCR. Make sure
we skip the access during the save/restore.
Fou
From: Suzuki K Poulose
We are about to introduce support for sysreg access to ETMv4.4+
component. Since there are generic routines that access the
registers (e.g, CS_LOCK/UNLOCK , claim/disclaim operations, timeout)
and in order to preserve the logic of these operations at a
single place we intro
From: Suzuki K Poulose
Convert all register accesses from etm4x driver to use a wrapper
to allow switching the access at runtime with little overhead.
co-developed by sed tool ;-), mostly equivalent to :
s/readl\(_relaxed\)\?(drvdata->base + \(.*\))/etm4x_\1_read32(csdev, \2)
s/writel\(_relaxed
Good day Greg,
Please consider the following patches for inclusion in the coming v5.12 cycle.
Note that patches 11, 13 and 14 make checkpatch angry over the lack of
parentheses when defining complex macros but looking at the code I really don't
see how else it could be done.
Thanks,
Mathieu
From: Suzuki K Poulose
Convert the generic CLAIM tag management APIs to use the
device access layer abstraction.
Cc: Mike Leach
Signed-off-by: Suzuki K Poulose
Link: https://lore.kernel.org/r/20210110224850.1880240-7-suzuki.poul...@arm.com
Signed-off-by: Mathieu Poirier
---
drivers/hwtracing
From: Suzuki K Poulose
We rely on the ETM architecture version to decide whether
Secure EL2 is available on the CPU for excluding the level
for address comparators and viewinst main control register.
We must instead use the TRCDIDR3.EXLEVEL_S field to detect
the supported levels.
Signed-off-by:
From: Suzuki K Poulose
Convert the generic routines to use the new access abstraction layer
gradually, starting with coresigth_timeout.
Cc: Mike Leach
Signed-off-by: Suzuki K Poulose
Link: https://lore.kernel.org/r/20210110224850.1880240-6-suzuki.poul...@arm.com
Signed-off-by: Mathieu Poirier
From: Suzuki K Poulose
Define the fields of the DEVARCH register for identifying
a component as an ETMv4.x unit. Going forward, we use the
DEVARCH register for the component identification, rather
than the TRCIDR3.
Cc: Mike Leach
Signed-off-by: Suzuki K Poulose
Link: https://lore.kernel.org/r/
Hi Sakari,
On Mon, Feb 01, 2021 at 03:00:29PM +0200, Sakari Ailus wrote:
> Hi Jacopo,
>
> On Mon, Feb 01, 2021 at 09:54:40AM +0100, Jacopo Mondi wrote:
> > Hi Sakari,
> >
> > On Thu, Jan 14, 2021 at 06:04:24PM +0100, Jacopo Mondi wrote:
> > > One more iteration to squash in all the fixups sent in
On 2/1/21 4:38 AM, Vinod Koul wrote:
On 01-02-21, 15:58, Vinod Koul wrote:
On 26-01-21, 16:37, Bard Liao wrote:
struct sdw_master_prop {
u32 revision;
@@ -421,8 +422,11 @@ struct sdw_master_prop {
u32 err_threshold;
u32 mclk_freq;
bool hw_disabled;
+
Hi Greg,,
I need a few clarifications before sending (hopefully) final revisions to the
patch.
On 2021-01-31 11:45 p.m., Greg Kroah-Hartman wrote:
> On Sun, Jan 31, 2021 at 03:30:49PM -0800, Scott Branden wrote:
>> Correct compile issue if CONFIG_TTY is not set by
>> only adding ttyVK devices if
From: Suzuki K Poulose
In preparation to detect the support for system instruction
support, move the detection of the device access to the target
CPU.
Cc: Mike Leach
Signed-off-by: Suzuki K Poulose
Link: https://lore.kernel.org/r/20210110224850.1880240-19-suzuki.poul...@arm.com
Signed-off-by:
From: Suzuki K Poulose
etm4_get_access_type() calculates the exception level bits
for use in address comparator registers. This is also used
by the TRCVICTLR register by shifting to the required position.
This patch cleans up the logic to make etm4_get_access_type()
calculate a generic mask whic
From: Suzuki K Poulose
CoreSight ETM with system register access may not have a
memory mapped i/o access. Refactor the ETM specific probing
into a common routine to allow reusing the code for such ETMs.
Cc: Mike Leach
Signed-off-by: Suzuki K Poulose
Link: https://lore.kernel.org/r/202101102248
Let's update parts of our documentation for
/sys/devices/system/memory/memoryX/ properties, especially stating which
properties are nowadays legacy interfaces.
v1 -> v2:
- "drivers/base/memory: don't store phys_device in memory blocks"
-> Fix compile warning, also removing start_pfn from init_memo
No need to store the value for each and every memory block, as we can
easily query the value at runtime. Reshuffle the members to optimize the
memory layout. Also, let's clarify what the interface once was used for
and why it's legacy nowadays.
"phys_device" was used on s390x in older versions of
From: Suzuki K Poulose
Document the bindings for ETMs with system register accesses.
Cc: devicet...@vger.kernel.org
Cc: Mathieu Poirier
Cc: Mike Leach
Acked-by: Rob Herring
Signed-off-by: Suzuki K Poulose
Link: https://lore.kernel.org/r/20210110224850.1880240-27-suzuki.poul...@arm.com
Signed
On Thu, Jan 28, 2021 at 10:14 PM Benson Leung wrote:
>
> When SOP Discovery is done, set the opmode to PD if status indicates
> SOP is connected.
>
> SOP connected indicates a PD contract is in place, and is a solid
> indication we have transitioned to PD power negotiation, either as
> source or s
From: Suzuki K Poulose
TRCSTALLCTLR register is only implemented if
TRCIDR3.STALLCTL == 0b1
Make sure the driver touches the register only it is implemented.
Cc: sta...@vger.kernel.org
Cc: Mathieu Poirier
Cc: Mike Leach
Cc: Leo Yan
Signed-off-by: Suzuki K Poulose
Link: https://lore.kern
In commit 53cdc1cb29e8 ("drivers/base/memory.c: indicate all memory blocks
as removable") we changed the output of the "removable" property of memory
devices to return "1" if and only if the kernel supports memory offlining.
Let's update documentation, stating that the interface is legacy. Also
up
From: Jonathan Zhou
Add definitions for the Arm v8.4 SelfHosted trace extensions registers.
Acked-by: Catalin Marinas
Cc: Will Deacon
Signed-off-by: Jonathan Zhou
[ split the register definitions to separate patch
rename some of the symbols ]
Signed-off-by: Suzuki K Poulose
Link: https://l
From: Jonathan Zhou
v8.4 tracing extensions added support for trace filtering controlled
by TRFCR_ELx. This must be programmed to allow tracing at EL1/EL2 and
EL0. The timestamp used is the virtual time. Also enable CONTEXIDR_EL2
tracing if we are running the kernel at EL2.
Cc: Catalin Marinas
On 2/1/21 1:09 PM, Dmitry Vyukov wrote:
On Mon, Feb 1, 2021 at 6:54 PM Waiman Long wrote:
On 2/1/21 6:23 AM, Peter Zijlstra wrote:
On Mon, Feb 01, 2021 at 10:50:58AM +0100, Peter Zijlstra wrote:
queued_spin_unlock arch/x86/include/asm/qspinlock.h:56 [inline]
lockdep_unlock+0x10e/0x290
> +/**
> + * struct cxl_send_command - Send a command to a memory device.
> + * @id: The command to send to the memory device. This must be one of the
> + * commands returned by the query command.
> + * @flags: Flags for the command (input).
> + * @rsvd: Must be zero.
> + * @retval: Return value
On Mon, Feb 01, 2021 at 06:51:37PM +0100, Richard Neumann wrote:
> Use pci_{info,warn,err,dbg} functions of the kernel's PCI API.
> Remove unnecessary ndev_pdev(), ndev_name() and ndev_dev() macros.
> While at it, remove useless __func__ from logging.
>
> Signed-off-by: Richard Neumann
> Reviewed
On Mon, Feb 1, 2021 at 9:46 AM Oleg Nesterov wrote:
>
> Somehow I forgot about this problem. Let me resend the last version
> based on discussion with Linus. IIRC he was agree with this series.
Yeah, looks sane to me.
Linus
On Fri, Jan 29, 2021 at 04:24:32PM -0800, Ben Widawsky wrote:
> For drivers that moderate access to the underlying hardware it is
> sometimes desirable to allow userspace to bypass restrictions. Once
> userspace has done this, the driver can no longer guarantee the sanctity
> of either the OS or th
On Mon, Feb 1, 2021 at 10:18 AM Linus Torvalds
wrote:
>
> Yeah, looks sane to me.
Oh, and in a perfect world we'd have a test for this condition too, no?
Linus
On Mon, 1 Feb 2021 08:46:24 -0800
Ben Widawsky wrote:
> On 21-01-30 15:51:42, David Rientjes wrote:
> > On Fri, 29 Jan 2021, Ben Widawsky wrote:
> >
> > > diff --git a/drivers/cxl/cxl.h b/drivers/cxl/cxl.h
> > > new file mode 100644
> > > index ..d81d0ba4617c
> > > --- /dev/null
>
Hi All,
This series is a continuation of the effort to drop ACPICA-specific debug
code from non-ACPICA pieces of the ACPI subsystem and to make the message
printing in there more consistent.
The patches in this series are based on linux-next from today.
Details in the patch changelogs.
Thanks!
From: Rafael J. Wysocki
Replace the ACPI_DEBUG_PRINT() and ACPI_EXCEPTION() instances
in ac.c with acpi_handle_debug() and acpi_handle_info() calls,
respectively, drop the _COMPONENT and ACPI_MODULE_NAME() definitions
that are not used any more, drop the no longer needed ACPI_AC_COMPONENT
definit
On 2021-01-25 20:45:07 [+0100], To linux-kernel@vger.kernel.org wrote:
> The merge irqflags + preempt counter, v2.
>
> v1…v2:
> - Helper functions renamed.
> - Added patch #2 which inlines the helper functions.
>
a gentle ping.
Sebastian
From: Rafael J. Wysocki
Replace the ACPI_DEBUG_PRINT() instance in button.c with an
acpi_handle_debug() call, drop the _COMPONENT and ACPI_MODULE_NAME()
definitions that are not used any more, drop the no longer needed
ACPI_BUTTON_COMPONENT definition from the headers and update the
documentation
On Mon, Feb 01, 2021 at 08:20:44AM -0800, Rob Clark wrote:
> On Mon, Feb 1, 2021 at 3:16 AM Will Deacon wrote:
> >
> > On Fri, Jan 29, 2021 at 03:12:59PM +0530, Sai Prakash Ranjan wrote:
> > > On 2021-01-29 14:35, Will Deacon wrote:
> > > > On Mon, Jan 11, 2021 at 07:45:04PM +0530, Sai Prakash Ran
From: Rafael J. Wysocki
Replace the ACPI_DEBUG_PRINT() and ACPI_EXCEPTION() instances
in battery.c with acpi_handle_debug() and acpi_handle_info() calls,
respectively, drop the _COMPONENT and ACPI_MODULE_NAME() definitions
that are not used any more, drop the no longer needed
ACPI_BATTERY_COMPONE
From: Rafael J. Wysocki
Replace the ACPI_DEBUG_PRINT() instances in acpi_video.c with
acpi_handle_debug() calls and the ACPI_EXCEPTION()/ACPI_ERROR()/
ACPI_WARNING() instances in there with acpi_handle_info() calls.
Drop the _COMPONENT and ACPI_MODULE_NAME() definitions that are not
used any mor
On Mon, Feb 01, 2021 at 06:47:17PM +0100, Jason A. Donenfeld wrote:
> Hi Andy & others,
>
> I was reversing some NT stuff recently and marveling over how wild and
> crazy things are over in Windows-land. A few things related to process
> creation caught my interest:
>
> - It's possible to create
From: Rafael J. Wysocki
Replace the ACPI_DEBUG_PRINT() instances in thermal.c with
acpi_handle_debug() calls and modify the ACPI_THERMAL_TRIPS_EXCEPTION()
macro in there to use acpi_handle_info() internally.
Drop the _COMPONENT and ACPI_MODULE_NAME() definitions that are not
used any more from t
From: Suzuki K Poulose
As we are about define a switch..case table for individual register
access by offset for implementing the system instruction support,
document the possible set of registers for each group to make
it easier to correlate.
Cc: Mike Leach
Signed-off-by: Suzuki K Poulose
Link
On Fri, Jan 29, 2021 at 04:24:33PM -0800, Ben Widawsky wrote:
> The CXL memory device send interface will have a number of supported
> commands. The raw command is not such a command. Raw commands allow
> userspace to send a specified opcode to the underlying hardware and
> bypass all driver checks
On 2/1/21 9:50 AM, Srinivas Kandagatla wrote:
On 29/01/2021 19:33, Pierre-Louis Bossart wrote:
On 1/29/21 11:32 AM, Srinivas Kandagatla wrote:
In the existing code every soundwire register read and register write
are kinda blocked. Each of these are using a special command id that
what
On Fri, Jan 08, 2021 at 12:15:04PM +, Quentin Perret wrote:
> In preparation for enabling the creation of page-tables at EL2, factor
> all memory allocation out of the page-table code, hence making it
> re-usable with any compatible memory allocator.
>
> No functional changes intended.
>
> Si
From: Tom Lendacky
Under the GHCB specification, SEV-ES guests can support string I/O. The
current #VC handler contains this support, so remove the need to unroll
kernel string I/O operations. This will reduce the number of #VC
exceptions generated as well as the number VMEXITS for the guest.
Si
struct qcom_swrm_port_config {
u8 si;
u8 off1;
u8 off2;
u8 bp_mode;
+ u8 hstart;
+ u8 hstop;
+ u8 word_length;
+ u8 bgp_count;
I couldn't figure out what 'bgp' was and had to search. Not sure how
you came up with this abbreviation of "qcom,ports-block-gr
From: Suzuki K Poulose
As we are about to add support for system register based devices,
we don't get an AMBA pid. So, the detection code could check
the system registers running on the CPU to check for the architecture
specific features. Thus we move the arch feature detection to
run on the CPU.
From: Suzuki K Poulose
ETM v4.4 onwards adds support for system instruction access
to the ETM. Detect the support on an ETM and switch to using the
mode when available.
Cc: Mike Leach
Signed-off-by: Suzuki K Poulose
Link: https://lore.kernel.org/r/20210110224850.1880240-23-suzuki.poul...@arm.c
From: Suzuki K Poulose
Add support for devices with system instruction access only.
They don't have a memory mapped interface and thus are not
AMBA devices. System register access is not permitted to
TRCPDCR and thus skip access to them.
Cc: Mike Leach
Signed-off-by: Suzuki K Poulose
Link: htt
On Sun, Jan 31, 2021 at 5:08 PM Masahiro Yamada wrote:
>
> For the same reason as commit 51839e29cb59 ("scripts: switch explicitly
> to Python 3"), switch some more scripts, which I tested and confirmed
> working on Python 3.
>
> Signed-off-by: Masahiro Yamada
Thanks for the patch. It's time to
From: Suzuki K Poulose
As per the specification any update to the TRCPRGCTLR must be synchronized
by a context synchronization event (in our case an explicist ISB) before
the TRCSTATR is checked.
Cc: Mike Leach
Signed-off-by: Suzuki K Poulose
Link: https://lore.kernel.org/r/20210110224850.1880
From: Suzuki K Poulose
The Software lock is not implemented for system instructions
based accesses. So, skip the lock register access in such
cases.
Cc: Mike Leach
Signed-off-by: Suzuki K Poulose
Link: https://lore.kernel.org/r/20210110224850.1880240-15-suzuki.poul...@arm.com
Signed-off-by: Ma
From: Suzuki K Poulose
Some of the management registers in ETMv4.x are not accessible
via system register instructions. Thus we must hide the sysfs
files exposing them to the userspace, to prevent system crashes.
This patch adds an is_visible() routine to control the visibility
at runtime for th
From: Suzuki K Poulose
Expose the TRCDEVARCH register via the sysfs for component
detection. Given that the TRCIDR1 may not completely identify
the ETM component and instead need to use TRCDEVARCH, expose
this via sysfs for tools to use it for identification.
Cc: Mike Leach
Signed-off-by: Suzuk
From: Suzuki K Poulose
Some of the ETM management registers are not accessible via
system instructions. Thus we need to filter accesses to these
registers depending on the access mechanism for the ETM at runtime.
The driver can cope with this for normal operation, by regular
checks. But the drive
* Set SCP_INT1_MASK register, typically bus clash and
diff --git a/drivers/soundwire/intel.c b/drivers/soundwire/intel.c
index f7ba1a77a1df..c1fdc85d0a74 100644
--- a/drivers/soundwire/intel.c
+++ b/drivers/soundwire/intel.c
@@ -1286,7 +1286,8 @@ static int sdw_master_read_intel_prop(s
On Mon, Feb 1, 2021 at 9:47 AM Jason A. Donenfeld wrote:
>
> Hi Andy & others,
>
> I was reversing some NT stuff recently and marveling over how wild and
> crazy things are over in Windows-land. A few things related to process
> creation caught my interest:
>
> - It's possible to create a new proc
On Fri, Jan 29, 2021 at 04:24:37PM -0800, Ben Widawsky wrote:
> The Get Log command returns the actual log entries that are advertised
> via the Get Supported Logs command (0400h). CXL device logs are selected
> by UUID which is part of the CXL spec. Because the driver tries to
> sanitize what is s
NVMe driver and other applications may depend on the data offset
to operate correctly. Currently when unaligned data is mapped via
SWIOTLB, the data is mapped as slab aligned with the SWIOTLB. This
patch adds an option to make sure the mapped data preserves its
offset of the orginal addrss.
Withou
NVMe driver relies on the address offset to function properly.
This patch adds the offset preserve mask to NVMe driver when mapping
via dma_map_sg_attrs and unmapping via nvme_unmap_sg. The mask
depends on the page size defined by CC.MPS register of NVMe
controller.
Signed-off-by: Jianxiong Gao
-
Some devices rely on the address offset in a page to function
correctly (NVMe driver as an example). These devices may use
a different page size than the Linux kernel. The address offset
has to be preserved upon mapping, and in order to do so, we
need to record the page_offset_mask first.
Signed-o
From: Suzuki K Poulose
We have been using TRCIDR1 for detecting the ETM version. This
is in preparation for the future IP support.
Cc: Mike Leach
Signed-off-by: Suzuki K Poulose
Link: https://lore.kernel.org/r/20210110224850.1880240-20-suzuki.poul...@arm.com
Signed-off-by: Mathieu Poirier
---
On 2/1/21 4:42 AM, Vinod Koul wrote:
On 26-01-21, 16:37, Bard Liao wrote:
There is nothing we can do to handle the bus clash interrupt before
interrupt mask is enabled.
Signed-off-by: Bard Liao
Reviewed-by: Rander Wang
Reviewed-by: Pierre-Louis Bossart
---
drivers/soundwire/intel.c | 2
Yes, in this situation, it is fatal and we would turn off processing
anyway. But, Dan's change seems more appropriate and proper practice
(thxs for the patch).
Des
On Mon, Feb 1, 2021 at 9:31 AM Scott Branden wrote:
>
>
>
> On 2021-02-01 4:22 a.m., Dan Carpenter wrote:
> > Unlock before returni
Acked-by: Desmond Yan
On Mon, Feb 1, 2021 at 4:24 AM Dan Carpenter wrote:
>
> Unlock before returning on this error path.
>
> Fixes: 111d746bb476 ("misc: bcm-vk: add VK messaging support")
> Signed-off-by: Dan Carpenter
> ---
> drivers/misc/bcm-vk/bcm_vk_msg.c | 3 ++-
> 1 file changed, 2 inse
On Thu, Jan 28, 2021 at 02:48:15PM -0800, Axel Rasmussen wrote:
> This feature allows userspace to intercept "minor" faults. By "minor"
> faults, I mean the following situation:
>
> Let there exist two mappings (i.e., VMAs) to the same page(s) (shared
> memory). One of the mappings is registered w
Hi Jessica and Masahiro,
Could I get a final look at the latest patchset please? All the issues
have been addressed thus far.
Thanks,
Will
On Thu, Jan 21, 2021 at 1:36 PM Will McVicker wrote:
>
> Config MODULE_SCMVERSION introduces a new module attribute --
> `scmversion` -- which can be used t
For devices that need to preserve address offset on mapping through
swiotlb, this patch adds offset preserving based on page_offset_mask
and keeps the offset if the mask is non zero. This is needed for
device drivers like NVMe.
Signed-off-by: Jianxiong Gao
---
kernel/dma/swiotlb.c | 27 +
On 2/1/21 12:26 PM, Tom Lendacky wrote:
From: Tom Lendacky
Under the GHCB specification, SEV-ES guests can support string I/O. The
current #VC handler contains this support, so remove the need to unroll
kernel string I/O operations. This will reduce the number of #VC
exceptions generated as wel
On 2021-02-01 13:32:10 [-0500], Steven Rostedt wrote:
> Hi!
Hi,
> I'll let you know if your patches have any issues, but expect to seem a
> "for-next" post this week (if all goes well!).
Thanks for the update.
> -- Steve
Sebastian
On Mon, Feb 01, 2021 at 04:28:28PM +, Max Gurtovoy wrote:
> This patch doesn't change any logic but only align to the concept of
> vfio_pci_core extensions. Extensions that are related to a platform
> and not to a specific vendor of PCI devices should be part of the
> core driver. Extensions th
On Mon, 2021-02-01 at 19:16 +0100, Rafael J. Wysocki wrote:
> From: Rafael J. Wysocki
>
> Replace the ACPI_DEBUG_PRINT() and ACPI_EXCEPTION() instances
> in battery.c with acpi_handle_debug() and acpi_handle_info() calls,
> respectively, drop the _COMPONENT and ACPI_MODULE_NAME() definitions
> th
Just a heads-up, by chance I noticed that I can't re-insert a specific
driver on v5.11-rc6:
[ 64.356023] hisi_dma :7b:00.0: Adding to iommu group 31
[ 64.368627] hisi_dma :7b:00.0: enabling device ( -> 0002)
[ 64.384156] hisi_dma :7b:00.0: Failed to allocate MSI vectors!
[
On 21-02-01 13:18:45, Konrad Rzeszutek Wilk wrote:
> On Fri, Jan 29, 2021 at 04:24:32PM -0800, Ben Widawsky wrote:
> > For drivers that moderate access to the underlying hardware it is
> > sometimes desirable to allow userspace to bypass restrictions. Once
> > userspace has done this, the driver ca
On Mon, Feb 1, 2021 at 9:47 AM Oleg Nesterov wrote:
>
> The comment in get_nr_restart_syscall() says:
>
> * The problem is that we can get here when ptrace pokes
> * syscall-like values into regs even if we're not in a syscall
> * at all.
>
> Yes. but if we are not in sy
Hi Pavel,
On 27/01/2021 17:27, Pavel Tatashin wrote:
> Enable MMU during kexec relocation in order to improve reboot performance.
>
> If kexec functionality is used for a fast system update, with a minimal
> downtime, the relocation of kernel + initramfs takes a significant portion
> of reboot.
>
On Monday 01 Feb 2021 at 18:16:08 (+), Will Deacon wrote:
> On Fri, Jan 08, 2021 at 12:15:04PM +, Quentin Perret wrote:
> > In preparation for enabling the creation of page-tables at EL2, factor
> > all memory allocation out of the page-table code, hence making it
> > re-usable with any com
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