On Sun, Dec 06, 2020 at 06:07:08PM +0100, Pavel Machek wrote:
> Hi!
>
> > From: Lijun Pan
> >
> > [ Upstream commit 98025bce3a6200a0c4637272a33b5913928ba5b8 ]
> >
> > Commit 61d3e1d9bc2a ("ibmvnic: Remove netdev notify for failover resets")
> > excluded the failover case for notify call because
Hi,
On Fri, Dec 04, 2020 at 03:33:41PM +0800, Liu Ying wrote:
> The Northwest Logic MIPI DSI host controller embedded in i.MX8qxp
> works with a Mixel MIPI DPHY + LVDS PHY combo to support either
> a MIPI DSI display or a LVDS display. So, this patch calls
> phy_set_mode() from nwl_dsi_enable() to
One of the DMAs introduced with AM64 is the Block Copy DMA (BCDMA).
It serves similar purpose as K3 UDMAP channels in TR mode.
The rings for the BCDMA is integrated within the DMA itself instead of
using rings from the general purpose ringacc.
A BCDMA have two different type of channels:
- Block
Resource allocation via sysfw can use up to two ranges per resource subtype
to support more complex resource assignment, mainly for DMA channels.
Take the second range also into consideration when setting up the maps for
available resources.
Signed-off-by: Peter Ujfalusi
---
drivers/dma/ti/k3-u
If the DMA device supports per channel coherency configuration (a channel
can be configured to have coherent or not coherent view) then a single
device (the DMA controller's device) can not be used for dma_api for all
channels as channels can have different coherency.
Introduce custom_dma_mapping
Unlike UDMAP the BCDMA defines the channel TPL levels per channel type.
In UDMAP the number of high and ultra-high channels applies to both tchan
and rchan.
BCDMA defines the TPL per channel types: bchan, tchan and rchan can have
different number of high and ultra-high channels.
In order to suppo
From: Vignesh Raghavendra
This commit adds support for PKTDMA in k3-udma glue driver. Use new
psil_endpoint_config struct to get static data for a given channel or a
flow during setup. Make sure that the RX flows being mapped to a RX
channel is within the range of flows that is been allocated to
New binding document for
Texas Instruments K3 Block Copy DMA (BCDMA).
BCDMA is introduced as part of AM64.
Signed-off-by: Peter Ujfalusi
---
.../devicetree/bindings/dma/ti/k3-bcdma.yaml | 164 ++
1 file changed, 164 insertions(+)
create mode 100644 Documentation/devicetree/bin
Glue layer users should use the device of the DMA for DMA mapping and
allocations as it is the DMA which accesses to descriptors and buffers,
not the clients
Signed-off-by: Peter Ujfalusi
---
drivers/dma/ti/k3-udma-glue.c| 14 ++
drivers/dma/ti/k3-udma-private.c | 6 ++
driv
By using the dmaengine_get_dma_device() to get the device for
dma_api use, the dmatest can support per channel coherency if it is
supported by the DMA controller.
Signed-off-by: Peter Ujfalusi
---
drivers/dma/dmatest.c | 13 -
1 file changed, 8 insertions(+), 5 deletions(-)
diff --g
Additional fields needed for K3 PKTDMA to be able to handle the mapped
channels (channels are locked to handle specific threads) and flow ranges
for these mapped threads.
PKTDMA also introduces tflow for tx channels which can not be found in
K3 UDMA architecture.
Signed-off-by: Peter Ujfalusi
---
One of the DMAs introduced with AM64 is the Packet DMA (PKTDMA).
It serves similar purpose as K3 UDMAP channels in packet mode, but with
notable differences, like tflow support and channels being allocated to
service specific peripherals.
The rings for the PKTDMA is integrated within the DMA itself
Add initial PSI-L map file for AM64.
Signed-off-by: Peter Ujfalusi
---
drivers/dma/ti/Makefile | 3 +-
drivers/dma/ti/k3-psil-am64.c | 158 ++
drivers/dma/ti/k3-psil-priv.h | 1 +
drivers/dma/ti/k3-psil.c | 1 +
4 files changed, 162 insertions(+),
Client drivers should use the dmaengine_get_dma_device(chan) to get the
device pointer which should be used for DMA API for allocations and
mapping.
Signed-off-by: Peter Ujfalusi
---
Documentation/driver-api/dmaengine/client.rst | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --gi
Hi,
The series have build dependency on ti_sci/soc series (v2):
https://lore.kernel.org/lkml/20201008115224.1591-1-peter.ujfal...@ti.com/
Santosh kindly provided immutable branch and tag holding the series:
git://git.kernel.org/pub/scm/linux/kernel/git/ssantosh/linux-keystone.git
tags/drivers_so
In k3 architecture a DMA channel (in TR momde) can be triggered by global
events, origination from different modules.
The events for triggers can be sent from any module which is connected to
PSI-L fabric, but the event number to be sent is DMA channel specific, it
is only known after the channel
> On Mon, 2020-12-07 at 08:02 +, Avri Altman wrote:
> > > According to the JEDEC UFS 3.1 Spec, If
> > > fWriteBoosterBufferFlushDuringHibernate
> > > is set to one, the device flushes the WriteBooster Buffer data
> > > automatically
> > > whenever the link enters the hibernate (HIBERN8) state.
On Tue, Dec 08, 2020 at 08:57:49AM +, S.j. Wang wrote:
> > On Tue, Dec 08, 2020 at 08:44:51AM +, S.j. Wang wrote:
> > > > > > >
> > > > > > > On Mon, Dec 07, 2020 at 02:21:40PM +0100, Krzysztof Kozlowski
> > wrote:
> > > > > > > > On Mon, Dec 07, 2020 at 02:53:24PM +0800, Shengjiu Wang wrot
On Tue, Dec 8, 2020 at 10:19 AM Joel Stanley wrote:
>
> On Wed, 2 Dec 2020 at 05:16, John Wang wrote:
> >
> > From: Jae Hyun Yoo
> >
> > If LPC SNOOP driver is registered ahead of lpc-ctrl module, LPC
> > SNOOP block will be enabled without heart beating of LCLK until
> > lpc-ctrl enables the LC
Reviewed-by: Alex Shi
在 2020/12/8 上午6:09, Yu Zhao 写道:
> All other references to the function were removed after
> commit a892cb6b977f ("mm/vmscan.c: use update_lru_size() in
> update_lru_sizes()")
>
> Signed-off-by: Yu Zhao
> ---
> include/linux/mm_inline.h | 9 +
> 1 file changed, 1
Hi Lino,
On Tue, Dec 08, 2020 at 01:00:02AM +0100, Lino Sanfilippo wrote:
> On 07.12.20 at 14:52, Uwe Kleine-König wrote:
> > Given that the bcm2835 driver is quite trivial I would be happy to
> > create a series that "fixes" the driver to round down and provide a
> > prototype for pwm_round_neare
Hi Liu,
Since we now gain optional properties validation would become even more
useful. Could you look into converting to YAML before adding more
values?
Cheers,
-- Guido
On Fri, Dec 04, 2020 at 03:33:43PM +0800, Liu Ying wrote:
> Add support for Mixel MIPI DPHY + LVDS PHY combo IP
> as found on
Reviewed-by: Alex Shi
在 2020/12/8 上午6:09, Yu Zhao 写道:
> All other references to the function were removed after
> commit b910718a948a ("mm: vmscan: detect file thrashing at the reclaim root")
>
> Signed-off-by: Yu Zhao
> ---
> include/linux/mmzone.h | 2 --
> mm/vmscan.c| 3 ++-
>
Hello Clemens,
On Tue, Dec 08, 2020 at 12:13:44AM +0100, Clemens Gruber wrote:
> On Mon, Dec 07, 2020 at 11:00:25PM +0100, Uwe Kleine-König wrote:
> > On Mon, Dec 07, 2020 at 08:36:27PM +0100, Clemens Gruber wrote:
> > > The hardware readout may return slightly different values than those
> > > th
On Mon, 2020-12-07 at 15:24 -0600, Rob Herring wrote:
> On Wed, Nov 18, 2020 at 04:21:24PM +0800, Chunfeng Yun wrote:
> > Convert mediatek,mtk-xhci.txt to YAML schema mediatek,mtk-xhci.yaml
> >
> > Signed-off-by: Chunfeng Yun
> > ---
> > v3:
> > 1. fix yamllint warning
> > 2. remove pinctrl*
From: Waiman Long
> Sent: 07 December 2020 19:02
...
> > How much more difficult would it be to also add a timeout option?
> > I looked at adding one to the mutex code - and fell into a big pile
> > of replicated code.
> >
> > ISTM that one the initial locked exchange (and spin) fails a few
> > ext
Hi Krzysztof,
On Mon, Dec 7, 2020 at 8:00 PM Krzysztof Kozlowski wrote:
> The soc_dev_attr is stored soc_dev->attr during soc_device_register() so
> it could be used till the cleanup call: soc_device_unregister().
> Therefore this memory should not be freed prior, but after unregistering
> soc de
On Mon, Dec 07, 2020 at 10:51:44AM +0800, Jason Wang wrote:
>
> On 2020/12/6 下午6:57, Eli Cohen wrote:
> > Make sure to put write memory barrier after updating CQ consumer index
> > so the hardware knows that there are available CQE slots in the queue.
> >
> > Failure to do this can cause the upda
>
> The Cadence USBSS DRD Controller is a highly configurable IP Core which can
> be instantiated as Dual-Role Device (DRD), Peripheral Only and Host Only
> (XHCI)configurations.
>
> The current driver has been validated with FPGA burned. We have support for
> PCIe bus, which is used on FPGA pr
Reviewed-by: Alex Shi
在 2020/12/8 上午6:09, Yu Zhao 写道:
> update_lru_sizes() defines an unsigned long argument and passes it as
> nr_pages to update_lru_size(). Though this isn't causing any overflows
> I'm aware of, it's a bad idea to go through the demotion given that we
> have recently stumbled
On Mon, Dec 7, 2020 at 9:38 PM Enrico Weigelt, metux IT consult
wrote:
>
> Since we already have a few virtual GPIO drivers, and more to come,
> this category deserves its own submenu.
>
> changes v2: fixed menu title (replaced "devices" by "drivers")
> changes v3: added patch changelog
This shou
> + Peter, Pawel and Roger for their acks.
Applied, thanks.
Peter
>
> On 08/12/20 10:38 AM, Aswath Govindraju wrote:
> > I would like to help in reviewing CADENCE USB3 DRD IP DRIVER patches
> >
> > Signed-off-by: Aswath Govindraju
> > ---
> >
> > Resending the patch to add more viewers.
> >
>
From: Jae Hyun Yoo
If LPC SNOOP driver is registered ahead of lpc-ctrl module, LPC
SNOOP block will be enabled without heart beating of LCLK until
lpc-ctrl enables the LCLK. This issue causes improper handling on
host interrupts when the host sends interrupt in that time frame.
Then kernel eventu
Hello Sven,
On Mon, Dec 07, 2020 at 05:34:58PM -0500, Sven Van Asbroeck wrote:
> On Mon, Dec 7, 2020 at 5:00 PM Uwe Kleine-König
> wrote:
> >
> > This is not acceptable, if you have two PWM outputs and a consumer
> > modifies one of them the other must change. So if this chip only
> > supports a
Fixes: d558ce0ff0730 (ARM: dts: aspeed: Add LPC Snoop device)
Fixes: 12ce8bd361c72 (ARM: dts: aspeed-g6: Add lpc devices)
Signed-off-by: John Wang
---
v2:
reword: Add fixes lines
---
arch/arm/boot/dts/aspeed-g4.dtsi | 1 +
arch/arm/boot/dts/aspeed-g5.dtsi | 1 +
arch/arm/boot/dts/aspeed-g6.dts
On Mon, 2020-12-07 at 15:30 -0600, Rob Herring wrote:
> On Wed, Nov 18, 2020 at 04:21:25PM +0800, Chunfeng Yun wrote:
> > Convert mediatek,mtu3.txt to YAML schema mediatek,mtu3.yaml
> >
> > Signed-off-by: Chunfeng Yun
> > ---
> > v3:
> > 1. fix yamllint warning
> > 2. remove pinctrl* properti
Ard Biesheuvel wrote:
Ard Biesheuvel wrote:
> > > > I wonder if it would help if the input buffer and output buffer didn't
> > > > have to correspond exactly in usage - ie. the output buffer could be
> > > > used at a slower rate than the input to allow for buffering inside the
> > > > crypto a
Applied the patch as in attachment. Verified that ATS for GPU-Device had been
disabled. See attachment "dmesg_ATS.log".
Was running that build over night successfully.
-Original Message-
From: Merger, Edgar [AUTOSOL/MAS/AUGS]
Sent: Montag, 7. Dezember 2020 05:53
To: Deucher, Alexander ;
Sorry for the late reply.
On 11/25/20 at 10:42P, Masahiro Yamada wrote:
> On Tue, Nov 24, 2020 at 12:05 AM WANG Chao wrote:
> >
> > On 11/23/20 at 02:23P, Masahiro Yamada wrote:
> > > On Tue, Nov 3, 2020 at 3:23 PM WANG Chao wrote:
> > > >
> > > > extra-y target doesn't build for 'make M=...' si
The following commit has been merged into the x86/misc branch of tip:
Commit-ID: f77f420d34754b8d08ac6ebf094ff7193023196a
Gitweb:
https://git.kernel.org/tip/f77f420d34754b8d08ac6ebf094ff7193023196a
Author:Borislav Petkov
AuthorDate:Sat, 05 Dec 2020 01:19:45 +01:00
Committe
Although there is a runtime WARN_ON() when NR_IPR > max SGI, it had better
do the check during built time, and associate these related code together.
Signed-off-by: Pingfan Liu
Cc: Catalin Marinas
Cc: Will Deacon
Cc: Thomas Gleixner
Cc: Jason Cooper
Cc: Marc Zyngier
Cc: Mark Rutland
To: lin
>
> On Tue, Dec 08, 2020 at 08:57:49AM +, S.j. Wang wrote:
> > > On Tue, Dec 08, 2020 at 08:44:51AM +, S.j. Wang wrote:
> > > > > > > >
> > > > > > > > On Mon, Dec 07, 2020 at 02:21:40PM +0100, Krzysztof
> > > > > > > > Kozlowski
> > > wrote:
> > > > > > > > > On Mon, Dec 07, 2020 at 02:53
On 12/3/20 6:15 PM, Paolo Bonzini wrote:
> Until commit e7c587da1252 ("x86/speculation: Use synthetic bits for
> IBRS/IBPB/STIBP",
> 2018-05-17), KVM was testing both Intel and AMD CPUID bits before allowing the
> guest to write MSR_IA32_SPEC_CTRL and MSR_IA32_PRED_CMD. Testing only Intel
> bits
On Mon, Dec 07, 2020 at 09:30:42AM +0100, Pavel Machek wrote:
> Hi!
>
> > This is the start of the stable review cycle for the 4.19.162 release.
> > There are 32 patches in this series, all will be posted as a response
> > to this one. If anyone has any issues with these being applied, please
> >
Dear Linux folks,
Trying to reduce the boot time of standard distributions, I would like
to get rid of the initrd. The initrd is for mounting the root file
system and on most end user systems with standard distributions that
means loading the bus driver for the drive and the file system drive
Hi Liu,
some minor comments inline:
On Fri, Dec 04, 2020 at 03:33:44PM +0800, Liu Ying wrote:
> i.MX8qxp SoC embeds a Mixel MIPI DPHY + LVDS PHY combo which supports
> either a MIPI DSI display or a LVDS display. The PHY mode is controlled
> by SCU firmware and the driver would call a SCU firmwar
Hi Zhen,
On Fri, 2020-12-04 at 09:42 +0800, Zhen Lei wrote:
> The vendor prefix of "Hisilicon Limited" is "hisilicon", it is clearly
> stated in "vendor-prefixes.yaml".
>
> Fixes: 1527058736fa ("reset: hisilicon: add reset-hi3660")
> Fixes: 35ca8168133c ("arm64: dts: Add dts files for Hisilicon H
On Tue, Dec 01, 2020 at 08:08:38PM -0800, Badhri Jagan Sridharan wrote:
> TCPM at present lacks the notion of VSAFE0V. There
> are three vbus threshold levels that are critical to track:
> a. vSafe5V - VBUS “5 volts” as defined by the USB
> PD specification.
> b. vSinkD
On 2020/12/7 9:23, Gao Xiang wrote:
simplify try_to_claim_pcluster() by directly using cmpxchg() here
(the retry loop caused more overhead.) Also, move the chain loop
detection in and rename it to z_erofs_try_to_claim_pcluster().
Looks more clean.
Signed-off-by: Gao Xiang
Reviewed-by: Cha
On Tue, Dec 01, 2020 at 08:08:39PM -0800, Badhri Jagan Sridharan wrote:
> This change adds vbus_vsafe0v which when set, makes TCPM
> query for VSAFE0V by assigning the tcpc.is_vbus_vsafe0v callback.
> Also enables ALERT.ExtendedStatus which is triggered when
> status of EXTENDED_STATUS.vSafe0V chan
Hi John, thanks a lot for the reviews!
On Mon, Dec 07, 2020 at 01:56:53PM -0800, John Fastabend wrote:
> Brendan Jackman wrote:
> > A subsequent patch will add additional atomic operations. These new
> > operations will use the same opcode field as the existing XADD, with
> > the immediate discrim
On Tue, Dec 01, 2020 at 08:08:40PM -0800, Badhri Jagan Sridharan wrote:
> Unmask EXTENDED_STATUS_MASK.vSafe0V, ALERT.Extended_Status
> and set vbus_vsafe0v to enable VSAFE0V signalling.
>
> Signed-off-by: Badhri Jagan Sridharan
Acked-by: Heikki Krogerus
> ---
> Changes since v1:
> - Setting au
On Mon, Dec 07, 2020 at 07:34:40PM -0800, Kyung Min Park wrote:
> Enumerate AVX512 Half-precision floating point (FP16) CPUID feature
> flag. Compared with using FP32, using FP16 cut the number of bits
> required for storage in half, reducing the exponent from 8 bits to 5,
> and the mantissa from 2
On Fri, Dec 04, 2020 at 07:58:53AM +0100, Jiri Slaby wrote:
> On 02. 12. 20, 12:48, Johan Hovold wrote:
> >>> but I question the
> >>> usefulness of doing so, as it is a chicken and egg problem: one needs
> >>> to open the tty device in order to do termios ioctls on it, and if
> >>> that initial op
Hi all,
After merging the scsi-mkp tree, today's linux-next build (sparc64
defconfig) failed like this:
drivers/mtd/nand/raw/intel-nand-controller.c:17:10: fatal error:
linux/mtd/nand_ecc.h: No such file or directory
17 | #include
| ^~
Caused by commit
Hi deee Ho Linus,
Thanks (again) for taking a look at this! Highly appreciated :]
On Tue, 2020-12-08 at 09:54 +0100, Linus Walleij wrote:
> On Fri, Dec 4, 2020 at 1:41 PM Matti Vaittinen
> wrote:
>
> > The power-supply core supports concept of OCV (Open Circuit
> > Voltage) =>
> > SOC (State Of
On Tue, Dec 08, 2020 at 08:28:53PM +1100, Stephen Rothwell wrote:
> Hi all,
>
> After merging the scsi-mkp tree, today's linux-next build (sparc64
> defconfig) failed like this:
>
> drivers/mtd/nand/raw/intel-nand-controller.c:17:10: fatal error:
> linux/mtd/nand_ecc.h: No such file or directory
On 2020-12-08 09:21, Pingfan Liu wrote:
Although there is a runtime WARN_ON() when NR_IPR > max SGI, it had
better
do the check during built time, and associate these related code
together.
Signed-off-by: Pingfan Liu
Cc: Catalin Marinas
Cc: Will Deacon
Cc: Thomas Gleixner
Cc: Jason Cooper
On Mon, Dec 07, 2020 at 05:41:05PM -0800, Yonghong Song wrote:
>
>
> On 12/7/20 8:07 AM, Brendan Jackman wrote:
> > The BPF_FETCH field can be set in bpf_insn.imm, for BPF_ATOMIC
> > instructions, in order to have the previous value of the
> > atomically-modified memory location loaded into the s
Hi,
On 12/8/20 6:08 AM, Neftin, Sasha wrote:
> On 12/7/2020 17:41, Limonciello, Mario wrote:
>>> First of all thank you for working on this.
>>>
>>> I must say though that I don't like the approach taken here very
>>> much.
>>>
>>> This is not so much a criticism of this series as it is a criticis
If drivers work correctly, they should remain silent.
Signed-off-by: Enrico Weigelt, metux IT consult
---
drivers/usb/atm/cxacru.c | 3 ---
1 file changed, 3 deletions(-)
diff --git a/drivers/usb/atm/cxacru.c b/drivers/usb/atm/cxacru.c
index e62a770a5d3b..0114cc54e622 100644
--- a/drivers/usb/a
Since we already have the useful atm_info() macro, use it instead of
raw atm_printk()
Signed-off-by: Enrico Weigelt, metux IT consult
---
drivers/usb/atm/cxacru.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/usb/atm/cxacru.c b/drivers/usb/atm/cxacru.c
index 0
Since we have the nice helpers pr_err() and pr_warn(), use them instead
of raw printk().
Signed-off-by: Enrico Weigelt, metux IT consult
---
drivers/usb/atm/usbatm.c | 2 +-
drivers/usb/atm/xusbatm.c | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/usb/atm/usbatm.c
On Sat, Dec 05, 2020 at 06:38:27PM +0800, Wang Hai wrote:
> In gbaudio_dapm_free_controls(), if one of the widgets is not found, an error
> will be returned directly, which will cause the rest to be unable to be freed,
> resulting in leak.
>
> This patch fixes the bug. If if one of them is not fou
On Mon, Dec 07, 2020 at 05:38:36PM +0100, Thomas Gleixner wrote:
> For anything halfways modern the write to TSC is reflected in TSC_ADJUST
> which means you get the precise offset.
IIRC this is true for everything that has TSC_ADJUST.
As no one cares about the return value of blk_mq_tag_busy() and
__blk_mq_tag_busy(), so make them return void.
Signed-off-by: Xianting Tian
---
block/blk-mq-tag.c | 4 ++--
block/blk-mq-tag.h | 8
2 files changed, 6 insertions(+), 6 deletions(-)
diff --git a/block/blk-mq-tag.c b/block/
Hi Daniel,
On 12/7/20 7:05 PM, Daniel Lezcano wrote:
The actual code is silently ignoring a thermal zone update when a
driver is requesting it without a get_temp ops set.
That looks not correct, as the caller should not have called this
function if the thermal zone is unable to read the tempera
On Sat, Dec 5, 2020 at 9:15 PM Enrico Weigelt, metux IT consult
wrote:
> The virtio-gpio device/host can raise a signal on line state change.
> Kinda IRQ, but not actually running through real IRQs, instead by a
> message running though queue. (hmm, kida MSI ? :o).
>
> I've tried allocating an IR
On Wed, Dec 02, 2020 at 07:08:47PM -0800, Prashant Malani wrote:
> Add the Type C bus for plug alternate modes which are being
> registered via the Type C connector class. This ensures that udev events
> get generated when plug alternate modes are registered (and not just for
> partner/port alterna
Hi all,
On Tue, 8 Dec 2020 20:28:53 +1100 Stephen Rothwell
wrote:
>
> Hi all,
>
> After merging the scsi-mkp tree, today's linux-next build (sparc64
> defconfig) failed like this:
>
> drivers/mtd/nand/raw/intel-nand-controller.c:17:10: fatal error:
> linux/mtd/nand_ecc.h: No such file or dire
On Thu, Dec 03, 2020 at 02:08:13PM -0800, Utkarsh Patel wrote:
> When Intel PMC Mux agent driver receives the response message from PMC, it
> checks for the same response bits for all the mux states.
> Corrected it by checking correct response message bits, Bit 8 & 9 for the
> SAFE Mode and Alterna
On 08.12.20 10:24, Paul Menzel wrote:
> Similar to passing firmware and microcode update files to Linux or
> building these into the Linux kernel image, would it be possible to
> append the required modules to the Linux kernel image, and Linux would
> load these?
Indeed, yes it does. Just set the
On Mon, Dec 07, 2020 at 02:11:20PM +, Quentin Perret wrote:
> On Monday 07 Dec 2020 at 13:40:52 (+), Will Deacon wrote:
> > Why not use the RESERVEDMEM_OF_DECLARE() interface for the hypervisor
> > memory? That way, the hypervisor memory can either be statically partitioned
> > as a carveou
Hi all,
Today's linux-next merge of the akpm-current tree got conflicts in:
drivers/misc/lkdtm/Makefile
drivers/misc/lkdtm/lkdtm.h
tools/testing/selftests/lkdtm/tests.txt
between commit:
3ba150fb2120 ("lkdtm/powerpc: Add SLB multihit test")
from the powerpc tree and commit:
014a486e
On Tue, 2020-12-08 at 09:05 +, Avri Altman wrote:
> > "
> > If fWriteBoosterBufferFlushDuringHibernate ==0, device will not
> > flush
> > WB, even if you keep device as "active mode" and LINK in hibernate
> > state.
>
> OK, so what you are actually saying, is that since we are only
> toggling
On Mon, Dec 07, 2020 at 12:47:38PM +0530, Naresh Kamboju wrote:
> On Sun, 6 Dec 2020 at 17:14, Greg Kroah-Hartman
> wrote:
> >
> > This is the start of the stable review cycle for the 5.9.13 release.
> > There are 46 patches in this series, all will be posted as a response
> > to this one. If any
On Mon, Dec 07, 2020 at 07:55:32AM -0800, Guenter Roeck wrote:
> On Sun, Dec 06, 2020 at 12:17:08PM +0100, Greg Kroah-Hartman wrote:
> > This is the start of the stable review cycle for the 5.9.13 release.
> > There are 46 patches in this series, all will be posted as a response
> > to this one. I
On Tue, Dec 01, 2020 at 07:17:33PM -0800, Badhri Jagan Sridharan wrote:
> nRetryCount was updated from 3 to 2 between PD2.0 and PD3.0 spec.
> nRetryCount in "Table 6-34 Counter parameters" of the PD 2.0
> spec is set to 3, whereas, nRetryCount in "Table 6-59 Counter
> parameters" is set to 2.
>
>
On 12/8/20 10:32 AM, Enrico Weigelt, metux IT consult wrote:
Since we have the nice helpers pr_err() and pr_warn(), use them instead
of raw printk().
Signed-off-by: Enrico Weigelt, metux IT consult
Acked-by: Duncan Sands
---
drivers/usb/atm/usbatm.c | 2 +-
drivers/usb/atm/xusbatm.c |
On Wed, Dec 02, 2020 at 07:19:08PM -0800, Badhri Jagan Sridharan wrote:
> tcpm_check_send_discover does not clear the send_discover flag
> when any of the following conditions are not met.
> 1. data_role is TYPEC_HOST
> 2. link is pd_capable
>
> Discovery indentity would anyways not be attempted d
On 08.12.20 10:15, Bartosz Golaszewski wrote:
> On Mon, Dec 7, 2020 at 9:38 PM Enrico Weigelt, metux IT consult
> wrote:
>>
>> Since we already have a few virtual GPIO drivers, and more to come,
>> this category deserves its own submenu.
>>
>> changes v2: fixed menu title (replaced "devices" by "d
Hi Guido,
On Tue, 2020-12-08 at 10:02 +0100, Guido Günther wrote:
> Hi Liu,
> On Fri, Dec 04, 2020 at 03:33:40PM +0800, Liu Ying wrote:
> > Hi,
> >
> > This series adds i.MX8qxp LVDS PHY mode support for the Mixel PHY in the
> > Freescale i.MX8qxp SoC.
>
> This looks good to me from the NWL and
On Tue, Dec 8, 2020 at 5:31 PM Marc Zyngier wrote:
>
> On 2020-12-08 09:21, Pingfan Liu wrote:
> > Although there is a runtime WARN_ON() when NR_IPR > max SGI, it had
> > better
> > do the check during built time, and associate these related code
> > together.
> >
> > Signed-off-by: Pingfan Liu
>
Am 08.12.20 um 09:18 schrieb Martin Peres:
On 04/12/2020 18:51, Arnd Bergmann wrote:
From: Arnd Bergmann
ttm_pool_type_count() is not used when debugfs is disabled:
drivers/gpu/drm/ttm/ttm_pool.c:243:21: error: unused function
'ttm_pool_type_count' [-Werror,-Wunused-function]
static unsigne
From: SeongJae Park
In 'fqdir_exit()', a work for destruction of the 'fqdir' is enqueued.
The work function, 'fqdir_work_fn()', calls 'rcu_barrier()'. In case of
intensive 'fqdir_exit()' (e.g., frequent 'unshare(CLONE_NEWNET)'
systemcalls), this increased contention could result in unacceptably
On Tue, Oct 27, 2020 at 10:30:28PM +0530, Manivannan Sadhasivam wrote:
> Hello,
>
> This series adds PCIe support for Qualcomm SM8250 SoC with relevant PHYs.
> There are 3 PCIe instances on this SoC each with different PHYs. The PCIe
> controller and PHYs are mostly comaptible with the ones found
On Tue, 2020-12-08 at 10:07 +0100, Guido Günther wrote:
> Hi Liu,
> Since we now gain optional properties validation would become even more
> useful. Could you look into converting to YAML before adding more
> values?
Yes, a YAML one would be good.
I'll try to do the conversion and then add the bi
On Mon, Dec 07, 2020 at 06:41:41PM +0100, Thomas Gleixner wrote:
> Right this happens still occasionally, but for quite some time this is
> 100% firmware sillyness and not a fundamental property of the hardware
> anymore.
Ever since Nehalem (2008) TSC is synchronized on <= 2 sockets, and any
obse
On Mon, Dec 07, 2020 at 01:24:51PM -0800, Reinette Chatre wrote:
> How about:
> "Move the setting of the CPU on which a task is running in a CPU mask into a
> couple of helpers.
>
> There is no functional change. This is a preparatory change for the fix in
> the following patch from where the Fixe
On Tue, Dec 8, 2020 at 10:40 AM Enrico Weigelt, metux IT consult
wrote:
>
> On 08.12.20 10:15, Bartosz Golaszewski wrote:
> > On Mon, Dec 7, 2020 at 9:38 PM Enrico Weigelt, metux IT consult
> > wrote:
> >>
> >> Since we already have a few virtual GPIO drivers, and more to come,
> >> this category
On Mon, 7 Dec 2020 18:33:22 -0500
Steven Rostedt wrote:
>
> Hi Masami,
>
> You had comments on this patch for v2. Is this one fine for you?
Yes, this part is good for me. v2 [1/4] is separated into v3 [1/5] and [2/5].
Acked-by: Masami Hiramatsu
Thank you,
>
> -- Steve
>
>
> On Mon, 26 O
On Mon, 7 Dec 2020 at 22:48, Steven Price wrote:
>
> On 04/12/2020 08:25, Haibo Xu wrote:
> > On Fri, 20 Nov 2020 at 17:51, Steven Price wrote:
> >>
> >> On 19/11/2020 19:11, Marc Zyngier wrote:
> >>> On 2020-11-19 18:42, Andrew Jones wrote:
> On Thu, Nov 19, 2020 at 03:45:40PM +, Peter
On Tue, Dec 08, 2020 at 03:20:46PM +0800, Shuosheng Huang wrote:
> Add an Operating Performance Points table for the CPU cores to
> enable Dynamic Voltage & Frequency Scaling on the A100.
>
> Signed-off-by: Shuosheng Huang
> ---
> .../allwinner/sun50i-a100-allwinner-perf1.dts | 1 +
> .../dts/a
On Tue, Dec 08, 2020 at 03:21:38PM +0800, Shuosheng Huang wrote:
> Enable cpufreq for all CPU cores on a100.
>
> Signed-off-by: Shuosheng Huang
> ---
> .../allwinner/sun50i-a100-allwinner-perf1.dts| 16
> arch/arm64/boot/dts/allwinner/sun50i-a100.dtsi | 6 +++---
> 2 file
On Mon, Dec 7, 2020 at 10:12 PM Enrico Weigelt, metux IT consult
wrote:
> On 07.12.20 16:42, Andy Shevchenko wrote:
> > On Mon, Dec 7, 2020 at 1:29 PM Enrico Weigelt, metux IT consult
> > wrote:
> >>
> >> Since we already have a few virtual GPIO drivers, and more to come,
> >> this category deser
On 2020-12-08 09:43, Pingfan Liu wrote:
On Tue, Dec 8, 2020 at 5:31 PM Marc Zyngier wrote:
On 2020-12-08 09:21, Pingfan Liu wrote:
> Although there is a runtime WARN_ON() when NR_IPR > max SGI, it had
> better
> do the check during built time, and associate these related code
> together.
>
> S
Acked-by: Adam Ward
> -Original Message-
> From: Dan Carpenter
> Sent: 07 December 2020 17:56
> To: Support Opensource ; Adam Ward
>
> Cc: Liam Girdwood ; Mark Brown
> ; linux-kernel@vger.kernel.org; kernel-
> janit...@vger.kernel.org
> Subject: [PATCH] regulator: da9121: Potential Oops
The vmstat threshold is 32 (MEMCG_CHARGE_BATCH), so the type of s32
of lruvec_stat_cpu is enough. And introduce struct per_cpu_lruvec_stat
to optimize memory usage.
The size of struct lruvec_stat is 304 bytes on 64 bits system. As it
is a per-cpu structure. So with this patch, we can save 304 / 2
On Sun, Dec 06, 2020 at 10:33:09PM +0100, Thomas Gleixner wrote:
> On Sun, Dec 06 2020 at 17:38, Thomas Gleixner wrote:
> > On Fri, Dec 04 2020 at 18:43, Jerry Snitselaar wrote:
> >> Now that kstat_irqs is exported, get rid of count_interrupts in
> >> i915_pmu.c
> >
> > May I ask why this has been
On Sun, Dec 06, 2020 at 05:41:19PM +0100, Paul Kocialkowski wrote:
> Add documentation about the Allwinner system-control bindings used
> for the V3s SoC. The bindings are already in use in the device-tree
> files and produced warnings in dt bindings checks.
>
> Signed-off-by: Paul Kocialkowski
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