From: Min Li
Remove write phase mode 5 second setup delay, not needed.
Signed-off-by: Min Li
---
drivers/ptp/ptp_clockmatrix.c | 22 --
drivers/ptp/ptp_clockmatrix.h | 1 -
2 files changed, 23 deletions(-)
diff --git a/drivers/ptp/ptp_clockmatrix.c b/drivers/ptp/ptp_clock
On 11/12, Chao Yu wrote:
> On 2020/11/12 13:40, Jaegeuk Kim wrote:
> > Light reported sometimes shinker gets nat_cnt < dirty_nat_cnt resulting in
> > wrong do_shinker work. Let's avoid to get stale data by using nat_tree_lock.
> >
> > Reported-by: Light Hsieh
> > Signed-off-by: Jaegeuk Kim
> > -
On Tue, Nov 17, 2020 at 5:07 PM Lee Jones wrote:
> On Tue, 17 Nov 2020, Matthias Brugger wrote:
> > On 17/11/2020 13:37, Lee Jones wrote:
> > > On Tue, 17 Nov 2020, Matthias Brugger wrote:
> >
> > If you want to go the route for me rebasing my tree on top of for-mfd-next
> > then I'd like to have
On Tue, Nov 17, 2020 at 2:02 PM Dan Scally wrote:
>
> On 16/11/2020 16:16, Andy Shevchenko wrote:
> > On Mon, Nov 16, 2020 at 02:15:01PM +, Dan Scally wrote:
> >> On 16/11/2020 14:10, Laurent Pinchart wrote:
> >>> I thought we were looking for ACPI devices, not companion devices, in
> >>> orde
-r005-20201117 (attached as .config)
compiler: arceb-elf-gcc (GCC) 9.3.0
reproduce (this is a W=1 build):
wget
https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O
~/bin/make.cross
chmod +x ~/bin/make.cross
#
https://git.kernel.org/pub/scm/linux/kernel
On Tue, Nov 17, 2020 at 5:45 PM Enrico Weigelt, metux IT consult
wrote:
>
> The of_match_ptr(foo) macro evaluates to foo, only if
> CONFIG_OF is set, otherwise to NULL. Same does ACPI_PTR with
> CONFIG_ACPI. That's very helpful for drivers that can be used
> with or without oftree / acpi.
>
> Even
On Wed, Nov 11, 2020 at 03:53:22PM +0100, David Hildenbrand wrote:
> Suggested-by: Michal Hocko
> Cc: Michael Ellerman
> Cc: Benjamin Herrenschmidt
> Cc: Paul Mackerras
> Cc: Rashmica Gupta
> Cc: Andrew Morton
> Cc: Mike Rapoport
> Cc: Michal Hocko
> Cc: Oscar Salvador
> Cc: Wei Yang
> Si
On Sun, 15 Nov 2020 20:21:38 +0100
Maximilian Luz wrote:
> Add trace points to the Surface Aggregator subsystem core. These trace
> points can be used to track packets, requests, and allocations. They are
> further intended for debugging and testing/validation, specifically in
> combination with
On Tue, Nov 17, 2020 at 03:16:20PM +0100, Stefano Garzarella wrote:
> On Tue, Nov 17, 2020 at 11:11:21AM +, Stefan Hajnoczi wrote:
> > On Fri, Nov 13, 2020 at 02:47:04PM +0100, Stefano Garzarella wrote:
> > > +static void vdpasim_blk_work(struct work_struct *work)
> > > +{
> > > + struct vdpasi
On 11/17/20 5:03 PM, Guennadi Liakhovetski wrote:
> On Tue, Nov 17, 2020 at 12:42:30PM +0100, Arnaud POULIQUEN wrote:
>
> [snip]
>
>> diff --git a/drivers/rpmsg/rpmsg_ns.c b/drivers/rpmsg/rpmsg_ns.c
>> index 5bda7cb44618..80c2cc23bada 100644
>> --- a/drivers/rpmsg/rpmsg_ns.c
>> +++ b/drivers/r
On 11/17/20 8:00 AM, kernel test robot wrote:
on test machine: 4 threads Intel(R) Core(TM) i5-6500 CPU @ 3.20GHz with 32G
memory
caused below changes (please refer to attached dmesg/kmsg for entire
log/backtrace):
If you fix the issue, kindly add following tag
Reported-by: kernel test robot
page->lru bit 0 can tell whether the page is
avtive page or not.
page->lru bit 1 can tell whether the page is
file page or not.
Signed-off-by: Hui Su
---
include/linux/mmzone.h | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/include/linux/mmzone.h b/include/linux/mmzone.h
On Tue, Nov 17, 2020 at 6:45 PM Andy Shevchenko
wrote:
> On Tue, Nov 17, 2020 at 5:45 PM Enrico Weigelt, metux IT consult
> wrote:
> >
> > The of_match_ptr(foo) macro evaluates to foo, only if
> > CONFIG_OF is set, otherwise to NULL. Same does ACPI_PTR with
> > CONFIG_ACPI. That's very helpful fo
Set DMA mask to 32-bit while allocating the MSI target address so that
the address is usable for both 32-bit and 64-bit MSI capable devices.
Throw a warning if it fails to set the mask to 32-bit to alert that
devices that are only 32-bit MSI capable may not work properly.
Signed-off-by: Vidya Saga
On Mon, Oct 26, 2020 at 06:05:18PM +0200, Topi Miettinen wrote:
> Writing a new value of 3 to /proc/sys/kernel/randomize_va_space
> enables full randomization of memory mappings created with mmap(NULL,
> ...). With 2, the base of the VMA used for such mappings is random,
> but the mappings are crea
On Wed, Nov 18, 2020 at 12:49:19AM +0800, Hui Su wrote:
> page->lru bit 0 can tell whether the page is
> avtive page or not.
> page->lru bit 1 can tell whether the page is
> file page or not.
>
> Signed-off-by: Hui Su
> ---
> include/linux/mmzone.h | 4 ++--
> 1 file changed, 2 insertions(+), 2
On Tue, Nov 17, 2020 at 08:56:23AM +0100, Alexandre Chartre wrote:
> The main goal of ASI is to provide KVM address space isolation to
> mitigate guest-to-host speculative attacks like L1TF or MDS.
Because the current L1TF and MDS mitigations are lacking or why?
> Current proposal of ASI is plugg
The below call stack prevents clk_gating at every IO completion.
We can remove the condition, ufshcd_any_tag_in_use(), since clkgating_work
will check it again.
ufshcd_complete_requests(struct ufs_hba *hba)
ufshcd_transfer_req_compl()
__ufshcd_transfer_req_compl()
__ufshcd_release(hba)
From: Jaegeuk Kim
This adds user-friendly tracepoints with group id.
Signed-off-by: Jaegeuk Kim
Reviewed-by: Can Guo
---
drivers/scsi/ufs/ufshcd.c | 6 --
include/trace/events/ufs.h | 21 +
2 files changed, 21 insertions(+), 6 deletions(-)
diff --git a/drivers/scsi/
Once UFS was gated with CLKS_OFF, it should not call REQ_CLKS_OFF again, which
caused hibern8_enter failure.
Signed-off-by: Jaegeuk Kim
---
drivers/scsi/ufs/ufshcd.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/scsi/ufs/ufshcd.c b/drivers/scsi/ufs/ufshcd.c
index
.snip..
> > > > Lets break this down:
> > > >
> > > > How does the performance improve for one single device if you increase
> > > > the SWIOTLB?
> > > > Is there a specific device/driver that you can talk about that improve
> > > > with this patch?
> > > >
> > > >
> > >
> > > Yes, these are
From: Jaegeuk Kim
In order to conduct FFU or RPMB operations, UFS needs to clear UAC. This patch
clears it explicitly, so that we could get no failure given early execution.
Signed-off-by: Jaegeuk Kim
---
drivers/scsi/ufs/ufshcd.c | 70 +++
drivers/scsi/ufs/
On Tue, Nov 17, 2020 at 5:38 PM Bjorn Helgaas wrote:
>
> [+to Rafael, author of the commit you mentioned,
> +cc Mika, Kai Heng, Lukas, linux-pm, linux-kernel]
>
> On Tue, Nov 17, 2020 at 04:56:09PM +0100, Heiner Kallweit wrote:
> > More than 10 yrs ago Runtime PM was disabled per default by bb910a
On Tue, Nov 17, 2020 at 05:44:05PM +0100, Arnaud POULIQUEN wrote:
>
>
> On 11/17/20 5:03 PM, Guennadi Liakhovetski wrote:
> > On Tue, Nov 17, 2020 at 12:42:30PM +0100, Arnaud POULIQUEN wrote:
> >
> > [snip]
> >
> >> diff --git a/drivers/rpmsg/rpmsg_ns.c b/drivers/rpmsg/rpmsg_ns.c
> >> index 5bd
From: Leo Liou
We have lba and length for unmap commands.
Signed-off-by: Leo Liou
Reviewed-by: Stanley Chu
Signed-off-by: Jaegeuk Kim
---
drivers/scsi/ufs/ufshcd.c | 5 +
1 file changed, 5 insertions(+)
diff --git a/drivers/scsi/ufs/ufshcd.c b/drivers/scsi/ufs/ufshcd.c
index 86c8dee01ca
Change log from v4:
- add more fixes
Change log from v3:
- use __ufshcd_release with a fix in __ufshcd_release
Change log from v2:
- use active_req-- instead of __ufshcd_release to avoid UFS timeout
Change log from v1:
- remove clkgating_enable check in __ufshcd_release
- use __uhfshcd_rele
From: Jaegeuk Kim
Must have WQ_MEM_RECLAIM
``WQ_MEM_RECLAIM``
All wq which might be used in the memory reclaim paths **MUST**
have this flag set. The wq is guaranteed to have at least one
execution context regardless of memory pressure.
Signed-off-by: Jaegeuk Kim
Reviewed-by: Asutosh Das
On Tue, Nov 17, 2020 at 08:47:08AM -0500, Thara Gopinath wrote:
> Qualcomm crypto engine supports hardware accelerated algorithms for
> encryption and authentication. Enable support for aes,des,3des encryption
> algorithms and sha1,sha256, hmac(sha1),hmac(sha256) authentication
> algorithms on sdm8
From: Jaegeuk Kim
When giving a stress test which enables/disables clkgating, we hit device
timeout sometimes. This patch avoids subtle racy condition to address it.
Note that, this requires a patch to address the device stuck by REQ_CLKS_OFF in
__ufshcd_release().
The fix is "scsi: ufs: avoid
On Thu, Nov 5, 2020 at 11:16 PM Viresh Kumar wrote:
>
> On 05-11-20, 11:24, Rob Clark wrote:
> > On Tue, Nov 3, 2020 at 7:04 PM Viresh Kumar wrote:
> > >
> > > On 03-11-20, 08:50, Rob Clark wrote:
> > > > sorry, it didn't apply cleanly (which I guess is due to some other
> > > > dependencies that
On Tue, Nov 17, 2020 at 12:32 PM Viresh Kumar wrote:
>
> local_clock() has better precision and accuracy as compared to jiffies,
> lets use it for time management in cpufreq stats.
>
> Signed-off-by: Viresh Kumar
> ---
> V2:
> - Doesn't change the units to msec and use local_clock() instead of
>
On 11/17/20 4:52 PM, Andy Lutomirski wrote:
On Tue, Nov 17, 2020 at 7:07 AM Alexandre Chartre
wrote:
On 11/16/20 7:34 PM, Andy Lutomirski wrote:
On Mon, Nov 16, 2020 at 10:10 AM Alexandre Chartre
wrote:
On 11/16/20 5:57 PM, Andy Lutomirski wrote:
On Mon, Nov 16, 2020 at 6:47 AM Alex
On 11/17, Theodore Y. Ts'o wrote:
> On Tue, Nov 17, 2020 at 04:03:14AM +, Daniel Rosenberg wrote:
> > This shifts the responsibility of setting up dentry operations from
> > fscrypt to the individual filesystems, allowing them to have their own
> > operations while still setting fscrypt's d_rev
On 11/16, Martin K. Petersen wrote:
>
> Hi Jaegeuk!
>
> > From: Leo Liou
> >
> > We have lba and length for unmap commands.
> >
> > Signed-off-by: Leo Liou
>
> Doesn't apply to 5.11/scsi-queue.
>
> Also needs a Signed-off-by: tag from you.
Hi Martin,
Could you please consider this patch ser
From: Tom Lendacky
On systems that do not have hardware enforced cache coherency between
encrypted and unencrypted mappings of the same physical page, the
hypervisor can use the VM page flush MSR (0xc001011e) to flush the cache
contents of an SEV guest page. When a small number of pages are being
From: Tom Lendacky
This patch series provides support for running SEV-ES guests under KVM.
Secure Encrypted Virtualization - Encrypted State (SEV-ES) expands on the
SEV support to protect the guest register state from the hypervisor. See
"AMD64 Architecture Programmer's Manual Volume 2: System P
From: Tom Lendacky
Add support to KVM for determining if a system is capable of supporting
SEV-ES as well as determining if a guest is an SEV-ES guest.
Signed-off-by: Tom Lendacky
---
arch/x86/kvm/Kconfig | 3 ++-
arch/x86/kvm/svm/sev.c | 47 ++
arch/
Hi, ChenYu,
I have tried to build and run linux-next by tag "next-20201117".
Now the boot log looks different but the kernel still hangs. See
https://pastebin.com/gFk7XuBc
Thank you,
Sergey
On 17.11.2020 11:06, Chen-Yu Tsai wrote:
Hi,
Please try linux-next. There were some
From: Tom Lendacky
When both KVM support and the CCP driver are built into the kernel instead
of as modules, KVM initialization can happen before CCP initialization. As
a result, sev_platform_status() will return a failure when it is called
from sev_hardware_setup(), when this isn't really an err
From: Tom Lendacky
When a guest is running as an SEV-ES guest, it is not possible to emulate
instructions. Add support to prevent instruction emulation.
Signed-off-by: Tom Lendacky
---
arch/x86/kvm/svm/svm.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/arch/x86/kvm/svm/svm.c b/arc
On Mon, Nov 16, 2020 at 5:59 PM Rafael J. Wysocki wrote:
>
> On Mon, Nov 16, 2020 at 5:51 PM Andy Shevchenko
> wrote:
> >
> > On Tue, Nov 03, 2020 at 10:45:03PM +0200, Andy Shevchenko wrote:
> > > Some users may want to use resource library to manage their own resources,
> > > besides existing us
From: Tom Lendacky
Since the guest register state of an SEV-ES guest is encrypted, debugging
is not supported. Update the code to prevent guest debugging when the
guest has protected state.
Additionally, an SEV-ES guest must only and always intercept DR7 reads and
writes. Update set_dr_intercept
From: Tom Lendacky
Allocate a page during vCPU creation to be used as the encrypted VM save
area (VMSA) for the SEV-ES guest. Provide a flag in the kvm_vcpu_arch
structure that indicates whether the guest state is protected.
When freeing a VMSA page that has been encrypted, the cache contents mu
From: Tom Lendacky
When a guest is running under SEV-ES, the hypervisor cannot access the
guest register state. There are numerous places in the KVM code where
certain registers are accessed that are not allowed to be accessed (e.g.
RIP, CR0, etc). Add checks to prevent register accesses and add
From: Tom Lendacky
Update the GHCB accessor functions to add functions for retrieve GHCB
fields by name. Update existing code to use the new accessor functions.
Signed-off-by: Tom Lendacky
---
arch/x86/include/asm/svm.h | 10 ++
arch/x86/kernel/cpu/vmware.c | 12 ++--
2 files
From: Tom Lendacky
When performing VMGEXIT processing for an SEV-ES guest, register values
will be synced between KVM and the GHCB. Prepare for detecting when a GPR
has been updated (marked dirty) in order to determine whether to sync the
register to the GHCB.
Signed-off-by: Tom Lendacky
---
a
On Tue, Nov 17, 2020 at 09:19:01AM +0100, Alexandre Chartre wrote:
> We are not reversing PTI, we are extending it.
You're reversing it in the sense that you're mapping more kernel memory
into the user page table than what is mapped now.
> PTI removes all kernel mapping from the user page-table.
From: Tom Lendacky
The GHCB specification defines a GHCB MSR protocol using the lower
12-bits of the GHCB MSR (in the hypervisor this corresponds to the
GHCB GPA field in the VMCB).
Function 0x002 is a request to set the GHCB MSR value to the SEV INFO as
per the specification via the VMCB GHCB G
From: Tom Lendacky
For an SEV-ES guest, string-based port IO is performed to a shared
(un-encrypted) page so that both the hypervisor and guest can read or
write to it and each see the contents.
For string-based port IO operations, invoke SEV-ES specific routines that
can complete the operation
From: Tom Lendacky
For SEV-ES guests, the interception of control register write access
is not recommended. Control register interception occurs prior to the
control register being modified and the hypervisor is unable to modify
the control register itself because the register is located in the
e
From: Tom Lendacky
The GHCB specification defines a GHCB MSR protocol using the lower
12-bits of the GHCB MSR (in the hypervisor this corresponds to the
GHCB GPA field in the VMCB).
Function 0x004 is a request for CPUID information. Only a single CPUID
result register can be sent per invocation,
From: Tom Lendacky
For SEV-ES guests, the interception of control register write access
is not recommended. Control register interception occurs prior to the
control register being modified and the hypervisor is unable to modify
the control register itself because the register is located in the
e
From: Tom Lendacky
The GHCB specification defines a GHCB MSR protocol using the lower
12-bits of the GHCB MSR (in the hypervisor this corresponds to the
GHCB GPA field in the VMCB).
Function 0x100 is a request for termination of the guest. The guest has
encountered some situation for which it ha
From: Tom Lendacky
Typically under KVM, an AP is booted using the INIT-SIPI-SIPI sequence,
where the guest vCPU register state is updated and then the vCPU is VMRUN
to begin execution of the AP. For an SEV-ES guest, this won't work because
the guest register state is encrypted.
Following the GHC
From: Tom Lendacky
When a SHUTDOWN VMEXIT is encountered, normally the VMCB is re-initialized
so that the guest can be re-launched. But when a guest is running as an
SEV-ES guest, the VMSA cannot be re-initialized because it has been
encrypted. For now, just return -EINVAL to prevent a possible a
From: Tom Lendacky
Add trace events for entry to and exit from VMGEXIT MSR protocol
processing. The vCPU will be common for the trace events. The MSR
protocol processing is guided by the GHCB GPA in the VMCB, so the GHCB
GPA will represent the input and output values for the entry and exit
events
From: Tom Lendacky
For SEV-ES guests, the interception of EFER write access is not
recommended. EFER interception occurs prior to EFER being modified and
the hypervisor is unable to modify EFER itself because the register is
located in the encrypted register state.
SEV-ES support introduces a ne
From: Tom Lendacky
Since many of the registers used by the SEV-ES are encrypted and cannot
be read or written, adjust the __get_sregs() / __set_sregs() to take into
account whether the VMSA/guest state is encrypted.
For __get_sregs(), return the actual value that is in use by the guest
for all r
From: Tom Lendacky
SEV-ES adds a new VMEXIT reason code, VMGEXIT. Initial support for a
VMGEXIT includes mapping the GHCB based on the guest GPA, which is
obtained from a new VMCB field, and then validating the required inputs
for the VMGEXIT exit reason.
Since many of the VMGEXIT exit reasons c
From: Tom Lendacky
SEV-ES guests do not currently support SMM. Update the has_emulated_msr()
kvm_x86_ops function to take a struct kvm parameter so that the capability
can be reported at a VM level.
Since this op is also called during KVM initialization and before a struct
kvm instance is availa
From: Tom Lendacky
The guest FPU state is automatically restored on VMRUN and saved on VMEXIT
by the hardware, so there is no reason to do this in KVM. Eliminate the
allocation of the guest_fpu save area and key off that to skip operations
related to the guest FPU state.
Signed-off-by: Tom Lenda
From: Tom Lendacky
Add trace events for entry to and exit from VMGEXIT processing. The vCPU
id and the exit reason will be common for the trace events. The exit info
fields will represent the input and output values for the entry and exit
events, respectively.
Signed-off-by: Tom Lendacky
---
a
From: Tom Lendacky
This is a pre-patch to consolidate some exit handling code into callable
functions. Follow-on patches for SEV-ES exit handling will then be able
to use them from the sev.c file.
Signed-off-by: Tom Lendacky
---
arch/x86/kvm/svm/svm.c | 64 +
From: Tom Lendacky
For SEV-ES guests, the interception of control register write access
is not recommended. Control register interception occurs prior to the
control register being modified and the hypervisor is unable to modify
the control register itself because the register is located in the
e
From: Tom Lendacky
For an SEV-ES guest, MMIO is performed to a shared (un-encrypted) page
so that both the hypervisor and guest can read or write to it and each
see the contents.
The GHCB specification provides software-defined VMGEXIT exit codes to
indicate a request for an MMIO read or an MMIO
From: Tom Lendacky
An SEV-ES guest is started by invoking a new SEV initialization ioctl,
KVM_SEV_ES_INIT. This identifies the guest as an SEV-ES guest, which is
used to drive the appropriate ASID allocation, VMSA encryption, etc.
Before being able to run an SEV-ES vCPU, the vCPU VMSA must be en
From: Tom Lendacky
The run sequence is different for an SEV-ES guest compared to a legacy or
even an SEV guest. The guest vCPU register state of an SEV-ES guest will
be restored on VMRUN and saved on VMEXIT. There is no need to restore the
guest registers directly and through VMLOAD before VMRUN
The parallel port restore operation currently defers writes
to a tasklet, if it sees a locked disconnect mutex. The
driver goes to a lot of trouble to ensure writes happen
in a non-blocking context, but things can be greatly
simplified if it's done in regular process context and
this is not a syst
From: Tom Lendacky
The GHCB specification defines how NMIs are to be handled for an SEV-ES
guest. To detect the completion of an NMI the hypervisor must not
intercept the IRET instruction (because a #VC while running the NMI will
issue an IRET) and, instead, must receive an NMI Complete exit even
From: Tom Lendacky
SEV and SEV-ES guests each have dedicated ASID ranges. Update the ASID
allocation routine to return an ASID in the respective range.
Signed-off-by: Tom Lendacky
---
arch/x86/kvm/svm/sev.c | 25 ++---
1 file changed, 14 insertions(+), 11 deletions(-)
diff
From: Tom Lendacky
An SEV-ES vCPU requires additional VMCB vCPU load/put requirements. SEV-ES
hardware will restore certain registers on VMEXIT, but not save them on
VMRUM (see Table B-3 and Table B-4 of the AMD64 APM Volume 2), so make the
following changes:
General vCPU load changes:
- Durin
From: Tom Lendacky
The SVM host save area is used to restore some host state on VMEXIT of an
SEV-ES guest. After allocating the save area, clear it and add the
encryption mask to the SVM host save area physical address that is
programmed into the VM_HSAVE_PA MSR.
Signed-off-by: Tom Lendacky
---
lru_list lru bit 0 can tell whether the list is
avtive lru-list or not.
lru_list lru bit 1 can tell whether the list is
file lru-list or not.
And fix some define type in shrink_active_list()
and get_scan_count().
v1->v2:
correct the commit message, and fix the define type.
Signed-off-by: Hui Su
From: Tom Lendacky
An SEV-ES vCPU requires additional VMCB initialization requirements for
vCPU creation and vCPU load/put requirements. This includes:
General VMCB initialization changes:
- Set a VMCB control bit to enable SEV-ES support on the vCPU.
- Set the VMCB encrypted VM save area ad
On 11/17, Daeho Jeong wrote:
> From: Daeho Jeong
>
> We will add a new disable_auto_compr mount option to turn off the
> automaic compression on the compression enabled file, in order to
> give discretion of choosing the target file and the timing of
> compression to the user.
The aim would be g
Fix the following unreachable code issue:
drivers/net/ethernet/netronome/nfp/crypto/tls.c: In function
'nfp_net_tls_add':
include/linux/compiler_attributes.h:208:41: warning: statement will never be
executed [-Wswitch-unreachable]
208 | # define fallthrough
__attri
On Tue, Nov 17, 2020 at 06:29:31PM +0200, Mike Rapoport wrote:
> From: Mike Rapoport
>
> Wire up memfd_secret system call on architectures that define
> ARCH_HAS_SET_DIRECT_MAP, namely arm64, risc-v and x86.
>
> Signed-off-by: Mike Rapoport
> Acked-by: Palmer Dabbelt
> Acked-by: Arnd Bergmann
On Tue, Nov 10, 2020 at 11:58 AM Roman Gushchin wrote:
>
> It's convenient to have page->objects initialized before calling
> into account_slab_page(). In particular, this information can be
> used to pre-alloc the obj_cgroup vector.
>
> Let's call account_slab_page() a bit later, after the initia
What is the expected use case for Direct I/O using fscrypt? This
isn't a problem which is unique to fscrypt, but one of the really
unfortunate aspects of the DIO interface is the silent fallback to
buffered I/O. We've lived with this because DIO goes back decades,
and the original use case was to
On Tue, 17 Nov 2020 at 14:46, Zulkifli, Muhammad Husaini
wrote:
>
> Hi Ulf,
>
> >-Original Message-
> >From: Ulf Hansson
> >Sent: Tuesday, November 17, 2020 7:27 PM
> >To: Zulkifli, Muhammad Husaini
> >Cc: linux-...@vger.kernel.org; Linux ARM >ker...@lists.infradead.org>; Linux Kernel M
From: Sebastian Andrzej Siewior
v4.19.152-rt66-rc1 stable review patch.
If anyone has any objections, please let me know.
---
[ Upstream commit 74858f0d38a8d3c069a0745ff53ae084c8e7cabb ]
The callers expect disabled preemption/interrupts while invoking
__mod_memcg_lruvec_state(). This
Currently, checkpatch warns us if an assignment operator is placed
at the start of a line and not at the end of previous line.
E.g., running checkpatch on commit 8195b1396ec8 ("hv_netvsc: fix
deadlock on hotplug") reports:
CHECK: Assignment operator '=' should be on the previous line
+ stru
From: Oleg Nesterov
v4.19.152-rt66-rc1 stable review patch.
If anyone has any objections, please let me know.
---
[ Upstream commit 0fdc91971b34cf6857b4cfd8c322ae936cfc189b ]
The patch "ptrace: fix ptrace vs tasklist_lock race" changed
ptrace_freeze_traced() to take task->saved_state
From: Tom Zanussi
Dear RT Folks,
This is the RT stable review cycle of patch 4.19.152-rt66-rc1.
Please scream at me if I messed something up. Please test the patches
too.
The -rc release will be uploaded to kernel.org and will be deleted
when the final release is out. This is just a review rel
On 2020-11-16 11:14 PM, Kalle Valo wrote:
Bhaumik Bhatt writes:
Use MHI provided APIs to allocate and free MHI controller to
improve MHI host driver handling.
How does it improve the handling?
Main reason is we want to ensure the MHI controller is zero-initialized
and
we want to mandate it
Hi,
On 17/11/20 00:31, kernel test robot wrote:
> Greetings,
>
> 0day kernel testing robot got the below dmesg and the first bad commit is
>
> https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git master
>
> commit 5b9f8ff7b320a34af3dbcf04edb40d9b04f22f4a
> Author: Valentin Schn
PTCP instead of selecting it
> date: 4 weeks ago
> config: arc-randconfig-r005-20201117 (attached as .config)
> compiler: arceb-elf-gcc (GCC) 9.3.0
> reproduce (this is a W=1 build):
> wget
> https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O
&
From: Tom Zanussi
v4.19.152-rt66-rc1 stable review patch.
If anyone has any objections, please let me know.
---
Signed-off-by: Tom Zanussi
---
localversion-rt | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/localversion-rt b/localversion-rt
index e2eb19782d4c..8de
On Tue, Nov 17, 2020 at 12:15:26PM -0500, Theodore Y. Ts'o wrote:
> What is the expected use case for Direct I/O using fscrypt? This
> isn't a problem which is unique to fscrypt, but one of the really
> unfortunate aspects of the DIO interface is the silent fallback to
> buffered I/O. We've lived
On 11/16/2020 11:04 PM, Can Guo wrote:
When AH8 error happens, all the regs and states are dumped in err handler.
Sometime we need to look into host regs right after AH8 error happens,
which is before leaving the IRQ handler.
Signed-off-by: Can Guo
---
Reviewed-by: Asutosh Das
drivers/sc
On 17.11.2020 14:09, Laurent Pinchart wrote:
> Hello everybody,
>
> On Tue, Nov 17, 2020 at 12:59:02PM +0100, Jacopo Mondi wrote:
>> On Thu, Nov 12, 2020 at 03:34:36PM +0200, Eugen Hristev wrote:
>>> Microchip CSI2DC (CSI2 Demultiplexer Controller) is a misc bridge device
>>> that converts a byte
On Mon, Nov 16, 2020 at 09:54:47AM -0800, Dave Hansen wrote:
> Hillf, I noticed that you removed a bunch of folks from cc, including
> me. Was there a reason for that? I haven't been seeing your feedback
> on these patches at all.
I used the same script as for previous versions as '--cc-cmd', wh
On Fri, Nov 13, 2020 at 12:01:31AM +0200, Jarkko Sakkinen wrote:
> +bool encl_load(const char *path, struct encl *encl)
> +{
> + Elf64_Phdr *phdr_tbl;
> + off_t src_offset;
> + Elf64_Ehdr *ehdr;
> + int i, j;
> + int ret;
> +
> + memset(encl, 0, sizeof(*encl));
> +
> + r
I don't know what this debug print is for but it is super chatty,
throwing 8 lines of debug prints in the logs every time we update a
plane. It looks like it has no value. Let's nuke it so we can get
better logs.
Cc: Sean Paul
Cc: Abhinav Kumar
Signed-off-by: Stephen Boyd
---
drivers/gpu/drm/m
Hi Uwe,
> From: Uwe Kleine-König
> Sent: Monday, 16 November, 2020 5:08 PM
> Subject: [PATCH RFC] pwm: keembay: Fix build failure with -Os
>
> The driver used this construct:
>
> #define KMB_PWM_LEADIN_MASK GENMASK(30, 0)
>
> static inline void keembay_pwm_update_bits(s
Hi Zenghui,
On 11/17/20 4:16 PM, Zenghui Yu wrote:
> It was recently reported that if GICR_TYPER is accessed before the RD base
> address is set, we'll suffer from the unset @rdreg dereferencing. Oops...
>
> gpa_t last_rdist_typer = rdreg->base + GICR_TYPER +
> (rdreg-
On Tue, Nov 17, 2020 at 04:53:10PM +0100, Vincent Guittot wrote:
> On Tue, 17 Nov 2020 at 16:17, Mel Gorman wrote:
> >
> > On Tue, Nov 17, 2020 at 03:31:19PM +0100, Vincent Guittot wrote:
> > > On Tue, 17 Nov 2020 at 15:18, Peter Zijlstra wrote:
> > > >
> > > > On Tue, Nov 17, 2020 at 01:42:22PM
On Mon, Nov 16, 2020 at 05:40:33PM +, Lee Jones wrote:
> Fixes the following W=1 kernel build warning(s):
>
> drivers/gpu/drm/drm_dp_mst_topology.c: In function
> ‘drm_dp_send_query_stream_enc_status’:
> drivers/gpu/drm/drm_dp_mst_topology.c:3263:6: warning: variable ‘len’ set
> but not us
On 11/16, Thomas Gleixner wrote:
>
> Subject: x86/dumpstack: Don't try to access user space code of other tasks
> From: Thomas Gleixner
> Date: Mon, 16 Nov 2020 22:26:52 +0100
>
> sysrq-t ends up invoking show_opcodes() for each task which tries to access
> the user space code of other processes
On 11/17/20 5:58 PM, Guennadi Liakhovetski wrote:
> On Tue, Nov 17, 2020 at 05:44:05PM +0100, Arnaud POULIQUEN wrote:
>>
>>
>> On 11/17/20 5:03 PM, Guennadi Liakhovetski wrote:
>>> On Tue, Nov 17, 2020 at 12:42:30PM +0100, Arnaud POULIQUEN wrote:
>>>
>>> [snip]
>>>
diff --git a/drivers/rpms
201 - 300 of 2398 matches
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