On Tue, Nov 17, 2020 at 09:08:22AM +0100, Mauro Carvalho Chehab wrote:
> Mark Brown escreveu:
> > This probe code looks very different to other regulator drivers, this
> > alone should have been a warning that the driver needs some substantial
> > refactoring here. As indicated information about
On Tue, 17 Nov 2020 at 14:42, Mel Gorman wrote:
>
> Currently, an imbalance is only allowed when a destination node
> is almost completely idle. This solved one basic class of problems
> and was the cautious approach.
>
> This patch revisits the possibility that NUMA nodes can be imbalanced
> unti
The protection rules for tick_next_period and last_jiffies_update are blury
at best. Clarify this.
Signed-off-by: Thomas Gleixner
---
kernel/time/tick-common.c |4 +++-
kernel/time/tick-sched.c |4 +++-
2 files changed, 6 insertions(+), 2 deletions(-)
--- a/kernel/time/tick-common.c
++
On Wed, Nov 11, 2020 at 6:45 AM Ben Widawsky wrote:
>
> From: Vishal Verma
>
> Add an acpi_cxl module to coordinate the ACPI portions of the CXL
> (Compute eXpress Link) interconnect. This driver binds to ACPI0017
> objects in the ACPI tree, and coordinates access to the resources
> provided by t
Some hardware variants contain a system cache or the last level
cache(llc). This cache is typically a large block which is shared
by multiple clients on the SOC. GPU uses the system cache to cache
both the GPU data buffers(like textures) as well the SMMU pagetables.
This helps with improved render
From: Jordan Crouse
GPU targets with an MMU-500 attached have a slightly different process for
enabling system cache. Use the compatible string on the IOMMU phandle
to see if an MMU-500 is attached and modify the programming sequence
accordingly.
Signed-off-by: Jordan Crouse
Signed-off-by: Sai
tree: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
master
head: 9c87c9f41245baa3fc4716cf39141439cf405b01
commit: 4bdc0d676a643140bdf17dbf7eafedee3d496a3c remove ioremap_nocache and
devm_ioremap_nocache
date: 11 months ago
config: s390-randconfig-c004-20201116 (attached
Fix the checkpatch warning for space required before the open
parenthesis.
Signed-off-by: Sai Prakash Ranjan
Acked-by: Will Deacon
---
drivers/iommu/arm/arm-smmu/arm-smmu-impl.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/iommu/arm/arm-smmu/arm-smmu-impl.c
b/dri
On Tue, 17 Nov 2020 at 15:18, Peter Zijlstra wrote:
>
> On Tue, Nov 17, 2020 at 01:42:22PM +, Mel Gorman wrote:
> > - if (local_sgs.idle_cpus)
> > + if (local_sgs.idle_cpus >= (sd->span_weight >> 2))
> > return NULL;
>
> Is
Add iommu domain attribute for pagetable configuration which
initially will be used to set quirks like for system cache aka
last level cache to be used by client drivers like GPU to set
right attributes for caching the hardware pagetables into the
system cache and later can be extended to include o
Hi,
Thank you for the patch! Perhaps something to improve:
[auto build test WARNING on linux/master]
[also build test WARNING on linus/master v5.10-rc4 next-20201117]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--bas
Add a quirk IO_PGTABLE_QUIRK_ARM_OUTER_WBWA to override
the attributes set in TCR for the page table walker when
using system cache.
Signed-off-by: Sai Prakash Ranjan
---
drivers/iommu/io-pgtable-arm.c | 10 --
include/linux/io-pgtable.h | 4
2 files changed, 12 insertions(+),
Use table and of_match_node() to match qcom implementation
instead of multiple of_device_compatible() calls for each
QCOM SMMU implementation.
Signed-off-by: Sai Prakash Ranjan
Acked-by: Will Deacon
---
drivers/iommu/arm/arm-smmu/arm-smmu-impl.c | 9 +
drivers/iommu/arm/arm-smmu/arm-sm
In addition to the ping, I'd like to share our recent real-world usecase of
DAMON. I just hope this real user story makes more comments than previously
shared benchmark results.
DAMON as a profiler
---
Recently, we analyzed characteristics of a large scale production systems
util
Now that we have a struct domain_attr_io_pgtbl_cfg with quirks,
use that for non_strict mode as well thereby removing the need
for more members of arm_smmu_domain in the future.
Signed-off-by: Sai Prakash Ranjan
---
drivers/iommu/arm/arm-smmu/arm-smmu.c | 7 ++-
drivers/iommu/arm/arm-smmu/ar
From: Sharat Masetty
The register read-modify-write construct is generic enough
that it can be used by other subsystems as needed, create
a more generic rmw() function and have the gpu_rmw() use
this new function.
Signed-off-by: Sharat Masetty
Reviewed-by: Jordan Crouse
Signed-off-by: Sai Prak
From: Sharat Masetty
The last level system cache can be partitioned to 32 different
slices of which GPU has two slices preallocated. One slice is
used for caching GPU buffers and the other slice is used for
caching the GPU SMMU pagetables. This talks to the core system
cache driver to acquire the
On Tue, Nov 17, 2020 at 11:36:36AM +, Stefan Hajnoczi wrote:
On Fri, Nov 13, 2020 at 02:47:12PM +0100, Stefano Garzarella wrote:
diff --git a/drivers/vdpa/vdpa_sim/vdpa_sim_blk.c
b/drivers/vdpa/vdpa_sim/vdpa_sim_blk.c
index 8e41b3ab98d5..68e74383322f 100644
--- a/drivers/vdpa/vdpa_sim/vdpa_
On Mon, Nov 09, 2020 at 10:12:41AM +0800, Like Xu wrote:
> With PEBS virtualization, the PEBS records get delivered to the guest,
> and host still sees the PEBS overflow PMI from guest PEBS counters.
> This would normally result in a spurious host PMI and we needs to inject
> that PEBS overflow PMI
On Tue, Nov 17, 2020 at 09:38:05AM -0300, Arnaldo Carvalho de Melo wrote:
> Em Tue, Nov 17, 2020 at 12:00:41PM +0100, Jiri Olsa escreveu:
> > When processing mmap2 event, check on the build id
> > misc bit: PERF_RECORD_MISC_BUILD_ID and if it's set,
> > store the build id in mmap's dso object.
> >
Hi Alex,
On 2020/11/17 3:56, Alex Williamson wrote:
On Thu, 12 Nov 2020 10:24:07 +0800
Lu Baolu wrote:
Add API for getting the ioasid of a subdevice (vfio/mdev). This calls
into the backend IOMMU module to get the actual value or error number
if ioasid for subdevice is not supported. The phys
On Tue, Nov 17, 2020 at 04:52:49PM +0800, Muchun Song wrote:
> The *_lruvec_slab_state is also suitable for pages allocated from buddy,
> not just for the slab objects. But the function name seems to tell us that
> only slab object is applicable. So we can rename the keyword of slab to
> kmem.
>
>
On Tue, Nov 17, 2020 at 03:16:03PM +0100, Peter Zijlstra wrote:
> On Tue, Nov 17, 2020 at 01:42:21PM +, Mel Gorman wrote:
> > This patch revisits the possibility that NUMA nodes can be imbalanced
> > until 25% of the CPUs are occupied. The reasoning behind 25% is somewhat
> > superficial -- it'
On Mon, Nov 09, 2020 at 10:12:42AM +0800, Like Xu wrote:
> + /* Indicate PEBS overflow PMI to guest. */
> + __set_bit(62, (unsigned long *)&pmu->global_status);
GLOBAL_STATUS_BUFFER_OVF_BIT
On Tue, Nov 17, 2020 at 03:24:56PM +0100, Vincent Guittot wrote:
> On Tue, 17 Nov 2020 at 14:42, Mel Gorman wrote:
> >
> > Currently, an imbalance is only allowed when a destination node
> > is almost completely idle. This solved one basic class of problems
> > and was the cautious approach.
> >
>
On Mon, 16 Nov 2020 at 23:46, Hemant Kumar wrote:
>
> Loopback test opens the MHI device file node and writes
> a data buffer to it. MHI UCI kernel space driver copies
> the data and sends it to MHI uplink (Tx) LOOPBACK channel.
> MHI device loops back the same data to MHI downlink (Rx)
> LOOPBACK
Hi Dikshita,
I'm happy with the controls themselves, but the documentation needs more work:
On 15/10/2020 13:01, Dikshita Agarwal wrote:
> LTR (Long Term Reference) frames are the frames that are encoded
> sometime in the past and stored in the DPB buffer list to be used
> as reference to encode
Improve the topology test to check all aggregation
types. This is to lock down the behaviour before
'id' is changed into a struct in later commits.
Signed-off-by: James Clark
Cc: Peter Zijlstra
Cc: Ingo Molnar
Cc: Arnaldo Carvalho de Melo
Cc: Mark Rutland
Cc: Alexander Shishkin
Cc: Jiri Olsa
Replace usages of perf_cpu_map with cpu_aggr map in
places that are involved with perf stat aggregation.
This will then later be changed to be a map of
cpu_aggr_id rather than an int so that more data can
be stored.
No functional changes.
Signed-off-by: James Clark
Cc: Peter Zijlstra
Cc: Ingo
On 11/16/20 7:58 AM, Peter Zijlstra wrote:
On Mon, Nov 16, 2020 at 03:49:14PM +0100, Peter Zijlstra wrote:
On Fri, Nov 13, 2020 at 09:03:27PM +, Matthew Wilcox wrote:
I think almost all of this information should go into atomic_ops.rst
No, we should delete atomic_ops.rst. It's bitrotted n
Use the new cpu_aggr_id struct in the cpu map
instead of int so that it can store more data.
No functional changes.
Signed-off-by: James Clark
Cc: Peter Zijlstra
Cc: Ingo Molnar
Cc: Arnaldo Carvalho de Melo
Cc: Mark Rutland
Cc: Alexander Shishkin
Cc: Jiri Olsa
Cc: Namhyung Kim
Cc: Thomas
Add core as a separate member so that it doesn't have to be
packed into the int value.
Signed-off-by: James Clark
Cc: Peter Zijlstra
Cc: Ingo Molnar
Cc: Arnaldo Carvalho de Melo
Cc: Mark Rutland
Cc: Alexander Shishkin
Cc: Jiri Olsa
Cc: Namhyung Kim
Cc: Thomas Richter
Cc: John Garry
---
Add socket as a separate member so that it doesn't have to be
packed into the int value. When the socket ID was larger than
8 bits the output appeared corrupted or incomplete.
For example, here on ThunderX2 perf stat reports a socket
of -1 and an invalid die number:
./perf stat -a --per-die
T
Currently this is a duplicate of perf_cpu_map so that
it can be used as a drop in replacement.
In a later commit it will be changed from a map of ints
to use the new cpu_aggr_id struct.
No functional changes.
Signed-off-by: James Clark
Cc: Peter Zijlstra
Cc: Ingo Molnar
Cc: Arnaldo Carvalho d
Changes since v4:
* Test all fields in topology test, even if they should be -1
* Remove extra refcount from cpu_map__build_map()
* Reduce the changes in sort_aggr_thread()
* Move addition of cpu_aggr_map__put() and cpu_aggr_map__delete()
into the commit where they are used so that they don't ha
A separate field isn't strictly required. The core
field could be re-used for thread IDs as a single
field was used previously.
But separating them will avoid confusion and catch
potential errors where core IDs are read as thread
IDs and vice versa.
Also remove the placeholder id field which is n
On 15/11/2020 23:17, Jiri Olsa wrote:
> On Fri, Nov 13, 2020 at 07:26:43PM +0200, James Clark wrote:
>> Use the existing allocator for perf_cpu_map to avoid use
>> of raw malloc. This could cause an issue in later commits
>> where the size of perf_cpu_map is changed.
>>
>> No functional changes.
On 15/11/2020 23:17, Jiri Olsa wrote:
> On Fri, Nov 13, 2020 at 07:26:45PM +0200, James Clark wrote:
>
> SNIP
>
>> @@ -754,7 +766,7 @@ static void print_aggr_thread(struct perf_stat_config
>> *config,
>> FILE *output = config->output;
>> int nthreads = perf_thread_map__nr(counter->c
On Tue, 10 Nov 2020 21:43:50 -0800
Ben Widawsky wrote:
> From: Dan Williams
>
> The CXL.mem protocol allows a device to act as a provider of "System
> RAM" and/or "Persistent Memory" that is fully coherent as if the memory
> was attached to the typical CPU memory controller.
>
> The memory ran
This struct currently has only a single int member so that
it can be used as a drop in replacement for the existing
behaviour.
Comparison and constructor functions have also been added
that will replace usages of '==' and '= -1'.
No functional changes.
Signed-off-by: James Clark
Cc: Peter Zijls
Use the existing allocator for perf_cpu_map to avoid use
of raw malloc. This could cause an issue in later commits
where the size of perf_cpu_map is changed.
No functional changes.
Signed-off-by: James Clark
Cc: Peter Zijlstra
Cc: Ingo Molnar
Cc: Arnaldo Carvalho de Melo
Cc: Mark Rutland
Cc:
Add node as a separate member so that it doesn't have to be
packed into the int value.
Signed-off-by: James Clark
Cc: Peter Zijlstra
Cc: Ingo Molnar
Cc: Arnaldo Carvalho de Melo
Cc: Mark Rutland
Cc: Alexander Shishkin
Cc: Jiri Olsa
Cc: Namhyung Kim
Cc: Thomas Richter
Cc: John Garry
---
Add die as a separate member so that it doesn't have to be
packed into the int value.
Signed-off-by: James Clark
Cc: Peter Zijlstra
Cc: Ingo Molnar
Cc: Arnaldo Carvalho de Melo
Cc: Mark Rutland
Cc: Alexander Shishkin
Cc: Jiri Olsa
Cc: Namhyung Kim
Cc: Thomas Richter
Cc: John Garry
---
t
On 20-11-11 17:13:25, Dong Aisheng wrote:
> On Tue, Nov 3, 2020 at 7:22 PM Abel Vesa wrote:
> ...
> > +static int imx_blk_ctl_reset_set(struct reset_controller_dev *rcdev,
> > + unsigned long id, bool assert)
> > +{
> > + struct imx_blk_ctl_drvdata *drvdata =
Replace all occurences of the usage of int with the new struct
cpu_aggr_id.
No functional changes.
Signed-off-by: James Clark
Cc: Peter Zijlstra
Cc: Ingo Molnar
Cc: Arnaldo Carvalho de Melo
Cc: Mark Rutland
Cc: Alexander Shishkin
Cc: Jiri Olsa
Cc: Namhyung Kim
Cc: Thomas Richter
Cc: John
On 15/11/2020 23:17, Jiri Olsa wrote:
> On Fri, Nov 13, 2020 at 07:26:48PM +0200, James Clark wrote:
>> These cpu_aggr_map refcounting functions are only used in
>> builtin-stat.c so their visibilty can be reduced to just
>> that file.
>>
>> No functional changes.
>>
>> Signed-off-by: James Clar
Nicolas, can you take a look at this with your codec knowledge?
Some other review comments below:
On 15/10/2020 13:05, Dikshita Agarwal wrote:
> This control indicates the priority id to be applied
> to base layer.
>
> Signed-off-by: Dikshita Agarwal
> ---
> Documentation/userspace-api/media/v
On Tue, Nov 17, 2020 at 14:4:49, Arnd Bergmann wrote:
> On Fri, Nov 13, 2020 at 11:37 PM Gustavo Pimentel
> wrote:
> >
> > This patch series adds a new driver called xData-pcie for the Synopsys
> > DesignWare PCIe prototype.
> >
> > The driver configures and enables the Synopsys DesignWare PCIe
On 15/11/2020 23:17, Jiri Olsa wrote:
> On Fri, Nov 13, 2020 at 07:26:54PM +0200, James Clark wrote:
>> A separate field isn't strictly required. The core
>> field could be re-used for thread IDs as a single
>> field was used previously.
>>
>> But separating them will avoid confusion and catch
>
Hi,
>On 20-11-06 12:42:56, Pawel Laszczak wrote:
>> Patch defines macros, registers and structures used by
>> Device side driver.
>>
>> Because the size of main patch is very big, I’ve decided to create
>> separate patch for cdnsp-gadget.h. It should simplify reviewing the code.
>>
>> Signed-off-b
On Tue, Nov 17, 2020 at 1:39 AM Gilad Ben-Yossef wrote:
>
> On Mon, Nov 16, 2020 at 8:54 PM Rob Herring wrote:
> >
> > On Thu, Oct 22, 2020 at 1:18 AM Gilad Ben-Yossef
> > wrote:
> > >
> > >
> > > Hi again,
> > >
> > > Any opinion on the suggested below?
> >
> > Sorry, lost in the pile...
>
> N
On Tue, 10 Nov 2020 21:43:51 -0800
Ben Widawsky wrote:
> All the necessary bits are initialized in order to find and map the
> register space for CXL Memory Devices. This is accomplished by using the
> Register Locator DVSEC (CXL 2.0 - 8.1.9.1) to determine which PCI BAR to
> use, and how much of
On Thu, Nov 5, 2020 at 1:56 PM Ionela Voinescu wrote:
>
> Hi guys,
>
> I found myself staring a bit too much at this driver in the past weeks
> and that's likely the cause for me coming up with this series of 8
> patches that cleans up, clarifies and reworks parts of it, as follows:
>
> - patches
On 14.11.20 11:28, Christoph Hellwig wrote:
On Fri, Nov 13, 2020 at 06:41:22PM -0800, Sudarshan Rajagopalan wrote:
Hello,
When memory blocks are removed, along with removing the memmap entries,
memory resource and memory block devices, the arch specific
arch_remove_memory() is called which tak
There are devices (Ex:- Marvell SATA controller) that don't support
64-bit MSIs and the same is advertised through their MSI capability
register. Set no_64bit_msi flag explicitly for such devices in the
MSI setup code so that the msi_verify_entries() API would catch
if the MSI arch code tries to us
On Fri, Nov 13, 2020 at 06:59:36PM +0800, Muchun Song wrote:
> +#define page_huge_pte(page) ((page)->pmd_huge_pte)
Seems you do not need this one anymore.
> +void vmemmap_pgtable_free(struct page *page)
> +{
> + struct page *pte_page, *t_page;
> +
> + list_for_each_entry_safe(pte
On Tue, Nov 17, 2020 at 1:06 PM Jonathan Cameron
wrote:
>
> On Tue, 17 Nov 2020 11:01:11 +
> Jonathan Cameron wrote:
>
> > On Tue, 17 Nov 2020 09:52:53 +0200
> > Alexandru Ardelean wrote:
> >
> > > This change removes the SPI device table, adds an OF device table instead.
> > > This should a
On Tue, Nov 17, 2020 at 10:57:09AM +, Stefan Hajnoczi wrote:
On Fri, Nov 13, 2020 at 02:47:01PM +0100, Stefano Garzarella wrote:
diff --git a/drivers/vhost/vdpa.c b/drivers/vhost/vdpa.c
index 2754f3069738..fb0411594963 100644
--- a/drivers/vhost/vdpa.c
+++ b/drivers/vhost/vdpa.c
@@ -22,6 +22
On 11/16/20 7:34 PM, Andy Lutomirski wrote:
On Mon, Nov 16, 2020 at 10:10 AM Alexandre Chartre
wrote:
On 11/16/20 5:57 PM, Andy Lutomirski wrote:
On Mon, Nov 16, 2020 at 6:47 AM Alexandre Chartre
wrote:
When entering the kernel from userland, use the per-task PTI stack
instead of the p
Namespaced file capabilities were introduced in 8db6c34f1dbc .
When userspace reads an xattr for a namespaced capability, a
virtualized representation of it is returned if the caller is
in a user namespace owned by the capability's owning rootid.
The function which performs this virtualization was
On 11/17/2020 5:45 AM, Andrew Lunn wrote:
>>> Do you have the Marvell PHY driver either built-in or available as a
>>> module? I suspect the problem is you don't. You will need the Marvell
>>> PHY driver to correctly drive the PHY, you can't rely on the fallback
>>> driver for SFPs.
>> Correct.
On Tue, Nov 17, 2020 at 3:53 PM Gustavo Pimentel
wrote:
> On Tue, Nov 17, 2020 at 14:4:49, Arnd Bergmann wrote:
> > On Fri, Nov 13, 2020 at 11:37 PM Gustavo Pimentel
> > wrote:
> > >
> > > This patch series adds a new driver called xData-pcie for the Synopsys
> > > DesignWare PCIe prototype.
>
On 13/11/20 3:24 am, Nishanth Menon wrote:
> With [1] integrated and all users of the config symbols removed, we
> can safely remove the options from defconfig.
>
> [1]
> https://patchwork.kernel.org/project/linux-arm-kernel/patch/20201026170624.24241-1...@ti.com/
>
> Signed-off-by: Nishanth
On Tue, Nov 17, 2020 at 09:38:30AM +0100, Mauro Carvalho Chehab wrote:
> Mark Brown escreveu:
> > This also appears to be missing a DT binding document, binding
> > documentation is required for anything with DT support.
> The DT binding is documented on patch 3/8, together with MFD.
> As there
On 15.11.20 09:26, Mike Rapoport wrote:
On Thu, Nov 12, 2020 at 09:15:18PM +0100, David Hildenbrand wrote:
Am 12.11.2020 um 20:08 schrieb Mike Rapoport :
On Thu, Nov 12, 2020 at 05:22:00PM +0100, David Hildenbrand wrote:
On 10.11.20 19:06, Mike Rapoport wrote:
On Tue, Nov 10, 2020 at 06:17:
On Wed, Nov 11, 2020 at 03:53:15PM +0100, David Hildenbrand wrote:
> Reported-by: Michael Ellerman
> Fixes: 9d5171a8f248 ("powerpc/powernv: Enable removal of memory for in memory
> tracing")
> Cc: sta...@vger.kernel.org # v4.14+
> Cc: Benjamin Herrenschmidt
> Cc: Paul Mackerras
> Cc: Rashmica G
On Tue, 10 Nov 2020 21:43:52 -0800
Ben Widawsky wrote:
> CXL devices contain an array of capabilities that describe the
> interactions software can interact with the device, or firmware running
> on the device. A CXL compliant device must implement the device status
> and the mailbox capability.
It was recently reported that if GICR_TYPER is accessed before the RD base
address is set, we'll suffer from the unset @rdreg dereferencing. Oops...
gpa_t last_rdist_typer = rdreg->base + GICR_TYPER +
(rdreg->free_index - 1) * KVM_VGIC_V3_REDIST_SIZE;
It's "expecte
The typical steps with context tracking are:
1) Task runs in userspace
2) Task enters the kernel (syscall/exception/IRQ)
3) Task switches from context tracking state CONTEXT_USER to
CONTEXT_KERNEL (user_exit())
4) Task does stuff in kernel
5) Task switches from context tracking state CONTEXT_KE
On Tue, Nov 17, 2020 at 03:31:19PM +0100, Vincent Guittot wrote:
> On Tue, 17 Nov 2020 at 15:18, Peter Zijlstra wrote:
> >
> > On Tue, Nov 17, 2020 at 01:42:22PM +, Mel Gorman wrote:
> > > - if (local_sgs.idle_cpus)
> > > + if (local_sgs.idle_cpus >= (sd
Historically, context tracking had to deal with fragile entry code path,
ie: before user_exit() is called and after user_enter() is called, in
case some of those spots would call schedule() or use RCU. On such
cases, the site had to be protected between exception_enter() and
exception_exit() that s
On 11/16/20 8:24 PM, Xu Yilun wrote:
On Mon, Nov 16, 2020 at 08:14:52AM -0600, Richard Gong wrote:
Hi Yilun,
On 11/15/20 8:47 PM, Xu Yilun wrote:
On Sun, Nov 15, 2020 at 11:21:06AM -0800, Moritz Fischer wrote:
Hi Richard,
On Thu, Nov 12, 2020 at 12:06:42PM -0600, richard.g...@linux.intel
On Tue, Nov 17, 2020 at 09:44:37AM -0300, Arnaldo Carvalho de Melo wrote:
> Em Tue, Nov 17, 2020 at 12:00:42PM +0100, Jiri Olsa escreveu:
> > Allow mmap2 event to synthesize kernel image,
> > so we can synthesize kernel build id data in
> > following changes.
> >
> > It's enabled by new symbol_con
schedule_user() was traditionally used by the entry code's tail to
preempt userspace after the call to user_enter(). Indeed the call to
user_enter() used to be performed upon syscall exit slow path which was
right before the last opportunity to schedule() while resuming to
userspace. The context tr
On 17/11/2020 13:37, Lee Jones wrote:
On Tue, 17 Nov 2020, Matthias Brugger wrote:
Hi Lee,
On 13/11/2020 11:19, Lee Jones wrote:
On Tue, 10 Nov 2020, Enric Balletbo i Serra wrote:
This adds syscon_regmap_lookup_by_phandle_optional() function to get an
optional regmap.
It behaves the sam
A lot of ground work has been performed on x86 entry code. Fragile path
between user_enter() and user_exit() have IRQs disabled. Uses of RCU and
intrumentation in these fragile areas have been explicitly annotated
and protected.
This architecture doesn't need exception_enter()/exception_exit()
any
Detect calls to schedule() between user_enter() and user_exit(). Those
are symptoms of early entry code that either forgot to protect a call
to schedule() inside exception_enter()/exception_exit() or, in the case
of HAVE_CONTEXT_TRACKING_OFFSTACK, enabled interrupts or preemption in
a wrong spot.
In this new version, I fixed the changelogs according to peterz's review.
Especially on the 2nd patch where I added lots of details to better
understand what exception_enter/exit() do and what is required to get
rid of it.
Also rebased against -rc4.
git://git.kernel.org/pub/scm/linux/kernel/git/f
On Tue, Nov 17, 2020 at 07:50:15AM -0700, Shuah Khan wrote:
> On 11/16/20 7:58 AM, Peter Zijlstra wrote:
> > On Mon, Nov 16, 2020 at 03:49:14PM +0100, Peter Zijlstra wrote:
> > > On Fri, Nov 13, 2020 at 09:03:27PM +, Matthew Wilcox wrote:
> > > > I think almost all of this information should go
On Tue, Nov 17, 2020 at 09:50:40AM -0300, Arnaldo Carvalho de Melo wrote:
> Em Tue, Nov 17, 2020 at 12:00:52PM +0100, Jiri Olsa escreveu:
> > Add buildid-list support for mmap2's build id data, so we can
> > display build ids for dso objects for data without the build
> > id cache update.
>
> >
For device log outputs, it's better to have device name / ID
prefixed in all messages, so use the proper dev_*() functions here.
Explicit message on module load/unload don't seem to be really helpful
(we have other means to check which modules have been loaded), instead
just add noise to the kerne
On Wed, Nov 11, 2020 at 03:53:16PM +0100, David Hildenbrand wrote:
> Fixes: 9d5171a8f248 ("powerpc/powernv: Enable removal of memory for in memory
> tracing")
> Cc: sta...@vger.kernel.org# v4.14+
> Cc: Michael Ellerman
> Cc: Benjamin Herrenschmidt
> Cc: Paul Mackerras
> Cc: Rashmica Gupta
> Si
On Tue, 10 Nov 2020 21:43:53 -0800
Ben Widawsky wrote:
> Provide enough functionality to utilize the mailbox of a memory device.
> The mailbox is used to interact with the firmware running on the memory
> device.
>
> The CXL specification defines separate capabilities for the mailbox and the
> m
Reducing init boilerplate by using the module_platform_device macro.
Signed-off-by: Enrico Weigelt, metux IT consult
---
drivers/watchdog/iTCO_wdt.c | 16 +---
1 file changed, 1 insertion(+), 15 deletions(-)
diff --git a/drivers/watchdog/iTCO_wdt.c b/drivers/watchdog/iTCO_wdt.c
inde
Reduce a little bit of boilerplate by using pm_ptr().
Signed-off-by: Enrico Weigelt, metux IT consult
---
drivers/watchdog/iTCO_wdt.c | 5 +
1 file changed, 1 insertion(+), 4 deletions(-)
diff --git a/drivers/watchdog/iTCO_wdt.c b/drivers/watchdog/iTCO_wdt.c
index edc588a06ae6..660fc262fbc0
On Tue, Nov 17, 2020 at 3:44 PM Naresh Kamboju
wrote:
>
> While booting arm KASAN config enabled kernel on TI x15 device
> Linux version 5.10.0-rc3-next-20201116.
>
> The reported issue is not a regression since we have recently started testing
> arm+kasan builds on LKFT.
>
> The boot was not succ
On Wed, Nov 11, 2020 at 03:53:17PM +0100, David Hildenbrand wrote:
> We want to stop abusing memory hotplug infrastructure in memtrace code
> to perform allocations and remove the linear mapping. Instead we will use
> alloc_contig_pages() and remove the linear mapping manually.
>
> Let's factor ou
On Tue, Nov 17, 2020 at 11:06 PM Oscar Salvador wrote:
>
> On Fri, Nov 13, 2020 at 06:59:36PM +0800, Muchun Song wrote:
> > +#define page_huge_pte(page) ((page)->pmd_huge_pte)
Yeah, I forgot to remove it. Thanks.
>
> Seems you do not need this one anymore.
>
> > +void vmemmap_pgtable_fr
Hi Rafael,
On Tuesday 17 Nov 2020 at 15:59:24 (+0100), Rafael J. Wysocki wrote:
> On Thu, Nov 5, 2020 at 1:56 PM Ionela Voinescu
> wrote:
> >
> > Hi guys,
> >
> > I found myself staring a bit too much at this driver in the past weeks
> > and that's likely the cause for me coming up with this ser
On 17/11/2020 13:36, Jacopo Mondi wrote:
> Hi Kieran,
>
> On Mon, Nov 16, 2020 at 02:47:49PM +, Kieran Bingham wrote:
>> On 16/11/2020 13:52, Jacopo Mondi wrote:
>>> The RDACM21 is a GMSL camera supporting 1280x1080 resolution images
>>> developed by IMI based on an Omnivision OV10640 sensor,
On Tue, Nov 17, 2020 at 06:12:46PM +1100, Stephen Rothwell wrote:
> Hi Hugh,
>
> On Mon, 16 Nov 2020 22:17:20 -0800 (PST) Hugh Dickins
> wrote:
> >
> > On Mon, 16 Nov 2020, a...@linux-foundation.org wrote:
> > >
> > > The patch titled
> > > Subject: mm/shmem: use kmem_cache_zalloc in shmem
On Tue, 10 Nov 2020 21:43:54 -0800
Ben Widawsky wrote:
> Create a function to handle sending a command, optionally with a
> payload, to the memory device, polling on a result, and then optionally
> copying out the payload. The algorithm for doing this come straight out
> of the CXL 2.0 specificat
On Wed, Nov 11, 2020 at 3:50 AM Matthew Wilcox wrote:
>
> On Tue, Nov 10, 2020 at 11:31:31AM -0800, Mike Kravetz wrote:
> > On 11/9/20 5:52 AM, Oscar Salvador wrote:
> > > On Sun, Nov 08, 2020 at 10:10:55PM +0800, Muchun Song wrote:
> > >> The purpose of introducing HUGETLB_PAGE_FREE_VMEMMAP is to
On Fri, Nov 13, 2020 at 04:19:25PM -0500, Konrad Rzeszutek Wilk wrote:
> On Thu, Nov 05, 2020 at 09:20:45PM +, Ashish Kalra wrote:
> > On Thu, Nov 05, 2020 at 03:20:07PM -0500, Konrad Rzeszutek Wilk wrote:
> > > On Thu, Nov 05, 2020 at 07:38:28PM +, Ashish Kalra wrote:
> > > > On Thu, Nov 0
On 17/11/20 12:52, Valentin Schneider wrote:
> On 17/11/20 09:46, Peter Zijlstra wrote:
>> How's this then? It still doesn't explicitly call out the specific race,
>> but does mention the more fundamental issue that wakelist queueing
>> doesn't respect the regular rules anymore.
>>
>> --- a/inclu
On 22.10.20 14:58, Oscar Salvador wrote:
Physical memory hotadd has to allocate a memmap (struct page array) for
the newly added memory section. Currently, alloc_pages_node() is used
for those allocations.
This has some disadvantages:
a) an existing memory is consumed for that purpose
(eg
On Tue, Nov 17, 2020 at 12:30:26AM -0800, Andrey Vagin wrote:
> On Sun, Nov 15, 2020 at 10:36 AM Hui Su wrote:
> >
> > timens_on_fork() always return 0, and maybe not
> > need to judge the return value in copy_namespaces().
>
> Thank you for cleaning this up. I think we can go even further and
>
On Mon, Nov 16, 2020 at 02:34:34AM -0800, Hugh Dickins wrote:
> Fix to [PATCH v4 15/16] mm/truncate,shmem: Handle truncates that split THPs.
> One machine ran fine, swapping and building in ext4 on loop0 on huge tmpfs;
> one machine got occasional pages of zeros in its .os; one machine couldn't
> g
On Wed, Nov 11, 2020 at 03:53:18PM +0100, David Hildenbrand wrote:
> @@ -144,7 +147,9 @@ void __ref arch_remove_linear_mapping(u64 start, u64 size)
> start = (unsigned long)__va(start);
> flush_dcache_range_chunked(start, start + size, FLUSH_CHUNK_SIZE);
>
> + mutex_lock(&linear_m
Hello,
syzbot found the following issue on:
HEAD commit:e1617422 kmsan: kmsan_percpu_tstate should be a scalar, no..
git tree: https://github.com/google/kmsan.git master
console output: https://syzkaller.appspot.com/x/log.txt?x=164d471250
kernel config: https://syzkaller.appspot.co
1 - 100 of 2398 matches
Mail list logo
