Add a flags member to the dma_map_ops structure with one flag to
indicate support for PCI P2PDMA.
Also, add a helper to check if a device supports PCI P2PDMA.
Signed-off-by: Logan Gunthorpe
---
include/linux/dma-map-ops.h | 3 +++
include/linux/dma-mapping.h | 5 +
kernel/dma/mapping.c
Attempt to find the mapping type for P2PDMA pages on the first
DMA map attempt if it has not been done ahead of time.
Previously, the mapping type was expected to be calculated ahead of
time, but if pages are to come from userspace then there's no
way to ensure the path was checked ahead of time.
When a bio's queue supports PCI P2PDMA, set FOLL_PCI_P2PDMA for
iov_iter_get_pages_flags(). This allows PCI P2PDMA pages to be
passed from userspace and enables the NVMe passthru requests to
use P2PDMA pages.
Signed-off-by: Logan Gunthorpe
---
block/blk-map.c | 7 ++-
1 file changed, 6 inser
On Fri, Nov 06, 2020 at 05:06:59PM +0100, Vincent Guittot wrote:
> > > > While it was clear-cut for 5.9, it's less clear-cut for 5.10-rc2
> > > > although
> > > > the gitsource shows some severe differences depending on the machine
> > > > that
> > > > is worth being extremely cautious about. I w
On Fri, Nov 06, 2020 at 11:55:23AM -0500, Steven Rostedt wrote:
> On Fri, 6 Nov 2020 17:45:37 +0100
> Johan Hovold wrote:
>
> > It's simply specifying alignment when declaring the variable that
> > prevents this optimisation. The relevant code is in the function
> > align_variable() in [1] where
On Fri, Nov 6, 2020 at 11:07 AM Viresh Kumar wrote:
>
> On 05-11-20, 19:23, Rafael J. Wysocki wrote:
> > Index: linux-pm/include/linux/cpufreq.h
> > ===
> > --- linux-pm.orig/include/linux/cpufreq.h
> > +++ linux-pm/include/linux/cpuf
On Fri, Nov 06, 2020 at 03:03:36PM +0100, Greg KH wrote:
> On Fri, Nov 06, 2020 at 04:43:17AM -0800, syzbot wrote:
> > Hello,
> >
> > syzbot found the following issue on:
> >
> > HEAD commit:9e39aef3 usb: misc: brcmstb-usb-pinmap: Make sync_all_pins..
> > git tree:
> > https://git.kern
On 11/6/20 5:17 PM, Rob Herring wrote:
On Fri, 06 Nov 2020 10:18:51 +0100, Amelie Delaunay wrote:
Add binding documentation for the STMicroelectronics STUSB160x Type-C port
controller.
Signed-off-by: Amelie Delaunay
---
.../devicetree/bindings/usb/st,stusb160x.yaml | 85 ++
My name is Mrs CANILA K MALAK from France,
I know that this message might come to you as surprise because we
don't know each other nor have we ever met before but accept it with
an open and positive mind. I have a Very important request that made
me to contact you; I was diagnosed with ovarian can
When system tries to enter S0ix suspend state, just after active load
scenarios, it fails due to PCH current temperature is higher than set
threshold.
This patch introduces delay loop mechanism that allows PCH temperature
to go down below threshold during suspend so it won't fail to enter S0ix.
Add
On Fri, Nov 06, 2020 at 06:07:42PM +0200, Jarkko Sakkinen wrote:
> On Thu, Nov 05, 2020 at 07:10:47PM +0100, Borislav Petkov wrote:
> > On Thu, Nov 05, 2020 at 07:57:45PM +0200, Jarkko Sakkinen wrote:
> > > I'll rather send a full patch set if required.
> >
> > Why if the changes all belong to thi
On 11/3/20 1:05 AM, Nick Terrell wrote:
From: Nick Terrell
Move away from the compatibility wrapper to the zstd-1.4.6 API. This
code is functionally equivalent.
Signed-off-by: Nick Terrell
---
fs/btrfs/zstd.c | 48
1 file changed, 28 inserti
On 11/5/20 6:23 PM, Russ Weight wrote:
> Create a platform driver that can be invoked as a sub
> driver for the Intel MAX10 BMC in order to support
> secure updates. This sub-driver will invoke an
> instance of the FPGA Security Manager class driver
> in order to expose sysfs interfaces for mana
On Mon, Oct 05, 2020 at 05:17:49PM -0700, Atish Patra wrote:
> diff --git a/arch/arm64/kernel/acpi_numa.c b/arch/arm64/kernel/acpi_numa.c
> index 7ff800045434..96502ff92af5 100644
> --- a/arch/arm64/kernel/acpi_numa.c
> +++ b/arch/arm64/kernel/acpi_numa.c
> @@ -117,16 +117,3 @@ void __init acpi_num
On 11/3/20 1:05 AM, Nick Terrell wrote:
From: Nick Terrell
Please pull from
g...@github.com:terrelln/linux.git tags/v5-zstd-1.4.6
to get these changes. Alternatively the patchset is included.
Where did we come down on the code formatting question? Personally I'm of the
mind that as lo
On 11/5/20 6:23 PM, Russ Weight wrote:
> Extend the MAX10 BMC Secure Update driver to provide sysfs
> files to expose the canceled code signing key (CSK) bit
> vectors. These use the standard bitmap list format
> (e.g. 1,2-6,9).
>
> Signed-off-by: Russ Weight
> Reviewed-by: Tom Rix
> ---
> v4:
Hi Jason,
On Fri, Nov 06, 2020 at 11:55:14AM -0400, Jason Gunthorpe wrote:
...
> + if (gup_flags & FOLL_PIN) {
> + seq = raw_read_seqcount(¤t->mm->write_protect_seq);
> + if (seq & 1)
> + return 0;
> + }
> +
...
> + if (gup_flags & FOLL_PIN)
On 6 November 2020 16:32:00 GMT, Alex Williamson
wrote:
>On Fri, 6 Nov 2020 11:17:21 +0100
>Paolo Bonzini wrote:
>
>> On 04/11/20 10:35, David Woodhouse wrote:
>> > On Wed, 2020-10-28 at 15:35 +0100, Peter Zijlstra wrote:
>> >> On Tue, Oct 27, 2020 at 02:39:43PM +, David Woodhouse wrote
On Thu, Nov 05, 2020 at 10:07:00AM -0800, Palmer Dabbelt wrote:
> On Mon, 05 Oct 2020 17:17:47 PDT (-0700), Atish Patra wrote:
> > arch/arm64/Kconfig| 1 +
> > arch/arm64/include/asm/numa.h | 45 +
> > arch/arm64/kernel/acpi_numa.c
On 11/6/20 8:41 AM, Sowjanya Komatineni wrote:
On 11/6/20 8:11 AM, Rob Herring wrote:
On Thu, 05 Nov 2020 18:16:05 -0800, Sowjanya Komatineni wrote:
This patch converts text based dt-binding document to YAML based
dt-binding document.
Signed-off-by: Sowjanya Komatineni
---
.../devicetree
On 11/5/20 10:18 PM, Stephen Rothwell wrote:
> Hi all,
>
> Changes since 20201105:
>
on x86_64:
ld: sound/soc/sof/sof-pci-dev.o: in function `sof_pci_probe':
sof-pci-dev.c:(.text+0x5c): undefined reference to `snd_intel_dsp_driver_probe'
Full randconfig file is attached.
--
~Randy
Reported-
On Fri, Nov 06, 2020 at 10:00:35AM -0700, Logan Gunthorpe wrote:
> Introduce pci_mmap_p2pmem() which is a helper to allocate and mmap
> a hunk of p2pmem into userspace.
>
> Signed-off-by: Logan Gunthorpe
> drivers/pci/p2pdma.c | 104 +
> include/linux/pc
ANWALTSKANZLEI: ABOGADO VITALIS MANUEL COLON.
Calle de Raimundo Fernández Villaverde, 50, 28010 Madrid, Spanien.
E mail. analyn.hernan...@mail2lawyer.com
AKTENZEICHEN: JMCB-ES/11-547/05-17
KUNDENNUMMER: MD-DE/LOT-516
Abschließende Mitteilung für die Zahlung des nicht beanspruchten Preisgeldes.
On 2020-11-06 10:22 a.m., Jason Gunthorpe wrote:
> On Fri, Nov 06, 2020 at 10:00:35AM -0700, Logan Gunthorpe wrote:
>> Introduce pci_mmap_p2pmem() which is a helper to allocate and mmap
>> a hunk of p2pmem into userspace.
>>
>> Signed-off-by: Logan Gunthorpe
>> drivers/pci/p2pdma.c | 104
From: Arnd Bergmann
The ethtool compat ioctl handling is hidden away in net/socket.c,
which introduces a couple of minor oddities:
- The implementation may end up diverging, as seen in the RXNFC
extension in commit 84a1d9c48200 ("net: ethtool: extend RXNFC
API to support RSS spreading of fil
Op 05.11.2020 om 21:23 schreef David Hildenbrand:
So just to make sure I understand you correctly, you'd like to see if the
problem with ath11k driver on my hardware persists when I boot pristine
5.10-rc2 kernel (without reverting commit
7fef431be9c9ac255838a9578331567b9dba4477) and with page_
From: Arnd Bergmann
compat_ifreq_ioctl() is one of the last users of copy_in_user() and
compat_alloc_user_space(), as it attempts to convert the 'struct ifreq'
arguments from 32-bit to 64-bit format as used by dev_ioctl() and a
couple of socket family specific interpretations.
The current implem
From: Arnd Bergmann
SIOCGIFMAP and SIOCSIFMAP currently require compat_alloc_user_space()
and copy_in_user() for compat mode.
Move the compat handling into the location where the structures are
actually used, to avoid using those interfaces and get a clearer
implementation.
Signed-off-by: Arnd
From: Arnd Bergmann
The dev_ifconf() calling conventions make compat handling
more complicated than necessary, simplify this by moving
the in_compat_syscall() check into the function.
The implementation can be simplified further, based on the
knowledge that the dynamic registration is only ever u
From: Arnd Bergmann
This is the third version of my seires, now spanning four patches
instead of two, with a new approach for handling struct ifreq
compatibility after I realized that my earlier approach introduces
additional problems.
The idea here is to always push down the compat conversion
d
On Fri, Nov 6, 2020 at 9:14 AM Catalin Marinas wrote:
>
> On Mon, Oct 05, 2020 at 05:17:49PM -0700, Atish Patra wrote:
> > diff --git a/arch/arm64/kernel/acpi_numa.c b/arch/arm64/kernel/acpi_numa.c
> > index 7ff800045434..96502ff92af5 100644
> > --- a/arch/arm64/kernel/acpi_numa.c
> > +++ b/arch/a
On Mon, Oct 12, 2020 at 08:38:25AM -0700, Yu-cheng Yu wrote:
> +[1] Overview
> +
> +
> +Control-flow Enforcement Technology (CET) is an Intel processor feature
> +that provides protection against return/jump-oriented programming (ROP)
> +attacks. It can be set up to protect both applic
The following changes since commit 9bd77a9ce31dd242fece27219d14fbee5068dd85:
spi: fsl-dspi: fix wrong pointer in suspend/resume (2020-11-04 17:50:24 +)
are available in the Git repository at:
https://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi.git
tags/spi-fix-v5.10-rc2-2
for y
On Fri, Nov 06, 2020 at 10:00:36AM -0700, Logan Gunthorpe wrote:
> Allow userspace to obtain CMB memory by mmaping the controller's
> char device. The mmap call allocates and returns a hunk of CMB memory,
> (the offset is ignored) so userspace does not have control over the
> address within the CMB
On Fri, Nov 06, 2020 at 03:23:27PM +0100, Christophe Roullier wrote:
> From: Etienne Carriere
>
> Do not print an error trace when deferring probe for clock resources.
>
> Signed-off-by: Etienne Carriere
> Signed-off-by: Christophe Roullier
Reviewed-by: Guenter Roeck
> ---
> drivers/watchd
On Thu, 5 Nov 2020 15:13:04 +0530, Rayagonda Kokatanur wrote:
>> So the suggestion was to set HW threshold for rx fifo interrupt, not
>> really a SW property. By setting it in DT, makes it easier to
>> customize for target system, module param needs or ioctl makes it
>> dependent on userpsace to co
On Fri, Nov 06, 2020 at 10:28:00AM -0700, Logan Gunthorpe wrote:
>
>
> On 2020-11-06 10:22 a.m., Jason Gunthorpe wrote:
> > On Fri, Nov 06, 2020 at 10:00:35AM -0700, Logan Gunthorpe wrote:
> >> Introduce pci_mmap_p2pmem() which is a helper to allocate and mmap
> >> a hunk of p2pmem into userspace
On Fri, Nov 06, 2020 at 05:57:21PM +0100, Alexandre Chartre wrote:
>
>
> On 11/3/20 2:20 AM, Joel Fernandes wrote:
> > Hi Alexandre,
> >
> > Sorry for late reply as I was working on the snapshotting patch...
> >
> > On Fri, Oct 30, 2020 at 11:29:26AM +0100, Alexandre Chartre wrote:
> > >
> > >
On 2020-11-06 10:39 a.m., Jason Gunthorpe wrote:
> On Fri, Nov 06, 2020 at 10:00:36AM -0700, Logan Gunthorpe wrote:
>> Allow userspace to obtain CMB memory by mmaping the controller's
>> char device. The mmap call allocates and returns a hunk of CMB memory,
>> (the offset is ignored) so userspa
On Wed, Nov 04, 2020 at 04:54:16PM +0200, Jarkko Sakkinen wrote:
Good morning, I hope the week has gone well for everyone.
> From: Sean Christopherson
>
> Background
> ==
>
> 1. SGX enclave pages are populated with data by copying from normal memory
>via ioctl() (SGX_IOC_ENCLAVE_AD
This patch series serves to clean up the MHI host driver by removing an
unnecessary counter and an unused function. It also renames a function to make
it clearly worded. There is currently no user of this exported function which
makes it is safe to do so now.
Bug fixes include adding a missing EXP
The mhi_get_exec_env() APIs can be used by the controller drivers
to query the execution environment of the MHI device. Expose it
so it can be used in some scenarios to determine behavior of
controllers.
Signed-off-by: Bhaumik Bhatt
---
drivers/bus/mhi/core/internal.h | 1 -
drivers/bus/mhi/core
There is an extra 'i' counter in the mhi_firmware_copy() function
which is unused. Remove it to clean-up code and reduce stack
space as well as improve efficiency of the function.
Fixes: cd457afb1667 ("bus: mhi: core: Add support for downloading firmware over
BHIe")
Reported-by: kernel test robot
mhi_download_rddm_img() uses a shorter version of the word image.
Expand it and rename the function to mhi_download_rddm_image().
Signed-off-by: Bhaumik Bhatt
Reviewed-by: Manivannan Sadhasivam
---
drivers/bus/mhi/core/boot.c | 4 ++--
include/linux/mhi.h | 6 +++---
2 files changed, 5
Add missing EXPORT_SYMBOL_GPL() declaration for mhi_get_mhi_state()
API.
Signed-off-by: Bhaumik Bhatt
Reviewed-by: Manivannan Sadhasivam
---
drivers/bus/mhi/core/main.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/bus/mhi/core/main.c b/drivers/bus/mhi/core/main.c
index 2cff5dd..7
If MHI is unable to determine the execution environment during
the panic path, host must skip the RDDM download. This can happen
if the BHI offset read or the BHI_EXECENV register read fails
indicating that the underlying transport is unresponsive. Hence,
there is no need to trigger an RDDM using S
On Fri, Nov 06, 2020 at 07:56:23AM -0800, Lokesh Gidra wrote:
> This change adds a new LSM hook, inode_init_security_anon(), that will
> be used while creating secure anonymous inodes. The hook allows/denies
> its creation and assigns a security context to the inode.
>
> The new hook accepts an op
The mhi_fw_load_worker() function no longer exists. Remove its
declaration as part of code clean-up.
Signed-off-by: Bhaumik Bhatt
Reviewed-by: Manivannan Sadhasivam
---
drivers/bus/mhi/core/internal.h | 1 -
1 file changed, 1 deletion(-)
diff --git a/drivers/bus/mhi/core/internal.h b/drivers/b
On Fri, Nov 06, 2020 at 07:56:24AM -0800, Lokesh Gidra wrote:
> +/**
> + * Like anon_inode_getfd(), but creates a new !S_PRIVATE anon inode rather
> than
> + * reuse the singleton anon inode, and call the anon_init_security_anon() LSM
> + * hook. This allows the inode to have its own security cont
Remove unsupported ABI that has been re-introduced due to a rebase hunk.
This ABI has been moved in the past in commit b299d00420e2
("IIO: stm32: Remove quadrature related functions from trigger driver")
This also fixes a couple of warnings seen with:
./scripts/get_abi.pl validate 2>&1|grep iio
F
On Fri, Nov 06, 2020 at 08:48:50AM -0800, Raj, Ashok wrote:
> > The IMS flag belongs in the platform not in the devices.
>
> This support is mostly a SW thing right? we don't need to muck with
> platform/ACPI for that matter.
Something needs to tell the guest OS platform what to do, so you need
On Fri, Nov 06, 2020 at 11:24:13AM +0900, Masami Hiramatsu wrote:
> > Right, this is expected. The patch is based on jpoimboe/objtool/core,
> > which has extra commits.
>
> Has that series already submitted to LKML? I need to look at the series too.
> Or, Josh, can you review it and if it is OK, p
On Fri, Nov 06, 2020 at 03:00:28PM +0100, Guennadi Liakhovetski wrote:
> On Fri, Nov 06, 2020 at 02:15:45PM +0100, Guennadi Liakhovetski wrote:
> > Hi Mathieu, Arnaud,
> >
> > On Thu, Nov 05, 2020 at 03:50:28PM -0700, Mathieu Poirier wrote:
> > > From: Arnaud Pouliquen
> > >
> > > Make the RPMSG
On 2020-11-06 10:42 a.m., Jason Gunthorpe wrote:
> On Fri, Nov 06, 2020 at 10:28:00AM -0700, Logan Gunthorpe wrote:
>>
>>
>> On 2020-11-06 10:22 a.m., Jason Gunthorpe wrote:
>>> On Fri, Nov 06, 2020 at 10:00:35AM -0700, Logan Gunthorpe wrote:
Introduce pci_mmap_p2pmem() which is a helper to
On Fri, 2020-11-06 at 11:05 +0800, Hillf Danton wrote:
> On Thu, 5 Nov 2020 14:15:08 -0500
> > Matthew Wilcox pointed out that the i915 driver opportunistically
> > allocates tmpfs memory, but will happily reclaim some of its
> > pool if no memory is available.
> >
> > Make sure the gfp mask used
On Fri, Nov 06, 2020 at 10:58:58AM +0800, Li, Aubrey wrote:
> >
> > -- workload D, new added syscall workload, performance drop in cs_on:
> > +--+--+---+
> > | | ** | will-it-scale * 192 |
> > |
On 11/6/20 9:43 AM, Dr. Greg wrote:
> In light of this, given the decision by the driver authors to not
> fully equip the driver with EDMM support, the mprotect protection
> requirements are straight forward and minimalistic. All that is
> needed is a binary valued variable, set on the command-lin
On Fri, Nov 06, 2020 at 11:00:53AM +, Mark Brown wrote:
> On Fri, Nov 06, 2020 at 03:18:15AM -0700, Nathan Chancellor wrote:
> > On Thu, Nov 05, 2020 at 04:45:46PM +, Mark Brown wrote:
>
> > > Martin Hundebøll (1):
> > > spi: bcm2835: fix gpio cs level inversion
>
> > Why did this g
> On Nov 5, 2020, at 7:47 PM, Alex Shi wrote:
>
> Couple macro are duplicated defined and they are not used. So
> to tame gcc, let's remove them.
>
> fs/hfsplus/part_tbl.c:26:0: warning: macro "HFS_DRVR_DESC_MAGIC" is not
> used [-Wunused-macros]
> fs/hfsplus/part_tbl.c:30:0: warning: macro "
Hi Adrian,
On Fri, Nov 06, 2020 at 01:50:13PM +0200, Adrian Ratiu wrote:
> I tested Arnd's kernel patch from the LLVM bugtracker [1], but with the
> Clang v10.0.1 I still get warnings like the following even though the
> __restrict workaround seems to affect the generated instructions:
>
> ./incl
On Fri, Nov 06, 2020 at 09:47:22AM +0800, Boqun Feng wrote:
> On Thu, Nov 05, 2020 at 02:00:14PM -0800, paul...@kernel.org wrote:
> > From: "Paul E. McKenney"
> >
> > Signed-off-by: Paul E. McKenney
> > ---
> > tools/memory-model/Documentation/glossary.txt | 155
> > ++
On Fri, Nov 06, 2020 at 02:53:31PM +0800, Chao Yu wrote:
> +#if defined(__KERNEL__)
> +struct compat_f2fs_gc_range {
> + u32 sync;
> + compat_u64 start;
> + compat_u64 len;
> +};
There's no need to use '#if defined(__KERNEL__)' in kernel source files.
Likewise for compat_f2fs_move_ran
On Fri, Nov 06, 2020 at 03:46:36PM +0100, Arnd Bergmann wrote:
> On Fri, Nov 6, 2020 at 6:14 AM Adrian Ratiu
> wrote:
> >
> > From: Nathan Chancellor
> >
> > Drop warning because kernel now requires GCC >= v4.9 after
> > commit 6ec4476ac825 ("Raise gcc version requirement to 4.9").
> >
> > Repor
On Fri, Nov 06, 2020 at 11:59:30AM -0500, Alan Stern wrote:
> On Thu, Nov 05, 2020 at 02:00:14PM -0800, paul...@kernel.org wrote:
> > From: "Paul E. McKenney"
> >
> > Signed-off-by: Paul E. McKenney
> > ---
> > tools/memory-model/Documentation/glossary.txt | 155
> > ++
On Fri, Nov 06, 2020 at 12:27:54PM +0100, Paolo Bonzini wrote:
> On 01/10/20 03:22, Peter Xu wrote:
> > +
> > +static void vcpu_sig_handler(int sig)
> > +{
> > + TEST_ASSERT(sig == SIG_IPI, "unknown signal: %d", sig);
> > +}
> > +
>
> Unless you also use run->immediate_exit in vcpu_kick, this is
t;Rafael J. Wysocki"
Cc: Len Brown
Cc: Pavel Machek
Cc: linux...@vger.kernel.org
Cc: Michael Turquette
Cc: Stephen Boyd
Cc: linux-...@vger.kernel.org
Cc: Taniya Das
Cc: linux-n...@vger.kernel.org
---
include/linux/pm_clock.h |9 +
1 file changed, 9 insertions(+)
--- linu
On Fri, Nov 06, 2020 at 06:04:15AM +, Shinichiro Kawasaki wrote:
> Greetings,
>
> I observe "WARNING: can't access registers at asm_common_interrupt+0x1e/0x40"
> in my kernel test system repeatedly, which is printed by unwind_next_frame()
> in
> "arch/x86/kernel/unwind_orc.c". Syzbot already
On 11/6/20 6:43 PM, Joel Fernandes wrote:
On Fri, Nov 06, 2020 at 05:57:21PM +0100, Alexandre Chartre wrote:
On 11/3/20 2:20 AM, Joel Fernandes wrote:
Hi Alexandre,
Sorry for late reply as I was working on the snapshotting patch...
On Fri, Oct 30, 2020 at 11:29:26AM +0100, Alexandre Chart
On Fri, Nov 06, 2020 at 10:53:45AM -0700, Logan Gunthorpe wrote:
>
>
> On 2020-11-06 10:42 a.m., Jason Gunthorpe wrote:
> > On Fri, Nov 06, 2020 at 10:28:00AM -0700, Logan Gunthorpe wrote:
> >>
> >>
> >> On 2020-11-06 10:22 a.m., Jason Gunthorpe wrote:
> >>> On Fri, Nov 06, 2020 at 10:00:35AM -07
On 06/11/20 19:06, Peter Xu wrote:
+ pthread_sigmask(0, NULL, sigset);
Not extremely important, but still better with SIG_BLOCK imho, since it seems
not all archs defined SIG_BLOCK as zero.
If the second argument is NULL, the first is unused.
Paolo
Hi Linus,
Please pull the following Kselftest fixes update for Linux 5.10-rc3.
This Kselftest fixes update for Linux 5.10-rc3 consists of fixes to
ftrace test and several fixes from Tommi Rantala for several tests.
Please note that these fixes have been in next for a while. I dropped
a minor fi
> Cc: Stephen Boyd
> Cc: linux-...@vger.kernel.org
> Cc: Taniya Das
> Cc: linux-n...@vger.kernel.org
This fixes the same build failure that I saw with s390 all{mod,yes}config.
Build-tested-by: Nathan Chancellor
Reviewed-by: Nathan Chancellor
> ---
> include/linux/pm_clock.h
On 11/6/2020 9:34 AM, Borislav Petkov wrote:
On Mon, Oct 12, 2020 at 08:38:25AM -0700, Yu-cheng Yu wrote:
+[1] Overview
+
+
+Control-flow Enforcement Technology (CET) is an Intel processor feature
+that provides protection against return/jump-oriented programming (ROP)
+attacks. It
On 2020-11-06 11:09 a.m., Jason Gunthorpe wrote:
>> Ah, hmm, yes. I guess the pages have to be hooked and returned to the
>> genalloc through free_devmap_managed_page().
>
> That sounds about right, but in this case it doesn't need the VMA
> operations.
>
>> Seems like it might be doable... b
Reading the EDID of this panel shows that these flags should be set. Set
them so that we match what is in the EDID.
Cc: Douglas Anderson
Cc: Bjorn Andersson
Fixes: b0c664cc80e8 ("panel: simple: Add BOE NV133FHM-N61")
Signed-off-by: Stephen Boyd
---
drivers/gpu/drm/panel/panel-simple.c | 1 +
1
On Wed, Nov 04, 2020 at 07:48:37PM +0300, Dmitry Osipenko wrote:
> We're going to modularize Tegra EMC drivers and some of the EMC-clock
> driver symbols need to be exported, let's export them.
>
> Acked-by: Thierry Reding
> Signed-off-by: Dmitry Osipenko
> ---
> drivers/clk/tegra/clk-tegra20-e
On Fri, Nov 06, 2020 at 05:25:17AM -0500, Paolo Bonzini wrote:
> kvm_clear_guest_page is not used anymore after "KVM: X86: Don't track dirty
> for KVM_SET_[TSS_ADDR|IDENTITY_MAP_ADDR]", except from kvm_clear_guest.
> We can just inline it in its sole user.
>
> Signed-off-by: Paolo Bonzini
Review
On Thu, Nov 05, 2020 at 02:06:49PM -0500, Konrad Rzeszutek Wilk wrote:
> .
> > > Right, so I am wondering if we can do this better.
> > >
> > > That is you are never going to get any 32-bit devices with SEV right? That
> > > is there is nothing that bounds you to always use the memory below 4GB?
>
On Fri, Nov 06, 2020 at 07:24:55PM +0800, Alex Shi wrote:
> Otherwise it cause gcc warning:
> ^~~
> ../mm/filemap.c:830:14: warning: no previous prototype for
> ‘__add_to_page_cache_locked’ [-Wmissing-prototypes]
> noinline int __add_to_page_cache_locked(struct page *page,
>
On Wed, Nov 04, 2020 at 07:48:38PM +0300, Dmitry Osipenko wrote:
> The tegra_read_ram_code() is used by EMC drivers and we're going to make
> these driver modular, hence this function needs to be exported.
>
> Acked-by: Thierry Reding
> Signed-off-by: Dmitry Osipenko
> ---
> drivers/soc/tegra/f
On Wed, Nov 04, 2020 at 07:48:39PM +0300, Dmitry Osipenko wrote:
> Drivers that use tegra_sku_info and have COMPILE_TEST are failing to be
> build due to the missing stub for tegra_sku_info, thus add the missing
> stub.
>
> Signed-off-by: Dmitry Osipenko
> ---
> include/soc/tegra/fuse.h | 4
On Fri, Nov 06, 2020 at 07:15:31PM +0100, Paolo Bonzini wrote:
> On 06/11/20 19:06, Peter Xu wrote:
> > > + pthread_sigmask(0, NULL, sigset);
> > Not extremely important, but still better with SIG_BLOCK imho, since it
> > seems
> > not all archs defined SIG_BLOCK as zero.
> >
>
> If the second a
Hi Boris,
> -Original Message-
> From: Boris Brezillon
> Sent: Friday, November 6, 2020 7:30 PM
> To: Chin-Ting Kuo
> Subject: Re: [v3 4/4] spi: aspeed: Add ASPEED FMC/SPI memory controller
> driver
>
> +Tudor and Vignesh
>
> On Fri, 6 Nov 2020 10:21:06 +
> Chin-Ting Kuo wrote:
>
Implementation of support for parameterized testing in KUnit.
This approach requires the creation of a test case using the
KUNIT_CASE_PARAM macro that accepts a generator function as input.
This generator function should return the next parameter given the
previous parameter in parameterized tests.
On Fri, Nov 06, 2020 at 10:16:47AM -0800, Yu, Yu-cheng wrote:
> In the current shell, if GLIBC_TUNABLES variable is set as such,
> applications started will have CET features disabled. I can put more
> details here, or maybe a reference to the GLIBC man pages.
Why do you keep repeating "the curre
On Wed, Nov 04, 2020 at 07:48:41PM +0300, Dmitry Osipenko wrote:
> Tegra20 External Memory Controller talks to DRAM chips and it needs to be
> reprogrammed when memory frequency changes. Tegra Memory Controller sits
> behind EMC and these controllers are tightly coupled. This patch adds the
> new p
On Wed, Nov 04, 2020 at 07:48:40PM +0300, Dmitry Osipenko wrote:
> There is superfluous zero in the registers base address and registers
> size should be twice bigger.
>
> Acked-by: Rob Herring
> Acked-by: Thierry Reding
> Signed-off-by: Dmitry Osipenko
> ---
> .../bindings/memory-controllers/
Modify fs/ext4/inode-test.c to use the parameterized testing
feature of KUnit.
Signed-off-by: Arpitha Raghunandan <98.a...@gmail.com>
---
Changes v4->v5:
- No change to this patch of the patch series
Changes v3->v4:
- Modification based on latest implementation of KUnit parameterized testing
Chang
On Wed, Nov 04, 2020 at 07:48:43PM +0300, Dmitry Osipenko wrote:
> External Memory Controller is interconnected with memory controller and
> with external memory. Document new interconnect property which turns EMC
> into interconnect provider.
>
> Acked-by: Rob Herring
> Signed-off-by: Dmitry Osi
On Wed, Nov 04, 2020 at 07:48:42PM +0300, Dmitry Osipenko wrote:
> Memory controller is interconnected with memory clients and with the
> External Memory Controller. Document new interconnect property which
> turns memory controller into interconnect provider.
>
> Acked-by: Rob Herring
> Signed-o
On Wed, Nov 04, 2020 at 07:48:45PM +0300, Dmitry Osipenko wrote:
> Memory controller is interconnected with memory clients and with the
> External Memory Controller. Document new interconnect property which
> turns memory controller into interconnect provider.
>
> Acked-by: Rob Herring
> Signed-o
On Wed, Nov 04, 2020 at 07:48:44PM +0300, Dmitry Osipenko wrote:
> The SoC core voltage can't be changed without taking into account the
> clock rate of External Memory Controller. Document OPP table that will
> be used for dynamic voltage frequency scaling, taking into account EMC
> voltage requir
On 11/6/2020 10:28 AM, Borislav Petkov wrote:
On Fri, Nov 06, 2020 at 10:16:47AM -0800, Yu, Yu-cheng wrote:
In the current shell, if GLIBC_TUNABLES variable is set as such,
applications started will have CET features disabled. I can put more
details here, or maybe a reference to the GLIBC man p
On Wed, Nov 04, 2020 at 07:48:46PM +0300, Dmitry Osipenko wrote:
> External memory controller is interconnected with memory controller and
> with external memory. Document new interconnect property which turns
> External Memory Controller into interconnect provider.
>
> Acked-by: Rob Herring
> Si
On Wed, Nov 04, 2020 at 07:48:47PM +0300, Dmitry Osipenko wrote:
> Document new OPP table and voltage regulator properties which are needed
> for supporting dynamic voltage-frequency scaling of the memory controller.
> Some boards may have a fixed core voltage regulator, hence it's optional
> becau
On Wed, Nov 04, 2020 at 07:48:48PM +0300, Dmitry Osipenko wrote:
> Memory controller is interconnected with memory clients and with the
> External Memory Controller. Document new interconnect property which
> turns memory controller into interconnect provider.
>
> Signed-off-by: Dmitry Osipenko
>
The following commit has been merged into the ras/core branch of tip:
Commit-ID: 15af36596ae305aefc8c502c2d3e8c58221709eb
Gitweb:
https://git.kernel.org/tip/15af36596ae305aefc8c502c2d3e8c58221709eb
Author:Zhen Lei
AuthorDate:Fri, 06 Nov 2020 22:12:16 +08:00
Committer:
On Wed, Nov 04, 2020 at 07:48:51PM +0300, Dmitry Osipenko wrote:
> Document EMC DFS OPP table and interconnect paths that will be used
> for scaling of system's memory bandwidth based on memory utilization
> statistics. Previously ACTMON was supposed to drive EMC clock rate
> directly, but now it s
On Wed, Nov 04, 2020 at 07:48:49PM +0300, Dmitry Osipenko wrote:
> External memory controller is interconnected with memory controller and
> with external memory. Document new interconnect property which turns
> External Memory Controller into interconnect provider.
>
> Reviewed-by: Rob Herring
>
On Wed, Nov 04, 2020 at 07:48:52PM +0300, Dmitry Osipenko wrote:
> Most of Host1x devices have at least one memory client. These clients
> are directly connected to the memory controller. The new interconnect
> properties represent the memory client's connection to the memory
> controller.
>
> Rev
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