Met vriendelijke groet / kind regards,
Mike Looijmans
System Expert
TOPIC Embedded Products B.V.
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The Netherlands
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On 0
On 2020-11-05 09:30, Brad Campbell wrote:
On 5/11/20 6:56 pm, Henrik Rydberg wrote:
Hi Brad,
Great to see this effort, it is certainly an area which could be improved.
After having seen several generations of Macbooks while modifying much of that
code, it became clear that the SMC communicati
On Thu, Nov 05, 2020 at 10:42:15AM +0100, Daniel Vetter wrote:
> On Wed, Nov 04, 2020 at 04:53:38PM +0530, Deepak R Varma wrote:
> > idr_init() uses base 0 which is an invalid identifier. The new function
> > idr_init_base allows IDR to set the ID lookup from base 1. This avoids
> > all lookups tha
I wish to be personally CC'ed the answers/comments posted to the list in
response to my posting.
This reverts commit ba806f98f868ce107aa9c453fef751de9980e4af.
Disabling AGP leaves some hardware without working alternative
on some platforms. For example, PCI GPUs are known to be broken
on K8 and K
I wish to be personally CC'ed the answers/comments posted to the list in
response to my posting.
This patch prevents to fail r600_ring_test on ATI PCI devices
hosted on K8 or K10 platforms, this error:
> [drm:r600_ring_test [radeon]] *ERROR* radeon:
> ring 0 test failed (scratch(0x8504)=0xCAFED
Hi Jens,
On Mon, Sep 21, 2020 at 8:22 AM Lad Prabhakar
wrote:
>
> Document SATA support for the RZ/G2H, no driver change required.
>
> Signed-off-by: Lad Prabhakar
> Reviewed-by: Marian-Cristian Rotariu
>
> Acked-by: Rob Herring
> Reviewed-by: Geert Uytterhoeven
> ---
> Hi All,
>
> This patc
On Thu, 5 Nov 2020 at 11:06, Viresh Kumar wrote:
>
> On 05-11-20, 10:45, Ulf Hansson wrote:
> > + Viresh
>
> Thanks Ulf. I found a bug in OPP core because you cc'd me here :)
Happy to help. :-)
>
> > On Thu, 5 Nov 2020 at 00:44, Dmitry Osipenko wrote:
> > I need some more time to review this, b
On Wed, 4 Nov 2020 at 19:37, 'David Brazdil' via kernel-team
wrote:
>
> Add a handler of CPU_SUSPEND host PSCI SMCs. When invoked, it determines
> whether the requested power state loses context, ie. whether it is
> indistinguishable from a WHI or whether it is a deeper sleep state that
Do you mea
On 05-11-20, 11:34, Ulf Hansson wrote:
> I am not objecting about scaling the voltage through a regulator,
> that's fine to me. However, encoding a power domain as a regulator
> (even if it may seem like a regulator) isn't. Well, unless Mark Brown
> has changed his mind about this.
>
> In this case
In gpiochip_setup_dev() the call to gpiolib_cdev_register() indirectly
calls device_add(). This is still required for the sysfs even when
CONFIG_GPIO_CDEV is not selected in the build.
Replace the stubbed functions in gpiolib-cdev.h with macros in gpiolib.c
that perform the required device_add()
On 11/5/20 10:04 AM, Kalle Valo wrote:
(changing the subject, adding more lists and people)
Pavel Procopiuc writes:
Op 04.11.2020 om 10:12 schreef Kalle Valo:
Yeah, it is unfortunately time consuming but it is the best way to get
bottom of this.
I have found the commit that breaks things f
Function sctp_dst_mtu() never returns lower MTU than
SCTP_TRUNC4(SCTP_DEFAULT_MINSEGMENT) even when the actual MTU is less,
in which case we rely on the IP fragmentation and must enable it.
Signed-off-by: Petr Malat
---
net/sctp/output.c | 8
1 file changed, 8 insertions(+)
diff --git
Op 05.11.2020 om 11:42 schreef Vlastimil Babka:
Let me paste from the ath11k discussion:
* Relevant errors from the log:
# journalctl -b | grep -iP '05:00|ath11k'
Nov 02 10:41:26 razor kernel: pci :05:00.0: [17cb:1101] type 00 class
0x028000
Nov 02 10:41:26 razor kernel: pci :05:00.0:
David Hildenbrand writes:
>> Am 05.11.2020 um 03:53 schrieb Michael Ellerman :
>>
>> David Hildenbrand writes:
>>> Let's use alloc_contig_pages() for allocating memory and remove the
>>> linear mapping manually via arch_remove_linear_mapping(). Mark all pages
>>> PG_offline, such that they will
Hello,
This series adds Global Clock Controller (GCC) and RPMh clock support
for SDX55 SoC from Qualcomm with relevant DT bindings.
This series has been tested on SDX55 MTP board. The dts patches for this
SoC/board will be posted later.
Thanks,
Mani
Changes in v2:
* Modified the GCC Kconfig sy
From: Vinod Koul
Add compatible for SDX55 RPMHCC and DT include.
Signed-off-by: Vinod Koul
Signed-off-by: Manivannan Sadhasivam
Reviewed-by: Bjorn Andersson
---
Documentation/devicetree/bindings/clock/qcom,rpmhcc.yaml | 1 +
include/dt-bindings/clock/qcom,rpmh.h| 1 +
2 f
From: Vinod Koul
Add device tree bindings for global clock controller on SDX55 SoCs.
Signed-off-by: Vinod Koul
Signed-off-by: Manivannan Sadhasivam
---
.../bindings/clock/qcom,gcc-sdx55.yaml| 71 +++
include/dt-bindings/clock/qcom,gcc-sdx55.h| 112 ++
2 fi
Add support for following clocks maintained by RPMh in SDX55 SoCs.
* BI TCXO
* RF_CLK1
* RF_CLK1_AO
* RF_CLK2
* RF_CLK2_AO
* QPIC (Qualcomm Technologies, Inc. Parallel Interface Controller)
Signed-off-by: Manivannan Sadhasivam
---
drivers/clk/qcom/clk-rpmh.c | 20
1 file ch
From: Naveen Yadav
Add Global Clock Controller (GCC) support for SDX55 SoCs from Qualcomm.
Signed-off-by: Naveen Yadav
[mani: converted to parent_data, commented critical clocks, cleanups]
Signed-off-by: Manivannan Sadhasivam
---
drivers/clk/qcom/Kconfig |7 +
drivers/clk/qcom/Makefil
This test will treat all non-zero return codes as failures, it will
make the pmtu.sh test script being marked as FAILED when some
sub-test got skipped.
Improve the result processing by
* Only mark the whole test script as SKIP when all of the
sub-tests were skipped
* If the sub-tests were
This test uses return code 2 as a hard-coded skipped state, let's use
the kselftest framework skip code variable $ksft_skip instead to make
it more readable and easier to maintain.
Signed-off-by: Po-Hsu Lin
---
tools/testing/selftests/net/pmtu.sh | 64 ++---
1 fil
The pmtu.sh test script treats all non-zero return code as a failure,
thus it will be marked as FAILED when some sub-test got skipped.
This patchset will:
1. Use the kselftest framework skip code $ksft_skip to replace the
hardcoded SKIP return code.
2. Improve the result processing, the t
On Wed, Nov 04, 2020 at 09:51:23AM -0800, Guenter Roeck wrote:
> On Tue, Nov 03, 2020 at 09:30:51PM +0100, Greg Kroah-Hartman wrote:
> > This is the start of the stable review cycle for the 5.9.4 release.
> > There are 391 patches in this series, all will be posted as a response
> > to this one. I
On Thu, Nov 05, 2020 at 10:21:33AM +0100, Marco Elver wrote:
> Instead of removing the fault handling portion of the stack trace based
> on the fault handler's name, just use struct pt_regs directly.
>
> Change kfence_handle_page_fault() to take a struct pt_regs, and plumb it
> through to kfence_r
On Tue, Oct 27, 2020 at 1:17 PM Bartosz Golaszewski wrote:
> From: Bartosz Golaszewski
>
> Andy brought to my attention the fact that users allocating an array of
> equally sized elements should check if the size multiplication doesn't
> overflow. This is why we have helpers like kmalloc_array()
On Wed, Nov 04, 2020 at 12:42:46PM +0530, Naresh Kamboju wrote:
> On Wed, 4 Nov 2020 at 02:07, Greg Kroah-Hartman
> wrote:
> >
> > This is the start of the stable review cycle for the 5.9.4 release.
> > There are 391 patches in this series, all will be posted as a response
> > to this one. If any
diff --git a/Documentation/media/uapi/v4l/colorspaces-defs.rst
b/Documentation/media/uapi/v4l/colorspaces-defs.rst
index f24615544792..16e46bec8093 100644
--- a/Documentation/media/uapi/v4l/colorspaces-defs.rst
+++ b/Documentation/media/uapi/v4l/colorspaces-defs.rst
@@ -29,8 +29,7 @@ whole range,
I'm announcing the release of the 4.19.155 kernel.
All users of the 4.19 kernel series must upgrade.
The updated 4.19.y git tree can be found at:
git://git.kernel.org/pub/scm/linux/kernel/git/stable/linux-stable.git
linux-4.19.y
and can be browsed at the normal kernel.org git web browser
I'm announcing the release of the 4.14.204 kernel.
All users of the 4.14 kernel series must upgrade.
The updated 4.14.y git tree can be found at:
git://git.kernel.org/pub/scm/linux/kernel/git/stable/linux-stable.git
linux-4.14.y
and can be browsed at the normal kernel.org git web browser
On 05. 11. 20, 10:39, Paul Fulghum wrote:
If there are no objections to removing the the old drivers
(synclink.c/synclink_mp.c) I could make a patch to do so tomorrow (it is 1:30am
here now). Nothing eliminates niggling warnings like removing dead code.
\o/ Thanks a lot.
--
js
suse labs
Ping :)
On 2020/10/21 21:51, Jan Kara wrote:
> Hum, Al, did this patch get lost?
>
> Honza
>
> On Thu 24-09-20 16:58:56, Jan Kara wrote:
>> On Thu 24-09-20 13:59:58, Hao Li wrote:
>>> If DCACHE_REFERENCED is set, fast_dput() will return
Ping :)
On 2020/10/23 15:49, Li, Hao wrote:
> Hello,
>
> Ping.
>
> This patch need to be merged... Thanks.
>
> On 2020/9/9 7:03, Ira Weiny wrote:
>> On Fri, Sep 04, 2020 at 03:59:39PM +0800, Hao Li wrote:
>>> If generic_drop_inode() returns true, it means iput_final() can evict
>>> this inode reg
From: Max Chou
Add the more IDs to usb_device_id table for Realtek RTL8822CE and
also support the wideband speech capability for all RTL8822CE devices.
-Device(04c5:161f) from /sys/kernel/debug/usb/devices
T: Bus=02 Lev=02 Prnt=02 Port=05 Cnt=01 Dev#= 3 Spd=12 MxCh= 0
D: Ver= 1.00 Cls=e0(wl
On Thu, Nov 05, 2020 at 10:09:05AM +, Lukasz Luba wrote:
>
>
> On 11/5/20 9:18 AM, Morten Rasmussen wrote:
> > On Tue, Nov 03, 2020 at 09:05:57AM +, Lukasz Luba wrote:
> > > @@ -79,7 +82,8 @@ struct em_data_callback {
> > > struct em_perf_domain *em_cpu_get(int cpu);
> > > struct em_p
On Thu, 5 Nov 2020 at 11:40, Viresh Kumar wrote:
>
> On 05-11-20, 11:34, Ulf Hansson wrote:
> > I am not objecting about scaling the voltage through a regulator,
> > that's fine to me. However, encoding a power domain as a regulator
> > (even if it may seem like a regulator) isn't. Well, unless Ma
On Thu, Nov 05, 2020 at 12:08:10AM +0200, Vladimir Oltean wrote:
> On Wed, Nov 04, 2020 at 06:57:19PM +0200, Ioana Ciornei wrote:
> > From: Ioana Ciornei
> >
> > Until now, the DPAA2 switch was not capable to properly setup it's
> > switching domains depending on the existence, or lack thereof, o
Hi,
bumping this series as it's been quite a while and the required clk
patch has since been merged.
Konrad Dybcio
> > Add a handler of CPU_SUSPEND host PSCI SMCs. When invoked, it determines
> > whether the requested power state loses context, ie. whether it is
> > indistinguishable from a WHI or whether it is a deeper sleep state that
> Do you mean WFI?
Of course, sorry, just a typo.
> >> And the loop can be turned into ndelay:
> >>
> >> /*
> >> * Force at least 170ns delay before clearing
> >> * reset bit. Each read from LCR takes at least
> >> * 30ns so 10 times for 300ns to be safe.
> >> */
> >> for(i=0;i<10;i++)
> >>
Hi, Greg
On 2020/11/3 21:36, Greg KH wrote:
On Tue, Nov 03, 2020 at 08:29:39PM +0800, Luo Jiaxing wrote:
We already own DEFINE_SHOW_ATTRIBUTE() helper macro for defining attribute
for read-only file, but we found many of drivers also want a helper macro
for read-write file too.
So we add this
On 2020-11-04 18:36, David Brazdil wrote:
Add handler of host SMCs in KVM nVHE trap handler. Forward all SMCs to
EL3 and propagate the result back to EL1. This is done in preparation
for validating host SMCs.
Signed-off-by: David Brazdil
---
arch/arm64/kvm/hyp/nvhe/hyp-main.c | 36
Hi , Alan
On 2020/11/3 21:45, Alan Stern wrote:
On Tue, Nov 03, 2020 at 02:36:44PM +0100, Greg KH wrote:
On Tue, Nov 03, 2020 at 08:29:39PM +0800, Luo Jiaxing wrote:
We already own DEFINE_SHOW_ATTRIBUTE() helper macro for defining attribute
for read-only file, but we found many of drivers also
On Thu, Nov 5, 2020 at 1:07 AM Coiby Xu wrote:
>
> RTC is 32.768kHz thus 512 RtcClk equals 15625 usec.
I could add that the documentation likely has dropped precision and
that's why the driver mistakenly took the slightly deviated value.
Anyway.
Reviewed-by: Andy Shevchenko
> Suggested-by: And
On Thu, 5 Nov 2020 at 11:52, Mark Rutland wrote:
> On Thu, Nov 05, 2020 at 10:21:33AM +0100, Marco Elver wrote:
> > Instead of removing the fault handling portion of the stack trace based
> > on the fault handler's name, just use struct pt_regs directly.
> >
> > Change kfence_handle_page_fault() t
On 05-11-20, 11:56, Ulf Hansson wrote:
> On Thu, 5 Nov 2020 at 11:40, Viresh Kumar wrote:
> > Btw, how do we identify if it is a power domain or a regulator ?
To be honest, I was a bit afraid and embarrassed to ask this question,
and was hoping people to make fun of me in return :)
> Good questi
On Thu, Nov 5, 2020 at 1:07 AM Coiby Xu wrote:
>
> Debounce filter setting should be independent from irq type setting
> because according to the ACPI specs, there are separate arguments for
> specifying debounce timeout and irq type in GpioIo and GpioInt.
irq -> IRQ
GpioIo()
GpioInt()
> This wi
> Am 05.11.2020 um 11:42 schrieb Vlastimil Babka :
>
> On 11/5/20 10:04 AM, Kalle Valo wrote:
>> (changing the subject, adding more lists and people)
>> Pavel Procopiuc writes:
>>> Op 04.11.2020 om 10:12 schreef Kalle Valo:
Yeah, it is unfortunately time consuming but it is the best way t
Hi Andrey,
On 11/4/20 11:18 PM, Andrey Konovalov wrote:
> Hardware tag-based KASAN relies on Memory Tagging Extension (MTE)
> feature and requires it to be enabled. MTE supports
>
> This patch adds a new mte_init_tags() helper, that enables MTE in
> Synchronous mode in EL1 and is intended to be c
On Thu, Nov 05, 2020 at 12:11:19PM +0100, Marco Elver wrote:
> On Thu, 5 Nov 2020 at 11:52, Mark Rutland wrote:
> > On Thu, Nov 05, 2020 at 10:21:33AM +0100, Marco Elver wrote:
> > > Instead of removing the fault handling portion of the stack trace based
> > > on the fault handler's name, just use
On Thu, Nov 5, 2020 at 11:31 AM Deepak R Varma wrote:
>
> On Thu, Nov 05, 2020 at 10:42:15AM +0100, Daniel Vetter wrote:
> > On Wed, Nov 04, 2020 at 04:53:38PM +0530, Deepak R Varma wrote:
> > > idr_init() uses base 0 which is an invalid identifier. The new function
> > > idr_init_base allows IDR
While trying to do 'make dtbs_install' the following error shows up
make[3]: *** No rule to make target
'/srv/src/kernel/next/out/obj-arm64-next-20201105/dtbsinstall/freescale/imx8mm-kontron-n801x-s.dts',
needed by '__dtbs_install'.
make[3]: Target '__
From: zhuguangqing
If state has not changed successfully and we updated cpufreq_state,
next time when the new state is equal to cpufreq_state (not changed
successfully last time), we will return directly and miss a
freq_qos_update_request() that should have been.
Signed-off-by: zhuguangqing
---
On Thu, Nov 05, 2020 at 01:45:16AM +0100, Andrew Lunn wrote:
> > +/* Manage all NAPI instances for the control interface.
> > + *
> > + * We only have one RX queue and one Tx Conf queue for all
> > + * switch ports. Therefore, we only need to enable the NAPI instance once,
> > the
> > + * first ti
On Wed, Nov 04, 2020 at 11:41:34PM -0600, Samuel Holland wrote:
> From: Ondrej Jirman
>
> The PinePhone has a Realtek rtl8723cs WiFi module.
>
> On mainboard revisions 1.0 and 1.1, the reset input is always pulled
> high, so no power sequence is needed. On mainboard revision 1.2, the
> reset inp
Hi,
On Wed, Nov 04, 2020 at 11:41:33PM -0600, Samuel Holland wrote:
> From: Ondrej Jirman
>
> Pinephone has STK3311-X proximity sensor. Add support for it.
>
> Signed-off-by: Ondrej Jirman
> Signed-off-by: Samuel Holland
> ---
> .../arm64/boot/dts/allwinner/sun50i-a64-pinephone.dtsi | 10 +++
Hi Samuel,
On Wed 04 Nov 20, 22:14, Samuel Holland wrote:
> On 11/3/20 2:50 PM, Paul Kocialkowski wrote:
> > The V3s/V3 has a NMI IRQ controller, which is mainly used for the AXP209
> > interrupt. In great wisdom, Allwinner decided to invert the enable and
> > pending register offsets, compared to
From: Colin Ian King
The left shift of int 32 bit integer constant 1 is evaluated using
32 bit arithmetic and then assigned to a signed 64 bit variable. In
the case where time_ref->adapter->ts_used_bits is 32 or more this
can lead to an oveflow. Avoid this by shifting using the BIT_ULL macro
inst
> Is this the only affected version? If this is actually an A53, how do the
> revisions map between Kryo and Cortex cores?
Hi,
sadly, I do not have access to such information. Only this specific revision
has been marked as affected in the BSP kernel.
Konrad
On Wed, Nov 04, 2020 at 01:36:58PM +0800, Huang, Ying wrote:
> > I've no specific objection to the patch or the name change. I can't
> > remember exactly why I picked the name, it was 8 years ago but I think it
> > was because the policy represented the most basic possible approach that
> > could b
On 2020-11-05 08:31, Markus Reichl wrote:
Hi Marek,
on rk3399 the proposed ordering [1] is according to base address in DT.
FWIW, note that in RK3399's case the SoC itself provides no logical
numbering to follow - the pin groups are named "EMMC", "SDIO0" and
"SDMMC0" in the datasheet, while
On Wed, Nov 04, 2020 at 11:41:29PM -0600, Samuel Holland wrote:
> This series fixes a couple of small issues with the PinePhone device
> tree, and collects some patches adding support for peripherals that
> recently received driver or DT binding support.
Applied all those patches, thanks!
Maxime
FW has to configure devices' StreamIDs so that SMMU is able to lookup
context and do proper translation later on. For Armada 7040 & 8040 and
publicly available FW, most of the devices are configured properly,
but some like ap_sdhci0, PCIe, NIC still remain unassigned which
results in SMMU faults ab
Hi Mark,
Thanks for your comment.
> -Original Message-
> From: Mark Brown
> Sent: Thursday, November 5, 2020 4:40 AM
> To: Chin-Ting Kuo
> Cc: robh...@kernel.org; j...@jms.id.au; and...@aj.id.au; c...@kaod.org;
> bbrezil...@kernel.org; devicet...@vger.kernel.org;
> linux-kernel@vger.ker
On Thu, 05 Nov 2020, David Laight wrote:
> > >> And the loop can be turned into ndelay:
> > >>
> > >> /*
> > >> * Force at least 170ns delay before clearing
> > >> * reset bit. Each read from LCR takes at least
> > >> * 30ns so 10 times for 300ns to be safe.
YiFei Zhu writes:
> On Wed, Nov 4, 2020 at 4:22 AM Michael Ellerman wrote:
>> > +#ifdef __LITTLE_ENDIAN__
>>
>> As Kees mentioned this should (must?!) match the configured endian.
>>
>> But I think it would still be better to use the CONFIG symbol, which is
>> CONFIG_CPU_LITTLE_ENDIAN.
>
> My att
On Wed, Nov 04, 2020 at 06:35:50PM +0100, Vlastimil Babka wrote:
> On 11/3/20 5:20 PM, Mike Rapoport wrote:
> > From: Mike Rapoport
> >
> > When CONFIG_DEBUG_PAGEALLOC is enabled, it unmaps pages from the kernel
> > direct mapping after free_pages(). The pages than need to be mapped back
> > befo
On Wed, Nov 04, 2020 at 06:40:28PM +0100, Vlastimil Babka wrote:
> On 11/3/20 5:20 PM, Mike Rapoport wrote:
> > From: Mike Rapoport
> >
> > When DEBUG_PAGEALLOC or ARCH_HAS_SET_DIRECT_MAP is enabled a page may be
> > not present in the direct map and has to be explicitly mapped before it
> > coul
The 11/04/2020 09:20, Will Deacon wrote:
> On Tue, Nov 03, 2020 at 05:34:38PM +, Mark Brown wrote:
> > On Tue, Nov 03, 2020 at 10:25:37AM +, Szabolcs Nagy wrote:
> >
> > > Re-mmap executable segments instead of mprotecting them in
> > > case mprotect is seccomp filtered.
> >
> > > For the
On 2020-11-04 18:36, David Brazdil wrote:
Add a handler of the CPU_OFF PSCI host SMC trapped in KVM nVHE hyp
code.
When invoked, it changes the recorded state of the core to OFF before
forwarding the call to EL3. If the call fails, it changes the state
back
to ON and returns the error to the h
On Thu, Nov 05, 2020 at 04:00:54PM +0900, Sergey Senozhatsky wrote:
> Hi,
>
> On (20/11/05 07:52), Gerd Hoffmann wrote:
> > > - *ents = kmalloc_array(*nents, sizeof(struct virtio_gpu_mem_entry),
> > > - GFP_KERNEL);
> > > + *ents = kvmalloc_array(*nents,
> > > +
This patch adds dapm widgets and routes on this codec
Signed-off-by: Srinivas Kandagatla
---
sound/soc/codecs/lpass-wsa-macro.c | 1081
1 file changed, 1081 insertions(+)
diff --git a/sound/soc/codecs/lpass-wsa-macro.c
b/sound/soc/codecs/lpass-wsa-macro.c
index 768
This binding is for LPASS has internal codec VA macro which is
for connecting with DMICs.
Signed-off-by: Srinivas Kandagatla
Reviewed-by: Rob Herring
---
.../bindings/sound/qcom,lpass-va-macro.yaml | 67 +++
1 file changed, 67 insertions(+)
create mode 100644
Documentation/d
Qualcomm LPASS (Low Power Audio SubSystem) has internal codec
VA macro block which is used for connecting with DMICs.
This patch adds support to the codec part of the VA Macro block
Signed-off-by: Srinivas Kandagatla
---
sound/soc/codecs/Kconfig | 4 +
sound/soc/codecs/Makefile
On 05-11-20, 12:32, Daniel Lezcano wrote:
> On 05/11/2020 10:13, Viresh Kumar wrote:
> > Rearrange thermal_zone_device_set_polling() to make it more readable and
> > reduce duplicate code.
> >
> > Signed-off-by: Viresh Kumar
> > ---
>
> Hi Viresh,
>
> I have a series where this function is rewo
On Thu, Nov 5, 2020 at 12:13 PM Vincenzo Frascino
wrote:
>
> Hi Andrey,
>
> On 11/4/20 11:18 PM, Andrey Konovalov wrote:
> > Hardware tag-based KASAN relies on Memory Tagging Extension (MTE)
> > feature and requires it to be enabled. MTE supports
> >
> > This patch adds a new mte_init_tags() helpe
This binding is for LPASS has internal codec WSA macro which is
for connecting with WSA Smart speakers.
Signed-off-by: Srinivas Kandagatla
Reviewed-by: Rob Herring
---
.../bindings/sound/qcom,lpass-wsa-macro.yaml | 69 +++
1 file changed, 69 insertions(+)
create mode 100644
D
Qualcomm LPASS (Low Power Audio SubSystem) has internal codec
WSA macro block which is used for connecting with WSA Smart
speakers over soundwire.
This patch adds support to the codec part of the WSA Macro block.
Signed-off-by: Srinivas Kandagatla
---
sound/soc/codecs/Kconfig |4 +
Add dapm widgets and routes for this codec.
Signed-off-by: Srinivas Kandagatla
---
sound/soc/codecs/lpass-va-macro.c | 620 ++
1 file changed, 620 insertions(+)
diff --git a/sound/soc/codecs/lpass-va-macro.c
b/sound/soc/codecs/lpass-va-macro.c
index e7590e70f2c0..b6
Initial support for ROHM BD9576MUF and BD9573MUF PMICs.
These PMICs are primarily intended to be used to power the R-Car family
processors. BD9576MUF includes some additional safety features the
BD9573MUF does not have. This initial version of drivers does not
utilize these features and for now th
On 11/4/20 10:08 PM, Rob Herring wrote:
On Fri, Oct 30, 2020 at 04:27:14PM +0100, Amelie DELAUNAY wrote:
On 10/30/20 3:29 PM, Rob Herring wrote:
On Thu, Oct 29, 2020 at 11:49 AM Amelie DELAUNAY wrote:
On 10/29/20 4:40 PM, Rob Herring wrote:
On Thu, Oct 29, 2020 at 10:58:03AM +0100, Amel
On 05/11/2020 10:13, Viresh Kumar wrote:
> Rearrange thermal_zone_device_set_polling() to make it more readable and
> reduce duplicate code.
>
> Signed-off-by: Viresh Kumar
> ---
Hi Viresh,
I have a series where this function is reworked and conflicts with your
changes. The delay is converted i
This patchset adds support for two Codec Macro blocks( WSA and VA) available in
Qualcomm LPASS (Low Power Audio SubSystem).
There are WSA, VA, TX and RX Macros on LPASS IP, each of the Macro block
has specific connectivity like WSA Macros are intended to connect
to WSA Smart speaker codecs via Sou
On 11/5/20 11:35 AM, Andrey Konovalov wrote:
> This will work. Any preference on the name of this function?
>
I called it in my current iteration mte_enable(), and calling it from
cpu_enable_mte().
> Alternatively we can rename mte_init_tags() to something else and let
> it handle both RRND and s
Add bindings for ROHM BD9576MUF and BD9573MUF PMICs. These
PMICs are primarily intended to be used to power the R-Car series
processors. They provide 6 power outputs, safety features and a
watchdog with two functional modes.
Signed-off-by: Matti Vaittinen
Reviewed-by: Rob Herring
---
.../bindin
Add Watchdog support for ROHM BD9576MUF and BD9573MUF PMICs which are
mainly used to power the R-Car series processors. The watchdog is
pinged using a GPIO and enabled using another GPIO. Additionally
watchdog time-out can be configured to HW prior starting the watchdog.
Watchdog timeout can be con
Add maintainer entries for ROHM BD9576MUF and ROHM BD9573MUF drivers.
MFD, regulator and watchdog drivers were introduced for these PMICs.
Signed-off-by: Matti Vaittinen
---
MAINTAINERS | 4
1 file changed, 4 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index b516bb34a8d5..0bd788a9
Add core support for ROHM BD9576MUF and BD9573MUF PMICs which are
mainly used to power the R-Car series processors.
Signed-off-by: Matti Vaittinen
---
drivers/mfd/Kconfig | 11
drivers/mfd/Makefile | 1 +
drivers/mfd/rohm-bd9576.c| 108 +++
This patch fixes below warning when module is compiled with W=1 C=1
lpass-cpu.c:677:22: warning: symbol 'lpass_hdmi_regmap_config'
was not declared. Should it be static?
Fixes: 7cb37b7bd0d3 ("ASoC: qcom: Add support for lpass hdmi driver")
Signed-off-by: Srinivas Kandagatla
---
sound/soc/qcom/l
Hi Marc,
> > +static DEFINE_PER_CPU(hyp_spinlock_t, psci_cpu_lock);
> > DEFINE_PER_CPU(enum kvm_nvhe_psci_state, psci_cpu_state);
> >
> > static u64 get_psci_func_id(struct kvm_cpu_context *host_ctxt)
> > @@ -76,9 +79,32 @@ static __noreturn unsigned long
> > psci_forward_noreturn(struct kvm_cp
On Wed, Nov 04, 2020 at 07:02:20PM +0100, Vlastimil Babka wrote:
> On 11/3/20 5:20 PM, Mike Rapoport wrote:
> > From: Mike Rapoport
>
> Subject should have "on DEBUG_PAGEALLOC" ?
>
> > The design of DEBUG_PAGEALLOC presumes that __kernel_map_pages() must never
> > fail. With this assumption is w
Hi!
> From: Nicholas Piggin
>
> [ Upstream commit bafb056ce27940c9994ea905336aa8f27b4f7275 ]
...
> io_uring 2b188cc1bb857 ("Add io_uring IO interface") added code which
> does a kthread_use_mm() from a mmget_not_zero() refcount.
...
> The basic fix for sparc64 is to remove its mm_cpumask clearin
This patch fixes below warning when module is compiled with W=1 C=1
sound/soc/qcom/qdsp6/q6afe-clocks.c:122:18: warning: symbol 'q6afe_clks'
was not declared. Should it be static?
Fixes: 520a1c396d196 ("ASoC: q6afe-clocks: add q6afe clock controller")
Signed-off-by: Srinivas Kandagatla
---
soun
Hi!
> The Power Management Unit (PMU) is a separate device which has little
> common with clock controller. Moving it to one level up (from clock
> controller child to SoC) allows to remove fake simple-bus compatible and
> dtbs_check warnings like:
>
> clock-controller@e010: $nodename:0:
>
According to the original code logic:
cfs_rq->avg.util_avg
sa->util_avg = * se->load.weight
cfs_rq->avg.load_avg
but for fair_sched_class:
se->load.weight = 1024 * sched_prio_to_weight[prio];
cfs_rq->avg.util_avg
so the
Recently introduced asynchronous probe on the MMC devices can shuffle
block IDs in the system. Pin them to values equal to the physical MMC bus
number to ease booting in environments where UUIDs are not practical.
Use newly introduced aliases for mmcblk devices from commit fa2d0aa96941
("mmc: core
Recently introduced asynchronous probe on the MMC devices can shuffle
block IDs in the system. Pin them to values equal to the physical MMC bus
number to ease booting in environments where UUIDs are not practical.
Use newly introduced aliases for mmcblk devices from commit fa2d0aa96941
("mmc: core
From: Colin Ian King
The shifting of the u8 integer data[3] by 24 bits to the left will
be promoted to a 32 bit signed int and then sign-extended to a
long. In the event that the top bit of data[3] is set then all
then all the upper 32 bits of a 64 bit long end up as also being
set because of the
Fix the following sparse warnings:
./mt8192-dai-i2s.c:2040:5: warning: symbol 'mt8192_dai_i2s_get_share' was not
declared. Should it be static?
./mt8192-dai-i2s.c:2060:5: warning: symbol 'mt8192_dai_i2s_set_priv' was not
declared. Should it be static?
Reported-by: Hulk Robot
Signed-off-by: Zou
On 11/4/20 12:44 PM, vgaro...@codeaurora.org wrote:
> Hi Stan,
>
> On 2020-11-03 06:46, Fritz Koenig wrote:
>> On Fri, Oct 23, 2020 at 5:57 AM Stanimir Varbanov
>> wrote:
>>>
>>> Redesign the encoder driver to be compliant with stateful encoder
>>> spec - specifically adds handling of Reset st
On Wed, Oct 21, 2020 at 01:36:55PM +0800, Dinghao Liu wrote:
> There is one error handling path does not free ref,
> which may cause a memory leak.
>
> Signed-off-by: Dinghao Liu
Added to misc-next, thanks.
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