On 05. 11. 20, 9:43, Lee Jones wrote:
On Thu, 05 Nov 2020, Jiri Slaby wrote:
On 04. 11. 20, 20:35, Lee Jones wrote:
Fixes the following W=1 kernel build warning(s):
drivers/tty/synclinkmp.c: In function ‘init_adapter’:
drivers/tty/synclinkmp.c:5167:6: warning: variable ‘readval’ set but
On Sun, Oct 18, 2020 at 11:41 PM Syed Nayyar Waris wrote:
> This patch reimplements the thunderx_gpio_set_multiple function in
> drivers/gpio/gpio-thunderx.c to use the new for_each_set_clump macro.
> Instead of looping for each bank in thunderx_gpio_set_multiple
> function, now we can skip bank
Hello,
On 11/5/20 3:57 AM, Michał Mirosław wrote:
>>> Can you catch debug logs for the bootup in question? I'm not sure what's
>>> the failure mode in your case. I guess this is not a bypassed regulator?
>>
>> Boot up with v5.10-rc2 + your cf1ad559a2 ("regulator: defer probe when trying
>> to get
On 11/4/20 12:17 PM, michael...@vatics.com wrote:
Hi Wolfram,
dev->status can be used to record the current state, especially Designware
I2C controller has no interrupts to identify a write-request. This patch
Just double-checking: the designware HW does not raise an interrupt when
its own ad
On Wed, 04 Nov 2020, Dmitry Torokhov wrote:
> Hi Lee,
>
> On Wed, Nov 04, 2020 at 04:24:13PM +, Lee Jones wrote:
> > Some drivers which include 'elan-i2c-ids.h' make use of
> > 'elan_acpi_id', but not all do. Tell the compiler that this is
> > expected behaviour.
> >
> > Fixes the following
On Wed, Nov 4, 2020 at 11:39 AM Nicolas Saenz Julienne
wrote:
>
> When unbinding the firmware device we need to make sure it has no
> consumers left. Otherwise we'd leave them with a firmware handle
> pointing at freed memory.
>
> Keep a reference count of all consumers and introduce
> devm_rpi_fi
On Mon, Oct 19, 2020 at 6:13 PM Krzysztof Kozlowski wrote:
> The generic GPIO controller dtschema got dropped because Rob wants it
> to be part of dtschema (outside of kernel) and then
> relicensing/rewriting property descriptions plays a role. Only the
> GPIO hogs went to common dtschema package
On 05.11.2020 08:42, Qu Wenruo wrote:
>
>
> On 2020/11/5 下午3:01, Heiner Kallweit wrote:
>> On 05.11.2020 03:48, Qu Wenruo wrote:
>>> Hi,
>>>
>>> Not sure if this is a regression or not, but just find out that after
>>> upgrading to v5.9 kernel, one of my ethernet port on my ThinkPad T14 (ryzen
Hi Christophe,
Christophe Leroy wrote on Thu, 05 Nov
2020 10:06:51 +0100:
> Quoting Miquel Raynal :
>
> > Hi Christophe,
> >
> > Christophe Leroy wrote on Wed, 4 Nov 2020
> > 19:37:57 +0100:
> >
> >> Hi Miquel,
> >>
> >> Le 04/11/2020 à 18:38, Miquel Raynal a écrit :
> >> > Hi Christophe,
On 05. 11. 20, 9:53, Lee Jones wrote:
For example, alloc_tty_struct is among the
ones, I would like to see fixed instead of removed from kernel-doc.
There is nothing stopping anyone from providing said descriptions and
promoting it back up to kernel-doc. If you have good reasons for it
to be p
From: Junjie Hua
The current implementation of Hyper-V SynIC[1] request to deactivate
APICv when SynIC is enabled, since the AutoEOI feature of SynIC is not
compatible with APICv[2].
Actually, windows doesn't use AutoEOI if deprecating AutoEOI bit is set
(CPUID.4004H:EAX[bit 9], HyperV-TL
Rearrange thermal_zone_device_set_polling() to make it more readable and
reduce duplicate code.
Signed-off-by: Viresh Kumar
---
drivers/thermal/thermal_core.c | 17 +
1 file changed, 9 insertions(+), 8 deletions(-)
diff --git a/drivers/thermal/thermal_core.c b/drivers/thermal/th
On Thu, Nov 05, 2020 at 05:02:00PM +0800, Shuo A Liu wrote:
> On Thu 5.Nov'20 at 9:26:39 +0100, Greg Kroah-Hartman wrote:
> > On Thu, Nov 05, 2020 at 03:35:45PM +0800, Shuo A Liu wrote:
> > > On Thu 5.Nov'20 at 7:29:07 +0100, Greg Kroah-Hartman wrote:
> > > > On Thu, Nov 05, 2020 at 11:10:29AM
On Thu, Nov 05, 2020 at 06:45:04PM +1100, Anand K. Mistry wrote:
> SNIPPED
>
> > >
> > > Looks like left column became too wide, so rather than shift the right
> > > column to the right, I'd suggest to drop underscores in Speculation*.
> >
> > Hm. That makes it inconsistent with Speculation_Store_
On Tue, Nov 03, 2020 at 09:05:57AM +, Lukasz Luba wrote:
> @@ -79,7 +82,8 @@ struct em_data_callback {
> struct em_perf_domain *em_cpu_get(int cpu);
> struct em_perf_domain *em_pd_get(struct device *dev);
> int em_dev_register_perf_domain(struct device *dev, unsigned int nr_states,
> -
Some doc fixups, and minor code feedback. Otherwise looks good to me.
On Thu, Oct 22, 2020 at 5:35 PM Dave Ertman wrote:
>
> Add support for the Auxiliary Bus, auxiliary_device and auxiliary_driver.
> It enables drivers to create an auxiliary_device and bind an
> auxiliary_driver to it.
>
> The b
On Nov 05 2020, Zong Li wrote:
> I tried to add -M and -C option to find renames and copies, but it
> doesn't detect anything here.
-C40 finds a copy drivers/clk/sifive/{fu540-prci.c => sifive-prci.c}.
Andreas.
--
Andreas Schwab, sch...@linux-m68k.org
GPG Key fingerprint = 7578 EB47 D4E5 4D69
On 2020-11-04 23:14, Thomas Gleixner wrote:
[...]
TBH, that's butt ugly. So after staring long enough into the PCI code I
came up with a way to transport that information to the probe code.
That allows a particular device to say 'I can't do MSI' and at the same
time keeps the warning machinery
On Wed, Oct 21, 2020 at 1:07 PM Daniel Palmer wrote:
> Sorry to pester you again...
Don't worry. I'm more worried that my replies are slow.
> Before I do that I have a question that maybe you could help me with:
> Andy noted a few times that I have this driver as a built in driver
> and not a m
On Wed, Nov 04, 2020 at 03:41:03PM -0800, Casey Schaufler wrote:
> Create a new entry "display" in the procfs attr directory for
> controlling which LSM security information is displayed for a
> process. A process can only read or write its own display value.
>
> The name of an active LSM that sup
Instead of removing the fault handling portion of the stack trace based
on the fault handler's name, just use struct pt_regs directly.
Change kfence_handle_page_fault() to take a struct pt_regs, and plumb it
through to kfence_report_error() for out-of-bounds, use-after-free, or
invalid access erro
On Wed, Nov 04, 2020 at 10:44:56AM -0800, John Hubbard wrote:
> On 11/4/20 10:17 AM, Jason Gunthorpe wrote:
> > On Wed, Nov 04, 2020 at 04:41:19PM +, Christoph Hellwig wrote:
> > > On Wed, Nov 04, 2020 at 04:37:58PM +, Christoph Hellwig wrote:
> > > > On Wed, Nov 04, 2020 at 05:26:58PM +010
Hi Huges
On 11/4/20 6:32 PM, Hugues Fruchet wrote:
Add support of BT656 embedded synchronization bus.
This mode allows to save hardware synchro lines hsync & vsync
by replacing them with synchro codes embedded in data stream.
Add "bus-type" property and make it required so that there is no
ambig
From: Subbaraya Sundeep
This patch adds support to verify the channel number sent by
mailbox requester before writing MCAM entry for Ingress packets.
Similarly for Egress packets, verifying the PF_FUNC sent by the
mailbox user.
Signed-off-by: Subbaraya Sundeep
Signed-off-by: Kiran Kumar K
Sign
From: Subbaraya Sundeep
Key Extraction(KEX) profile decides how the packet metadata such as
layer information and selected packet data bytes at each layer are
placed in MCAM search key. This patch reads the configured KEX profile
parameters to find out the bit position and bit mask for each field
From: Stanislaw Kardach
The current default Key Extraction(KEX) profile can only use RX
packet fields while generating the MCAM search key. The profile
can't be used for matching TX packet fields. This patch modifies
the default KEX profile to add support for extracting TX packet
fields into MCAM
Hi Bartosz, thanks for the review.
On Thu, 2020-11-05 at 10:13 +0100, Bartosz Golaszewski wrote:
> > +/**
> > + * devm_rpi_firmware_get - Get pointer to rpi_firmware structure.
> > + * @firmware_node:Pointer to the firmware Device Tree node.
> > + *
> > + * Returns NULL is the firmware device
From: Subbaraya Sundeep
Add debugfs support to dump the MCAM rules installed using
NPC_INSTALL_FLOW mbox message. Debugfs file can display mcam
entry, counter if any, flow type and counter hits.
Ethtool will dump the ntuple flows related to the PF only.
The debugfs file gives systemwide view of
From: Subbaraya Sundeep
This patch adds support for adding and deleting ethtool ntuple
filters. The filters for ether, ipv4, ipv6, tcp, udp and sctp
are supported. The mask is also supported. The supported actions
are drop and direct to a queue. Additionally we support FLOW_EXT
field vlan_tci and
From: Vamsi Attunuru
This patch modifies the existing nix_vtag_config mailbox message
to allocate and free TX VTAG entries as requested by a NIX PF.
The TX VTAG entries are global resource that shared by all PFs
and each entry specifies the size of VTAG to insert and the VTAG
header data to inser
From: Hariprasad Kelam
This patch handles the VF mac address changes as given below.
1. mac addr configrued by VF will be retained until VF module unload.
2. mac addr configred by PF for VF will be retained until power cycle.
3. mac addr confgired by PF for its VF can't be overwritten
This patch series adds support for ethtool ntuple filters, unicast
address filtering, VLAN offload and SR-IOV ndo handlers. All of the
above features are based on the Admin Function(AF) driver support to
install and delete the low level MCAM entries. Each MCAM entry is
programmed with the packet fi
This patch adds support for ndo_set_vf_mac, ndo_set_vf_vlan
and ndo_get_vf_config handlers. The traffic redirection
based on the VF mac address or vlan id is done by installing
MCAM rules. Reserved RX_VTAG_TYPE7 in each NIXLF for VF VLAN
which strips the VLAN tag from ingress VLAN traffic. The NIX
On 2020-11-04 23:22, Konrad Dybcio wrote:
QCOM KRYO2XX Silver cores are Cortex-A53 based and are
susceptible to the 845719 erratum. Add them to the lookup
list to apply the erratum.
Signed-off-by: Konrad Dybcio
---
arch/arm64/kernel/cpu_errata.c | 2 ++
1 file changed, 2 insertions(+)
diff --
From: Hariprasad Kelam
Add unicast MAC address filtering support using install flow
message. Total of 8 MCAM entries are allocated for adding
unicast mac filtering rules. If the MCAM allocation fails,
the unicast filtering support will not be advertised.
Signed-off-by: Hariprasad Kelam
Signed-o
From: Subbaraya Sundeep
Added new mailbox messages to install and delete MCAM rules.
These mailbox messages will be used for adding/deleting ethtool
n-tuple filters by NIX PF. The installed MCAM rules are stored
in a list that will be traversed later to delete the MCAM entries
when the interface
This patch introduces new mailbox mesages to retrieve a given
MCAM entry or base flow steering rule of a VF installed by its
parent PF. This helps while updating the existing MCAM rules
with out re-framing the whole mailbox request again. The INSTALL
FLOW mailbox consumer can read-modify-write the
From: Hariprasad Kelam
This patch implements egress VLAN offload by appending NIX_SEND_EXT_S
header to NIX_SEND_HDR_S. The VLAN TCI information is specified
in the NIX_SEND_EXT_S. The VLAN offload in the ingress path is
implemented by configuring the NIX_RX_VTAG_ACTION_S to strip and
capture the
From: Subbaraya Sundeep
Since mailbox message for installing flows is in place,
remove the RXVLAN_ALLOC mbox message which is redundant.
Signed-off-by: Subbaraya Sundeep
Signed-off-by: Sunil Goutham
Signed-off-by: Naveen Mamindlapalli
---
drivers/net/ethernet/marvell/octeontx2/af/mbox.h |
On Thu, Nov 5, 2020 at 5:19 PM Andreas Schwab wrote:
>
> On Nov 05 2020, Zong Li wrote:
>
> > I tried to add -M and -C option to find renames and copies, but it
> > doesn't detect anything here.
>
> -C40 finds a copy drivers/clk/sifive/{fu540-prci.c => sifive-prci.c}.
Thanks! I used the default v
On Tue, Oct 20, 2020 at 1:59 PM Andy Shevchenko
wrote:
> On Mon, Oct 19, 2020 at 5:11 PM Daniel Palmer wrote:
> > +config GPIO_MSC313
> > + bool "MStar MSC313 GPIO support"
> > + default y if ARCH_MSTARV7
I think it is possible to write:
default ARCH_MSTARV7
For this.
> Why bool
On Thu, Nov 05, 2020 at 10:21:27AM +0100, Linus Walleij wrote:
> If your SoC is only used by OpenWrt (like ixp4xx) then it is fine
> to just use bool because that distribution is always built with an
> image for a specific hardware, whereas distributions are generic.
Speaking for myself (since I h
On Wed, Nov 04, 2020 at 03:23:38PM -0800, Saravana Kannan wrote:
> This reverts commit 2451e746478a6a6e981cfa66b62b791ca93b90c8.
>
> Signed-off-by: Saravana Kannan
You need to say _why_ you are doing this, it's obvious _what_ you are
doing :)
Same for the other reverts in this series.
thanks,
Hi Konrad,
[+Jeffrey]
On Thu, Nov 05, 2020 at 12:22:09AM +0100, Konrad Dybcio wrote:
> This series adds Spectre mitigations and errata data for
> Qualcomm KRYO2XX Gold (big) and Silver (LITTLE) series of
> CPU cores, used for example in MSM8998 and SDM660-series SoCs.
>
> Konrad Dybcio (4):
>
On Wed, Nov 04, 2020 at 12:12:15PM -0800, Dan Williams wrote:
> On Wed, Nov 4, 2020 at 8:50 AM Bjorn Helgaas wrote:
> >
> > On Wed, Nov 04, 2020 at 09:44:04AM +0100, Daniel Vetter wrote:
> > > On Tue, Nov 3, 2020 at 11:09 PM Dan Williams
> > > wrote:
> > > > On Tue, Nov 3, 2020 at 1:28 PM Bjorn
On Wed, Nov 04, 2020 at 03:23:44PM -0800, Saravana Kannan wrote:
> There are multiple locations in the kernel where a struct fwnode_handle
> is initialized. Add fwnode_init() so that we have one way of
> initializing a fwnode_handle.
>
> Signed-off-by: Saravana Kannan
> ---
> drivers/acpi/proper
> On Nov 5, 2020, at 1:10 AM, Jiri Slaby wrote:
>
> OK, let the loop alone. I would bet a half a pig that noone is able to test
> this driver. But one has to write this for someone to raise and admit they
> are still using it. In fact, there are _4_ google replies to "Microgate
> Corporatio
On Wed, Nov 04, 2020 at 07:57:55PM +0100, Rob Herring wrote:
> On Tue, 03 Nov 2020 11:00:20 +0100, Vincent Whitchurch wrote:
> > Add bindings for the Dialog Semiconductor DA9121 voltage regulator.
> >
> > Signed-off-by: Vincent Whitchurch
> > ---
> > .../bindings/regulator/dlg,da9121.yaml
On Mon, Oct 19, 2020 at 4:10 PM Daniel Palmer wrote:
> This adds a driver that supports the GPIO block found in
> MStar/SigmaStar ARMv7 SoCs.
>
> The controller seems to support 128 lines but where they
> are wired up differs between chips and no currently known
> chip uses anywhere near 128 line
On Wed, Nov 04, 2020 at 03:23:52PM -0800, Saravana Kannan wrote:
> The semantics of add_links() has changed from creating device link
> between devices to creating fwnode links between fwnodes. So, update the
> implementation of add_links() to match the new semantics.
>
> Signed-off-by: Saravana K
On Wed, Nov 04, 2020 at 04:53:38PM +0530, Deepak R Varma wrote:
> idr_init() uses base 0 which is an invalid identifier. The new function
> idr_init_base allows IDR to set the ID lookup from base 1. This avoids
> all lookups that otherwise starts from 0 since 0 is always unused.
>
> References: co
On Thu, Nov 5, 2020 at 1:16 PM Dhananjay Phadke
wrote:
>
> On Wed, 4 Nov 2020 10:01:06 -0800, Ray Jui wrote:
>
> +#define MAX_SLAVE_RX_PER_INT 10
>
> >>>
> In patch [3/6], you've enabled IS_S_RX_THLD_SHIFT in slave ISR bitmask,
> however it's not actually used in proces
On Wed, Nov 04, 2020 at 03:23:54PM -0800, Saravana Kannan wrote:
> Add helper functions __fw_devlink_link_to_consumers() and
> __fw_devlink_link_to_suppliers() that convert fwnode links to device
> links.
>
> __fw_devlink_link_to_consumers() is for creating:
> - Device links between a newly added
On Wed, Nov 04, 2020 at 03:23:53PM -0800, Saravana Kannan wrote:
> The semantics of add_links() has changed from creating device link
> between devices to creating fwnode links between fwnodes. So, update the
> implementation of add_links() to match the new semantics.
>
> Signed-off-by: Saravana K
On Thu, Nov 5, 2020 at 10:31 AM Willy Tarreau wrote:
> On Thu, Nov 05, 2020 at 10:21:27AM +0100, Linus Walleij wrote:
> > If your SoC is only used by OpenWrt (like ixp4xx) then it is fine
> > to just use bool because that distribution is always built with an
> > image for a specific hardware, whe
On Thu, Nov 5, 2020 at 10:28 AM Nicolas Saenz Julienne
wrote:
>
> Hi Bartosz, thanks for the review.
>
> On Thu, 2020-11-05 at 10:13 +0100, Bartosz Golaszewski wrote:
> > > +/**
> > > + * devm_rpi_firmware_get - Get pointer to rpi_firmware structure.
> > > + * @firmware_node:Pointer to the fir
On Mon, Oct 19, 2020 at 4:10 PM Daniel Palmer wrote:
> The GPIO controller is at the same address in all of the
> currently known chips so create a node for it in the base
> dtsi.
>
> Some extra properties are needed to actually use it so
> disable it by default.
>
> Signed-off-by: Daniel Palmer
Parallel to serial conversion, which is also called SSO controller,
can drive external shift register for LED outputs, reset or
general purpose outputs.
This driver enables LED support for Serial Shift Output Controller(SSO).
Signed-off-by: Amireddy Mallikarjuna reddy
---
drivers/leds/Kconfig
Add DT bindings YAML schema for SSO controller driver
of Lightning Mountain(LGM) SoC.
Signed-off-by: Amireddy Mallikarjuna reddy
---
.../devicetree/bindings/leds/leds-lgm.yaml | 116 +
1 file changed, 116 insertions(+)
create mode 100644 Documentation/devicetree/bind
Our names are Frances and Patrick Connolly from County Armagh in Northern
Ireland. We have just won ?0?5 115 million from the Euro-million Lottery
jackpot draw. We therefore donate 1.5 million Euro each to (15) lucky
international recipients around the world to show our God our appreciation. You
On Mon, Oct 19, 2020 at 4:10 PM Daniel Palmer wrote:
> Fill in the properties needed to use the GPIO controller
> in the infinity and infinity3 chips.
>
> Signed-off-by: Daniel Palmer
Acked-by: Linus Walleij
Yours,
Linus Walleij
+ Viresh
On Thu, 5 Nov 2020 at 00:44, Dmitry Osipenko wrote:
>
> Introduce core voltage scaling for NVIDIA Tegra20/30 SoCs, which reduces
> power consumption and heating of the Tegra chips. Tegra SoC has multiple
> hardware units which belong to a core power domain of the SoC and share
> the core
Quoting Bjorn Helgaas (2020-11-04 19:35:56)
> [+cc Jani, Joonas, Rodrigo, David, Daniel]
>
> On Wed, Nov 04, 2020 at 05:35:06PM +0530, Tejas Upadhyay wrote:
> > JSL re-uses the same stolen memory as ICL and EHL.
> >
> > Cc: Lucas De Marchi
> > Cc: Matt Roper
> > Signed-off-by: Tejas Upadhyay
>
On 2020-11-04 18:36, David Brazdil wrote:
The version of PSCI that the kernel should use to communicate with
firmware is typically obtained from probing PSCI_VERSION. However, that
doesn't work for PSCI v0.1 where the host gets the information from
DT/ACPI, or if PSCI is not supported / was disab
Op 05.11.2020 om 10:04 schreef Kalle Valo:
Oh, very interesting. Thanks a lot for the bisection, otherwise we would
have never found out whats causing this.
David & mm folks: Pavel noticed that his QCA6390 Wi-Fi 6 device (driver
ath11k) failed on v5.10-rc1. After bisecting he found that the comm
On Thu, Nov 05, 2020 at 01:19:09AM -0800, Dan Williams wrote:
> Some doc fixups, and minor code feedback. Otherwise looks good to me.
>
> On Thu, Oct 22, 2020 at 5:35 PM Dave Ertman wrote:
> >
<...>
> >
> > +config AUXILIARY_BUS
> > + bool
>
> tristate? Unless you need non-exported symbols
Enable crypto controllers enabling following flags as module:
CONFIG_CRYPTO_DEV_STM32_CRC
CONFIG_CRYPTO_DEV_STM32_HASH
CONFIG_CRYPTO_DEV_STM32_CRYP
Signed-off-by: Lionel Debieve
---
arch/arm/configs/multi_v7_defconfig | 3 +++
1 file changed, 3 insertions(+)
diff --git a/arch/arm/configs/multi_
On Thu, Nov 5, 2020 at 6:05 AM Brad Campbell wrote:
> Appreciate the feedback.
>
> This would be the bare minimum based on the bits use in the original code. If
> the original code worked "well enough" then this should be relatively safe.
>
> Tested on both machines I have access to.
For the pa
Hi Joe
On Thu, Nov 5, 2020 at 12:59 AM Joe Perches wrote:
>
> On Thu, 2020-11-05 at 00:01 +0100, Ricardo Ribalda wrote:
> > Hi Joe
> >
> > On Thu, Nov 5, 2020 at 12:00 AM Joe Perches wrote:
> > >
> > > On Wed, 2020-11-04 at 23:31 +0100, Ricardo Ribalda wrote:
> > >
> > > > I have updated my tree
On Thu 2020-11-05 17:43:50, Amireddy Mallikarjuna reddy wrote:
> Add DT bindings YAML schema for SSO controller driver
> of Lightning Mountain(LGM) SoC.
>
intel -> Intel in the title.
"Lightning Mountain(LGM)" -> 'Lightning Mountain (LGM)"
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas
On 2020-11-04 18:36, David Brazdil wrote:
Function IDs used by PSCI are configurable for v0.1 via DT/APCI. If the
host is using PSCI v0.1, KVM's PSCI proxy needs to use the same IDs.
Expose the array holding the information.
Signed-off-by: David Brazdil
---
drivers/firmware/psci/psci.c | 10 +-
On Thu, Nov 05, 2020 at 01:39:36AM -0800, Paul Fulghum wrote:
>
>
> > On Nov 5, 2020, at 1:10 AM, Jiri Slaby wrote:
> >
> > OK, let the loop alone. I would bet a half a pig that noone is able to test
> > this driver. But one has to write this for someone to raise and admit they
> > are still
On Thu, 5 Nov 2020 at 05:42, Stephen Boyd wrote:
>
> Quoting Dmitry Baryshkov (2020-10-23 06:19:25)
> > On SM8250 MMCX power domain is required to access MMDS_GDSC registers.
> > This power domain is expressed as mmcx-supply regulator property. Use
> > this regulator as MDSS_GDSC supply.
> >
> > S
Add device tree binding Documentation details for Qualcomm SC7280
TLMM block.
Signed-off-by: Rajendra Nayak
Reviewed-by: Rob Herring
---
v2: Consolidated functions under phase_flag and qdss
.../bindings/pinctrl/qcom,sc7280-pinctrl.yaml | 158 +
1 file changed, 158 inse
Add initial pinctrl driver to support pin configuration with
pinctrl framework for SC7280 SoC
Signed-off-by: Rajendra Nayak
---
v2: Consolidated functions under phase_flag and qdss
Moved ufs reset pin to pin175 so its exposed as a gpio
npios updated from 175 to 176
drivers/pinctrl/qcom/
On Tue 03 Nov 2020 at 04:48, Tian Tao wrote:
> The code has been in a irq-disabled context since it is hard IRQ. There
> is no necessity to do it again.
>
> Signed-off-by: Tian Tao
Reviewed-by: Jerome Brunet
> ---
> drivers/mmc/host/meson-mx-sdio.c | 5 ++---
> 1 file changed, 2 insertions
On Wed, Nov 04, 2020 at 11:40:09PM -0600, Tyler Hicks wrote:
> On 2020-11-04 12:08:12, Will Deacon wrote:
> > On Tue, Nov 03, 2020 at 09:59:52AM -0600, Tyler Hicks wrote:
> > > On 2020-09-21 14:15:55, Tyler Hicks wrote:
> > > > Provide the CONFIG_CMDLINE_EXTEND config option for arm64 kernels. This
On Thu, Nov 5, 2020 at 5:15 AM Dmitry Osipenko wrote:
> diff --git a/drivers/mmc/host/sdhci-tegra.c b/drivers/mmc/host/sdhci-tegra.c
> +static void sdhci_tegra_deinit_opp_table(void *data)
> +{
> + struct device *dev = data;
> + struct opp_table *opp_table;
> +
> + opp_table =
On Thu, 2020-11-05 at 08:58 +, Lee Jones wrote:
> On Thu, 05 Nov 2020, Vaittinen, Matti wrote:
>
> > On Thu, 2020-11-05 at 08:21 +, Lee Jones wrote:
> > > On Thu, 05 Nov 2020, Vaittinen, Matti wrote:
> > >
> > > > On Thu, 2020-11-05 at 08:46 +0200, Matti Vaittinen wrote:
> > > > > Mornin
> > This looks good to me. This should solve "-EPERM" return by "__kvm_set_msr"
> > .
> >
> > A question I have, In the case of "kvm_emulate_rdmsr()", for "r" we
> > are injecting #GP.
> > Is there any possibility of this check to be hit and still result in #GP?
>
> When I wrote this patch series
On 05-11-20, 10:45, Ulf Hansson wrote:
> + Viresh
Thanks Ulf. I found a bug in OPP core because you cc'd me here :)
> On Thu, 5 Nov 2020 at 00:44, Dmitry Osipenko wrote:
> I need some more time to review this, but just a quick check found a
> few potential issues...
>
> The "core-supply", that
On Thu, 05 Nov 2020, Greg Kroah-Hartman wrote:
> On Thu, Nov 05, 2020 at 01:39:36AM -0800, Paul Fulghum wrote:
> >
> >
> > > On Nov 5, 2020, at 1:10 AM, Jiri Slaby wrote:
> > >
> > > OK, let the loop alone. I would bet a half a pig that noone is able to
> > > test this driver. But one has to
On 11/5/20 9:18 AM, Morten Rasmussen wrote:
On Tue, Nov 03, 2020 at 09:05:57AM +, Lukasz Luba wrote:
@@ -79,7 +82,8 @@ struct em_data_callback {
struct em_perf_domain *em_cpu_get(int cpu);
struct em_perf_domain *em_pd_get(struct device *dev);
int em_dev_register_perf_domain(struct d
On Mon, 2 Nov 2020, Pablo Ceballos wrote:
> Some HID devices don't use a report ID because they only have a single
> report. In those cases, the report ID in struct hid_report will be zero
> and the data for the report will start at the first byte, so don't skip
> over the first byte.
>
> Signed-
randconfig-a006-20201104
i386 randconfig-a005-20201104
i386 randconfig-a001-20201104
i386 randconfig-a002-20201104
i386 randconfig-a003-20201104
x86_64 randconfig-a004-20201105
x86_64 randconfig-a003-20201105
Hi!
> diff --git a/drivers/leds/Kconfig b/drivers/leds/Kconfig
> index ed943140e1fd..6445b39fe4fc 100644
> --- a/drivers/leds/Kconfig
> +++ b/drivers/leds/Kconfig
> @@ -886,6 +886,16 @@ config LEDS_SGM3140
> This option enables support for the SGM3140 500mA Buck/Boost Charge
> Pump
On Wed, 4 Nov 2020, Lars Povlsen wrote:
> The mcp2221 driver GPIO output handling has has several issues.
>
> * A wrong value is used for the GPIO direction.
>
> * Wrong offsets are calculated for some GPIO set value/set direction
> operations, when offset is larger than 0.
>
> This has been
On Fri, Oct 23, 2020 at 4:21 PM Arun KS wrote:
> Im only concerned because, after this change, the use of gpio number
> from user space has become a little difficult.
This makes me a bit puzzled so I need to push back a bit
here.
What is this userspace and what interface is it using?
We recomm
On 2020/11/5 下午5:13, Heiner Kallweit wrote:
> On 05.11.2020 08:42, Qu Wenruo wrote:
>>
>>
>> On 2020/11/5 下午3:01, Heiner Kallweit wrote:
>>> On 05.11.2020 03:48, Qu Wenruo wrote:
Hi,
Not sure if this is a regression or not, but just find out that after
upgrading to v5.9 kerne
Following are the summary of changes.
* Update ADMA device node names for some of Tegra210 DT files.
* Convert ADMA, AGIC and ACONNECT docs to YAML.
Sameer Pujar (4):
arm64: tegra: Rename ADMA device nodes for Tegra210
dt-bindings: dma: Convert ADMA doc to json-schema
dt-bindings: interrupt-
DMA device nodes should follow regex pattern of "^dma-controller(@.*)?$".
This is a preparatory patch to use YAML doc format for ADMA.
Signed-off-by: Sameer Pujar
---
arch/arm64/boot/dts/nvidia/tegra210-p2371-2180.dts | 2 +-
arch/arm64/boot/dts/nvidia/tegra210-p3450-.dts | 2 +-
arch/arm64/
Enable the crypto controllers in the STM32MP157C-EV1 and STM32MP157A-DK1
STM32MP157C-DK2 boards.
Lionel Debieve (2):
ARM: dts: stm32: enable HASH by default on stm32mp15
ARM: dts: stm32: enable CRYP by default on stm32mp15
Nicolas Toromanoff (1):
ARM: dts: stm32: enable CRC1 by default on s
Enable HASH1 device for HASH accelerated support on
stm32mp15 STMicroelectronics platforms.
Signed-off-by: Lionel Debieve
---
arch/arm/boot/dts/stm32mp157c-ed1.dts | 4
arch/arm/boot/dts/stm32mp15xx-dkx.dtsi | 4
2 files changed, 8 insertions(+)
diff --git a/arch/arm/boot/dts/stm32mp
Move ACONNECT documentation to YAML format.
Signed-off-by: Sameer Pujar
---
.../bindings/bus/nvidia,tegra210-aconnect.txt | 44 ---
.../bindings/bus/nvidia,tegra210-aconnect.yaml | 86 ++
2 files changed, 86 insertions(+), 44 deletions(-)
delete mode 100644
Update Tegra compatibles to support newer Tegra chips and required
combinations.
Signed-off-by: Sameer Pujar
---
.../devicetree/bindings/interrupt-controller/arm,gic.yaml| 9 -
1 file changed, 8 insertions(+), 1 deletion(-)
diff --git
a/Documentation/devicetree/bindings/interru
From: Nicolas Toromanoff
Enable CRC1 device for CRC-32 accelerated support on
stm32mp15 STMicroelectronics platforms.
Signed-off-by: Nicolas Toromanoff
Signed-off-by: Lionel Debieve
---
arch/arm/boot/dts/stm32mp157c-ed1.dts | 4
arch/arm/boot/dts/stm32mp15xx-dkx.dtsi | 4
2 files c
Move ADMA documentation to YAML format.
Signed-off-by: Sameer Pujar
---
.../bindings/dma/nvidia,tegra210-adma.txt | 56 -
.../bindings/dma/nvidia,tegra210-adma.yaml | 95 ++
2 files changed, 95 insertions(+), 56 deletions(-)
delete mode 100644
D
Enable CRYP1 device for cryp accelerated support on
stm32mp157C-EV1/DK2 STMicroelectronics platforms.
Signed-off-by: Nicolas Toromanoff
Signed-off-by: Lionel Debieve
---
arch/arm/boot/dts/stm32mp157c-dk2.dts | 4
arch/arm/boot/dts/stm32mp157c-ed1.dts | 4
2 files changed, 8 insertions
Hi Mike!
thanks for your patch.
On Fri, Oct 9, 2020 at 8:03 AM Mike Looijmans wrote:
>- nxp,pcal9535
> + - nxp,pcal9554b
>- nxp,pcal9555a
This triggers my OCD. Putting B before A? Please make it alphabetic.
No big deal, but...
Yours,
Linus Walleij
Hi Linus,
please consider pulling the following gfs2 fixes on top of 5.10-rc1 (ish).
Thank you very much,
Andreas
The following changes since commit 4525c8781ec0701ce824e8bd379ae1b129e26568:
scsi: qla2xxx: remove incorrect sparse #ifdef (2020-10-26 15:45:22 -0700)
are available in the Git re
101 - 200 of 1657 matches
Mail list logo
