Retry
On Wed, Oct 28, 2020 at 10:11:38AM -0700, Guenter Roeck wrote:
> On Tue, Oct 27, 2020 at 02:45:43PM +0100, Greg Kroah-Hartman wrote:
> > This is the start of the stable review cycle for the 5.8.17 release.
> > There are 633 patches in this series, all will be posted as a response
> > to this
We report a bug (in linux-5.8.13) found by FuzzUSB (a modified version
of syzkaller).
The bug happened when accessing a freed instance of struct fsg_dev
(i.e., fsg->bulk_in) in do_set_interface() (line 2245).
==
BUG: KASAN: use-after
Hey Saravana,
Thanks for taking the time to look into this!
On Mon, Oct 26, 2020 at 12:10:33PM -0700, Saravana Kannan wrote:
> On Wed, Oct 21, 2020 at 2:02 PM Frank Rowand wrote:
> >
> > Hi Saravana,
> >
> > Michael found an issue related to the removal of a devicetree node
> > which involves de
Quoting Chris Wilson (2020-10-27 16:34:53)
> Quoting Peter Zijlstra (2020-10-27 15:45:33)
> > On Tue, Oct 27, 2020 at 01:29:10PM +, Chris Wilson wrote:
> >
> > > <4> [304.908891] hm#2, depth: 6 [6], 3425cfea6ff31f7f != 547d92e9ec2ab9af
> > > <4> [304.908897] WARNING: CPU: 0 PID: 5658 at
> > >
发件人: Jens Axboe
发送时间: 2020年10月27日 21:35
收件人: Zhang, Qiang
抄送: io-ur...@vger.kernel.org; linux-kernel@vger.kernel.org
主题: Re: [PATCH] io-wq: set task TASK_INTERRUPTIBLE state before schedule_timeout
On 10/26/20 9:09 PM, qiang.zh...@windriver.com wrote:
>
On Sun, Oct 25, 2020 at 6:38 PM Mauro Carvalho Chehab
wrote:
> Em Sun, 25 Oct 2020 18:10:44 -0400
> Paul Moore escreveu:
>
> > On Fri, Oct 23, 2020 at 12:33 PM Mauro Carvalho Chehab
> > wrote:
> > >
> > > typo:
> > > kauditd_print_skb -> kauditd_printk_skb
> > >
> > > Signed-off-by: Maur
Retry
On Wed, Oct 28, 2020 at 10:12:08AM -0700, Guenter Roeck wrote:
> On Tue, Oct 27, 2020 at 02:44:10PM +0100, Greg Kroah-Hartman wrote:
> > This is the start of the stable review cycle for the 5.9.2 release.
> > There are 757 patches in this series, all will be posted as a response
> > to this
On Fri, Oct 16, 2020 at 05:15:27PM +0200, Krzysztof Kozlowski wrote:
> Jeongtae Park has not been active on LKML:
> https://lore.kernel.org/lkml/?q=f%3A%22Jeongtae+Park%22
>
> Remove him from the Samsung S5P MFC driver entry.
>
> Cc: Jeongtae Park
> Cc: Andrzej Hajda
> Signed-off-by: Krzysztof
From: Max Chou
Add more IDs to usb_device_id table for Realtek
RTL8822CE and also support the wideband speech capability.
Signed-off-by: Max Chou
---
drivers/bluetooth/btusb.c | 18 --
1 file changed, 16 insertions(+), 2 deletions(-)
diff --git a/drivers/bluetooth/btusb.c b/dr
Hello,
Praveenkumar I wrote on Fri, 9 Oct 2020
13:37:52 +0530:
> After each codeword NAND_FLASH_STATUS is read for possible operational
> failures. But there is no DMA sync for CPU operation before reading it
> and this leads to incorrect or older copy of DMA buffer in reg_read_buf.
>
> This p
On 2020-10-27 19:03, Carl Yin wrote:
Hi bbhatt:
On Wednesday, October 28, 2020 9:02 AM, bbhatt wrote:
Hi Carl,
Yes this change is needed. Good catch. I ran in to this issue as well
when a
dev_err() call was made with a bad MHI configuration.
[carl.yin] yes, I also meet this error with a ba
>
> On Mon, 26 Oct 2020 at 09:22, 冯锐 wrote:
> >
> > >
> > > + Christoph (to help us understand if PCIe/NVMe devices can be
> > > + marked
> > > + read-only)
> > >
> > > On Thu, 22 Oct 2020 at 08:04, 冯锐 wrote:
> > > >
> > > > >
> > > > > On Fri, 25 Sep 2020 at 03:57, wrote:
> > > > > >
> > > > >
This adds msi_host_isr() callback function support to describe
SoC-dependent service triggered by MSI.
For example, when AER interrupt is triggered by MSI, the callback function
reads SoC-dependent registers and detects that the interrupt is from AER,
and invoke AER interrupts related to MSI.
Cc:
Loading the module deadlocks since:
-local cbc(aes) implementation needs a fallback and
-crypto API tries to find one but the request_module() resolves back to
the same module
Fix this by changing the module alias for cbc(aes) and
using the NEED_FALLBACK flag when requesting for a fallback algorit
On Wed, Oct 28 2020 at 20:33, John Garry wrote:
>
> +int irq_update_affinity_desc(unsigned int irq,
> + struct irq_affinity_desc *affinity)
> +{
> + unsigned long flags;
> + struct irq_desc *desc = irq_get_desc_lock(irq, &flags, 0);
> +
> + if (!desc)
> +
On Fri, Oct 16, 2020 at 05:15:26PM +0200, Krzysztof Kozlowski wrote:
> Kyungmin Park maintained and contributed to some of the upstreamed
> S5Pv210 and Exynos4210 machines - as described in commit 10ffa96407b2
> ("MAINTAINERS: add maintainer of Samsung Mobile Machine support").
> However the entry
On 10/28/20 11:46 AM, Joerg Roedel wrote:
> From: Joerg Roedel
>
> Check whether the hypervisor reported the correct C-bit when running as
> an SEV guest. Using a wrong C-bit position could be used to leak
> sensitive data from the guest to the hypervisor.
>
> The check function is in arch/x86/k
The following commit has been merged into the locking/urgent branch of tip:
Commit-ID: 921c7ebd1337d1a46783d7e15a850e12aed2eaa0
Gitweb:
https://git.kernel.org/tip/921c7ebd1337d1a46783d7e15a850e12aed2eaa0
Author:Mateusz Nosek
AuthorDate:Sun, 27 Sep 2020 02:08:58 +02:00
Comm
Pavana,
please add me to Cc for this.
Does USXGMII mode work? There are some erratas for for 10gb serdes mode.
Also you should split this patch. The code that refactores the
serdes_get_lane methods should be in a separate patch.
I have a device with this switch and also a SFP module which can
o
On Fri, Oct 16, 2020 at 05:15:28PM +0200, Krzysztof Kozlowski wrote:
> Remove trailing white spaces. No functional/substantive change.
>
> Signed-off-by: Krzysztof Kozlowski
> ---
> CREDITS | 52 ++--
> 1 file changed, 26 insertions(+), 26 deletio
We don't need to allocate and reassign the used ring here and remove the
used_address_updated flag. Since RC has allocated the entire vring,
including the used ring. Simply add the corresponding offset can get the
used ring address.
If following the orginal way to reassign the used ring, will enco
Add pcie_port_service_get_irq() that returns the virtual IRQ number
for specified portdrv service.
Cc: Lorenzo Pieralisi
Signed-off-by: Kunihiko Hayashi
Reviewed-by: Rob Herring
---
drivers/pci/pcie/portdrv.h | 1 +
drivers/pci/pcie/portdrv_core.c | 16
2 files changed,
Hi,
On 10/27/20 2:49 PM, Divya Bharathi wrote:
> The Dell WMI Systems Management Driver provides a sysfs
> interface for systems management to enable BIOS configuration
> capability on certain Dell Systems.
>
> This driver allows user to configure Dell systems with a
> uniform common interface. T
Allocate vrings use dma_alloc_coherent is a common way in kernel. As the
memory interacted between two systems should use consistent memory to
avoid caching effects, same as device page memory.
The orginal way use __get_free_pages and dma_map_single to allocate and
map vring, but not use dma_sync_
Le 28/10/2020 à 12:11, Christopher Lameter a écrit :
On Tue, 27 Oct 2020, Laurent Dufour wrote:
The issue is that object is not NULL while page is NULL which is odd but
may happen if the cache flush happened after loading object but before
loading page. Thus checking for the page pointer is req
On 14-10-20, 15:06, Sumit Gupta wrote:
> Frequency returned by 'cpuinfo_cur_freq' using counters is not fixed
> and keeps changing slightly. This change returns a consistent value
> from freq_table. If the reconstructed frequency has acceptable delta
> from the last written value, then return the f
From: Soheil Hassas Yeganeh
After abc610e01c66, we break out of the ep_poll loop upon timeout,
without checking whether there is any new events available. Prior to
that patch-series we always called ep_events_available() after
exiting the loop.
This can cause races and missed wakeups. For examp
Hi Sudeep,
> Subject: Re: [PATCH V3 2/4] misc: vop: do not allocate and reassign the used
> ring
>
> On Wed, 2020-10-28 at 01:47 +, Sherry Sun wrote:
> > Hi Vincent,
> >
> > > Subject: Re: [PATCH V3 2/4] misc: vop: do not allocate and reassign
> > > the used ring
> > >
> > > On Tue, Oct 27, 2
Changes in V5:
1. Reorganize the vop_mmap function code in patch 1, which is done by
Christoph.
2. Completely remove the unnecessary code related to reassign the used ring for
card in patch 2.
The original vop driver only supports dma coherent device, as it allocates and
maps vring by _get_free_
This patch adds misc interrupt handler to detect and invoke PME/AER event.
In UniPhier PCIe controller, PME/AER signals are assigned to the same
signal as MSI by the internal logic. These signals should be detected by
the internal register, however, DWC MSI handler can't handle these signals.
DWC
LiteON(SSSTC) CL1 device running FW 220TQ,22001 has bugs with simple
suspend.
When NVMe device receive D3hot from host, NVMe firmware will do
garbage collection. While NVMe device do Garbage collection,
firmware has chance to going incorrect address.
In that case, NVMe storage device goes to no de
On 64-bit platforms, pointer size and alignment are 64-bit, hence two
4-byte holes are present before the pins and gc members of the
pinctrl_gpio_range structure. Get rid of these holes by moving the
pins pointer.
This reduces kernel size of an arm64 Rockchip kernel by ca. 512 bytes.
Signed-off-
The original subject up to v6 is
"PCI: uniphier: Add features for UniPhier PCIe host controller".
This adds a new function called by MSI handler in DesignWare PCIe framework,
that invokes PME and AER funcions to detect the factor from SoC-dependent
registers.
The iATU patches is split from this s
Commit 3193c0836 ("bpf: Disable GCC -fgcse optimization for
___bpf_prog_run()") introduced a __no_fgcse macro that expands to a
function scope __attribute__((optimize("-fno-gcse"))), to disable a
GCC specific optimization that was causing trouble on x86 builds, and
was not expected to have any posi
On Mon, Oct 26, 2020 at 10:47:35AM +0100, Mauro Carvalho Chehab wrote:
> Hi Mark/Jakub,
>
> As you requested, I'm resending the three -net patches
> from the /56 patch series I sent last Friday:
I was asking for you to do the same for the patches for my subsystems
rather than resend the net patch
To reduce the impact of disabling certain compiler optimizations that
are only needed for the interpreter, move it into its own source file,
and apply the compiler command line override only to this file.
Signed-off-by: Ard Biesheuvel
---
include/linux/filter.h | 1 +
kernel/bpf/Makefile|
On 27/10/20 22:42, Sean Christopherson wrote:
> Add a macro, which is probably long overdue, to replace open coded
> variants of "~(KVM_PAGES_PER_HPAGE(level) - 1)". The straw that broke the
> camel's back is the TDP MMU's round_gfn_for_level(), which goes straight
> for the optimized approach of
Replace the explicit EBOIV handling in the dm-crypt driver with calls
into the crypto API, which now possesses the capability to perform
this processing within the crypto subsystem.
Signed-off-by: Gilad Ben-Yossef
---
drivers/md/dm-crypt.c | 61 ++-
1 fil
On Thu, Oct 01, 2020 at 06:56:45PM +0200, Krzysztof Kozlowski wrote:
> The Exynos clock output (clkout) driver uses same register address space
> (Power Management Unit address space) as Exynos PMU driver and same set
> of compatibles. It was modeled as clock provider instantiated with
> CLK_OF_DE
Encrypted byte-offset initialization vector (EBOIV) is an IV
generation method that is used in some cases by dm-crypt for
supporting the BitLocker volume encryption used by Windows 8
and onwards as a backwards compatible version in lieu of XTS
support. Support for eboiv was added to dm-crypt in 5.6
On Thu, Oct 22, 2020 at 3:20 PM Andrey Konovalov wrote:
>
> Currently it says that the memory gets poisoned by page_alloc code.
> Clarify this by mentioning the specific callback that poisons the
> memory.
>
> Signed-off-by: Andrey Konovalov
> Link:
> https://linux-review.googlesource.com/id/I13
Add test vectors for the use of the EBOIV template with cbc(aes)
modes as it is being used by dm-crypt for BitLocker support.
Vectors taken from dm-crypt test suite images.
Signed-off-by: Gilad Ben-Yossef
---
crypto/tcrypt.c | 9 ++
crypto/testmgr.c | 6 +
crypto/testmgr.h | 279 ++
Comment for is_dump_unreclaim_slabs is not really clear whether it is
meant to instruct how to use the function or whether it is an outdated
information of the past implementation of the function. it doesn't realy
help that is_dump_unreclaim_slabs is hard to grasp on its own.
Rename the helper to
From: Aleksandr Nogikh
Remote KCOV coverage collection enables coverage-guided fuzzing of the
code that is not reachable during normal system call execution. It is
especially helpful for fuzzing networking subsystems, where it is
common to perform packet handling in separate work queues even for
On Wed, Oct 28, 2020 at 2:56 PM Tsuchiya Yuto wrote:
>
> To make the ps_mode (power_save) control easier, this commit adds a new
> module parameter allow_ps_mode and set it false (disallowed) by default.
This sounds like a bad idea, as it breaks all the existing users who
expect this feature to b
On 10/28/20 11:46 AM, Joerg Roedel wrote:
> From: Joerg Roedel
>
> MMIO memory is usually not mapped encrypted, so there is no reason to
> support emulated MMIO when it is mapped encrypted.
>
> Prevent a possible hypervisor attack where a RAM page is mapped as
> an MMIO page in the nested page-t
Hi bbhatt:
On Wednesday, October 28, 2020 9:34 AM, bbhatt wrote:
> Hi Carl,
> On 2020-10-27 16:01, Hemant Kumar wrote:
> > Hi Jeff,
> >
> > On 10/27/20 8:11 AM, Jeffrey Hugo wrote:
> >> On 10/27/2020 3:43 AM, carl@quectel.com wrote:
> >>> From: "carl.yin"
> >>>
> >>> MHI wwan modems support d
I might be missing something here but I think what you say is only
correct for the kvm_hypercall4 cases. All other functions use a
smaller number of registers. #VC blindly assumes that all those
registers are used in the vmcall and exposes them. Here are some
examples:
For example in the kvm_hyper
On Wed, Oct 28, 2020 at 03:23:18PM +0100, Mauro Carvalho Chehab wrote:
> diff --git a/Documentation/ABI/testing/sysfs-uevent
> b/Documentation/ABI/testing/sysfs-uevent
> index aa39f8d7bcdf..d0893dad3f38 100644
> --- a/Documentation/ABI/testing/sysfs-uevent
> +++ b/Documentation/ABI/testing/sysfs-
On 27-10-20, 11:59, t...@redhat.com wrote:
> From: Tom Rix
>
> A semicolon is not needed after a switch statement.
>
> Signed-off-by: Tom Rix
> ---
> drivers/cpufreq/speedstep-lib.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/cpufreq/speedstep-lib.c b/driv
On Mon, Oct 26, 2020 at 04:19:08PM +0800, Hector Yuan wrote:
> From: "Hector.Yuan"
>
> Add devicetree documentation for 'mediatek,freq-domain' property specific
> to Mediatek CPUs. This property is used to reference the CPUFREQ node
> along with the domain id.
>
> Signed-off-by: Hector.Yuan
> -
On Wed, Oct 28, 2020 at 06:00:29PM +1100, Alexey Kardashevskiy wrote:
> At the moment we allow bypassing DMA ops only when we can do this for
> the entire RAM. However there are configs with mixed type memory
> where we could still allow bypassing IOMMU in most cases;
> POWERPC with persistent memo
Clock source is prepared and enabled by clk_prepare_enable()
in probe function, but no disable or unprepare in remove.
Signed-off-by: Qinglang Miao
---
arch/arm/mach-imx/mmdc.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/mach-imx/mmdc.c b/arch/arm/mach-imx/mmdc.c
index 0dfd0ae7a
Matthew Wilcox wrote:
> > +{
> > + if (PAGE_SIZE - 1 <= __AFS_PAGE_PRIV_MASK)
> > + return 1;
> > + else
> > + return PAGE_SIZE / (__AFS_PAGE_PRIV_MASK + 1);
>
> Could this be DIV_ROUND_UP(PAGE_SIZE, __AFS_PAGE_PRIV_MASK + 1); avoiding
> a conditional? I appreciate it's
On Wed, Oct 28, 2020 at 2:16 AM Jakub Kicinski wrote:
> On Mon, 26 Oct 2020 17:51:09 +0100 Arnd Bergmann wrote:
>
> > Fixes: a9049e0c513c ("mdio: Add support for mdio drivers.")
>
> I feel like this is slightly onerous, please drop the tag.
>
> Harmless W=2 warnings hardly call for getting this i
On Tue, 27 Oct 2020 11:20:35 +0100
Mauro Carvalho Chehab wrote:
> This small series contain the latest version of the typedef parsing
> fixes that we've been discussing as:
>
> [PATCH v3 01/56] scripts: kernel-doc: fix typedef parsing
>
> As I said there, at least while discussing it, I o
On Mon, Oct 26, 2020 at 05:14:39PM +0100, Arnd Bergmann wrote:
> From: Arnd Bergmann
>
> There are hundreds of warnings in a W=2 build about a local
> variable shadowing the global 'apic' definition:
>
> arch/x86/kvm/lapic.h:149:65: warning: declaration of 'apic' shadows a global
> declaration
On Tue, 27 Oct 2020 07:24:08 +0100
Wilken Gottwalt wrote:
> Add the current Allwinner H6 datasheet and user manual.
>
> Signed-off-by: Wilken Gottwalt
> ---
> Changes in v2:
> - changed email because of serious problems between my old email
> provider and the lkml
> ---
> Documen
On Wed, Oct 28, 2020 at 05:55:23PM +1100, Alexey Kardashevskiy wrote:
>
> It is passing an address of the end of the mapped area so passing a page
> struct means passing page and offset which is an extra parameter and we do
> not want to do anything with the page in those hooks anyway so I'd keep
When perf data is in a pipe, it reads each event separately using
read(2) syscall. This is a huge performance bottleneck when
processing large data like in perf inject. Also perf inject needs to
use write(2) syscall for the output.
So convert it to use buffer I/O functions in stdio library for p
Add the missing destroy_workqueue() before return from
pci_epf_test_init() in the error handling case.
Signed-off-by: Qinglang Miao
---
drivers/pci/endpoint/functions/pci-epf-test.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/pci/endpoint/functions/pci-epf-test.c
b/drivers/pci/e
On Wed, 28 Oct 2020 14:33:03 -0700
Alexei Starovoitov wrote:
> I don't have strong opinion on this feature, but if you want to have it
> please add a giant disclaimer that this is going to be x86-64 and, may be
> arm64,
> feature _forever_. On x86-32 and other architectures there is no way
> to
On Thu, Oct 01, 2020 at 06:56:46PM +0200, Krzysztof Kozlowski wrote:
> The Exynos clkout driver depends on board input clock (typically XXTI or
> XUSBXTI), however on Exynos4 boards these clocks were modeled as part of
> SoC clocks (Exynos4 clocks driver). Obviously this is not proper, but
> corre
Add the missing destroy_workqueue() before return from
ks7010_sdio_probe in the error handling case.
Signed-off-by: Qinglang Miao
---
drivers/staging/ks7010/ks7010_sdio.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/staging/ks7010/ks7010_sdio.c
b/drivers/stagin
On Wed, Oct 28, 2020 at 2:52 PM Bjorn Helgaas wrote:
>
> [+cc Rajat, LKML]
>
Thanks for copying me. (I don't look at mailing lists actively - so
missed this). Taking a look at this now.
Thanks,
Rajat
> On Tue, Oct 27, 2020 at 08:31:09PM +0100, Boris V. wrote:
> > On 25/10/2020 20:45, Boris V.
On Wed, Oct 28, 2020 at 6:04 PM Sean Christopherson
wrote:
>
> On Mon, Oct 26, 2020 at 05:14:39PM +0100, Arnd Bergmann wrote:
> > From: Arnd Bergmann
> >
> > There are hundreds of warnings in a W=2 build about a local
> > variable shadowing the global 'apic' definition:
> >
> > arch/x86/kvm/lapic
On Tue, Oct 27, 2020 at 03:42:10PM +, Alan Maguire wrote:
On Tue, 27 Oct 2020, Greg Kroah-Hartman wrote:
From: Alan Maguire
[ Upstream commit eb58bbf2e5c7917aa30bf8818761f26bbeeb2290 ]
bpf iter size increase to PAGE_SIZE << 3 means overflow tests assuming
page size need to be bumped also
./drivers/gpu/drm/tilcdc/tilcdc_panel.c:402:3-8: No need to set .owner here.
The core will do it.
Remove .owner field if calls are used which set it automatically
Generated by: scripts/coccinelle/api/platform_no_drv_owner.cocci
Fixes: 0d4bbaf9f3e5 ("drm/tilcdc: add support for LCD panels (v5)"
Hi Peter,
Thanks for the patch.
On Fri, Oct 23, 2020 at 02:46:02AM -0700, Peter Ujfalusi wrote:
> There is no need to use the of_dma_request_slave_channel() directly as
> dma_request_chan() is going to try to get the channel via OF as well.
>
> Signed-off-by: Peter Ujfalusi
So now dma_request_
I noticed that iounmap() of msgr_block_addr before return from
mpic_msgr_probe() in the error handling case is missing. So use
devm_ioremap() instead of just ioremap() when remapping the message
register block, so the mapping will be automatically released on
probe failure.
Signed-off-by: Qinglang
Hi all,
In commit
f8e48a3dca06 ("lockdep: Fix preemption WARN for spurious IRQ-enable")
Fixes tag
Fixes: 4d004099a6 ("lockdep: Fix lockdep recursion")
has these problem(s):
- SHA1 should be at least 12 digits long
Can be fixed by setting core.abbrev to 12 (or more) or (for git v2.11
On Thu, 22 Oct 2020 12:40:21 +0200, Oleksij Rempel wrote:
> Add Plymovent Group BV BAS iMX6dl based board
>
> Signed-off-by: Oleksij Rempel
> ---
> Documentation/devicetree/bindings/arm/fsl.yaml | 1 +
> 1 file changed, 1 insertion(+)
>
Acked-by: Rob Herring
Fix the missing clk_disable_unprepare() before return from
mmp_dt_init_timer() in the error handling case.
Signed-off-by: Qinglang Miao
---
arch/arm/mach-mmp/time.c | 9 ++---
1 file changed, 6 insertions(+), 3 deletions(-)
diff --git a/arch/arm/mach-mmp/time.c b/arch/arm/mach-mmp/time.c
in
Hi Abel,
On Mon, Oct 26, 2020 at 08:50:48PM +0200, Abel Vesa wrote:
> The clock is considered to be enabled only if the controlling bits
> match the cgr_val mask. Also make sure the is_enabled returns the
> correct vaule by locking the access to the register.
>
> Signed-off-by: Abel Vesa
> Fixes
On Tue, Oct 27, 2020 at 11:30:31PM +0300, Dmitry Osipenko wrote:
> 27.10.2020 13:27, Krzysztof Kozlowski пишет:
> > On Mon, Oct 26, 2020 at 01:17:24AM +0300, Dmitry Osipenko wrote:
> >> Use devm_platform_ioremap_resource() helper which makes code a bit
> >> cleaner.
> >
> > Such cleanups (and few
On Tue, Oct 27, 2020 at 04:59:45PM +0100, Matthieu Baerts wrote:
Hi Greg,
On 27/10/2020 14:53, Greg Kroah-Hartman wrote:
From: Matthieu Baerts
[ Upstream commit 287d35405989cfe0090e3059f7788dc531879a8d ]
Recently, CONFIG_MPTCP_IPV6 no longer selects CONFIG_IPV6. As a
consequence, if CONFIG_M
On Wed, Oct 28, 2020 at 11:50:57AM +0200, Abel Vesa wrote:
> On 20-10-28 09:24:12, Sascha Hauer wrote:
> > Hi Abel,
> >
> > On Mon, Oct 26, 2020 at 08:50:48PM +0200, Abel Vesa wrote:
> > > The clock is considered to be enabled only if the controlling bits
> > > match the cgr_val mask. Also make su
In create_pipe_files(), if alloc_file_clone() fails, we will call
put_pipe_info to release pipe, and call fput() to release f.
However, we donot call iput() to free inode.
Signed-off-by: Zhiqiang Liu
Signed-off-by: Feilong Lin
---
fs/pipe.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/
On Wed, 2020-10-28 at 08:53 -0700, Paul E. McKenney wrote:
> On Wed, Oct 28, 2020 at 10:39:47AM -0400, Qian Cai wrote:
> > On Tue, 2020-10-27 at 20:01 -0700, Paul E. McKenney wrote:
> > > If I have the right email thread associated with the right fixes, these
> > > commits in -rcu should be what yo
On 2020/10/27 3:22, Jaegeuk Kim wrote:
When running fault injection test, if we don't stop checkpoint, some stale
NAT entries were flushed which breaks consistency.
Fixes: 86f33603f8c5 ("f2fs: handle errors of f2fs_get_meta_page_nofail")
Signed-off-by: Jaegeuk Kim
Reviewed-by: Chao Yu
Thank
Hi all,
After merging the tip tree, today's linux-next build (htmldocs) produced
this warning:
Documentation/admin-guide/hw-vuln/l1d_flush.rst:25: WARNING: undefined label:
documentation/userspace-api/spec_ctrl.rst (if the link has no caption the label
must precede a section header)
Introduced
CoreSight ETMv4.4 obsoletes memory mapped access to ETM and
mandates the system instructions for registers.
This also implies that they may not be on the amba bus.
Right now all the CoreSight components are accessed via memory
map. Also, we have some common routines in coresight generic
code driver
We rely on the ETM architecture version to decide whether
Secure EL2 is available on the CPU for excluding the level
for address comparators and viewinst main control register.
We must instead use the TRCDIDR3.EXLEVEL_S field to detect
the supported levels.
Signed-off-by: Suzuki K Poulose
---
dr
We are about to introduce support for sysreg access to ETMv4.4+
component. Since there are generic routines that access the
registers (e.g, CS_LOCK/UNLOCK , claim/disclaim operations, timeout)
and in order to preserve the logic of these operations at a
single place we introduce an abstraction layer
ETMv4.4 architecture defines the system instructions for accessing
ETM via register accesses. Add basic support for accessing a given
register via system instructions.
Cc: Mathieu Poirier
Cc: Mike Leach
Signed-off-by: Suzuki K Poulose
---
.../coresight/coresight-etm4x-core.c | 39 ++
On Mon, Jul 13, 2020 at 1:41 PM Will Deacon wrote:
> On Fri, Jul 10, 2020 at 03:21:53PM -0700, John Stultz wrote:
> > On Fri, Jul 10, 2020 at 12:54 AM Will Deacon wrote:
> > > On Thu, Jul 09, 2020 at 08:28:45PM -0700, John Stultz wrote:
> > > > On Thu, Jul 2, 2020 at 7:18 AM Will Deacon wrote:
>
Hi all,
After merging the counters tree, today's linux-next build (htmldocs)
produced these warnings:
Documentation/core-api/counters.rst:45: WARNING: undefined label: test counters
module (if the link has no caption the label must precede a section header)
Documentation/core-api/counters.rst:4
Define the fields of the DEVARCH register for identifying
a component as an ETMv4.x unit. Going forward, we use the
DEVARCH register for the component identification, rather
than the TRCIDR3.
Cc: Mathieu Poirier
Cc: Mike Leach
Signed-off-by: Suzuki K Poulose
---
.../coresight/coresight-etm4x-c
On Wed, Oct 21, 2020 at 10:04:44PM -0700, Alexandru Stan wrote:
> We want userspace to represent the human perceived brightness.
> Since the led drivers and the leds themselves don't have a
> linear response to the value we give them in terms of perceived
> brightness, we'll bake the curve into the
As we are about define a switch..case table for individual register
access by offset for implementing the system instruction support,
document the possible set of registers for each group to make
it easier to co-relate.
Cc: Mathieu Poirier
Cc: Mike Leach
Signed-off-by: Suzuki K Poulose
---
dri
Since ETMv4.2, TRCIDR3.NUMPROCS has been extended to a 5bit field
by encoding the top 2 bits[4:3] in TRCIDR3.[13:12], which were RES0.
Fix the driver to compute the field correctly for ETMv4.2+
Cc: Mike Leach
Cc: Mathieu Poirier
Signed-off-by: Suzuki K Poulose
---
drivers/hwtracing/coresight/c
In preparation to detect the support for system instruction
support, move the detection of the device access to the target
CPU.
Signed-off-by: Suzuki K Poulose
---
.../coresight/coresight-etm4x-core.c | 45 ---
1 file changed, 40 insertions(+), 5 deletions(-)
diff --git
Hello,
Md Sadre Alam wrote on Sat, 10 Oct 2020
11:01:37 +0530:
> QPIC 2.0 supports Serial NAND support in addition to all features and
> commands in QPIC 1.0 for parallel NAND. Parallel and Serial NAND cannot
> operate simultaneously. QSPI nand devices will connect to QPIC IO_MACRO
> block of QP
Add support for devices with system instruction access only.
They don't have a memory mapped interface and thus are not
AMBA devices.
Cc: Mathieu Poirier
Cc: Mike Leach
Signed-off-by: Suzuki K Poulose
---
.../coresight/coresight-etm4x-core.c | 50 +--
1 file changed, 4
The prevention of splice-write without explicit ops made the
copy_file_write() syscall to an afs file (as done by the generic/112
xfstest) fail with EINVAL.
Fix by using iter_file_splice_write() for afs.
Fixes: 36e2c7421f02 ("fs: don't allow splice read/write without explicit ops")
Signed-off-by:
Convert the generic CLAIM tag management APIs to use the
device access layer abstraction.
Cc: Mathieu Poirier
Cc: Mike Leach
Signed-off-by: Suzuki K Poulose
---
drivers/hwtracing/coresight/coresight-catu.c | 6 +-
drivers/hwtracing/coresight/coresight-core.c | 66 +++
.../hw
We have been using TRCIDR1 for detecting the ETM version. This
is in preparation for the future IP support.
Signed-off-by: Suzuki K Poulose
---
.../coresight/coresight-etm4x-core.c | 46 +--
1 file changed, 23 insertions(+), 23 deletions(-)
diff --git a/drivers/hwtracin
Document the bindings for ETMs with system register accesses.
Cc: devicet...@vger.kernel.org
Cc: Mathieu Poirier
Cc: Mike Leach
Cc: Rob Herring
Signed-off-by: Suzuki K Poulose
---
Documentation/devicetree/bindings/arm/coresight.txt | 5 -
1 file changed, 4 insertions(+), 1 deletion(-)
di
On Thu, 8 Oct 2020 14:50:28 +0200, nicolas.fe...@microchip.com wrote:
> Adding SAM9X60 SIP variants to the soc description list.
Applied, thanks!
[1/1] ARM: at91: sam9x60 SiP types added to soc description
commit: 786c395dbe4216c2349914952b8cdb57ea8a326a
Best regards,
--
Alexandre Belloni
From: Cixi Geng
Introduce new configuration option GCOV_PROFILE_PREREQS that can be
used to check whether the prerequisites for enabling gcov profiling
for specific files and directories are met.
Only add SERIAL_GCOV for an example.
Signed-off-by: Cixi Geng
---
drivers/tty/serial/Kconfig | 7
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