On Thu, Oct 22, 2020 at 02:21:58PM +0200, Giovanni Gherdovich wrote:
> On Thu, 2020-10-22 at 10:46 +0200, Peter Zijlstra wrote:
> > On Sun, May 31, 2020 at 08:24:51PM +0200, Giovanni Gherdovich wrote:
> >
> > Hi Giovanni!
> >
> > > +error:
> > > + pr_warn("Scheduler frequency invariance went wobb
On Thu, Oct 08, 2020 at 01:41:57PM +0200, Vlastimil Babka wrote:
> We initialize boot-time pagesets with setup_pageset(), which sets high and
> batch values that effectively disable pcplists.
>
> We can remove this wrapper if we just set these values for all pagesets in
> pageset_init(). Non-boot
On Thu, 22 Oct 2020, Markus Elfring wrote:
> > A disjunction is applied by this script for the semantic patch language.
> > This construct uses short-circuit evaluation. It has got the consequence
> > that the last element of the specified condition will only be checked
> > if all previous parts
On Thu, Oct 22, 2020 at 12:54:52PM +0200, Kurt Kanzenbach wrote:
> On Wed Oct 21 2020, Florian Fainelli wrote:
> > On 10/21/2020 5:16 PM, Vladimir Oltean wrote:
> >> On Wed, Oct 21, 2020 at 08:52:01AM +0200, Kurt Kanzenbach wrote:
> >>> On Mon Oct 19 2020, Christian Eggers wrote:
> >>> The node nam
This patch adds the new binding documentation of msdc controller
for Mediatek MT8192.
Signed-off-by: Weiyi Lu
---
.../bindings/arm/mediatek/mediatek,msdc.yaml | 46 ++
1 file changed, 46 insertions(+)
create mode 100644
Documentation/devicetree/bindings/arm/mediatek/m
Add MT8192 msdc clock provider
Signed-off-by: Weiyi Lu
---
drivers/clk/mediatek/Kconfig | 6
drivers/clk/mediatek/Makefile | 1 +
drivers/clk/mediatek/clk-mt8192-msdc.c | 57 ++
3 files changed, 64 insertions(+)
create mode 100644 driver
Add MT8192 basic clock providers, include topckgen, apmixedsys,
infracfg and pericfg.
Signed-off-by: Weiyi Lu
---
drivers/clk/mediatek/Kconfig |8 +
drivers/clk/mediatek/Makefile |1 +
drivers/clk/mediatek/clk-mt8192.c | 1350 +
drivers/clk/me
Add MT8192 vdecsys clock provider
Signed-off-by: Weiyi Lu
---
drivers/clk/mediatek/Kconfig | 6 +++
drivers/clk/mediatek/Makefile | 1 +
drivers/clk/mediatek/clk-mt8192-vdec.c | 82 ++
3 files changed, 89 insertions(+)
create mode 100644 driv
This patch adds the new binding documentation of imp i2c wrapper controller
for Mediatek MT8192.
Signed-off-by: Weiyi Lu
---
.../arm/mediatek/mediatek,imp_iic_wrap.yaml| 78 ++
1 file changed, 78 insertions(+)
create mode 100644
Documentation/devicetree/bindings/arm
changes since v3:
- add critical clocks
- split large patches into small ones
changes since v2:
- update and split dt-binding documents by functionalities
- add error checking in probe() function
- fix incorrect clock relation and add critical clocks
- update license identifier and minor fix of co
This patch adds the new binding documentation of mdpsys controller
for Mediatek MT8192.
Signed-off-by: Weiyi Lu
---
.../bindings/arm/mediatek/mediatek,mdpsys.yaml | 38 ++
1 file changed, 38 insertions(+)
create mode 100644
Documentation/devicetree/bindings/arm/mediatek
Add MT8192 imp i2c wrapper n clock provider
Signed-off-by: Weiyi Lu
---
drivers/clk/mediatek/Kconfig | 6 +++
drivers/clk/mediatek/Makefile| 1 +
drivers/clk/mediatek/clk-mt8192-imp_iic_wrap_n.c | 60
3 files changed, 67 insertio
Add MT8192 camsys rawc clock provider
Signed-off-by: Weiyi Lu
---
drivers/clk/mediatek/Kconfig | 6 +++
drivers/clk/mediatek/Makefile | 1 +
drivers/clk/mediatek/clk-mt8192-cam_rawc.c | 59 ++
3 files changed, 66 insertions(+)
create mode
Add MT8192 audio clock provider
Signed-off-by: Weiyi Lu
---
drivers/clk/mediatek/Kconfig | 6 ++
drivers/clk/mediatek/Makefile | 1 +
drivers/clk/mediatek/clk-mt8192-aud.c | 118 ++
3 files changed, 125 insertions(+)
create mode 100644 driver
This patch adds the binding documentation of topckgen, apmixedsys,
infracfg, pericfg and subsystem clocks for Mediatek MT8192.
Signed-off-by: Weiyi Lu
---
Documentation/devicetree/bindings/arm/mediatek/mediatek,apmixedsys.txt | 1 +
Documentation/devicetree/bindings/arm/mediatek/mediatek,audsys.
Add MT8192 mmsys clock provider
Signed-off-by: Weiyi Lu
---
drivers/clk/mediatek/Kconfig | 6 ++
drivers/clk/mediatek/Makefile| 1 +
drivers/clk/mediatek/clk-mt8192-mm.c | 108 +++
3 files changed, 115 insertions(+)
create mode 100644 drivers/
Add MT8192 mdpsys clock provider
Signed-off-by: Weiyi Lu
---
drivers/clk/mediatek/Kconfig | 6 +++
drivers/clk/mediatek/Makefile | 1 +
drivers/clk/mediatek/clk-mt8192-mdp.c | 89 +++
3 files changed, 96 insertions(+)
create mode 100644 drivers
Add MT8192 camsys rawa clock provider
Signed-off-by: Weiyi Lu
---
drivers/clk/mediatek/Kconfig | 6 +++
drivers/clk/mediatek/Makefile | 1 +
drivers/clk/mediatek/clk-mt8192-cam_rawa.c | 59 ++
3 files changed, 66 insertions(+)
create mode
Add MT8192 ipesys clock provider
Signed-off-by: Weiyi Lu
---
drivers/clk/mediatek/Kconfig | 6
drivers/clk/mediatek/Makefile | 1 +
drivers/clk/mediatek/clk-mt8192-ipe.c | 64 +++
3 files changed, 71 insertions(+)
create mode 100644 driver
Add MT8192 imp i2c wrapper c clock provider
Signed-off-by: Weiyi Lu
---
drivers/clk/mediatek/Kconfig | 6 +++
drivers/clk/mediatek/Makefile| 1 +
drivers/clk/mediatek/clk-mt8192-imp_iic_wrap_c.c | 62
3 files changed, 69 insertio
Add MT8192 imp i2c wrapper w clock provider
Signed-off-by: Weiyi Lu
---
drivers/clk/mediatek/Kconfig | 6 +++
drivers/clk/mediatek/Makefile| 1 +
drivers/clk/mediatek/clk-mt8192-imp_iic_wrap_w.c | 59
3 files changed, 66 insertio
Add MT8192 camsys clock provider
Signed-off-by: Weiyi Lu
---
drivers/clk/mediatek/Kconfig | 6 +++
drivers/clk/mediatek/Makefile | 1 +
drivers/clk/mediatek/clk-mt8192-cam.c | 72 +++
3 files changed, 79 insertions(+)
create mode 100644 drivers
This patch adds the new binding documentation of camsys raw controller
for Mediatek MT8192.
Signed-off-by: Weiyi Lu
---
.../bindings/arm/mediatek/mediatek,camsys-raw.yaml | 54 ++
1 file changed, 54 insertions(+)
create mode 100644
Documentation/devicetree/bindings/arm/medi
On Thu, Oct 08, 2020 at 01:41:58PM +0200, Vlastimil Babka wrote:
> pageset_update() attempts to update pcplist's high and batch values in a way
> that readers don't observe batch > high. It uses smp_wmb() to order the
> updates
> in a way to achieve this. However, without proper pairing read barri
syzbot suspects this issue was fixed by commit:
commit a7809ff90ce6c48598d3c4ab54eb599bec1e9c42
Author: Manivannan Sadhasivam
Date: Sat Sep 26 16:56:25 2020 +
net: qrtr: ns: Protect radix_tree_deref_slot() using rcu read locks
bisection log: https://syzkaller.appspot.com/x/bisect.txt
In fact, the en_mask is a combination of divider enable mask
and pll enable bit(bit0).
Before this patch, we enabled both divider mask and bit0 in prepare(),
but only cleared the bit0 in unprepare().
In the future, we hope en_mask will only be used as divider enable mask.
The enable register(CON0)
On 22.10.20 14:18, Greg KH wrote:
> On Thu, Oct 22, 2020 at 12:48:05PM +0200, Greg KH wrote:
>> On Thu, Oct 22, 2020 at 11:36:40AM +0200, David Hildenbrand wrote:
>>> On 22.10.20 11:32, David Laight wrote:
From: David Hildenbrand
> Sent: 22 October 2020 10:25
...
> ... especially
On Thu, Oct 08, 2020 at 07:55:02PM +0200, Vlastimil Babka wrote:
> Right, here's updated patch:
>
> 8<
> From 6ab0f03762d122a896349d5e568f75c20875eb42 Mon Sep 17 00:00:00 2001
> From: Vlastimil Babka
> Date: Mon, 7 Sep 2020 14:20:08 +0200
> Subject: [PATCH v2 5/7] mm, page_alloc: cache pa
On Thu, Oct 22, 2020 at 12:25:07AM -0700, Prashant Malani wrote:
> Hi Greg,
>
> On Thu, Oct 22, 2020 at 12:17 AM Greg KH wrote:
> >
> > > > > +What:
> > > > > /sys/class/typec/-partner/identity/product_type_vdo
> > > > > +Date:October 2020
> > > > > +Contact: P
This patch adds the new binding documentation of scp adsp controller
for Mediatek MT8192.
Signed-off-by: Weiyi Lu
---
.../bindings/arm/mediatek/mediatek,scp-adsp.yaml | 38 ++
1 file changed, 38 insertions(+)
create mode 100644
Documentation/devicetree/bindings/arm/mediat
Add MT8192 clock dt-bindings, include topckgen, apmixedsys,
infracfg, pericfg and subsystem clocks.
Signed-off-by: Weiyi Lu
---
include/dt-bindings/clock/mt8192-clk.h | 592 +
1 file changed, 592 insertions(+)
create mode 100644 include/dt-bindings/clock/mt8192-c
Add MT8192 vencsys clock provider
Signed-off-by: Weiyi Lu
---
drivers/clk/mediatek/Kconfig | 6
drivers/clk/mediatek/Makefile | 1 +
drivers/clk/mediatek/clk-mt8192-venc.c | 60 ++
3 files changed, 67 insertions(+)
create mode 100644 dri
Hi Linus,
Please pull below to receive modules updates for the v5.10 merge window.
Details can be found in the signed tag.
Thank you,
Jessica
--
The following changes since commit f75aef392f869018f78cfedf3c320a6b3fcfda6b:
Linux 5.9-rc3 (2020-08-30 16:01:54 -0700)
are available in the Git r
In all MediaTek PLL design, bit0 of CON0 register is always
the enable bit.
However, there's a special case of usbpll on MT8192.
The enable bit of usbpll is moved to bit2 of other register.
Add configurable en_reg and pll_en_bit for enable control or
default 0 where pll data are static variables.
H
Add MT8192 imp i2c wrapper ws clock provider
Signed-off-by: Weiyi Lu
---
drivers/clk/mediatek/Kconfig | 6 +++
drivers/clk/mediatek/Makefile | 1 +
drivers/clk/mediatek/clk-mt8192-imp_iic_wrap_ws.c | 61 +++
3 files changed, 68 inser
Add MT8192 scp adsp clock provider
Signed-off-by: Weiyi Lu
---
drivers/clk/mediatek/Kconfig | 6
drivers/clk/mediatek/Makefile | 1 +
drivers/clk/mediatek/clk-mt8192-scp_adsp.c | 57 ++
3 files changed, 64 insertions(+)
create mode 1
This patch adds the new binding documentation of vdecsys soc controller
for Mediatek MT8192.
Signed-off-by: Weiyi Lu
---
.../arm/mediatek/mediatek,vdecsys-soc.yaml | 38 ++
1 file changed, 38 insertions(+)
create mode 100644
Documentation/devicetree/bindings/arm/med
Add MT8192 msdc top clock provider
Signed-off-by: Weiyi Lu
---
drivers/clk/mediatek/Kconfig | 6 +++
drivers/clk/mediatek/Makefile | 1 +
drivers/clk/mediatek/clk-mt8192-msdc_top.c | 71 ++
3 files changed, 78 insertions(+)
create mode 10
Add MT8192 mfgcfg clock provider
Signed-off-by: Weiyi Lu
---
drivers/clk/mediatek/Kconfig | 6
drivers/clk/mediatek/Makefile | 1 +
drivers/clk/mediatek/clk-mt8192-mfg.c | 57 +++
3 files changed, 64 insertions(+)
create mode 100644 driver
Hi Kai-Chuan,
On Thu, 22 Oct 2020 14:40:47 +0800, kaichuan.hs...@canonical.com wrote:
> From: Kai-Chuan Hsieh
>
> Some Dell platforms rely on modalias to customize configuration,
> the product sku can be more specific for the hardware.
>
> Add product_sku to modalias for better utilization.
Do
Add MT8192 imgsys clock provider
Signed-off-by: Weiyi Lu
---
drivers/clk/mediatek/Kconfig | 6
drivers/clk/mediatek/Makefile | 1 +
drivers/clk/mediatek/clk-mt8192-img.c | 60 +++
3 files changed, 67 insertions(+)
create mode 100644 driver
Add MT8192 imp i2c wrapper e clock provider
Signed-off-by: Weiyi Lu
---
drivers/clk/mediatek/Kconfig | 6 +++
drivers/clk/mediatek/Makefile| 1 +
drivers/clk/mediatek/clk-mt8192-imp_iic_wrap_e.c | 59
3 files changed, 66 insertio
Add MT8192 imp i2c wrapper s clock provider
Signed-off-by: Weiyi Lu
---
drivers/clk/mediatek/Kconfig | 6 +++
drivers/clk/mediatek/Makefile| 1 +
drivers/clk/mediatek/clk-mt8192-imp_iic_wrap_s.c | 61
3 files changed, 68 insertio
Add MT8192 camsys rawb clock provider
Signed-off-by: Weiyi Lu
---
drivers/clk/mediatek/Kconfig | 6 +++
drivers/clk/mediatek/Makefile | 1 +
drivers/clk/mediatek/clk-mt8192-cam_rawb.c | 59 ++
3 files changed, 66 insertions(+)
create mode
Add MT8192 imgsys2 clock provider
Signed-off-by: Weiyi Lu
---
drivers/clk/mediatek/Kconfig | 6
drivers/clk/mediatek/Makefile | 1 +
drivers/clk/mediatek/clk-mt8192-img2.c | 62 ++
3 files changed, 69 insertions(+)
create mode 100644 dri
On Thu, Oct 08, 2020 at 01:42:00PM +0200, Vlastimil Babka wrote:
> Currently, pcplists are drained during set_migratetype_isolate() which means
> once per pageblock processed start_isolate_page_range(). This is somewhat
> wasteful. Moreover, the callers might need different guarantees, and the
> dr
Add MT8192 vdecsys soc clock provider
Signed-off-by: Weiyi Lu
---
drivers/clk/mediatek/Kconfig | 6 +++
drivers/clk/mediatek/Makefile | 1 +
drivers/clk/mediatek/clk-mt8192-vdec_soc.c | 82 ++
3 files changed, 89 insertions(+)
create mode
Add power domains controller node for SoC mt8192
Signed-off-by: Weiyi Lu
---
arch/arm64/boot/dts/mediatek/mt8192.dtsi | 201 +++
1 file changed, 201 insertions(+)
diff --git a/arch/arm64/boot/dts/mediatek/mt8192.dtsi
b/arch/arm64/boot/dts/mediatek/mt8192.dtsi
index
For some power domain, like conn on MT8192, it should be default OFF.
Because the power on/off control relies the function of connectivity chip
and its firmware. And if project choose other chip vendor solution,
those necessary connectivity functions will not provided.
Signed-off-by: Weiyi Lu
---
Add power domains dt-bindings for MT8192.
Signed-off-by: Weiyi Lu
---
.../bindings/power/mediatek,power-controller.yaml | 1 +
include/dt-bindings/power/mt8192-power.h | 32 ++
2 files changed, 33 insertions(+)
create mode 100644 include/dt-bindings/power/mt8192-
This series is based on v5.9-rc1, MT8192 clock v4[1] and
soc: mediatek: pm-domains: Add new driver for SCPSYS power domains controller[2]
[1] https://patchwork.kernel.org/project/linux-mediatek/list/?series=368799
[2] https://patchwork.kernel.org/project/linux-mediatek/list/?series=358429
change
Add the needed board data to support mt8192 SoC.
Signed-off-by: Weiyi Lu
---
drivers/soc/mediatek/mtk-pm-domains.c | 290 +-
include/linux/soc/mediatek/infracfg.h | 56 +++
2 files changed, 345 insertions(+), 1 deletion(-)
diff --git a/drivers/soc/mediatek/m
On 2020-10-22 17:02, Peter Zijlstra wrote:
On Thu, Oct 22, 2020 at 04:27:52PM +0530, Sai Prakash Ranjan wrote:
Looking at the ETR and other places in the kernel, ETF and the
ETB are the only places trying to dereference the task(owner)
in tmc_enable_etf_sink_perf() which is also called from the
Hi Tian,
CC tglx
On Wed, Oct 21, 2020 at 2:15 PM Tian Tao wrote:
> The code has been in a irq-disabled context since it is hard IRQ. There
> is no necessity to do it again.
>
> Signed-off-by: Tian Tao
Thanks for your patch!
Is this also true if CONFIG_PREEMPT_RT=y, and all irq handlers execut
On Thu, Oct 08, 2020 at 01:42:01PM +0200, Vlastimil Babka wrote:
> Memory offline relies on page isolation can race with process freeing pages to
> pcplists in a way that a page from isolated pageblock can end up on pcplist.
> This can be worked around by repeated draining of pcplists, as done by c
On Tue, Oct 20, 2020 at 03:52:45PM -0300, Marcelo Tosatti wrote:
> On Thu, Oct 15, 2020 at 01:40:53AM +0200, Frederic Weisbecker wrote:
> > Alternatively, we could rely on p->on_rq which is set to TASK_ON_RQ_QUEUED
> > at wake up time, prior to the schedule() full barrier. Of course that
> > doesn
remove pll_en_bit(bit0) from en_mask to make en_mask a pure en_mask
that only used for pll dividers.
Signed-off-by: Weiyi Lu
---
drivers/clk/mediatek/clk-mt8173.c | 28 ++--
1 file changed, 14 insertions(+), 14 deletions(-)
diff --git a/drivers/clk/mediatek/clk-mt8173.c
remove pll_en_bit(bit0) from en_mask to make en_mask a pure en_mask
that only used for pll dividers.
Signed-off-by: Weiyi Lu
---
drivers/clk/mediatek/clk-mt2701.c | 26 +-
1 file changed, 13 insertions(+), 13 deletions(-)
diff --git a/drivers/clk/mediatek/clk-mt2701.c
b
remove pll_en_bit(bit0) from en_mask to make en_mask a pure en_mask
that only used for pll dividers.
Signed-off-by: Weiyi Lu
---
drivers/clk/mediatek/clk-mt7629.c | 12 ++--
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/drivers/clk/mediatek/clk-mt7629.c
b/drivers/clk/med
Because all pll data has been updated. We no longer allow
en_mask is a combination of pll_en_bit and div_en_mask.
Signed-off-by: Weiyi Lu
---
drivers/clk/mediatek/clk-pll.c | 12
1 file changed, 4 insertions(+), 8 deletions(-)
diff --git a/drivers/clk/mediatek/clk-pll.c b/drivers/c
remove pll_en_bit(bit0) from en_mask to make en_mask a pure en_mask
that only used for pll dividers.
Signed-off-by: Weiyi Lu
---
drivers/clk/mediatek/clk-mt8183.c | 22 +++---
1 file changed, 11 insertions(+), 11 deletions(-)
diff --git a/drivers/clk/mediatek/clk-mt8183.c
b/dri
This series is based on v5.9-rc1 and
[v4,09/34] clk: mediatek: Fix asymmetrical PLL enable and disable control[1]
in Mediatek MT8192 clock support series
[1]
https://patchwork.kernel.org/project/linux-mediatek/patch/1603370247-30437-10-git-send-email-weiyi...@mediatek.com/
Weiyi Lu (12):
clk:
remove pll_en_bit(bit0) from en_mask to make en_mask a pure en_mask
that only used for pll dividers.
Signed-off-by: Weiyi Lu
---
drivers/clk/mediatek/clk-mt8135.c | 20 ++--
1 file changed, 10 insertions(+), 10 deletions(-)
diff --git a/drivers/clk/mediatek/clk-mt8135.c
b/drive
remove pll_en_bit(bit0) from en_mask to make en_mask a pure en_mask
that only used for pll dividers.
Signed-off-by: Weiyi Lu
---
drivers/clk/mediatek/clk-mt7622.c | 18 +-
1 file changed, 9 insertions(+), 9 deletions(-)
diff --git a/drivers/clk/mediatek/clk-mt7622.c
b/drivers/c
remove pll_en_bit(bit0) from en_mask to make en_mask a pure en_mask
that only used for pll dividers.
Signed-off-by: Weiyi Lu
---
drivers/clk/mediatek/clk-mt8516.c | 12 ++--
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/drivers/clk/mediatek/clk-mt8516.c
b/drivers/clk/med
remove pll_en_bit(bit0) from en_mask to make en_mask a pure en_mask
that only used for pll dividers.
Signed-off-by: Weiyi Lu
---
drivers/clk/mediatek/clk-mt6797.c | 20 ++--
1 file changed, 10 insertions(+), 10 deletions(-)
diff --git a/drivers/clk/mediatek/clk-mt6797.c
b/drive
remove pll_en_bit(bit0) from en_mask to make en_mask a pure en_mask
that only used for pll dividers.
Signed-off-by: Weiyi Lu
---
drivers/clk/mediatek/clk-mt6765.c | 20 ++--
1 file changed, 10 insertions(+), 10 deletions(-)
diff --git a/drivers/clk/mediatek/clk-mt6765.c
b/drive
remove pll_en_bit(bit0) from en_mask to make en_mask a pure en_mask
that only used for pll dividers.
Signed-off-by: Weiyi Lu
---
drivers/clk/mediatek/clk-mt6779.c | 24
1 file changed, 12 insertions(+), 12 deletions(-)
diff --git a/drivers/clk/mediatek/clk-mt6779.c
b/d
remove pll_en_bit(bit0) from en_mask to make en_mask a pure en_mask
that only used for pll dividers.
Signed-off-by: Weiyi Lu
---
drivers/clk/mediatek/clk-mt2712.c | 30 +++---
1 file changed, 15 insertions(+), 15 deletions(-)
diff --git a/drivers/clk/mediatek/clk-mt2712.
On Thu, Oct 22, 2020 at 12:03:19PM +0200, Jaroslav Kysela wrote:
> Dne 22. 10. 20 v 11:50 Maxime Ripard napsal(a):
>
> > So, I'm not really sure what I'm supposed to do here. The drivers
> > involved don't appear to be doing anything extraordinary, but the issues
> > lockdep report are definitely
On Thu, Oct 22, 2020 at 02:42:24PM +0200, David Hildenbrand wrote:
> On 22.10.20 14:18, Greg KH wrote:
> > On Thu, Oct 22, 2020 at 12:48:05PM +0200, Greg KH wrote:
> >> On Thu, Oct 22, 2020 at 11:36:40AM +0200, David Hildenbrand wrote:
> >>> On 22.10.20 11:32, David Laight wrote:
> From: David
MHP_MEMMAP_ON_MEMORY tells the system that we want the memmap
pagetables to be built from the hot-added range.
Signed-off-by: Oscar Salvador
---
include/linux/memory_hotplug.h | 8
1 file changed, 8 insertions(+)
diff --git a/include/linux/memory_hotplug.h b/include/linux/memory_hotplu
Physical memory hotadd has to allocate a memmap (struct page array) for
the newly added memory section. Currently, alloc_pages_node() is used
for those allocations.
This has some disadvantages:
a) an existing memory is consumed for that purpose
(eg: ~2MB per 128MB memory section on x86_64)
b
This patch introduces a new Vmemmap page-type so we can better
picture and handle those kind of pages.
Signed-off-by: Oscar Salvador
---
include/linux/mm.h | 6 ++
include/linux/mm_types.h | 5 +
include/linux/page-flags.h | 6 ++
3 files changed, 17 insertions(+)
diff --g
This patchset would be the next version of [1], but a lot has changed
in the meantime, so I figured I would just make another RFC.
After some discussions with David off the list, we agreed that it would be
easier as a starter to only support memmap from hotadded memory if the hotadded
range
spans
On 22/10/20 03:34, Wanpeng Li wrote:
> From: Wanpeng Li
>
> Per KVM_GET_SUPPORTED_CPUID ioctl documentation:
>
> This ioctl returns x86 cpuid features which are supported by both the
> hardware and kvm in its default configuration.
>
> A well-behaved userspace should not set the bit if it is n
Hi Geert,
Thank you for the review.
On Thu, Oct 22, 2020 at 12:43 PM Geert Uytterhoeven
wrote:
>
> Hi Prabhakar,
>
> On Wed, Oct 14, 2020 at 4:56 PM Lad Prabhakar
> wrote:
> > Enable VIN instances along with OV5640 as endpoints on the adapter board.
> >
> > Signed-off-by: Lad Prabhakar
> > Rev
> This does not go without saying that the patchset is not 100% complete.
> It is missing:
>
> - a way to disable memmap_on_memory (either sysfs or boot_time cmd)
> - atm, arch_add_memory for s390 screams if an altmap is passed.
>I am still thinking of a way to nicely drop handle that.
>
make use of devm_of_platform_populate to remove some redundant code!
Signed-off-by: Srinivas Kandagatla
---
sound/soc/qcom/qdsp6/q6adm.c | 10 +-
sound/soc/qcom/qdsp6/q6afe.c | 10 +-
sound/soc/qcom/qdsp6/q6asm.c | 9 +
3 files changed, 3 insertions(+), 26 deletions(-)
On Wed, Oct 21, 2020 at 3:53 PM Fabrizio Castro
wrote:
> Add the DRIF controller nodes for r8a77965 (a.k.a. R-Car M3-N).
>
> Signed-off-by: Fabrizio Castro
> Reviewed-by: Lad Prabhakar
Reviewed-by: Geert Uytterhoeven
i.e. will queue in renesas-devel for v5.11.
Gr{oetje,eeting}s,
Hi Jun,
Thanks for working on this.
On 9/30/20 11:16, Jun Nie wrote:
> Add RPM based interconnect driver implements the set and aggregate
> functionalities that translates bandwidth requests into RPM messages.
> These modules provide a common set of functionalities for all
> Qualcomm RPM based in
On Thu, Oct 22, 2020 at 1:43 PM Jason Gunthorpe wrote:
>
> On Thu, Oct 22, 2020 at 09:00:44AM +0200, Daniel Vetter wrote:
> > On Thu, Oct 22, 2020 at 1:20 AM Jason Gunthorpe wrote:
> > >
> > > On Wed, Oct 21, 2020 at 09:24:08PM +0200, Daniel Vetter wrote:
> > > > On Wed, Oct 21, 2020 at 6:37 PM J
On 22.10.20 14:58, Oscar Salvador wrote:
> MHP_MEMMAP_ON_MEMORY tells the system that we want the memmap
> pagetables to be built from the hot-added range.
>
> Signed-off-by: Oscar Salvador
> ---
> include/linux/memory_hotplug.h | 8
> 1 file changed, 8 insertions(+)
>
> diff --git a/i
Add missing supported rates and formats for the stream, without
which attempt to do playback will fail to find any matching rates/format.
Fixes: a0aab9e1404a ("ASoC: codecs: add wsa881x amplifier support")
Signed-off-by: Srinivas Kandagatla
---
sound/soc/codecs/wsa881x.c | 2 ++
1 file changed,
Hi Prabhakar,
On Thu, Oct 22, 2020 at 3:02 PM Lad, Prabhakar
wrote:
> On Thu, Oct 22, 2020 at 12:43 PM Geert Uytterhoeven
> wrote:
> > On Wed, Oct 14, 2020 at 4:56 PM Lad Prabhakar
> > wrote:
> > > Enable VIN instances along with OV5640 as endpoints on the adapter board.
> > >
> > > Signed-off-
From: Izabela Bakollari
Rearrange comment that exceeds 100 columns length. Issue reported
by checkpatch.pl
Signed-off-by: Izabela Bakollari
---
drivers/staging/wlan-ng/cfg80211.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/staging/wlan-ng/cfg80211.c
b/drivers
On 22.10.20 12:35, Jan Beulich wrote:
On 22.10.2020 11:49, Juergen Gross wrote:
@@ -2080,10 +2080,12 @@ void __init xen_init_IRQ(void)
int ret = -EINVAL;
evtchn_port_t evtchn;
- if (fifo_events)
+ if (xen_fifo_events)
ret = xen_evtchn_fifo_init();
-
On 2020-10-22, Petr Mladek wrote:
> diff --git a/Documentation/admin-guide/kernel-parameters.txt
> b/Documentation/admin-guide/kernel-parameters.txt
> index 02d4adbf98d2..52b9e7f5468d 100644
> --- a/Documentation/admin-guide/kernel-parameters.txt
> +++ b/Documentation/admin-guide/kernel-parameter
Hello Jean,
There are multiple product skus share the same product name, like
clamshell and 2-in-1 for Latitude series.
Both of them have 3-axis accelerator, but rotation is only disable for
clamshell model.
Originally, it should be descriminated by chassis_type, but found that
chassis_type is
In fuse_simple_request func, we will call fuse_request_alloc func to alloc
one request from fuse_req_cachep when args->force is true. However, the
return value of fuse_request_alloc func is not checked whether it is NULL.
If allocating request fails, access-NULL-pointer problem will occur.
Here,
It's been a long time, and there have been a number of tiny bugfixes in
the usbutils package backing up, as well as one major issue finally
fixed that had been reported a lot, so it's time for a new release.
One other "major" change is we now trust sysfs to have the string values
for the vendor/pr
On Fri, Oct 16, 2020 at 1:56 PM Lad Prabhakar
wrote:
> This chip is (nearly) identical to the Winbond w25m512jv which is
> already supported by Linux. Compared to the w25m512jv, the 'jw'
> has a different JEDEC ID.
>
> Signed-off-by: Lad Prabhakar
> Reviewed-by: Biju Das
Datasheets available at
From: John Stultz
Using old_creds as an indication that we are not overriding the
credentials, bypass call to inode_owner_or_capable. This solves
a problem with all execv calls being blocked when using the caller's
credentials.
Signed-off-by: John Stultz
Signed-off-by: Mark Salyzyn
Fixes: 05a
From: Yogesh Lal
Use STACK_HASH_ORDER_SHIFT to configure STACK_HASH_SIZE.
Aim is to have configurable value for STACK_HASH_SIZE,
so depend on use case one can configure it.
One example is of Page Owner, default value of
STACK_HASH_SIZE lead stack depot to consume 8MB of static memory.
Making i
On 22.10.2020 15:09, Jürgen Groß wrote:
> On 22.10.20 12:35, Jan Beulich wrote:
>> On 22.10.2020 11:49, Juergen Gross wrote:
>>> @@ -2080,10 +2080,12 @@ void __init xen_init_IRQ(void)
>>> int ret = -EINVAL;
>>> evtchn_port_t evtchn;
>>>
>>> - if (fifo_events)
>>> + if (xen_fifo_event
On 10/21/20 10:19 PM, Eric Biggers wrote:
On Wed, Oct 21, 2020 at 08:18:59AM -0700, Mark Salyzyn wrote:
Mark Salyzyn (3):
Add flags option to get xattr method paired to __vfs_getxattr
overlayfs: handle XATTR_NOSECURITY flag for get xattr method
overlayfs: override_creds=off option bypas
Add set_alloc_info() helper and move kasan_set_track() into it. This will
simplify the code for one of the upcoming changes.
No functional changes.
Signed-off-by: Andrey Konovalov
Link:
https://linux-review.googlesource.com/id/I0316193cbb4ecc9b87b7c2eee0dd79f8ec908c1a
---
mm/kasan/common.c | 7
There's a config option CONFIG_KASAN_STACK that has to be enabled for
KASAN to use stack instrumentation and perform validity checks for
stack variables.
There's no need to unpoison stack when CONFIG_KASAN_STACK is not enabled.
Only call kasan_unpoison_task_stack[_below]() when CONFIG_KASAN_STACK
Move get_free_info() call into quarantine_put() to simplify the call site.
No functional changes.
Signed-off-by: Andrey Konovalov
Link:
https://linux-review.googlesource.com/id/Iab0f04e7ebf8d83247024b7190c67c3c34c7940f
---
mm/kasan/common.c | 2 +-
mm/kasan/kasan.h | 5 ++---
mm/kasan
Rename get_alloc_info() and get_free_info() to kasan_get_alloc_meta()
and kasan_get_free_meta() to better reflect what those do and avoid
confusion with kasan_set_free_info().
No functional changes.
Signed-off-by: Andrey Konovalov
Link:
https://linux-review.googlesource.com/id/Ib6e4ba61c8b12112
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