On Sep 14 2020, Aurelien Jarno wrote:
> How should we proceed to get that fixed in time for 5.9? For the older
> branches where it has been backported (so far 5.7 and 5.8), should we
> just get that commit reverted instead?
Why is this still broken?
Andreas.
--
Andreas Schwab, sch...@linux-m68
On Fri, Oct 02, 2020 at 05:50:40PM +, Tomasz Figa wrote:
> Hi Christoph,
>
> On Wed, Sep 30, 2020 at 06:09:17PM +0200, Christoph Hellwig wrote:
> > Add a new API that returns a virtually non-contigous array of pages
> > and dma address. This API is only implemented for dma-iommu and will
> >
On Fri, Oct 02, 2020 at 09:16:11AM -0400, Liang, Kan wrote:
> Tested-by: Kan Liang
---
Subject: perf/x86: Fix n_metric for cancelled txn
From: Peter Zijlstra
Date: Mon Oct 5 10:10:24 CEST 2020
When a group that has TopDown members is failed to be scheduled, any
later TopDown groups will not re
On Sat, 3 Oct 2020 at 01:41, Rob Herring wrote:
>
> Another round of wack-a-mole. The json-schema default is additional
> unknown properties are allowed, but for DT all properties should be
> defined.
>
> Cc: Thierry Reding
> Cc: Linus Walleij
> Cc: Stephen Boyd
> Cc: Shawn Guo
> Cc: Bjorn And
On Sun, Oct 04, 2020 at 03:23:18PM +0200, Bastien Nocera wrote:
> On Sun, 2020-10-04 at 15:18 +0200, Greg Kroah-Hartman wrote:
> > On Sun, Oct 04, 2020 at 02:17:06PM +0200, Bastien Nocera wrote:
> > > On Sun, 2020-10-04 at 12:51 +0200, Greg Kroah-Hartman wrote:
> > > > On Sat, Oct 03, 2020 at 08:33
On Fri, Oct 02, 2020 at 08:46:35AM -0400, Jonathan Marek wrote:
> > > +void msm_gem_sync_cache(struct drm_gem_object *obj, uint32_t flags,
> > > + size_t range_start, size_t range_end)
> > > +{
> > > + struct msm_gem_object *msm_obj = to_msm_bo(obj);
> > > +
> > > + /* TODO: sync only the r
On Sun, Oct 04, 2020 at 10:24:20PM -0700, dmitry.torok...@gmail.com wrote:
> The order in which 'users' counter is decremented vs calling drivers'
> close() method is implementation specific, and we should not rely on
> it. Let's introduce driver private flag and use it to signal ISR
> to exit when
On 05.10.20 10:14, Stefano Garzarella wrote:
> On Sun, Oct 04, 2020 at 08:52:37PM +0200, Jan Kiszka wrote:
>> On 01.10.20 16:31, Stefano Garzarella wrote:
>>> Hi,
>>> I had some issues with gdb scripts and kernel modules in Linux 5.9-rc7.
>>>
>>> If the modules are already loaded, and I do 'lx-symb
On Sun, Oct 04, 2020 at 06:59:24PM +0200, Marcel Holtmann wrote:
> Hi Greg,
>
> > This reverts commit 0eee35bdfa3b472cc986ecc6ad76293fdcda59e2 as it
> > breaks all bluetooth connections on my machine.
> >
> > Cc: Marcel Holtmann
> > Cc: Sathish Narsimman
> > Fixes: 0eee3
A similar thing has been proposed recently by Shakeel
http://lkml.kernel.org/r/20200909215752.1725525-1-shake...@google.com
Please have a look at the follow up discussion.
--
Michal Hocko
SUSE Labs
From: Paul E. McKenney
> Sent: 05 October 2020 00:32
...
> manual/kernel: Add a litmus test with a hidden dependency
>
> This commit adds a litmus test that has a data dependency that can be
> hidden by control flow. In this test, both the taken and the not-taken
> branches of an
Hi Sudeep,
I am facing an error during sending yesterday.
I response again to your feedback as below
>-Original Message-
>From: Sudeep Holla
>Sent: Friday, October 2, 2020 10:51 PM
>To: Michal Simek
>Cc: Zulkifli, Muhammad Husaini ;
>Hunter, Adrian ; ulf.hans...@linaro.org; linux-
>m...
On Sun 2020-10-04 10:12:13, Hillf Danton wrote:
>
> On Fri, 02 Oct 2020 10:32:32 Thomas Gleixner wrote:
> > On Fri, Oct 02 2020 at 10:34, Hillf Danton wrote:
> > > On Thu, 01 Oct 2020 15:59:38 +0200 Thomas Gleixner wrote:
> > >> On Thu, Oct 01 2020 at 17:51, Hillf Danton wrote:
> > >> Aside of tha
On Fri, Oct 02, 2020 at 01:20:35PM -0700, Sagi Grimberg wrote:
>> Well, why would they change it? The whole point of the infrastructure
>> is that there is a single sane affinity setting for a given setup. Now
>> that setting needed some refinement from the original series (e.g. the
>> current ser
Hello,
syzbot found the following issue on:
HEAD commit:456afe01 mptcp: ADD_ADDRs with echo bit are smaller
git tree: net-next
console output: https://syzkaller.appspot.com/x/log.txt?x=16047c5790
kernel config: https://syzkaller.appspot.com/x/.config?x=1e6c5266df853ae
dashboard lin
Hello,
syzbot found the following issue on:
HEAD commit:549738f1 Linux 5.9-rc8
git tree: upstream
console output: https://syzkaller.appspot.com/x/log.txt?x=138b899390
kernel config: https://syzkaller.appspot.com/x/.config?x=c06bcf3cc963d91c
dashboard link: https://syzkaller.appspot
On Fri, Oct 02, 2020 at 05:59:24PM -0500, Rob Herring wrote:
> Some DSI controllers are missing a reference to the recently added
> dsi-controller.yaml schema. Add it and we can drop the duplicate parts.
>
> Cc: Maxime Ripard
Acked-by: Maxime Ripard
Thanks!
Maxime
signature.asc
Description:
> Subject: [PATCH v2 3/7] fpga: sec-mgr: expose sec-mgr update status
>
> Extend the Intel Security Manager class driver to
> include an update/status sysfs node that can be polled
> and read to monitor the progress of an ongoing secure
> update. Sysfs_notify() is used to signal transitions
> betw
05.10.2020 00:57, Nicolin Chen пишет:
> On Sat, Oct 03, 2020 at 05:06:42PM +0300, Dmitry Osipenko wrote:
>> 03.10.2020 09:59, Nicolin Chen пишет:
>>> static int tegra_smmu_of_xlate(struct device *dev,
>>>struct of_phandle_args *args)
>>> {
>>> + struct platform_devic
Vitaly Kuznetsov writes:
> KVM was switched to interrupt-based mechanism for 'page ready' event
> delivery in Linux-5.8 (see commit 2635b5c4a0e4 ("KVM: x86: interrupt based
> APF 'page ready' event delivery")) and #PF (ab)use for 'page ready' event
> delivery was removed. Linux guest switched to
On 5/10/20 11:02 am, Avri Altman wrote:
> HI,
>
>> Drivers that wish to support DeepSleep need to set a new capability flag
>> UFSHCD_CAP_DEEPSLEEP and provide a hardware reset via the existing
>> ->device_reset() callback.
> I would expect that this capability controls sending SSU 4, but it only
Pawel,
On 05/10/2020 08:54, Pawel Laszczak wrote:
Roger,
Pawel,
On 02/10/2020 12:08, Pawel Laszczak wrote:
Roger,
On 30/09/2020 09:57, Pawel Laszczak wrote:
To avoid duplicate error information patch replaces platform_get_irq_byname
into platform_get_irq_byname_optional.
What is duplic
On Mon, Oct 05, 2020 at 10:35:16AM +0200, Michal Hocko wrote:
> A similar thing has been proposed recently by Shakeel
> http://lkml.kernel.org/r/20200909215752.1725525-1-shake...@google.com
> Please have a look at the follow up discussion.
Thanks for pointing this out, I wasn't aware of that patch
On Mon, Oct 05, 2020 at 08:37:13AM +, Zulkifli, Muhammad Husaini wrote:
> Hi Sudeep,
>
> I am facing an error during sending yesterday.
> I response again to your feedback as below
>
> >-Original Message-
> >From: Sudeep Holla
> >Sent: Friday, October 2, 2020 10:51 PM
> >To: Michal S
On Sat, Oct 03, 2020 at 04:39:25PM +0200, Greg KH wrote:
> > @@ -0,0 +1,173 @@
> > +// SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause)
>
> You use gpl-only header files in this file, so how in the world can it
> be bsd-3 licensed?
>
> Please get your legal department to agree with this, after
Hello,
syzbot found the following issue on:
HEAD commit:f5083d0c drivers/net/wan/hdlc_fr: Improvements to the code..
git tree: net-next
console output: https://syzkaller.appspot.com/x/log.txt?x=11546beb90
kernel config: https://syzkaller.appspot.com/x/.config?x=1e6c5266df853ae
dash
Hello,
syzbot found the following issue on:
HEAD commit:678cdd49 Merge branch 'genetlink-support-per-command-polic..
git tree: net-next
console output: https://syzkaller.appspot.com/x/log.txt?x=158bb76050
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dash
Hi Alexandre,
On Sun, Oct 04, 2020 at 09:22:34PM +0900, Alexandre Courbot wrote:
> The addition of MT8183 support added a dependency on the SCP remoteproc
> module. However the initial patch used the "select" Kconfig directive,
> which may result in the SCP module to not be compiled if remoteproc
From: Alexander Sverdlin
spi_nor_parse_sfdp() modifies the passed structure so that it points to
itself (params.erase_map.regions to params.erase_map.uniform_region). This
makes it impossible to copy the local struct anywhere else.
Therefore only use memcpy() in backup-restore scenario. The bug
The LPC controller has no concept of the BMC and the Host partitions.
The incorrect partitioning can impose unnecessary range restrictions
on register access through the syscon regmap interface.
For instance, HICRB contains the I/O port address configuration
of KCS channel 1/2. However, the KCS#1/
Roger,
>Pawel,
>
>On 05/10/2020 08:54, Pawel Laszczak wrote:
>> Roger,
>>>
>>> Pawel,
>>>
>>> On 02/10/2020 12:08, Pawel Laszczak wrote:
Roger,
>
> On 30/09/2020 09:57, Pawel Laszczak wrote:
>> To avoid duplicate error information patch replaces
>> platform_get_irq_bynam
The LPC controller has no concept of the BMC and the Host partitions.
This patch fixes the documentation by removing the description on LPC
partitions. The register offsets illustrated in the DTS node examples
are also fixed to adapt to the LPC DTS change.
Signed-off-by: Chia-Wei, Wang
---
.../d
The LPC register offsets are fixed to adapt to the LPC DTS change,
where the LPC partitioning is removed.
Signed-off-by: Chia-Wei, Wang
---
drivers/pinctrl/aspeed/pinctrl-aspeed-g5.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/pinctrl/aspeed/pinctrl-aspeed-g5.c
b
Hi Andy
On 3/10/2020 2:11 am, Andy Shevchenko wrote:
> On Fri, Oct 02, 2020 at 03:04:27PM +0800, Rahul Tanwar wrote:
>> PVT controller (MR75203) is used to configure & control
>> Moortec embedded analog IP which contains temprature
>> sensor(TS), voltage monitor(VM) & process detector(PD)
>> mod
The LPC register offsets are fixed to adapt to the LPC DTS change,
where the LPC partitioning is removed.
Signed-off-by: Chia-Wei, Wang
---
drivers/char/ipmi/kcs_bmc_aspeed.c | 13 +
1 file changed, 5 insertions(+), 8 deletions(-)
diff --git a/drivers/char/ipmi/kcs_bmc_aspeed.c
b/d
The LPC controller has no concept of the BMC and the Host partitions.
A concrete instance is that the HICRB[5:4] are for the I/O port address
configurtaion of KCS channel 1/2. However, the KCS driver cannot access
HICRB for channel 1/2 initialization via syscon regmap interface due to
the parition
The LPC register offsets are fixed to adapt to the LPC DTS change,
where the LPC partitioning is removed.
Signed-off-by: Chia-Wei, Wang
---
drivers/soc/aspeed/aspeed-lpc-ctrl.c | 6 +++---
drivers/soc/aspeed/aspeed-lpc-snoop.c | 11 +--
2 files changed, 8 insertions(+), 9 deletions(-)
Hi Sakari,
On 01.10.20 18:11, Sakari Ailus wrote:
On Thu, Oct 01, 2020 at 07:10:31PM +0300, Sakari Ailus wrote:
@@ -1079,6 +1094,9 @@ mt9p031_get_pdata(struct i2c_client *client)
of_property_read_u32(np, "input-clock-frequency", &pdata->ext_freq);
of_property_read_u32(np, "pixel
On Mon, Oct 5, 2020 at 2:13 PM Joe Perches wrote:
>
> On Mon, 2020-10-05 at 13:50 +0530, Dwaipayan Ray wrote:
> > On Mon, Oct 5, 2020 at 1:35 PM Joe Perches wrote:
> > > On Mon, 2020-10-05 at 13:10 +0530, Dwaipayan Ray wrote:
> > > > On Mon, Oct 5, 2020 at 12:48 PM Joe Perches wrote:
> > > > > O
On Wed, 30 Sep 2020 13:23:29 -0700 Florian Fainelli wrote:
>
> On 9/30/2020 1:11 PM, Andrew Lunn wrote:
> > On Wed, Sep 30, 2020 at 01:07:19PM -0700, Florian Fainelli wrote:
> >>
> >>
> >> On 9/30/2020 12:09 PM, Andrew Lunn wrote:
> >>> On Wed, Sep 30, 2020 at 05:47:43PM +0800, Jisheng Zhang
> Subject: [PATCH v2 4/7] fpga: sec-mgr: expose sec-mgr update errors
>
> Extend Intel Security Manager class driver to include
> an update/error sysfs node that can be read for error
> information when a secure update fails.
>
> Signed-off-by: Russ Weight
> ---
> v2:
> - Bumped documentation
On Mon, Oct 05 2020 at 10:22, Ulf Hansson wrote:
> On Fri, 2 Oct 2020 at 18:49, Jerome Brunet wrote:
>>
>> IRQF_ONESHOT was added to this driver to make sure the irq was not enabled
>> again until the thread part of the irq had finished doing its job.
>>
>> Doing so upsets RT because, under RT, th
Hello,
syzbot found the following issue on:
HEAD commit:472e5b05 pipe: remove pipe_wait() and fix wakeup race with..
git tree: upstream
console output: https://syzkaller.appspot.com/x/log.txt?x=15ae0d4790
kernel config: https://syzkaller.appspot.com/x/.config?x=89ab6a0c48f30b49
das
On Sat, Sep 26, 2020 at 02:37:29AM +0800, Hui Su wrote:
> kmemleak-test.c is just a kmemleak test module, which
> also can not be used as a built-in kernel module.
> Thus, i think it may should not be in mm dir, and move
> the kmemleak-test.c to samples/kmemleak/kmemleak-test.c.
> Fix the spelling
On Mon, Oct 5, 2020 at 12:14 AM Elia Devito wrote:
>
> HP Spectre notebooks (and probably other model as well)
> support up to 4 thermal policy:
> - HP Recommended
> - Performance
> - Cool
> - Quiet
>
> at least on HP Spectre x360 Convertible 15-df0xxx the firmware sets the
> thermal policy to
This reverts commit 03edda0e1edaa3c2e99239c66e3c14d749318fd6.
This leads to warn dump like [1] on some platforms and reorders MTD
devices thus may break user space expectations. So revert the change.
[1]:
[1.849801] [ cut here ]
[1.854271] mscc_felix :00:00.5:
On 5.10.2020 11.22, Michal Hocko wrote:
On Mon 05-10-20 11:11:35, Topi Miettinen wrote:
[...]
I think hardened, security oriented systems should disable brk() completely
because it will increase the randomization of the process address space
(ASLR). This wouldn't be a good option to enable for s
On Mon, Oct 5, 2020 at 11:53 AM Tanwar, Rahul
wrote:
> On 3/10/2020 2:11 am, Andy Shevchenko wrote:
> > On Fri, Oct 02, 2020 at 03:04:27PM +0800, Rahul Tanwar wrote:
...
> >> +pvt_temp.config = temp_config;
> >> +
> >> +pvt_info[index++] = &pvt_temp;
> >> +}
> >> +
>
This CAN Controller is found on MEN Chameleon FPGAs.
The driver/device supports the CAN2.0 specification.
There are 255 RX and 255 Tx buffer within the IP. The
pointer for the buffer are handled by HW to make the
access from within the driver as simple as possible.
The d
Hi Michael,
On 10/3/20 10:24 PM, Michael Walle wrote:
> Hi Douglas,
>
> Am 2020-10-03 18:27, schrieb Doug Anderson:
>> Hi,
>>
>> On Sat, Oct 3, 2020 at 8:22 AM Michael Walle wrote:
>>>
>>> Hi Douglas,
>>>
>>> > On my system the spi_nor_probe() took ~6 ms at bootup. That's not a
>>> > lot, but e
Hi,
On 26/09/20 00:20, Peng Liu wrote:
> I created another root domain(contains 2 CPUs) besides the default
> one, and the global default rt bandwidth is 95%. Then launched a
> DL process which need 25% bandwidth and moved it to the new root
> domain, so far so good.
>
> Then I tried to change gl
On 05.10.20 10:20, Mel Gorman wrote:
> On Mon, Oct 05, 2020 at 08:56:48AM +0200, Michal Hocko wrote:
>> On Fri 02-10-20 17:20:09, David Hildenbrand wrote:
>>> On 02.10.20 15:24, Michal Hocko wrote:
On Mon 28-09-20 20:21:08, David Hildenbrand wrote:
> Page isolation doesn't actually touch t
Hello,
This series adds PCIe support for Qualcomm SM8250 SoC with relevant PHYs.
There are 3 PCIe instances on this SoC each with different PHYs. The PCIe
controller and PHYs are mostly comaptible with the ones found on SDM845
SoC, hence the old drivers are modified to add the support.
This serie
On Mon, Oct 05, 2020 at 09:20:03AM +0100, Will Deacon wrote:
> On Sun, Oct 04, 2020 at 10:38:46PM -0400, Alan Stern wrote:
> > On Sun, Oct 04, 2020 at 04:31:46PM -0700, Paul E. McKenney wrote:
> > > Nice simple example! How about like this?
> > >
> > >
Add the below three PCIe PHYs found in SM8250 to the QMP binding:
QMP GEN3x1 PHY - 1 lane
QMP GEN3x2 PHY - 2 lanes
QMP Modem PHY - 2 lanes
Signed-off-by: Manivannan Sadhasivam
---
Documentation/devicetree/bindings/phy/qcom,qmp-phy.yaml | 6 ++
1 file changed, 6 insertions(+)
diff --git a/D
On 01/10/2020 22:49, Evan Green wrote:
Oh no, I realized this isn't nearly as beautiful when I try to move it
into the core. The low level read/write interface between the nvmem
core and the driver is a range. So to move this into the core I'd have
to implement all the overlap computation logi
On 05/10/2020 05:34, Viresh Kumar wrote:
> On 17-09-20, 09:36, Jon Hunter wrote:
>> Viresh, ideally we need to include this fix for v5.9. Do you need Sumit
>> to resend with the Fixes tag or are you happy to add?
>
> I understand that this fixes a patch which got merged recently, but I am not
>
On 05.10.20 08:12, Michal Hocko wrote:
> On Sat 03-10-20 00:44:09, Topi Miettinen wrote:
>> On 2.10.2020 20.52, David Hildenbrand wrote:
>>> On 02.10.20 19:19, Topi Miettinen wrote:
The brk() system call allows to change data segment size (heap). This
is mainly used by glibc for memory al
SM8250 has multiple different PHY versions:
QMP GEN3x1 PHY - 1 lane
QMP GEN3x2 PHY - 2 lanes
QMP Modem PHY - 2 lanes
Add support for these with relevant init sequence. In order to abstract
the init sequence, this commit introduces secondary tables which can
be used to factor out the unique sequenc
For SM8250, we need to write the BDF to SID mapping in PCIe controller
register space for proper working. This is accomplished by extracting
the BDF and SID values from "iommu-map" property in DT and writing those
in the register address calculated from the hash value of BDF. In case
of collisions,
Document the PCIe DT bindings for SM8250 SoC. The PCIe IP is similar to
the one used on SDM845, hence just add the compatible along with the
optional "atu" register region.
Signed-off-by: Manivannan Sadhasivam
---
Documentation/devicetree/bindings/pci/qcom,pcie.txt | 6 --
1 file changed, 4
The PCIe IP (rev 1.9.0) on SM8250 SoC is similar to the one used on
SDM845. Hence the support is added reusing the members of ops_2_7_0.
The key difference between ops_2_7_0 and ops_1_9_0 is the config_sid
callback, which will be added in successive commit.
Signed-off-by: Manivannan Sadhasivam
--
On 03/10/2020 00:14, Evan Green wrote:
You don't want either/or. You want both. At the time Srinivas didn't
see the point of having the SoC-specific compatible string here, but
now that we have a reason for it maybe he'll be convinced? IMO you
essentially want:
items:
- enum:
We have removed the dw_pcie_ops always exists assumption in dwc
core driver, we can remove the useless dw_pcie_ops now.
Signed-off-by: Jisheng Zhang
---
drivers/pci/controller/dwc/pcie-al.c | 4
1 file changed, 4 deletions(-)
diff --git a/drivers/pci/controller/dwc/pcie-al.c
b/drivers/pci
On Thu, Oct 01, 2020 at 10:04:30PM +0300, Dmitry Osipenko wrote:
> ...
> >> There are dozens variants of the panels and system could easily have
> >> more than one panel, hence a direct lookup by phandle is a natural
> >> choice for the panels.
> >
> > Not really, there's typically only just one p
We have removed the dw_pcie_ops always exists assumption in dwc
core driver, we can remove the useless dw_pcie_ops now.
Signed-off-by: Jisheng Zhang
---
drivers/pci/controller/dwc/pci-imx6.c | 5 -
1 file changed, 5 deletions(-)
diff --git a/drivers/pci/controller/dwc/pci-imx6.c
b/drivers/
Some designware based device driver especially host only driver may
work well with the default read_dbi/write_dbi/link_up implementation
in pcie-designware.c, thus remove the assumption to simplify those
drivers.
Jisheng Zhang (3):
PCI: dwc: Don't assume the ops in dw_pcie always exists
PCI: d
Some designware based device driver especially host only driver may
work well with the default read_dbi/write_dbi/link_up implementation
in pcie-designware.c, thus remove the assumption to simplify those
drivers.
Signed-off-by: Jisheng Zhang
---
drivers/pci/controller/dwc/pcie-designware-ep.c |
Hi,
On 10/4/20 7:17 AM, Anant Thazhemadam wrote:
When h5_close() is called and !hu->serdev, h5 is directly freed.
However, h5->rx_skb is not freed before h5 is freed, which causes
a memory leak.
Freeing h5->rx_skb (when !hu->serdev) fixes this memory leak before
freeing h5.
Fixes: ce945552fde4
Convert m88e1318_get_wol() to use the well implemented phy_read_paged()
instead of open coding it.
Signed-off-by: Jisheng Zhang
---
drivers/net/phy/marvell.c | 14 --
1 file changed, 4 insertions(+), 10 deletions(-)
diff --git a/drivers/net/phy/marvell.c b/drivers/net/phy/marvell.c
On Mon 05-10-20 11:13:48, David Hildenbrand wrote:
> On 05.10.20 08:12, Michal Hocko wrote:
> > On Sat 03-10-20 00:44:09, Topi Miettinen wrote:
> >> On 2.10.2020 20.52, David Hildenbrand wrote:
> >>> On 02.10.20 19:19, Topi Miettinen wrote:
> The brk() system call allows to change data segment
Hi all,
In commit
4bb1eb3cd4bd ("arm64: dts: actions: limit address range for pinctrl node")
Fixes tag
Fixes: 7cdf8446ed1d ("arm64: dts: actions: Add pinctrl node for Actions
has these problem(s):
- Subject has leading but no trailing parentheses
- Subject has leading but no trailing
Hi Clément,
On Sat, Oct 03, 2020 at 11:20:01AM +0200, Clément Péron wrote:
> Sunxi MMC driver can't distinguish at runtime what's the I/O voltage
> for HS200 mode.
Unfortunately, that's not true (or at least, that's not related to your patch).
> Add a property in the device-tree to notify MMC co
We are generating incorrect path in case of rename retry because
we are restarting from wrong dentry. We should restart from the
dentry which was received in the call to nfs_path.
CC: sta...@vger.kernel.org
Signed-off-by: Ashish Sangwan
---
fs/nfs/namespace.c | 12
1 file changed, 8
On Monday, 5 October 2020, 10:07:25 CEST, Krzysztof Kozlowski wrote:
> The I2C on Vybrid VF500 still works fine. I did not test this actual
> condition (arbitration) but only a regular I2C driver (BQ27xxx fuel
> gauge). Obviously this only proves that regular operation is not
> broken...
thank you
Hi all,
Commits
b3cf5ff01d47 ("arm64: dts: meson-axg-s400: enable USB OTG")
628c9c809f84 ("arm64: dts: meson-axg: add USB nodes")
are missing a Signed-off-by from their committers.
--
Cheers,
Stephen Rothwell
pgpZBkRdcbXGz.pgp
Description: OpenPGP digital signature
PVT controller (MR75203) is used to configure & control
Moortec embedded analog IP which contains temprature
sensor(TS), voltage monitor(VM) & process detector(PD)
modules. Add hardware monitoring driver to support
MR75203 PVT controller.
Signed-off-by: Rahul Tanwar
Reviewed-by: Guenter Roeck
Re
Patch 1 adds DT bindings schema in YAML format.
Patch 2 adds driver for MR75203 PVT controller.
v5:
- Add bits.h header.
- Use memset32() instead of using loop.
- Address other code quality related review concerns.
- Add Reviewed-by tags.
v4:
- Fix a spelling mistake in comments.
- Add return val
PVT controller (MR75203) is used to configure & control
Moortec embedded analog IP which contains temprature sensor(TS),
voltage monitor(VM) & process detector(PD) modules.
Add DT bindings schema for PVT controller.
Signed-off-by: Rahul Tanwar
---
.../devicetree/bindings/hwmon/moortec,mr75203.y
Hi Laurent,
On 02.10.20 02:05, Laurent Pinchart wrote:
Hi Stefan,
Thank you for the patch.
On Wed, Sep 30, 2020 at 12:51:33PM +0200, Stefan Riedmueller wrote:
From: Dirk Bender
To prevent corrupted frames after starting and stopping the sensor it's
s/it's/its/
thanks, I'll fix that.
On Fri, Oct 2, 2020 at 9:07 AM Jann Horn wrote:
>
> On Tue, Sep 29, 2020 at 3:38 PM Marco Elver wrote:
> > Inserts KFENCE hooks into the SLUB allocator.
> [...]
> > diff --git a/mm/slub.c b/mm/slub.c
> [...]
> > @@ -3290,8 +3314,14 @@ int kmem_cache_alloc_bulk(struct kmem_cache *s,
> > gfp_t fla
On Mon, Oct 05, 2020 at 10:33:30AM +0200, Jan Kiszka wrote:
> On 05.10.20 10:14, Stefano Garzarella wrote:
> > On Sun, Oct 04, 2020 at 08:52:37PM +0200, Jan Kiszka wrote:
> >> On 01.10.20 16:31, Stefano Garzarella wrote:
> >>> Hi,
> >>> I had some issues with gdb scripts and kernel modules in Linux
Below is the list of build error/warning regressions/improvements in
v5.9-rc8[1] compared to v5.8[2].
Summarized:
- build errors: +6/-8
- build warnings: +59/-30
JFYI, when comparing v5.9-rc8[1] to v5.9-rc7[3], the summaries are:
- build errors: +3/-6
- build warnings: +0/-9
Happy fixing
On Thu, Oct 01, 2020 at 01:24:49PM +0200, Greg Kroah-Hartman wrote:
> On Thu, Oct 01, 2020 at 11:05:31AM +0200, Lars Poeschel wrote:
> > On Wed, Sep 30, 2020 at 11:41:46AM +0200, Uwe Kleine-König wrote:
> > > Hello,
> > >
> > > I added Greg Kroah-Hartman who I discussed this with via irc a bit to
Hi Laurent,
On 02.10.20 01:53, Laurent Pinchart wrote:
Hi Stefan,
On Thu, Oct 01, 2020 at 11:07:00AM +0200, Stefan Riedmüller wrote:
On 30.09.20 13:42, Laurent Pinchart wrote:
On Wed, Sep 30, 2020 at 12:51:29PM +0200, Stefan Riedmueller wrote:
From: Christian Hemp
Aside from 12 bit monochr
On Mon, Oct 05, 2020 at 11:14:27AM +0300, Dmitry Osipenko wrote:
> 05.10.2020 10:13, Thierry Reding пишет:
> ...
> > Have you also seen that sun50i-iommu does look up the SMMU from a
> > phandle using of_find_device_by_node()? So I think you've shown yourself
> > that even "modern" drivers avoid gl
Hello,
This series adds PCIe support for Qualcomm SM8250 SoC with relevant PHYs.
There are 3 PCIe instances on this SoC each with different PHYs. The PCIe
controller and PHYs are mostly comaptible with the ones found on SDM845
SoC, hence the old drivers are modified to add the support.
This serie
Add the below three PCIe PHYs found in SM8250 to the QMP binding:
QMP GEN3x1 PHY - 1 lane
QMP GEN3x2 PHY - 2 lanes
QMP Modem PHY - 2 lanes
Signed-off-by: Manivannan Sadhasivam
---
Documentation/devicetree/bindings/phy/qcom,qmp-phy.yaml | 6 ++
1 file changed, 6 insertions(+)
diff --git a/D
Document the PCIe DT bindings for SM8250 SoC. The PCIe IP is similar to
the one used on SDM845, hence just add the compatible along with the
optional "atu" register region.
Signed-off-by: Manivannan Sadhasivam
---
Documentation/devicetree/bindings/pci/qcom,pcie.txt | 6 --
1 file changed, 4
SM8250 has multiple different PHY versions:
QMP GEN3x1 PHY - 1 lane
QMP GEN3x2 PHY - 2 lanes
QMP Modem PHY - 2 lanes
Add support for these with relevant init sequence. In order to abstract
the init sequence, this commit introduces secondary tables which can
be used to factor out the unique sequenc
For SM8250, we need to write the BDF to SID mapping in PCIe controller
register space for proper working. This is accomplished by extracting
the BDF and SID values from "iommu-map" property in DT and writing those
in the register address calculated from the hash value of BDF. In case
of collisions,
The PCIe IP (rev 1.9.0) on SM8250 SoC is similar to the one used on
SDM845. Hence the support is added reusing the members of ops_2_7_0.
The key difference between ops_2_7_0 and ops_1_9_0 is the config_sid
callback, which will be added in successive commit.
Signed-off-by: Manivannan Sadhasivam
--
Hi Laurent,
On 02.10.20 02:06, Laurent Pinchart wrote:
Hi Stefan,
On Thu, Oct 01, 2020 at 10:56:24AM +0200, Stefan Riedmüller wrote:
On 30.09.20 13:38, Laurent Pinchart wrote:
On Wed, Sep 30, 2020 at 12:51:31PM +0200, Stefan Riedmueller wrote:
From: Enrico Scholz
Implement g_register and s
On Mon, Sep 28, 2020 at 03:12:53PM -0700, Fenghua Yu wrote:
> MBM total and local readings are corrected by the following correction
> factor table on Broadwell server and Skylake server.
>
> core rmidrmidcorrection
> count count threshold
On Mon, Oct 5, 2020 at 11:33 AM Geert Uytterhoeven wrote:
> JFYI, when comparing v5.9-rc8[1] to v5.9-rc7[3], the summaries are:
> - build errors: +3/-6
+ /kisskb/src/drivers/gpio/gpiolib-cdev.c: error: implicit
declaration of function 'in_ia32_syscall'
[-Werror=implicit-function-declaration]:
On Sat, Oct 03, 2020 at 08:38:14PM +0530, Syed Nayyar Waris wrote:
> On Sat, Oct 3, 2020 at 6:32 PM Andy Shevchenko
> wrote:
> > On Sat, Oct 3, 2020 at 3:56 PM William Breathitt Gray
> > wrote:
> > > On Sat, Oct 03, 2020 at 03:45:04PM +0300, Andy Shevchenko wrote:
> > > > On Sat, Oct 3, 2020 at 2
On Fri, 2 Oct 2020 18:41:43 -0500
Rob Herring wrote:
> Another round of wack-a-mole. The json-schema default is additional
> unknown properties are allowed, but for DT all properties should be
> defined.
>
> Cc: Thierry Reding
> Cc: Linus Walleij
> Cc: Stephen Boyd
> Cc: Shawn Guo
> Cc: Bjor
05.10.2020 12:16, Thierry Reding пишет:
...
>> I think you meant regmap in regards to protecting IO accesses, but this
>> is not what regmap is about if IO accesses are atomic by nature.
>
> Then why is there regmap-mmio?
To protect programming sequences for example, actually that's the only
real
the files under /80211 calls kernel-doc script 207 times, one for each
single function and doc chapter. Due to that, it takes a lot of time
handling it:
$ touch Documentation/driver-api/80211/*rst && time make
SPHINXDIRS=driver-api/80211 htmldocs
...
real0m22,928s
user
Moved the parameters of the function '__gc0310_write_reg_is_consecutive'
to the right under open parenthesis to fix warning message from
checkpatch.pl: 'CHECK: Alignment should match open parenthesis'.
Signed-off-by: Leonid Kushnir
---
drivers/staging/media/atomisp/i2c/atomisp-gc0310.c | 4 ++--
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