The framework allows callable implementation of IO page table.
This allows AMD IOMMU driver to switch between different types
of AMD IOMMU page tables (e.g. v1 vs. v2).
This series refactors the current implementation of AMD IOMMU v1 page table
to adopt the framework. There should be no functional
This implements iova_to_phys for AMD IOMMU v1 pagetable,
which will be used by the IO page table framework.
Signed-off-by: Suravee Suthikulpanit
---
drivers/iommu/amd/io_pgtable.c | 21 +
drivers/iommu/amd/iommu.c | 16 +---
2 files changed, 22 insertions(+),
Switch to using IO page table framework for AMD IOMMU v1 page table.
Signed-off-by: Suravee Suthikulpanit
---
drivers/iommu/amd/iommu.c | 24
1 file changed, 24 insertions(+)
diff --git a/drivers/iommu/amd/iommu.c b/drivers/iommu/amd/iommu.c
index 77f44b927ae7..c28949be
Move the function to header file to allow inclusion in other files.
Signed-off-by: Suravee Suthikulpanit
---
drivers/iommu/amd/amd_iommu.h | 13 +
drivers/iommu/amd/iommu.c | 10 --
2 files changed, 13 insertions(+), 10 deletions(-)
diff --git a/drivers/iommu/amd/amd_iom
In ARM64 hardware platforms, for example our Kunpeng platforms, CPU L1/L2
cache corrected errors are reported in the ARM processor error section.
The situations the CPU CE errors are reported too often is not unlikely
and may need to isolate that CPU core to prevent leading to more
serious faults.
Replace the macro PFN with ELEM_NO for common use.
Signed-off-by: Shiju Jose
---
drivers/ras/cec.c | 17 +++--
1 file changed, 11 insertions(+), 6 deletions(-)
diff --git a/drivers/ras/cec.c b/drivers/ras/cec.c
index 569d9ad2c594..22d11c66c266 100644
--- a/drivers/ras/cec.c
+++ b/dr
Replace the variable pfns_poisoned with elems_poisoned
for the common use.
Signed-off-by: Shiju Jose
---
drivers/ras/cec.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/ras/cec.c b/drivers/ras/cec.c
index 22d11c66c266..f20da1103f27 100644
--- a/drivers/ras/c
Hi Andy,
On Fri, Oct 02, 2020 at 01:35:12PM +0300, Andy Shevchenko wrote:
> On Fri, Oct 02, 2020 at 01:10:23AM +0300, Laurent Pinchart wrote:
> > Hi Mika,
> >
> > Reviving an old thread.
>
> Very old :-)
>
> > On Mon, May 02, 2016 at 01:35:01PM +0300, Mika Westerberg wrote:
> > > On Sun, May 01
CEC may need to support other architectures such as ARM64.
Move X86 MCE specific code under CONFIG_X86_MCE to support
building for other architectures.
Signed-off-by: Shiju Jose
---
drivers/ras/cec.c | 10 ++
1 file changed, 10 insertions(+)
diff --git a/drivers/ras/cec.c b/drivers/ras/
On Mon, Jul 06, 2020 at 12:57:22PM +0200, Tammo Block wrote:
> Hi everybody,
>
> this patchset adds xterm like mouse reporting features to the console.
>
> The linux virtual console has support for mouse reporting since 1994 or so,
> but the kernel only supports the original X10/X11 style standar
Modify the function cec_mod_work() for the common use
with the other error sources.
Signed-off-by: Shiju Jose
---
drivers/ras/cec.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/ras/cec.c b/drivers/ras/cec.c
index 803e641d8e5c..f869e7a270b8 100644
--- a/driv
Some types of elements, for example CPU core, should be isolated
when the corrected errors reported too often. This is used for the
early fault prediction and would help to prevent serious faults
by taking corrective actions.
Modify CEC to support for the errors count check on short
time period. Im
From: Lars Poeschel
This adds a class to exported pwm devices.
Exporting a pwm through sysfs did not yield udev events. The
dev_uevent_filter function does filter-out devices without a bus or
class.
This was already addressed in commit
commit 7e5d1fd75c3d ("pwm: Set class for exported channels in
When the CPU correctable errors, for example L1/L2 cache errors,
reported on an ARM64 CPU core too often, it should be isolated.
Add the CPU correctable error collector to store the CPU correctable
error count.
When the correctable error count for a CPU exceed the threshold
value in a short time p
On Tue, Aug 18, 2020 at 01:28:23PM +0200, Andrzej Pietrasiewicz wrote:
> This is a follow-up of this thread:
>
> https://www.spinics.net/lists/linux-input/msg68446.html
lore.kernel.org is easier to pull stuff from :)
Anyway, what ever happened to this series? Is there a newer one
somewhere?
th
On Fri, Oct 02, 2020 at 02:22:41PM +0200, Łukasz Stelmach wrote:
> Make sure the cur_speed value used in s3c64xx_enable_datapath()
> to configure DMA channel and in s3c64xx_wait_for_*() to calculate the
> transfer timeout is set to the actual value of (half) the clock speed.
>
> Don't change non-C
Add reporting ARM64 CPU correctable errors to the RAS correctable
errors collector(CEC).
ARM processor error types are cache/TLB/bus errors.
Any of the above error types should not be consider for the
error collection and CPU core isolation?
Signed-off-by: Shiju Jose
---
drivers/acpi/apei/ghes.
W dniu 02.10.2020 o 14:31, Greg Kroah-Hartman pisze:
On Tue, Aug 18, 2020 at 01:28:23PM +0200, Andrzej Pietrasiewicz wrote:
This is a follow-up of this thread:
https://www.spinics.net/lists/linux-input/msg68446.html
lore.kernel.org is easier to pull stuff from :)
Anyway, what ever happened t
From: Lars Poeschel
This is an update to the documentation to reflect the change to pwm
sysfs.
/sys/class/pwm/pwmchipN/pwmX style exports are marked as deprecated.
They are still available as symlinks to the new interface.
New exports are available as /sys/class/pwm/pwm-N-X
Cc: Greg Kroah-Hartm
On Wed, Sep 30, 2020 at 09:02:28PM +0200, Peter Zijlstra wrote:
> On Wed, Sep 30, 2020 at 08:18:18PM +0800, Boqun Feng wrote:
>
> > For one thing, I do think that LOCK_READ_USED trace is helpful for
> > better reporting, because if there is a read lock in the dependency path
> > which causes the d
On Thu, Oct 1, 2020 at 6:55 PM Mauro Carvalho Chehab
wrote:
> Em Thu, 1 Oct 2020 18:50:12 +0300
> Andy Shevchenko escreveu:
>
> > On Thu, Oct 1, 2020 at 2:17 PM Mauro Carvalho Chehab
> > wrote:
> > >
> > > A temporary var needed for building with ISP2400 was removed
> > > by accident on a cleanu
W dniu 02.10.2020 o 14:33, Andrzej Pietrasiewicz pisze:
W dniu 02.10.2020 o 14:31, Greg Kroah-Hartman pisze:
On Tue, Aug 18, 2020 at 01:28:23PM +0200, Andrzej Pietrasiewicz wrote:
This is a follow-up of this thread:
https://www.spinics.net/lists/linux-input/msg68446.html
lore.kernel.org is e
Almost two weeks passed and these are the "relevant" replies:
Jason personally does not like FIPS, and is afraid of
"subpar crypto". Albeit this patch set strictly isn't about
crypto at all; the crypto subsystem is in the unlucky position
to just depend on a good entropy source.
Greg claims that
-randconfig-r031-20201002 (attached as .config)
compiler: clang version 12.0.0 (https://github.com/llvm/llvm-project
bcd05599d0e53977a963799d6ee4f6e0bc21331b)
reproduce (this is a W=1 build):
wget
https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O
~/bin/make.cross
On Fri, Oct 2, 2020 at 1:26 PM Flavio Suligoi wrote:
> Hi Andy,
>
> with my custom SSDT table:
>
> DefinitionBlock ("gpio_button.aml", "SSDT", 5, "ASEMsp", "GPIO_BTN", 1)
> {
> External (_SB_.GPO1, DeviceObj)
> Scope (\_SB.GPO1)
> {
> Device (BTNS)
>
DeepSleep is a UFS v3.1 feature that achieves the lowest power consumption
of the device, apart from power off.
In DeepSleep mode, no commands are accepted, and the only way to exit is
using a hardware reset or power cycle.
This patch assumes that if a power cycle was an option, then power off
wo
The UFS specification says to set the IMMED (immediate) flag for the
Start/Stop Unit command when entering DeepSleep. However some UFS
devices object to that. Workaround that by retrying without IMMED.
Whichever possibility works, the result is recorded for the next
time.
Signed-off-by: Adrian Hun
Hi
Here is a patch to add DeepSleep, and a patch to workaround an issue hit
when testing.
Adrian Hunter (2):
scsi: ufs: Add DeepSleep feature
scsi: ufs: Workaround UFS devices that object to DeepSleep IMMED
drivers/scsi/ufs/ufs-sysfs.c | 7
drivers/scsi/ufs/ufs.h | 1 +
On Fri, Sep 25, 2020 at 11:26:49PM +0200, Krzysztof Kozlowski wrote:
> The i.MX 53 and i.MX6Q DTS use two compatibles, i.MX 6SL/6SLL/SX three
> so update the binding to fix dtbs_check warnings like:
>
> serial@21ec000: compatible: ['fsl,imx6q-uart', 'fsl,imx21-uart'] is not
> valid under any of
On Wed, Sep 30, 2020 at 05:54:15PM +0300, Andy Shevchenko wrote:
> On Wed, Sep 30, 2020 at 5:50 PM Thomas Petazzoni
> wrote:
> > On Wed, 30 Sep 2020 17:24:48 +0300
> > Andy Shevchenko wrote:
>
> > > > On a Microchip SAMA5D3 platform that is receiving 20 bytes every 16ms
> > > > over one MAX310X
Hi!
> From: Lars Poeschel
>
> This driver allows to use a lcd2s 20x4 character display from modtronix
> engineering as an auxdisplay charlcd device.
Is there userland interface documenteted somewhere? I tried to grep
through Documentation and did not find anything useful :-(.
pavel@duo:/data/
On Fri, Oct 02, 2020 at 02:30:47PM +0200, poesc...@lemonage.de wrote:
> + pwm_prop[0] = kasprintf(GFP_KERNEL, "EXPORT=%s",
> + export->child.kobj.name);
Nit, you should use dev_name() here instead of trying to get the raw
kobject name.
thanks,
greg k-h
On Fri, Oct 02, 2020 at 01:22:28PM +0100, Shiju Jose wrote:
> Open Questions based on the feedback from Boris,
> 1. ARM processor error types are cache/TLB/bus errors.
>[Reference N2.4.4.1 ARM Processor Error Information UEFI Spec v2.8]
> Any of the above error types should not be consider for
Hi Kevin,
On 17/09/2020 08:59, Neil Armstrong wrote:
> The Amlogic AXG is close to the GXL Glue but with a single OTG PHY.
>
> It needs the same init sequence as GXL & GXM, but it seems it doesn't need
> the host disconnect bit.
>
> The Glue driver reuses the already implemented GXL & GXM work.
On Fri, Oct 02, 2020 at 02:36:33PM +0200, Andrzej Pietrasiewicz wrote:
> W dniu 02.10.2020 o 14:33, Andrzej Pietrasiewicz pisze:
> > W dniu 02.10.2020 o 14:31, Greg Kroah-Hartman pisze:
> > > On Tue, Aug 18, 2020 at 01:28:23PM +0200, Andrzej Pietrasiewicz wrote:
> > > > This is a follow-up of this
On Fri, 2 Oct 2020 at 14:41, Greg Kroah-Hartman
wrote:
>
> On Fri, Sep 25, 2020 at 11:26:49PM +0200, Krzysztof Kozlowski wrote:
> > The i.MX 53 and i.MX6Q DTS use two compatibles, i.MX 6SL/6SLL/SX three
> > so update the binding to fix dtbs_check warnings like:
> >
> > serial@21ec000: compatible
On Fri, Oct 02, 2020 at 02:30:47PM +0200, poesc...@lemonage.de wrote:
> From: Lars Poeschel
>
> This adds a class to exported pwm devices.
> Exporting a pwm through sysfs did not yield udev events. The
> dev_uevent_filter function does filter-out devices without a bus or
> class.
> This was alrea
On 10/2/20 3:53 AM, Christoph Hellwig wrote:
@@ -8,6 +8,7 @@
#include
#include
#include
+#include
NAK, dma-noncoherent.h is not for driver use. And will in fact go
away in 5.10.
Not actually used, so can be removed.
#include
@@ -808,6 +809,20 @@ int msm_gem_cpu_fini(stru
On Fri, Oct 2, 2020 at 1:02 PM Flavio Suligoi wrote:
> > > > My SSDT table is:
> > >
> > > See the difference? I can't help here.
>
> This is the DSDT table related to the GPIO controller of my board:
>
> Device (GPO1)
> {
> Name (_ADR, Zero) // _ADR: Address
>
On 10:14-20201002, Faiz Abbas wrote:
> Hi Nishanth,
>
> On 02/10/20 12:43 am, Nishanth Menon wrote:
> > On 00:35-20201002, Faiz Abbas wrote:
> >> The following patches add support for UHS modes for TI's j721e and j7200
> >> boards.
> >>
>
On 23:27-20201001, Grygorii Strashko wrote:
> Enable networking options required for NFS boot on TI platforms, which is
> widely for automated test systems.
> - enable new TI CPSW switch driver and related NET_SWITCHDEV config
> - enable TI DP83867 phy
> - explicitly enable PTP clock support to ens
On Tue, Aug 18, 2020 at 01:28:25PM +0200, Andrzej Pietrasiewicz wrote:
> Userland might want to execute e.g. 'w' (show blocked tasks), followed
> by 's' (sync), followed by 1000 ms delay and then followed by 'c' (crash)
> upon a single magic SysRq. Or one might want to execute the famous "Raising
>
On Fri, Oct 02, 2020 at 02:45:29PM +0200, Daniel Vetter wrote:
> On Fri, Oct 02, 2020 at 02:36:33PM +0200, Andrzej Pietrasiewicz wrote:
> > W dniu 02.10.2020 o 14:33, Andrzej Pietrasiewicz pisze:
> > > W dniu 02.10.2020 o 14:31, Greg Kroah-Hartman pisze:
> > > > On Tue, Aug 18, 2020 at 01:28:23PM +
Coly,
> diff --git a/drivers/mmc/core/queue.c b/drivers/mmc/core/queue.c
> index 6c022ef0f84d..350d0cc4ee62 100644
> --- a/drivers/mmc/core/queue.c
> +++ b/drivers/mmc/core/queue.c
> @@ -190,7 +190,7 @@ static void mmc_queue_setup_discard(struct request_queue
> *q,
> q->limits.discard_gra
On Fri, Oct 02, 2020 at 01:24:44PM +0300, Andy Shevchenko wrote:
> On Fri, Oct 02, 2020 at 01:28:08AM +0300, Serge Semin wrote:
> > the subject. Though some of them are mere cleanups or weakly related with
> > the subject fixes, but we just couldn't leave the code as is at some
> > places since we
On 01/10/2020 19:35, Randy Dunlap wrote:
Fix a build error and Kconfig warning in sound/soc/qcom/.
ld: sound/soc/qcom/qdsp6/q6afe-clocks.o: in function `q6afe_clock_dev_probe':
q6afe-clocks.c:(.text+0x182): undefined reference to `devm_clk_hw_register'
ld: q6afe-clocks.c:(.text+0x19d): undefi
On Thu, Oct 01, 2020 at 10:20:28PM +0200, Paul Bolle wrote:
> The sha1sum of include/linux/atomic-arch-fallback.h isn't checked by
> check-atomics.sh. It's not clear why it's skipped so let's check it too.
>
> Signed-off-by: Paul Bolle
This was an oversight; Peter and I forgot to add this when P
Hello everyone! Requesting for your comments and suggestions.
We propose a new kernel module - blk-snap.
This module implements snapshot and changed block tracking functionality.
It is intended to create backup copies of any block devices without usage
of device-mapper.
Snapshots are temporary an
Hi kuldip,
Thank you for the patch! Yet something to improve:
[auto build test ERROR on pm/linux-next]
[also build test ERROR on v5.9-rc7 next-20201001]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
h
From: Corey Minyard
If you write to a pty master an immediately close the pty master, the
receiver might get a chunk of data dropped, but then receive some later
data. That's obviously something rather unexpected for a user. It
certainly confused my test program.
It turns out that tty_vhangup(
Currently perf inject just repipes the event without any flush. It
makes an issue that it changes the order of events processed.
Normally we want to process events in time order, but events are
recorded from several cpus and they weren't sorted with each other.
So we put them into the ordered eve
On Fri, 2 Oct 2020 at 12:31, Michael Kerrisk (man-pages)
wrote:
>
> On Fri, 2 Oct 2020 at 12:49, Jonathan Wakely wrote:
> >
> > On Fri, 2 Oct 2020 at 09:28, Alejandro Colomar via Gcc
> > wrote:
> > > However, it might be good that someone starts a page called
> > > 'type_qualifiers(7)' or somet
Hi Jiri,
On Fri, Oct 2, 2020 at 4:05 AM Jiri Olsa wrote:
>
> Adding test for build id cache that adds binary
> with sha1 and md5 build ids and verifies it's
> added properly.
>
> The test updates build id cache with perf record
> and perf buildid-cache -a.
>
> Signed-off-by: Jiri Olsa
> ---
> v2
On Thu, 1 Oct 2020 09:56:41 +0100
Colin King wrote:
> From: Colin Ian King
>
> More recent libc implementations are now using openat/openat2 system
> calls so also add do_sys_openat2 to the tracing so that the test
> passes on these systems because do_sys_open may not be called.
>
> Signed-of
On Fri, Oct 02, 2020 at 02:46:16PM +0200, Greg Kroah-Hartman wrote:
> On Fri, Oct 02, 2020 at 02:30:47PM +0200, poesc...@lemonage.de wrote:
> > From: Lars Poeschel
> >
> > This adds a class to exported pwm devices.
> > Exporting a pwm through sysfs did not yield udev events. The
> > dev_uevent_fi
On Fri, Oct 02, 2020 at 08:36:02PM +0800, Boqun Feng wrote:
> But what if f2() is called with interrupt disabled? Or f2() disables
> interrupt inside the function, like:
>
> void f2(...)
> {
> local_irq_disable();
> spin_lock(&B);
> g(...);
>
Hi!
>
> Just in case someone is interested: As a Proof-of-Concept I started 100
> thousand processes on a big machine (72 cores). It worked!
> However starting those too more than 30 minutes, and top needs more than 30
> minutes to refresh ist display. Still, interactive input via SSH works nice
On Fri, Oct 02, 2020 at 02:42:49PM +0200, Pavel Machek wrote:
> Hi!
>
> > From: Lars Poeschel
> >
> > This driver allows to use a lcd2s 20x4 character display from modtronix
> > engineering as an auxdisplay charlcd device.
>
> Is there userland interface documenteted somewhere? I tried to grep
On 10/2/2020 7:02 AM, Peter Zijlstra wrote:
On Wed, Sep 30, 2020 at 07:29:35AM -0700, kan.li...@linux.intel.com wrote:
From: Kan Liang
When a group that has TopDown members is failed to be scheduled, any
later TopDown groups will not return valid values.
Here is an example.
A background p
On Fri, 2 Oct 2020 at 13:17, Alejandro Colomar wrote:
>
> Signed-off-by: Alejandro Colomar
>
> system_data_types.7: void *: Add info about generic function parameters and
> return value
>
> Reported-by: Paul Eggert
> Reported-by: David Laight
> Signed-off-by: Alejandro Colomar
>
> system_data
On Fri, Oct 02, 2020 at 02:38:36PM +0200, Torsten Duwe wrote:
> Almost two weeks passed and these are the "relevant" replies:
>
> Jason personally does not like FIPS, and is afraid of
> "subpar crypto". Albeit this patch set strictly isn't about
> crypto at all; the crypto subsystem is in the unlu
On Mon 28-09-20 20:21:06, David Hildenbrand wrote:
> Let's prepare for additional flags and avoid long parameter lists of bools.
> Follow-up patches will also make use of the flags in __free_pages_ok(),
> however, I wasn't able to come up with a better name for the type - should
> be good enough fo
On Mon 28-09-20 20:21:07, David Hildenbrand wrote:
> __putback_isolated_page() already documents that pages will be placed to
> the tail of the freelist - this is, however, not the case for
> "order >= MAX_ORDER - 2" (see buddy_merge_likely()) - which should be
> the case for all existing users.
>
On 2020-10-02 15:06, Jonathan Wakely wrote:
> On Fri, 2 Oct 2020 at 12:31, Michael Kerrisk (man-pages)
> wrote:
>>
>> On Fri, 2 Oct 2020 at 12:49, Jonathan Wakely
wrote:
>>>
>>> On Fri, 2 Oct 2020 at 09:28, Alejandro Colomar via Gcc
wrote:
However, it might be good that someone star
On 02/10/2020 14:07, Masami Hiramatsu wrote:
> On Thu, 1 Oct 2020 09:56:41 +0100
> Colin King wrote:
>
>> From: Colin Ian King
>>
>> More recent libc implementations are now using openat/openat2 system
>> calls so also add do_sys_openat2 to the tracing so that the test
>> passes on these system
On Fri, Oct 2, 2020 at 3:48 PM Andy Shevchenko
wrote:
>
> On Fri, Oct 2, 2020 at 1:02 PM Flavio Suligoi wrote:
>
> > > > > My SSDT table is:
> > > >
> > > > See the difference? I can't help here.
> >
> > This is the DSDT table related to the GPIO controller of my board:
> >
> > Device (GPO1)
On Mon 28-09-20 20:21:08, David Hildenbrand wrote:
> Page isolation doesn't actually touch the pages, it simply isolates
> pageblocks and moves all free pages to the MIGRATE_ISOLATE freelist.
>
> We already place pages to the tail of the freelists when undoing
> isolation via __putback_isolated_pa
From: Colin Ian King
More recent libc implementations are now using openat/openat2 system
calls so also add do_sys_openat2 to the tracing so that the test
passes on these systems because do_sys_open may not be called.
Thanks to Masami Hiramatsu for the help on getting this fix to work
correctly.
> > +.I void *
> > +.RS
> > +According to the C language standard,
> > +a pointer to any object type may be converted to a pointer to
> > +.I void
> > +and back.
> > +POSIX further requires that any pointer,
> > +including pointers to functions,
> > +may be converted to a pointer to
> > +.I void
>
On Fri, Oct 02, 2020 at 12:03:50PM +0200, Michal Koutný wrote:
> On Thu, Oct 01, 2020 at 01:27:13PM -0400, Johannes Weiner
> wrote:
> > I do think there is a bug, though: mem_cgroup_move_account() should
> > use WRITE_ONCE() on page->mem_cgroup.
> If this were a bug, wouldn't be the proper approa
On Fri, 2 Oct 2020 at 14:20, Alejandro Colomar wrote:
>
>
>
> On 2020-10-02 15:06, Jonathan Wakely wrote:
> > On Fri, 2 Oct 2020 at 12:31, Michael Kerrisk (man-pages)
> > wrote:
> >>
> >> On Fri, 2 Oct 2020 at 12:49, Jonathan Wakely
> wrote:
> >>>
> >>> On Fri, 2 Oct 2020 at 09:28, Alejand
HI Andy,
> > So, what about adding the following
> >
> >
> > (Replace '...' with meaningful line names or drop for now, but in any
> > case you need to provide as much names as lines of such GPIO
> > controller)
>
> I have checked the code, so it allows you to define from 0 up to all
> lines, but
On Fri, 02 Oct 2020 14:44:54 +0200,
Qiu Wenbo wrote:
>
> After installing archlinux, the mute led and micmute led are not working
> at all. This patch fix this issue by applying a fixup from similar
> model. These mute leds are confirmed working on HP Elitebook 845 G7.
>
> Signed-off-by: Qiu Wenb
On Tue, Sep 15, 2020 at 11:07:18AM +0800, ChiYuan Huang wrote:
> Hi, Guenter:
>
> ChiYuan Huang 於 2020年9月6日 週日 下午11:22寫道：
> >
> > Guenter Roeck 於 2020年9月5日 週六 下午11:51寫道：
> > >
> > > On 9/4/20 6:24 PM, ChiYuan Huang wrote:
> > > > Guenter Roeck 於 2020年9月5日 週六 上午3:41寫道：
> > > >>
> > > >> On 9/3/2
On Fri, Oct 02, 2020 at 03:15:55PM +0200, Willy Tarreau wrote:
> On Fri, Oct 02, 2020 at 02:38:36PM +0200, Torsten Duwe wrote:
> > Almost two weeks passed and these are the "relevant" replies:
> >
> > Jason personally does not like FIPS, and is afraid of
> > "subpar crypto". Albeit this patch set
On 2020/10/2 20:57, Martin K. Petersen wrote:
>
> Coly,
>
>> diff --git a/drivers/mmc/core/queue.c b/drivers/mmc/core/queue.c
>> index 6c022ef0f84d..350d0cc4ee62 100644
>> --- a/drivers/mmc/core/queue.c
>> +++ b/drivers/mmc/core/queue.c
>> @@ -190,7 +190,7 @@ static void mmc_queue_setup_discard(s
On Fri, Oct 02, 2020 at 03:08:44PM +0200, Lars Poeschel wrote:
> On Fri, Oct 02, 2020 at 02:46:16PM +0200, Greg Kroah-Hartman wrote:
> > On Fri, Oct 02, 2020 at 02:30:47PM +0200, poesc...@lemonage.de wrote:
> > > From: Lars Poeschel
> > >
> > > This adds a class to exported pwm devices.
> > > Exp
On Fri, Oct 02, 2020 at 03:09:29PM +0200, Peter Zijlstra wrote:
> On Fri, Oct 02, 2020 at 08:36:02PM +0800, Boqun Feng wrote:
>
> > But what if f2() is called with interrupt disabled? Or f2() disables
> > interrupt inside the function, like:
> >
> > void f2(...)
> > {
> > loca
The ADDI9036 is a complete, 45 MHz, front-end solution for charge
coupled device (CCD) time of flight (TOF) imaging applications.
It has 2-lane MIPI CSI-2 RAW12 data output and i2c control interface.
The programming of calibration and firmware is performed by driver
using Linux Firmware API.
Sig
On Wed, Sep 02, 2020 at 04:43:42PM +0200, Pali Rohár wrote:
> This patch series fixes regression introduced in commit 366697018c9a
> ("PCI: aardvark: Add PHY support") which caused aardvark driver
> initialization failure on EspressoBin board with factory version of
> Arm Trusted Firmware provided
Add YAML device tree bindings for Analog Devices Inc. ADDI9036 CCD TOF
front-end.
Signed-off-by: Bogdan Togorean
---
v2: added reg property description
---
.../bindings/media/i2c/adi,addi9036.yaml | 76 +++
1 file changed, 76 insertions(+)
create mode 100644
Documentation/
On Wed, Sep 30, 2020 at 05:33:30PM +0200, Miklos Szeredi wrote:
> On Thu, Sep 24, 2020 at 3:13 PM Alessio Balsini wrote:
>
> > The first benchmarks were done by running FIO (fio-3.21) with:
> > - bs=4Ki;
> > - file size: 50Gi;
> > - ioengine: sync;
> > - fsync_on_close: true.
> > The target file
On Wed, Sep 23, 2020 at 07:02:54PM +0800, Jiaxun Yang wrote:
>
> +#ifdef CONFIG_CPU_LOONGSON64
> +static int c0_compare_int_enable(struct clock_event_device *cd)
> +{
> + if (cpu_has_extimer)
> + set_c0_config6(LOONGSON_CONF6_INTIMER);
why are you not simply do this in loognson64
On Mon, Sep 28, 2020 at 07:39:51PM -0700, Badhri Jagan Sridharan wrote:
> set_vbus callback allows TCPC which are TCPCI based, however,
> does not support turning on sink and source mode through
> Command.SinkVbus and Command.SourceVbusDefaultVoltage.
>
> Signed-off-by: Badhri Jagan Sridharan
> R
On Fri, Oct 02, 2020 at 03:39:52PM +0200, Greg Kroah-Hartman wrote:
> On Mon, Sep 28, 2020 at 07:39:51PM -0700, Badhri Jagan Sridharan wrote:
> > set_vbus callback allows TCPC which are TCPCI based, however,
> > does not support turning on sink and source mode through
> > Command.SinkVbus and Comma
On Mon, Sep 28, 2020 at 08:21:06PM +0200, David Hildenbrand wrote:
> Let's prepare for additional flags and avoid long parameter lists of bools.
> Follow-up patches will also make use of the flags in __free_pages_ok(),
> however, I wasn't able to come up with a better name for the type - should
> b
On Mon 28-09-20 20:21:09, David Hildenbrand wrote:
> __free_pages_core() is used when exposing fresh memory to the buddy
> during system boot and when onlining memory in generic_online_page().
>
> generic_online_page() is used in two cases:
>
> 1. Direct memory onlining in online_pages().
> 2. De
Add the description of the embedded L2 switch inside the SoC dtsi file
for NXP T1040.
Signed-off-by: Vladimir Oltean
Reviewed-by: Maxim Kochetkov
Reviewed-by: Andrew Lunn
---
Changes in v4:
Retargeting to net-next.
Changes in v3:
Added definition for frame extraction interrupt, even if the dri
Define the network interface names for the switch ports and hook them up
to the 2 QSGMII PHYs that are onboard.
A conscious decision was taken to go along with the numbers that are
written on the front panel of the board and not with the hardware
numbers of the switch chip ports.
Signed-off-by: V
n that I made a right mess of it. Not sure what's
> > > best here.
> > >
> > > Let me have a play.
> >
> > How's something like this? It's bigger than I'd like, but I feel the
> > result is more consistent/readable.
> >
>
> Qian, coul
Torsten,
Ok, if you must have more replies then I'll bite :-)
> -Original Message-
> From: Torsten Duwe
> Sent: Friday, October 2, 2020 2:39 PM
> To: Theodore Y. Ts'o
> Cc: linux-cry...@vger.kernel.org; Nicolai Stange ; LKML
> ; Arnd Bergmann
> ; Greg Kroah-Hartman ; Eric W.
> Biederm
Seville is a DSA switch that is embedded inside the T1040 SoC, and
supported by the mscc_seville DSA driver inside drivers/net/dsa/ocelot.
This series adds this switch to the SoC's dtsi files and to the T1040RDB
board file.
I would like to send this series through net-next. There is no conflict
w
On Mon 28-09-20 20:21:10, David Hildenbrand wrote:
> As we no longer shuffle via generic_online_page() and when undoing
> isolation, we can simplify the comment.
>
> We now effectively shuffle only once (properly) when onlining new
> memory.
>
> Cc: Andrew Morton
> Cc: Alexander Duyck
> Cc: Mel
Hi,
W dniu 02.10.2020 o 14:54, Greg Kroah-Hartman pisze:
On Tue, Aug 18, 2020 at 01:28:25PM +0200, Andrzej Pietrasiewicz wrote:
Userland might want to execute e.g. 'w' (show blocked tasks), followed
by 's' (sync), followed by 1000 ms delay and then followed by 'c' (crash)
upon a single magic Sy
On Wed, Sep 30, 2020 at 01:37:14PM -0300, Daniel Gutson wrote:
> This patch exports the BIOS Write Enable (bioswe), BIOS
> Lock Enable (biosle), and the SMM BIOS Write Protect (SMM_BIOSWP) fields of
> the BIOS Control register using the platform-integrity misc kernel module.
> The idea is to keep a
On 2 Oct 2020, at 2:54, Christoph Hellwig wrote:
On Wed, Sep 30, 2020 at 08:05:45PM +, Nick Terrell wrote:
On Sep 29, 2020, at 11:53 PM, Christoph Hellwig
wrote:
As you keep resend this I keep retelling you that should not do it.
Please provide a proper Linux API, and switch to that.
On 10/2/20 7:38 AM, Hillf Danton wrote:
>
> On Thu, 1 Oct 2020 11:27:04 -0600 Jens Axboe wrote:
>> On 10/1/20 10:27 AM, Oleg Nesterov wrote:
>>> Jens,
>>>
>>> I'll read this version tomorrow, but:
>>>
>>> On 10/01, Jens Axboe wrote:
static inline int signal_pending(struct task_struct *p
On Tue, Sep 29, 2020 at 02:21:37PM +0800, pierre kuo wrote:
> Hi Greg and Rafael:
> Would you please help to review these 2 patches?
>
> https://lkml.org/lkml/2020/9/20/112
> https://lkml.org/lkml/2020/9/20/113
Please resend, I can't take patches off of a random web site.
Now lore.kernel.org I c
Hi ARM SoC maintainers,
Please pull the following part2 of the TI K3 DTS support since [1].
This also contains the PR [2] which provides the base for the J7200
USB support in this PR. Primary highlights in the part #2:
- New K3 SoC: J7200 and related board J7200 Common processor board
- Bunch of
On Tue, Sep 22, 2020 at 09:58:36AM -0600, Rob Herring wrote:
> On Mon, 21 Sep 2020 16:46:44 +0200, poesc...@lemonage.de wrote:
> > From: Lars Poeschel
> >
> > Add a binding doc for the modtronix lcd2s auxdisplay driver. It also
> > adds modtronix to the list of known vendor-prefixes.
> >
> > Sig
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