On Wed 2020-09-30 13:48:56, John Ogness wrote:
> On 2020-09-30, Petr Mladek wrote:
> > Anyway, I see hardcoded limit more like a hack. It limits something
> > somewhere so that some other code somewhere else is safe to use.
> >
> > And printk.c is really bad from this point. It sometimes does not
This adds a driver to communicate with the APU available
in the mt8183. The driver is generic and could be used for other APU.
It mostly provides a userspace interface to send messages and
and share big buffers with the APU.
Signed-off-by: Alexandre Bailon
---
drivers/rpmsg/Kconfig |
In order to reduce the memory mapping operations we are going to
add an IOCTL to request a mapping.
To make easier to add this new operation, use 2 lists to store the
mappings, one for the request and one for the device.
Signed-off-by: Alexandre Bailon
---
drivers/rpmsg/apu_rpmsg.c | 104 +++
On 9/30/2020 2:45 PM, Jason Gunthorpe wrote:
On Wed, Sep 30, 2020 at 12:53:21PM +0300, Leon Romanovsky wrote:
On Tue, Sep 29, 2020 at 04:59:29PM -0300, Jason Gunthorpe wrote:
On Sun, Sep 27, 2020 at 09:46:47AM +0300, Leon Romanovsky wrote:
@@ -296,11 +223,17 @@ static struct ib_umem *__ib_um
On Mon 28-09-20 13:53:58, Zi Yan wrote:
> From: Zi Yan
>
> Hi all,
>
> This patchset adds support for 1GB PUD THP on x86_64. It is on top of
> v5.9-rc5-mmots-2020-09-18-21-23. It is also available at:
> https://github.com/x-y-z/linux-1gb-thp/tree/1gb_thp_v5.9-rc5-mmots-2020-09-18-21-23
>
> Othe
> Subject: Re: [PATCH v2 1/2] devfreq: qcom: Add L2 Krait Cache devfreq
> scaling driver
>
> On Tue, Sep 29, 2020 at 06:29:24PM +0200, Ansuel Smith wrote:
> > Qcom L2 Krait CPUs use the generic cpufreq-dt driver and doesn't
actually
> > scale the Cache frequency when the CPU frequency is changed.
Kees, and Rafael, I don't know if you saw this proposal from Joe for
sysfs files, questions below:
On Wed, Sep 16, 2020 at 01:40:38PM -0700, Joe Perches wrote:
> Output defects can exist in sysfs content using sprintf and snprintf.
>
> sprintf does not know the PAGE_SIZE maximum of the temporary
>
>On Mon, 2020-09-28 at 14:27 +0200, Pawel Laszczak wrote:
>> This patch introduces the main part of Cadence USBSSP DRD driver
>> to Linux kernel.
>> To reduce the patch size a little bit, the header file gadget.h was
>> intentionally added as separate patch.
>>
>> The Cadence USBSSP DRD Controlle
On Fri, Sep 25, 2020 at 05:48:55PM +0100, Srinivas Kandagatla wrote:
> Usage of regmap_field_alloc becomes much overhead when number of fields
> exceed more than 3.
> QCOM LPASS driver has extensively converted to use regmap_fields.
>
> Using new bulk api to allocate fields makes it much more clea
On Wed, Sep 30, 2020 at 02:53:58PM +0300, Maor Gottlieb wrote:
>
> On 9/30/2020 2:45 PM, Jason Gunthorpe wrote:
> > On Wed, Sep 30, 2020 at 12:53:21PM +0300, Leon Romanovsky wrote:
> > > On Tue, Sep 29, 2020 at 04:59:29PM -0300, Jason Gunthorpe wrote:
> > > > On Sun, Sep 27, 2020 at 09:46:47AM +03
On Mon 14-09-20 14:00:41, Matthew Wilcox (Oracle) wrote:
> Handle THP splitting in the parts of the truncation functions which
> already handle partial pages. Factor all that code out into a new
> function called truncate_inode_partial_page().
>
> We lose the easy 'bail out' path if a truncate or
On Wed, 30 Sep 2020 18:08:00 +0800, cy_huang wrote:
> 1. Add vendor suffix to all proprietary properties.
> 2. Fix typo.
> 3. Change lsw to normal property, not pattern property.
> 4. Due to item 1, modify source code for property parsing.
Applied to
https://git.kernel.org/pub/scm/linux/kernel
On Tue, 29 Sep 2020 19:29:33 +0800, Qinglang Miao wrote:
> Using devm_snd_soc_register_card() can make the code
> shorter and cleaner.
Applied to
https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git for-next
Thanks!
[1/1] ASoC: soc-core: use devm_snd_soc_register_card()
co
On Wed, 30 Sep 2020 18:18:52 +0800, cy_huang wrote:
> Add missing regcache cache only before masked as dirty.
Applied to
https://git.kernel.org/pub/scm/linux/kernel/git/broonie/regulator.git
for-next
Thanks!
[1/1] regulator: rtmv20: Add missing regcache cache only before marked as dirty
On 30/09/20 09:57AM, tudor.amba...@microchip.com wrote:
> On 9/16/20 3:44 PM, Pratyush Yadav wrote:
> > Hi,
>
> Hello,
>
> >
> > This series adds support for Octal DTR flashes in the SPI NOR framework,
> > and then adds hooks for the Cypress Semper and Micron Xcella flashes to
> > allow running
On Thu, Sep 24, 2020 at 11:21:07AM +0800, Jason Wang wrote:
> To ease the implementation of per group ASID support for vDPA
> device. This patch switches to use a vhost-vdpa specific IOTLB to
> avoid the unnecessary refactoring of the vhost core.
>
> Signed-off-by: Jason Wang
> ---
> drivers/vho
On Wed, Sep 30, 2020 at 01:51:32PM +0200, Pali Rohár wrote:
> On Wednesday 30 September 2020 13:20:06 Greg Kroah-Hartman wrote:
> > On Wed, Sep 30, 2020 at 01:00:13PM +0200, Pali Rohár wrote:
> > > On Wednesday 30 September 2020 12:54:34 Greg Kroah-Hartman wrote:
> > > > On Wed, Sep 30, 2020 at 11:
i386 randconfig-a004-20200929
i386 randconfig-a005-20200929
i386 randconfig-a001-20200929
i386 randconfig-a003-20200930
i386 randconfig-a002-20200930
i386 randconfig-a006-20200930
i386
From: Peter Zijlstra
Issuing a magic-sysrq via the PL011 causes the following lockdep splat,
which is easily reproducible under QEMU:
| sysrq: Changing Loglevel
| sysrq: Loglevel set to 9
|
| ==
| WARNING: possible circular locking de
Hi Andy,
> > > > > I was wondering if there is a generic GPIO driver that I can use
> Maybe I was not so clear, but as Bart mentioned the least you can do
> is simply define line name via "gpio-line-names" property. The problem
> here is when and how you would like to have them incorporated.
I al
On 30.09.20 11:16, Juergen Gross wrote:
> Since commit c330fb1ddc0a ("XEN uses irqdesc::irq_data_common::handler_data
> to store a per interrupt XEN data pointer which contains XEN specific
> information.")
> Xen is using the chip_data pointer for storing IRQ specific data. When
> running as a HV
Hi Axel,
On Tue, 2020-09-29 at 15:19 -0700, Axel Rasmussen wrote:
> On Tue, Sep 29, 2020 at 1:33 PM Tom Zanussi
> wrote:
> >
> > Hi,
> >
> > This patchset adds support for dynamic strings for synthetic
> > events,
> > as requested by Axel Rasmussen.
> >
> > Actually, the first two patches shou
/
> MUX binding cleanup
> https://lore.kernel.org/lkml/20200918165930.2031-1-rog...@ti.com/
>
> cheers,
> -roger
Your series does'nt apply on my tree anymore - even after merging
ti-k3-dt-fixes-for-v5.9 . Could you rebase your patches on top of
next-20200930 ?
--
Regard
On Wed, Sep 30, 2020 at 01:59:15PM +0200, Greg KH wrote:
> On Fri, Sep 25, 2020 at 05:48:55PM +0100, Srinivas Kandagatla wrote:
> > +int devm_regmap_field_bulk_alloc(struct device *dev, struct regmap *regmap,
> > +struct regmap_field **field,
> > +
There are a number of subdirectories and files in drivers/char/ that
have their own maintainers and developers and ways of getting patches to
Linus. This includes random.c, IPMI, hardware random drivers, TPM
drivers, and agp drivers. Instead of sending those patches to Arnd and
myself, who can't
Hi all,
Changes since 20200929:
The vfs tree still had its build failure.
The net-next tree still had its build failure and it also gained a
conflict against the net tree.
The bpf-next tree gained a conflict against the bpf tree.
The kvm-arm tree gained a conflict against the arm64 tree.
Non-
On Wed, Sep 30, 2020 at 01:08:49PM +0100, Mark Brown wrote:
> On Wed, Sep 30, 2020 at 01:59:15PM +0200, Greg KH wrote:
> > On Fri, Sep 25, 2020 at 05:48:55PM +0100, Srinivas Kandagatla wrote:
>
> > > +int devm_regmap_field_bulk_alloc(struct device *dev, struct regmap
> > > *regmap,
> > > +
On Mon 14-09-20 14:00:42, Matthew Wilcox (Oracle) wrote:
> All callers now expect head (and base) pages, and can handle multiple
> head pages in a single batch, so make find_get_entries() behave that way.
> Also take the opportunity to make it use the pagevec infrastructure
> instead of open-coding
On Wed, Sep 30, 2020 at 02:11:00PM +0200, Greg KH wrote:
> On Wed, Sep 30, 2020 at 01:08:49PM +0100, Mark Brown wrote:
> > We have managed versions of the other regmap allocation functions, it
> > makes sense for consistency to have managed versions of these too. I
> > think there's a meaningful
On Wed, Sep 30, 2020 at 11:49:37AM +0200, Peter Zijlstra wrote:
> On Wed, Sep 30, 2020 at 11:16:11AM +0200, Peter Zijlstra wrote:
> > On Wed, Sep 30, 2020 at 07:08:23AM +0800, Boqun Feng wrote:
> > > I think there are two problems here:
> > >
> > > 1) the "(null)" means we don't have the "usage_st
HI Sakari,
Thank you for the review.
On Wed, Sep 30, 2020 at 12:45 PM Sakari Ailus
wrote:
>
> Hi Prabhakar,
>
> On Thu, Sep 17, 2020 at 06:42:22PM +0100, Lad Prabhakar wrote:
> > Parse endpoint properties using v4l2_fwnode_endpoint_alloc_parse()
> > to determine the bus type and store it in the
Hi Tero/Nishanth,
This series adds USB2.0 support for the J7200 EVM.
Series is based on top of: linux-next next-20200930
cheers,
-roger
Changelog:
v5:
- Rebased on next-20200930. Added Reviewed-by and Acked-by.
v4:
- use single header file for MUX defines. drop WIZ from macro names.
v3
On Tue, Sep 29, 2020 at 06:19:59PM -0700, Jann Horn wrote:
> To be safe against concurrent changes to the VMA tree, we must take the
> mmap lock around GUP operations (excluding the GUP-fast family of
> operations, which will take the mmap lock by themselves if necessary).
>
> This code is only fo
The board uses lane 3 of SERDES for USB. Set the mux
accordingly.
The USB controller and EVM supports super-speed for USB0
on the Type-C port. However, the SERDES has a limitation
that upto 2 protocols can be used at a time. The SERDES is
wired for PCIe, QSGMII and USB super-speed. It has been
cho
The SERDES lane control mux registers are present in the
CTRLMMR space.
Signed-off-by: Roger Quadros
Reviewed-by: Vignesh Raghavendra
---
arch/arm64/boot/dts/ti/k3-j7200-main.dtsi | 15 +++
1 file changed, 15 insertions(+)
diff --git a/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi
b/a
The USB controller can be connected to one of the 2 lanes
of SERDES0 using a MUX. Add a MUX controller node for that.
Signed-off-by: Roger Quadros
Reviewed-by: Vignesh Raghavendra
---
arch/arm64/boot/dts/ti/k3-j7200-main.dtsi | 6 ++
1 file changed, 6 insertions(+)
diff --git a/arch/arm64/
There are 4 lanes in each J7200 SERDES. Each SERDES lane mux can
select upto 4 different IPs. Define all the possible functions.
Cc: Peter Rosin
Signed-off-by: Roger Quadros
Reviewed-by: Vignesh Raghavendra
Acked-by: Rob Herring
Acked-by: Peter Rosin
---
include/dt-bindings/mux/ti-serdes.h |
Hi David, Jakub,
On Thu, Sep 17, 2020 at 3:57 PM Geert Uytterhoeven
wrote:
> Some Renesas EtherAVB variants support internal clock delay
> configuration, which can add larger delays than the delays that are
> typically supported by the PHY (using an "rgmii-*id" PHY mode, and/or
> "[rt]xc-skew-ps"
j7200 has on USB controller instance. Add that.
Signed-off-by: Roger Quadros
Reviewed-by: Vignesh Raghavendra
---
arch/arm64/boot/dts/ti/k3-j7200-main.dtsi | 30 +++
1 file changed, 30 insertions(+)
diff --git a/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi
b/arch/arm64/boot/d
From: Kishon Vijay Abraham I
First two lanes of SERDES is connected to PCIe, third lane is
connected to QSGMII and the last lane is connected to USB. However,
Cadence torrent SERDES doesn't support more than 2 protocols
at the same time. Configure it only for PCIe and QSGMII.
Signed-off-by: Kish
Correct objtool orc generation endianness problems to enable fully
functional x86 cross compiles on big endian hardware.
Signed-off-by: Vasily Gorbik
---
arch/x86/include/asm/orc_types.h | 24
tools/arch/x86/include/asm/orc_types.h | 24
to
From: Martin Schwidefsky
Make the x86 instruction decoder of the objtool usable on big endian
machines. This is useful for compile tests on non x86, big endian
hardware.
Co-developed-by: Vasily Gorbik
[ gor: more endianness problems findings fixes / rebasing ]
Signed-off-by: Martin Schwidefsky
rfc v1 - rfc v2:
- rebased onto tip/objtool/core
- reformatted couple of lines
Currently objtool seems to be the only tool from build tools needed
which breaks x86 cross compilation on big endian systems.
But besides x86 cross compilation, endianness awareness is also needed
for big endian arch
On Wed, Sep 30, 2020 at 01:15:52PM +0100, Mark Brown wrote:
> On Wed, Sep 30, 2020 at 02:11:00PM +0200, Greg KH wrote:
> > On Wed, Sep 30, 2020 at 01:08:49PM +0100, Mark Brown wrote:
>
> > > We have managed versions of the other regmap allocation functions, it
> > > makes sense for consistency to
On Tue, Sep 29, 2020 at 06:20:00PM -0700, Jann Horn wrote:
> In preparation for adding a mmap_assert_locked() check in
> __get_user_pages(), teach the mmap_assert_*locked() helpers that it's fine
> to operate on an mm without locking in the middle of execve() as long as
> it hasn't been installed o
On 30/09/20 08:36AM, tudor.amba...@microchip.com wrote:
> On 9/16/20 3:44 PM, Pratyush Yadav wrote:
> > EXTERNAL EMAIL: Do not click links or open attachments unless you know the
> > content is safe
> >
> > The Cypress Semper flash is an xSPI compliant octal DTR flash. Add
> > support for using i
>
> > > What is the point of calling kmalloc for a PAGE_SIZE object? Wouldn't
> > > using the page allocator directly be better?
> >
> > Well, you guys gave me considerable heat about abusing internal allocator
> > interfaces, and kmalloc() and kfree() seem to be about as non-internal
> > as you
On Tue, Sep 29, 2020 at 06:20:01PM -0700, Jann Horn wrote:
> After having cleaned up all GUP callers (except for the atomisp staging
> driver, which currently gets mmap locking completely wrong [1]) to always
> ensure that they hold the mmap lock when calling into GUP (unless the mm is
> not yet gl
On Wed, Sep 30, 2020 at 11:27:32AM +0200, Michal Hocko wrote:
> On Tue 29-09-20 18:25:14, Uladzislau Rezki wrote:
> > > > I look at it in scope of GFP_ATOMIC/GFP_NOWAIT issues, i.e. inability
> > > > to provide a memory service for contexts which are not allowed to
> > > > sleep, RCU is part of the
On Wed, Sep 30, 2020 at 02:15:12PM +0200, Jan Kara wrote:
> On Mon 14-09-20 14:00:42, Matthew Wilcox (Oracle) wrote:
> > All callers now expect head (and base) pages, and can handle multiple
> > head pages in a single batch, so make find_get_entries() behave that way.
> > Also take the opportunity
Acttully i don't know you but when i saw your profile in my facebook i
decided to contact you for a busines that needs confidentiality, that
is why i contacted you through my email address for the security of
the business.
I WANT YOU TO READ BELOW, IF YOU ARE INTERESTED LET INFORM YOU.
I am Idris
Hi Will,
On 9/28/20 6:57 PM, Will Deacon wrote:
> On Thu, Sep 24, 2020 at 12:07:04PM +0100, Alexandru Elisei wrote:
>> From: Julien Thierry
>>
>> kvm_vcpu_kick() is not NMI safe. When the overflow handler is called from
>> NMI context, defer waking the vcpu to an irq_work queue.
>>
>> A vcpu can
Hello,
syzbot found the following issue on:
HEAD commit:ccc1d052 Merge tag 'dmaengine-fix-5.9' of git://git.kernel..
git tree: upstream
console output: https://syzkaller.appspot.com/x/log.txt?x=143df17590
kernel config: https://syzkaller.appspot.com/x/.config?x=adebb40048274f92
das
Hello,
syzbot found the following issue on:
HEAD commit:fb0155a0 Merge tag 'nfs-for-5.9-3' of git://git.linux-nfs...
git tree: upstream
console output: https://syzkaller.appspot.com/x/log.txt?x=13458c0f90
kernel config: https://syzkaller.appspot.com/x/.config?x=adebb40048274f92
das
Hi all,
In commit
1e555ccc72e0 ("RISC-V: Check clint_time_val before use")
Fixes tag
Fixes: d5be89a8d118 ("RISC-V: Resurrect the MMIO timer implementation
has these problem(s):
- Subject has leading but no trailing parentheses
- Subject has leading but no trailing quotes
Please do no
Hello. To me, it looks rather a random failure. Is it actually reproducible
and proven that the patch has caused it? The patch doesn't seem to cause
the fails below.
Cheers,
Michael
On Wed, 30 Sep 2020, kernel test robot wrote:
> Greeting,
>
> FYI, we noticed the following commit (built with gcc-
On Sat, Sep 26, 2020 at 06:28:06PM +0200, Krzysztof Kozlowski wrote:
> Document and adjust the compatibles for VF500 and VF600 based boards.
> The Toradex Colibri Evaluation Boards use multiple compatibles.
>
> Signed-off-by: Krzysztof Kozlowski
> ---
> .../devicetree/bindings/arm/fsl.yaml
On Sat, Sep 26, 2020 at 06:28:05PM +0200, Krzysztof Kozlowski wrote:
> Document and adjust the compatibles for i.MX53 based boards.
>
> Signed-off-by: Krzysztof Kozlowski
> ---
> Documentation/devicetree/bindings/arm/fsl.yaml | 9 +
> 1 file changed, 9 insertions(+)
>
> diff --git a/Doc
On Wed 30-09-20 14:35:35, Uladzislau Rezki wrote:
> On Wed, Sep 30, 2020 at 11:27:32AM +0200, Michal Hocko wrote:
> > On Tue 29-09-20 18:25:14, Uladzislau Rezki wrote:
> > > > > I look at it in scope of GFP_ATOMIC/GFP_NOWAIT issues, i.e. inability
> > > > > to provide a memory service for contexts
On Sat, Sep 26, 2020 at 06:28:04PM +0200, Krzysztof Kozlowski wrote:
> Document and adjust the compatibles for i.MX51 based boards.
>
> Signed-off-by: Krzysztof Kozlowski
> ---
> .../devicetree/bindings/arm/fsl.yaml | 24 ---
> 1 file changed, 21 insertions(+), 3 deletio
Hi Jason
On Mon, 2020-08-31 at 11:39 -0300, Jason Gunthorpe wrote:
> On Wed, Aug 26, 2020 at 01:16:52PM +0200, Thomas Gleixner wrote:
> > From: Thomas Gleixner
> >
> > Devices on the VMD bus use their own MSI irq domain, but it is not
> > distinguishable from regular PCI/MSI irq domains. This is
When compiling a driver which includes both include/linux/acpi.h and
include/acpi/acpi_bus.h for when CONFIG_ACPI=n for i386, I get this:
/include/acpi/acpi_bus.h:53:20: error: conflicting types for ‘acpi_evaluate_dsm’
union acpi_object *acpi_evaluate_dsm(acpi_handle handle, const guid_t *guid,
On Sat, Sep 26, 2020 at 06:28:07PM +0200, Krzysztof Kozlowski wrote:
> Document and adjust the compatibles for i.MX6DL based boards.
>
> Signed-off-by: Krzysztof Kozlowski
> ---
> .../devicetree/bindings/arm/fsl.yaml | 27 +--
> 1 file changed, 25 insertions(+), 2 deleti
The main intent is to get rid of the cast for the void-pointer returned by
of_device_get_match_data().
This requires const-ifying the 'caps' and 'registers' references on the
at91_adc_state struct.
The caps can be obtained also from the old platform_data (in the
at91_adc_probe_pdata() function),
This tries to solve a warning reported by the lkp bot:
>> drivers/iio/adc/at91_adc.c:1439:34: warning: unused variable
>> 'at91_adc_dt_ids' [-Wunused-const-variable]
static const struct of_device_id at91_adc_dt_ids[] = {
^
1 warning generated.
This warnin
The AT91 ADC driver no longer uses the 'at91_add_device_adc' platform data
type. This is no longer used (at least in mainline drivers).
This change removes the platform-data initialization from the driver, since
it is mostly dead code now.
Some definitions [from the platform data at91_adc.h inclu
This is a small tidy-up. The of_device_get_match_data() helper retrieves
the driver data from the OF table, without needed to explicitly know the
table variable (since it can retrieve it from the driver object).
Reviewed-by: Alexandre Belloni
Signed-off-by: Alexandru Ardelean
---
drivers/iio/ad
This whole thing started because the lkp bot haunted me for a while with
this build warning:
>> drivers/iio/adc/at91_adc.c:1439:34: warning: unused variable
>> 'at91_adc_dt_ids' [-Wunused-const-variable]
static const struct of_device_id at91_adc_dt_ids[] = {
Hi Alan,
On Tue, Sep 29, 2020 at 09:32:29PM -0400, Alan Stern wrote:
> On Tue, Sep 29, 2020 at 03:09:12PM -0700, Matthias Kaehlcke wrote:
> > Hi Rob,
> >
> > On Tue, Sep 29, 2020 at 03:17:01PM -0500, Rob Herring wrote:
> > > As I said in prior version, this separate node and 'hub' phandle is not
Hello,
syzbot found the following issue on:
HEAD commit:fb0155a0 Merge tag 'nfs-for-5.9-3' of git://git.linux-nfs...
git tree: upstream
console output: https://syzkaller.appspot.com/x/log.txt?x=10b007cf90
kernel config: https://syzkaller.appspot.com/x/.config?x=41b736b7ce1b3ea4
das
On Wed, Sep 30, 2020 at 12:36 AM Kunihiko Hayashi
wrote:
>
> In the dt-bindings, "atu" reg-names is required to get the register space
> for iATU in Synopsis DWC version 4.80 or later.
>
> Signed-off-by: Kunihiko Hayashi
> ---
> .../bindings/pci/socionext,uniphier-pcie-ep.yaml | 20
> ++
On Wed, Sep 30, 2020 at 12:36 AM Kunihiko Hayashi
wrote:
>
> This gets iATU register area from reg property that has reg-names "atu".
> In Synopsys DWC version 4.80 or later, since iATU register area is
> separated from core register area, this area is necessary to get from
> DT independently.
>
>
On Wed, Sep 30, 2020 at 2:30 PM Jason Gunthorpe wrote:
> On Tue, Sep 29, 2020 at 06:20:00PM -0700, Jann Horn wrote:
> > In preparation for adding a mmap_assert_locked() check in
> > __get_user_pages(), teach the mmap_assert_*locked() helpers that it's fine
> > to operate on an mm without locking i
On Tue, Sep 29, 2020 at 8:35 PM Alexander Popov wrote:
>
> Currently in CONFIG_SLAB init_on_free happens too late, and heap
> objects go to the heap quarantine being dirty. Lets move memory
> clearing before calling kasan_slab_free() to fix that.
>
> Signed-off-by: Alexander Popov
Reviewed-by: Al
Hi all,
In commit
233e7aca4c8a ("sched/fair: Use dst group while checking imbalance for NUMA
balancer")
Fixes tag
Fixes: fb86f5b211 ("sched/numa: Use similar logic to the load balancer for
moving between domains with spare capacity")
has these problem(s):
- SHA1 should be at least 12
Hi all,
In commit
df3cb4ea1fb6 ("sched/fair: Fix wrong cpu selecting from isolated domain")
Fixes tag
Fixes: 10e2f1acd010 ("sched/core: Rewrite and improve select_idle_siblings())
has these problem(s):
- Subject has leading but no trailing quotes
--
Cheers,
Stephen Rothwell
pgp75tLG
Hi Rikard,
On Tue, 2020-09-29 at 22:17 +0200, Rikard Falkeborn wrote:
> The only usage of sirfsoc_rstc_ops is to assign its address to the ops
> field in the reset_controller_dev struct, which is a const pointer. Make
> it const to allow the compiler to put it in read-only memory.
>
> Signed-off-
On Wed, Sep 30, 2020 at 12:45:30PM +, Derrick, Jonathan wrote:
> Hi Jason
>
> On Mon, 2020-08-31 at 11:39 -0300, Jason Gunthorpe wrote:
> > On Wed, Aug 26, 2020 at 01:16:52PM +0200, Thomas Gleixner wrote:
> > > From: Thomas Gleixner
> > >
> > > Devices on the VMD bus use their own MSI irq do
On Wed, Sep 30, 2020 at 01:52:11PM +0200, Greg Kroah-Hartman wrote:
> On Wed, Sep 30, 2020 at 01:25:14PM +0200, Daniel Vetter wrote:
> > On Wed, Sep 30, 2020 at 12:56 PM Peilin Ye wrote:
> > > Yes, and built-in fonts don't use refcount. Or maybe we can let
> > > find_font() and get_default_font()
On 9/26/20 7:49 PM, Halil Pasic wrote:
On Fri, 21 Aug 2020 15:56:09 -0400
Tony Krowiak wrote:
The current implementation does not allow assignment of an AP adapter or
domain to an mdev device if the APQNs resulting from the assignment
do not reference AP queue devices that are bound to the
On Wed, Sep 30, 2020 at 12:04:43PM +, Flavio Suligoi wrote:
> > > > > > I was wondering if there is a generic GPIO driver that I can use
> > Maybe I was not so clear, but as Bart mentioned the least you can do
> > is simply define line name via "gpio-line-names" property. The problem
> > here i
Hi all,
In commit
8947391f77c8 ("pinctrl: qcom: sm8250: correct sdc2_clk")
Fixes tag
Fixes: 4e3ec9e407ad5058003309072b37111f7b8c900a
has these problem(s):
- missing subject
Just use
git log -1 --format='Fixes: %h ("%s") '
Fixes: 4e3ec9e407ad ("pinctrl: qcom: Add sm8250 pinctr
From: Colin Ian King
There is an off-by-one range check on the upper limit of
index "no". Fix this by changing the > comparison to >=
Addresses-Coverity: ("Out-of-bounds read")
Fixes: a8ea8bdd9df9 ("lib/mpi: Extend the MPI library")
Signed-off-by: Colin Ian King
---
resend to Cc linux-crypto
On 30/09/2020 15:52:15+0300, Alexandru Ardelean wrote:
> This tries to solve a warning reported by the lkp bot:
>
> >> drivers/iio/adc/at91_adc.c:1439:34: warning: unused variable
> >> 'at91_adc_dt_ids' [-Wunused-const-variable]
>static const struct of_device_id at91_adc_dt_ids[] = {
>
Hi,
Version 7 of the PMU NMI patches [1] has been picked up by Will, no major
changes
compared to v6.
I would to try to review the PMU NMI bits, but I'm not familiar with how the
watchdog functions. From my limited understanding, it uses an event that is
reset
periodically, and if it overflows,
On Wed, 2020-09-30 at 15:06 +0530, Vignesh Raghavendra wrote:
>
> On 9/21/20 4:54 PM, Ivan Mikhaylov wrote:
> > Some chips like macronix don't have TB(Top/Bottom protection)
> > bit in the status register. Do not write tb_mask inside status
> > register, unless SPI_NOR_HAS_TB is present for the ch
On Wed, 2020-09-30 at 15:10 +0530, Vignesh Raghavendra wrote:
> Hi,
>
> On 9/21/20 4:54 PM, Ivan Mikhaylov wrote:
> > Add locks for whole macronix chip series with BP0-2 and BP0-3 bits.
> >
> > Tested with mx25l51245g(BP0-3).
>
> Since you have only tested on flash that have 4bit BP, please don'
From: Vasily Gorbik
> Sent: 30 September 2020 13:24
>
> Correct objtool orc generation endianness problems to enable fully
> functional x86 cross compiles on big endian hardware.
>
...
> +
> +#if defined(__BYTE_ORDER) ? __BYTE_ORDER == __LITTLE_ENDIAN :
> defined(__LITTLE_ENDIAN)
> +
> struct o
On 30/09/2020 15:52:16+0300, Alexandru Ardelean wrote:
> The AT91 ADC driver no longer uses the 'at91_add_device_adc' platform data
> type. This is no longer used (at least in mainline drivers).
s/drivers/boards/
>
> This change removes the platform-data initialization from the driver, since
> i
randconfig-r035-20200930 (attached as .config)
compiler: nds32le-linux-gcc (GCC) 9.3.0
reproduce (this is a W=1 build):
wget
https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O
~/bin/make.cross
chmod +x ~/bin/make.cross
#
https://github.com/0da
Peter Zijlstra 于2020年9月30日周三 下午5:57写道：
>
> On Wed, Sep 30, 2020 at 05:16:29PM +0800, jun qian wrote:
> > Peter Zijlstra 于2020年9月30日周三 下午4:20写道：
> > >
> > > On Wed, Sep 30, 2020 at 10:47:12AM +0800, qianjun.ker...@gmail.com wrote:
> > > > From: jun qian
> > > >
> > > > When the sched_schedstat ch
+Megha
On Wed, 2020-09-30 at 09:57 -0300, Jason Gunthorpe wrote:
> On Wed, Sep 30, 2020 at 12:45:30PM +, Derrick, Jonathan wrote:
> > Hi Jason
> >
> > On Mon, 2020-08-31 at 11:39 -0300, Jason Gunthorpe wrote:
> > > On Wed, Aug 26, 2020 at 01:16:52PM +0200, Thomas Gleixner wrote:
> > > > From:
On Wed, Sep 30, 2020 at 12:04:04PM +0100, Mark Brown wrote:
> On Wed, Sep 30, 2020 at 01:43:03AM +0300, Serge Semin wrote:
> > On Tue, Sep 29, 2020 at 03:43:51PM +0100, Mark Brown wrote:
>
> > > This is a *huge* patch series which is a bit unweildy to review
> > > (especially given the other 10+ p
Hi Yun,
On 28/09/2020 10:26, Yun Hsiang wrote:
> If the user wants to release the util clamp and let cgroup to control it,
> we need a method to reset.
>
> So if the user set the task uclamp to the default value (0 for UCLAMP_MIN
> and 1024 for UCLAMP_MAX), reset the user_defined flag to release
On 2020-09-30 11:01, Peter Ujfalusi wrote:
On 30/09/2020 11.33, Marc Zyngier wrote:
On 2020-09-30 08:45, Peter Ujfalusi wrote:
The DMA (BCDMA/PKTDMA and their rings/flows) events are under the
INTA's
supervision as unmapped events in AM64.
What does "unmapped event" mean? An event that doesn
From: Gioh Kim
list field is not used anywhere
Signed-off-by: Gioh Kim
---
drivers/infiniband/ulp/rtrs/rtrs-pri.h | 1 -
1 file changed, 1 deletion(-)
diff --git a/drivers/infiniband/ulp/rtrs/rtrs-pri.h
b/drivers/infiniband/ulp/rtrs/rtrs-pri.h
index 0a93c87ef92b..b8e43dc4d95a 100644
--- a/dr
On Wed, 30 Sep 2020 15:20:26 +0300, Roger Quadros wrote:
> This series adds USB2.0 support for the J7200 EVM.
>
> Series is based on top of: linux-next next-20200930
>
> cheers,
> -roger
>
> [...]
Hi Roger Quadros,
I have applied the following to branch ti-k3-dts-next
From: "Steven Rostedt (VMware)"
The temp buffer size variable for trace_find_next_entry() was incorrectly
being updated when the size did not change. The temp buffer size should only
be updated when it is reallocated.
This is mostly an issue when used with ftrace_dump(). That's because
ftrace_du
Hi all,
On Wed, 30 Sep 2020 23:01:19 +1000 Stephen Rothwell
wrote:
>
> Just use
>
> git log -1 --format='Fixes: %h ("%s") '
git log -1 --format='Fixes: %h ("%s")'
sorry :-)
--
Cheers,
Stephen Rothwell
pgpj6QKnhcavB.pgp
Description: OpenPGP digital signature
Our use of broadcast TLB maintenance means that spurious page-faults
that have been handled already by another CPU do not require additional
TLB maintenance.
Make flush_tlb_fix_spurious_fault() a no-op and rely on the existing TLB
invalidation instead. Add an explicit flush_tlb_page() when making
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