From: Kefeng Wang
Enable support for the Hisilicon SD5203 SoC. The core is ARM926EJ-S.
Signed-off-by: Kefeng Wang
Signed-off-by: Zhen Lei
---
arch/arm/mach-hisi/Kconfig | 16 ++--
1 file changed, 14 insertions(+), 2 deletions(-)
diff --git a/arch/arm/mach-hisi/Kconfig b/arch/arm/
Convert the Hisilicon Hi3798CV200 Peripheral Controller binding to DT
schema format using json-schema.
Signed-off-by: Zhen Lei
---
.../controller/hisilicon,hi3798cv200-perictrl.txt | 21 --
.../controller/hisilicon,hi3798cv200-perictrl.yaml | 45 ++
2 files changed,
Convert the Hisilicon Hip06 SoCs implement a Low Pin Count (LPC)
controller binding to DT schema format using json-schema.
Signed-off-by: Zhen Lei
---
.../arm/hisilicon/hisilicon-low-pin-count.txt | 33
.../arm/hisilicon/hisilicon-low-pin-count.yaml | 61 +++
Convert the Hisilicon system controller and its variants binding to DT
schema format using json-schema. All of them are grouped into one yaml
file, to help users understand differences and avoid repeated
descriptions.
Signed-off-by: Zhen Lei
---
.../controller/hisilicon,hi6220-sysctrl.txt
From: Kefeng Wang
Add sd5203.dts for Hisilicon SD5203 SoC platform.
Signed-off-by: Kefeng Wang
Signed-off-by: Zhen Lei
---
arch/arm/boot/dts/Makefile | 2 +
arch/arm/boot/dts/sd5203.dts | 96
2 files changed, 98 insertions(+)
create mode 100644
From: Kefeng Wang
Add support of early console for SD5203.
Signed-off-by: Kefeng Wang
Signed-off-by: Zhen Lei
---
arch/arm/Kconfig.debug | 11 ++-
1 file changed, 10 insertions(+), 1 deletion(-)
diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug
index 8a66a4e3549..d27a7
Convert the Hisilicon peripheral misc control register binding to DT
schema format using json-schema.
Signed-off-by: Zhen Lei
---
.../arm/hisilicon/controller/hisilicon,pctrl.txt | 13 -
.../arm/hisilicon/controller/hisilicon,pctrl.yaml | 34 ++
2 files changed, 34
Convert the Hisilicon Fabric controller binding to DT schema format using
json-schema.
Signed-off-by: Zhen Lei
---
.../controller/hisilicon,hip04-fabric.txt | 5 -
.../controller/hisilicon,hip04-fabric.yaml | 26 ++
2 files changed, 26 insertions(+), 5 d
Convert the Hisilicon HiP05/HiP06 PCIe-SAS subsystem controller binding
to DT schema format using json-schema.
Signed-off-by: Zhen Lei
---
.../controller/hisilicon,pcie-sas-subctrl.txt | 15 -
.../controller/hisilicon,pcie-sas-subctrl.yaml | 37 ++
2 files ch
Convert the Hisilicon Bootwrapper boot method binding to DT schema format
using json-schema.
The property boot-method contains two groups of physical address range
information: bootwrapper and relocation. The "uint32-array" type is not
suitable for it, because the field "address" and "size" may oc
Convert Hisilicon SoC bindings to DT schema format using json-schema.
Signed-off-by: Zhen Lei
---
.../bindings/arm/hisilicon/hisilicon.txt | 57
.../bindings/arm/hisilicon/hisilicon.yaml | 62 ++
2 files changed, 62 insertions(+), 57 de
Convert the Hisilicon Hi6220 Media domain controller binding to DT schema
format using json-schema.
Signed-off-by: Zhen Lei
---
.../controller/hisilicon,hi6220-mediactrl.txt | 18 --
.../controller/hisilicon,hi6220-mediactrl.yaml | 42 ++
2 files changed, 42
v3 --> v4:
1. remove unexpected "\ No newline at end of file" of each new file.
2. discard the subdirectory "hi3620" and "hipxx", all files in the two
directories are moved to the parent directory.
3. add two spaces for the below cases:
- items:
- const: hisilicon,sysctrl.//add t
Convert the Hisilicon HiP05/HiP06 PERI subsystem controller binding to DT
schema format using json-schema.
Signed-off-by: Zhen Lei
---
.../controller/hisilicon,peri-subctrl.txt | 16 --
.../controller/hisilicon,peri-subctrl.yaml | 34 ++
2 files chang
Convert the Hisilicon HiP05/HiP06 DSA subsystem controller binding to DT
schema format using json-schema.
Signed-off-by: Zhen Lei
---
.../hisilicon/controller/hisilicon,dsa-subctrl.txt | 15 -
.../controller/hisilicon,dsa-subctrl.yaml | 37 ++
2 files changed
Convert the Hisilicon CPU controller binding to DT schema format using
json-schema.
Signed-off-by: Zhen Lei
---
.../arm/hisilicon/controller/hisilicon,cpuctrl.txt | 8 ---
.../hisilicon/controller/hisilicon,cpuctrl.yaml| 28 ++
2 files changed, 28 insertions(+), 8 de
Convert the Hisilicon Hi6220 Power Always ON domain controller binding to
DT schema format using json-schema.
Signed-off-by: Zhen Lei
---
.../controller/hisilicon,hi6220-aoctrl.txt | 18 --
.../controller/hisilicon,hi6220-aoctrl.yaml| 42 ++
2 files ch
Split the devicetree bindings of each Hisilicon controller from
hisilicon.txt into a separate file, the file name is the compatible name
attach the .txt file name extension.
All Hi6220 dedicated controllers are grouped into subdirectory "hi3620".
All HiPxx dedicated controllers are grouped into s
On Sun, Sep 27, 2020 at 11:12:23AM +0200, Dmitry Vyukov wrote:
> Hi printk maintainers,
>
> I've got the following out-of-bounds in printk code.
> This is on next-20200925. Config is attached.
> This is just on pr_cont("\n"). Something overreads the string.
>
> ===
Hi Gavin,
On Mon, Sep 28, 2020 at 05:22:54PM +1000, Gavin Shan wrote:
> Testing
> ===
> [1] The experiment reveals how heavily the (L1) data cache miss impacts
> the overall application's performance. The machine where the test
> is carried out has the following L1 data cache topology.
On Thu, 24 Sep 2020, Mikulas Patocka wrote:
> On Tue, 22 Sep 2020, Matthew Wilcox wrote:
>
> > > There is a small window when renamed inode is neither in source nor in
> > > target directory. Fsck will reclaim such inode and add it to lost+found -
> > > just like on EXT2.
> >
> > ... ouch.
(+CC Ben)
On Mon, Sep 21, 2020 at 7:48 AM Guillem Jover wrote:
>
> Hi!
>
> This series fixes some packaging issues and brings it closer to
> current standards.
I am not tracking the latest development in the Debian project.
Could you give me a little more context about
what you call "current s
On Mon, Sep 28, 2020 at 10:49:57PM +0800, Baolin Wang wrote:
> On Mon, Sep 28, 2020 at 03:00:55PM +0100, Will Deacon wrote:
> > [+ Lorenzo]
> >
> > On Tue, Sep 22, 2020 at 06:33:24PM +0800, Baolin Wang wrote:
> > > If the BIOS disabled the NUMA configuration, but did not change the
> > > proximity
handle exceptions gracefully, and avoid using
if (0) .
Signed-off-by: Hui Su
---
kernel/sched/rt.c | 13 +++--
1 file changed, 7 insertions(+), 6 deletions(-)
diff --git a/kernel/sched/rt.c b/kernel/sched/rt.c
index f215eea6a966..1dd6cbd67e6e 100644
--- a/kernel/sched/rt.c
+++ b/kernel/
On 2020-08-19 00:31:00 [+1200], Barry Song wrote:
> diff --git a/mm/zswap.c b/mm/zswap.c
> index fbb782924ccc..00b5f14a7332 100644
> --- a/mm/zswap.c
> +++ b/mm/zswap.c
> @@ -127,9 +129,17 @@ module_param_named(same_filled_pages_enabled,
> zswap_same_filled_pages_enabled,
> * data structures
> *
There is a regular need in the kernel to provide a way to declare having
a dynamically sized set of trailing elements in a structure. Kernel code
should always use “flexible array members”[1] for these cases. The older
style of one-element or zero-length arrays should no longer be used[2].
Refacto
On Mon, 28 Sep 2020 15:29:29 +0800
Nicolas Boichat wrote:
> trace_printk is meant as a debugging tool, and should not be
> compiled into production code without specific debug Kconfig
> options enabled, or source code changes, as indicated by the
> warning that shows up on boot if any trace_print
On Mon, Sep 28, 2020 at 5:19 PM Steven Rostedt wrote:
>
> On Sun, Sep 27, 2020 at 11:12:23AM +0200, Dmitry Vyukov wrote:
> > Hi printk maintainers,
> >
> > I've got the following out-of-bounds in printk code.
> > This is on next-20200925. Config is attached.
> > This is just on pr_cont("\n"). Some
region_hash dm_log dm_mod
[ 1119.786660][ T7441] CPU: 27 PID: 7441 Comm: qemu-kvm Tainted: G I
5.9.0-rc7-next-20200928+ #2
[ 1119.796572][ T7441] Hardware name: HPE ProLiant DL560 Gen10/ProLiant DL560
Gen10, BIOS U34 11/13/2019
[ 1119.805870][ T7441] RIP: 0010:handle_exception_nm
On Mon, Sep 28, 2020 at 10:30:32AM +0200, Borislav Petkov wrote:
> On Mon, Sep 28, 2020 at 02:37:00AM +0300, Jarkko Sakkinen wrote:
> > I did not get Sean's reply, and neither can find it from lore:
> >
> > https://lore.kernel.org/linux-sgx/20200915112842.897265-1-jarkko.sakki...@linux.intel.com/T
Some boards might have a regulator that control the +VS supply, add it
to the bindings.
Signed-off-by: Alban Bedel
---
v2: Removed the unneeded `maxItems` attribute
---
Documentation/devicetree/bindings/hwmon/lm75.yaml | 4
1 file changed, 4 insertions(+)
diff --git a/Documentation/devicet
Hi everybody,
this small series add regulator support to the lm75 driver for boards
that don't always power such a sensor. While at it also convert the
DT bindings to yaml.
v2: - Fixed the DT example while converting to YAML
- Removed the unneeded maxItems from the binding documentation
-
Add regulator support for boards where the sensor first need to be
powered up before it can be used.
Signed-off-by: Alban Bedel
---
v2: Rely on dummy regulators instead of explicitly handling missing
regulator
---
drivers/hwmon/lm75.c | 23 +--
1 file changed, 21 insertio
In order to automate the verification of DT nodes convert lm75.txt to
lm75.yaml.
Signed-off-by: Alban Bedel
---
v2: Fix the example to pass `make dt_binding_check`
---
.../devicetree/bindings/hwmon/lm75.txt| 39
.../devicetree/bindings/hwmon/lm75.yaml | 60
On Mon, Sep 28, 2020 at 10:51:03PM +0800, Xu, Like wrote:
> Hi Eduardo,
>
> Thanks for your detailed review.
>
> On 2020/9/25 6:05, Eduardo Habkost wrote:
> > I've just noticed this on my review queue (apologies for the long
> > delay). Comments below:
> >
> > On Sun, Jul 26, 2020 at 11:32:20PM
On 9/25/2020 11:23 AM, Andrew Cooper wrote:
On 15/09/2020 12:28, Jarkko Sakkinen wrote:
diff --git a/arch/x86/entry/vdso/vsgx_enter_enclave.S
b/arch/x86/entry/vdso/vsgx_enter_enclave.S
new file mode 100644
index ..adbd59d41517
--- /dev/null
+++ b/arch/x86/entry/vdso/vsgx_enter_encla
On Thu, Sep 24, 2020 at 5:25 AM Jason Wang wrote:
>
> This patch extends the vhost-vdpa to support ASID based IOTLB API. The
> vhost-vdpa device will allocated multple IOTLBs for vDPA device that
> supports multiple address spaces. The IOTLBs and vDPA device memory
> mappings is determined and mai
On Thu, Sep 24, 2020 at 5:23 AM Jason Wang wrote:
>
> This patch introduces virtqueue groups to vDPA device. The virtqueue
> group is the minimal set of virtqueues that must share an address
> space. And the adddress space identifier could only be attached to
> a specific virtqueue group.
>
> A ne
On Mon, 28 Sep 2020 16:55:28 +0200
Miquel Raynal wrote:
> > IMHO, grouped means, ecc bytes are at continuous address, where as
> > interleaved means ecc bytes splitted into multiple addresses
>
> I don't like the name. Interleaved means that there are OOB bytes
> stored in the data section, wh
Dear Friend,
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here in the Bank(B.O.A).
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Boris Brezillon wrote on Mon, 28 Sep
2020 17:45:05 +0200:
> On Mon, 28 Sep 2020 16:55:28 +0200
> Miquel Raynal wrote:
>
> > > IMHO, grouped means, ecc bytes are at continuous address, where as
> > > interleaved means ecc bytes splitted into multiple addresses
> >
> > I don't like the nam
From: Colin Ian King
Currently pointer flow is being dereferenced before it is being
null checked. Fix this by adding a null check for flow and parse_attr
earlier. Also change the err_free path to explicitly return -ENOMEM
and remove the need for the err return variable.
Addresses-Coverity: ("D
On Mon, Sep 28, 2020 at 8:43 AM Yu, Yu-cheng wrote:
>
> On 9/25/2020 11:23 AM, Andrew Cooper wrote:
> > On 15/09/2020 12:28, Jarkko Sakkinen wrote:
> >> diff --git a/arch/x86/entry/vdso/vsgx_enter_enclave.S
> >> b/arch/x86/entry/vdso/vsgx_enter_enclave.S
> >> new file mode 100644
> >> index 0
On Mon, Sep 28, 2020 at 11:47:59AM +0200, Borislav Petkov wrote:
> On Fri, Sep 25, 2020 at 02:51:27PM -0500, Yazen Ghannam wrote:
>
> > The address translation needs to be done before the notfiers that need
> > it, and EDAC comes after all of them. There's also the case where the
> > EDAC interfac
On 9/27/20 2:12 PM, Julia Lawall wrote:
Replace commas with semicolons. What is done is essentially described by
the following Coccinelle semantic patch (http://coccinelle.lip6.fr/):
//
@@ expression e1,e2; @@
e1
-,
+;
e2
... when any
//
Signed-off-by: Julia Lawall
---
Reviewed-by: David
On Mon, Sep 28, 2020 at 05:07:09PM +0530, Sai Prakash Ranjan wrote:
> In commit f188b5e76aae ("coresight: etm4x: Save/restore state
> across CPU low power states"), mistakenly TRCVMIDCCTLR1 register
> value was saved in trcvmidcctlr0 state variable which is used to
> store TRCVMIDCCTLR0 register va
On Mon, 2020-09-28 at 12:41 +0200, Bartosz Golaszewski wrote:
> From: Bartosz Golaszewski
>
> There's a common pattern of dynamically allocating an array of char
> pointers and then also dynamically allocating each string in this
> array. Provide a helper for freeing such a string array with one
The default sizes in examples for 'reg' are 1 cell each. Fix the
incorrect sizes in zynqmp examples:
Documentation/devicetree/bindings/dma/xilinx/xlnx,zynqmp-dpdma.example.dt.yaml:
example-0: dma-controller@fd4c:reg:0: [0, 4249616384, 0, 4096] is too long
From schema:
/usr/local/lib/
On Mon, Sep 28, 2020 at 5:59 PM Joe Perches wrote:
>
> On Mon, 2020-09-28 at 12:41 +0200, Bartosz Golaszewski wrote:
> > From: Bartosz Golaszewski
> >
> > There's a common pattern of dynamically allocating an array of char
> > pointers and then also dynamically allocating each string in this
> >
On Mon, 28 Sep 2020 17:50:05 +0200
Miquel Raynal wrote:
> > > The way OOB
> > > bytes are organized do not seem relevant to me, I think i prefer the
> > > "_4_/_8_" naming,even if it's not very explicit.
> >
> > The ECC strength doesn't say anything about the scheme used for ECC
> > bytes pl
>
> This patch adds a generic interface to handle WRMSR and RDMSR from user
> space. With this, any future MSR that is part of the latter categories can
> be handled in user space.
>
> Furthermore, it allows us to replace the existing "ignore_msrs" logic with
> something that applies per-VM rather
On Mon, 2020-09-28 at 18:02 +0200, Bartosz Golaszewski wrote:
> On Mon, Sep 28, 2020 at 5:59 PM Joe Perches wrote:
> > On Mon, 2020-09-28 at 12:41 +0200, Bartosz Golaszewski wrote:
> > > From: Bartosz Golaszewski
> > >
> > > There's a common pattern of dynamically allocating an array of char
> >
Hi,
static analysis with Coverity has found a null pointer dereference issue
with the following commit:
commit c620b772152b8274031083bdb2e11c963e596c5c
Author: Ariel Levkovich
Date: Thu Apr 30 05:54:08 2020 +0300
net/mlx5: Refactor tc flow attributes structure
The analysis is as follows:
On Fri, Sep 25, 2020 at 7:36 AM Alexander Graf wrote:
>
> In the following commits we will add pieces of MSR filtering.
> To ensure that code compiles even with the feature half-merged, let's add
> a few stubs and struct definitions before the real patches start.
>
> Signed-off-by: Alexander Graf
On Fri, Sep 25, 2020 at 7:35 AM Alexander Graf wrote:
>
> It's not desireable to have all MSRs always handled by KVM kernel space. Some
> MSRs would be useful to handle in user space to either emulate behavior (like
> uCode updates) or differentiate whether they are valid based on the CPU model.
>
On Fri, Sep 25, 2020 at 7:36 AM Alexander Graf wrote:
>
> Now that we have the ability to handle MSRs from user space and also to
> select which ones we do want to prevent in-kernel KVM code from handling,
> let's add a selftest to show case and verify the API.
>
> Signed-off-by: Alexander Graf
On Mon, Sep 28, 2020 at 6:19 AM Alexander Dahl wrote:
>
> Hello Rob,
>
> Am Dienstag, 22. September 2020, 17:42:58 CEST schrieb Rob Herring:
> > On Sat, 19 Sep 2020 07:31:45 +0200, Alexander Dahl wrote:
> > > The example was adapted slightly to make use of the 'function' and
> > > 'color' properti
On Mon, Sep 28, 2020 at 05:56:55PM +0530, Sai Prakash Ranjan wrote:
> Hi Jordan,
>
> On 2020-09-23 20:33, Jordan Crouse wrote:
> >On Tue, Sep 22, 2020 at 11:48:17AM +0530, Sai Prakash Ranjan wrote:
> >>From: Sharat Masetty
> >>
> >>The last level system cache can be partitioned to 32 different
>
>
> John,
>
> > Have you had a chance to check these outstanding SCSI patches?
> >
> > scsi: megaraid_sas: Added support for shared host tagset for
cpuhotplug
> > scsi: scsi_debug: Support host tagset
> > scsi: hisi_sas: Switch v3 hw to MQ
> > scsi: core: Show nr_hw_queues in sysfs
> > scsi: Add ho
On Sun, Sep 27 2020 at 07:29, syzbot wrote:
> syzbot has bisected this issue to:
>
> commit 0e7bbcc104baaade4f64205e9706b7d43c46db7d
> Author: Julian Anastasov
> Date: Wed Jul 27 06:56:50 2016 +
>
> neigh: allow admin to set NUD_STALE
>
> bisection log: https://syzkaller.appspot.com/x/b
The GE2D is a 2D accelerator with various features like configurable blitter
with alpha blending, frame rotation, scaling, format conversion and colorspace
conversion.
This adds the bindings for the GE2D version found in the AXG SoCs Family.
Signed-off-by: Neil Armstrong
---
.../bindings/media/
The GE2D is a 2D accelerator with various features like configurable blitter
with alpha blending, frame rotation, scaling, format conversion and colorspace
conversion.
The driver implements a Memory2Memory VB2 V4L2 streaming device permitting:
- 0, 90, 180, 270deg rotation
- horizontal/vertical fl
The GE2D is a 2D accelerator with various features like configurable blitter
with alpha blending, frame rotation, scaling, format conversion and colorspace
conversion.
The driver implements a Memory2Memory VB2 V4L2 streaming device permitting:
- 0, 90, 180, 270deg rotation
- horizontal/vertical fl
Signed-off-by: Neil Armstrong
---
MAINTAINERS | 9 +
1 file changed, 9 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 01fb9ee6b951..400887118b47 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -11302,6 +11302,15 @@ F:
Documentation/devicetree/bindings/media/amlogic,meson-g
This avoid annoying ifdefs in iov_iter.c
Signed-off-by: Christoph Hellwig
---
This fixes a build failure with the import_iovec / compat_import_iovec
unification.
include/linux/compat.h | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/include/linux/compat.h b/inclu
This adds the node for the GE2D accelerator unit.
Signed-off-by: Neil Armstrong
---
arch/arm64/boot/dts/amlogic/meson-axg.dtsi | 9 +
1 file changed, 9 insertions(+)
diff --git a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi
b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi
index 4559f2173065.
On Mon, 28 Sep 2020 at 17:52, Jarkko Sakkinen
wrote:
>
> On Mon, Sep 28, 2020 at 10:16:07PM +0800, Kai-Heng Feng wrote:
> > Hi Jarkko,
> >
> > > On Sep 28, 2020, at 22:06, Jarkko Sakkinen
> > > wrote:
> > >
> > > On Mon, Sep 28, 2020 at 08:31:04PM +0800, Kai-Heng Feng wrote:
> > >> Commit 7f3d17
On Sat, Sep 26, 2020 at 02:51:44PM +0200, khol...@gmail.com wrote:
> From: Konrad Dybcio
>
> The upstream API for some reason uses logbase2 instead of
> just passing the argument as-is, whereas downstream CAF
> kernel does the latter.
>
> Hence, a mistake has been made when porting:
> 4 is the v
On Mon, Sep 28, 2020 at 5:49 AM Jason Gunthorpe wrote:
>
> Not seeing an obvious option besides adding a smp_mb() before
> page_maybe_dma_pinned() as Peter once suggested.
That is going to be prohibitively expensive - needing it for each pte
whether it's pinned or not.
I really think the better
On Wed, Aug 12, 2020 at 2:32 PM Dan Murphy wrote:
>
> Update the binding examples for the color ID to LED_COLOR_ID_RGB
>
> Signed-off-by: Dan Murphy
> ---
> Documentation/devicetree/bindings/leds/leds-lp55xx.yaml | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/Documentat
On Mon, Sep 28, 2020 at 07:04:38AM -0700, Dave Hansen wrote:
> On 9/27/20 5:53 PM, Jarkko Sakkinen wrote:
> > On Fri, Sep 25, 2020 at 12:53:35PM -0700, Dave Hansen wrote:
> >> On 9/25/20 12:43 PM, Sean Christopherson wrote:
> That means that the intent argument (SGX_PROT_*) is currently unused
On 25 Sep 2020, at 15:15, Bjorn Helgaas wrote:
On Tue, Sep 22, 2020 at 02:38:55PM -0700, Sean V Kelley wrote:
From: Sean V Kelley
A Root Complex Event Collector provides support for
terminating error and PME messages from associated RCiEPs.
Make use of the RCEC Endpoint Association Extended
On Sat, Sep 26, 2020 at 02:51:40PM +0200, khol...@gmail.com wrote:
> From: AngeloGioacchino Del Regno
>
> The PC_DBG_ECO_CNTL register on the Adreno A5xx family gets
> programmed to some different values on a per-model basis.
> At least, this is what we intend to do here;
>
> Unfortunately, thou
Hi Boris,
Boris Brezillon wrote on Mon, 28 Sep
2020 18:03:43 +0200:
> On Mon, 28 Sep 2020 17:50:05 +0200
> Miquel Raynal wrote:
>
> > > > The way OOB
> > > > bytes are organized do not seem relevant to me, I think i prefer the
> > > > "_4_/_8_" naming,even if it's not very explicit.
> >
On Sat, Sep 26, 2020 at 02:51:41PM +0200, khol...@gmail.com wrote:
> From: AngeloGioacchino Del Regno
>
> The "main" if branch where we program the other regsiters for the
Nit - regsiters -> registers
> Adreno 5xx family of GPUs should not contain the PC_DBG_ECO_CNTL
> register programming beca
On Mon, Sep 28, 2020 at 7:07 AM Harald Arnesen wrote:
>
> I will try bisecting if no-one has a simple explanation.
There's a simple explanation, no need to bisect.
I'll push out the fix asap,
Linus
On Mon, Sep 28, 2020 at 04:30:46PM +0800, Lai Jiangshan wrote:
> From: Lai Jiangshan
>
> When shadowpaping is enabled, guest should not be allowed
> to toggle X86_CR4_LA57. And X86_CR4_LA57 is a rarely changed
> bit, so we can just intercept all the attempts to toggle it
> no matter shadowpaping
On Mon, Sep 28, 2020 at 04:52:25PM +0200, Bartosz Golaszewski wrote:
> On Mon, Sep 28, 2020 at 4:00 PM Andy Shevchenko
> wrote:
> > On Mon, Sep 28, 2020 at 03:13:53PM +0200, Bartosz Golaszewski wrote:
> > > On Mon, Sep 28, 2020 at 3:00 PM Andy Shevchenko
> > > wrote:
> > > > On Mon, Sep 28, 2020
On Sat, Sep 26, 2020 at 02:51:42PM +0200, khol...@gmail.com wrote:
> From: AngeloGioacchino Del Regno
>
> The Adreno 508/509/512 GPUs are stripped versions of the Adreno
> 5xx found in the mid-end SoCs such as SDM630, SDM636, SDM660 and
> SDA variants; these SoCs are usually provided with ZAP fir
On Mon, Sep 28, 2020 at 10:43:43AM +0200, Uwe Kleine-König wrote:
> On Sun, Sep 27, 2020 at 08:54:47AM -0700, Guenter Roeck wrote:
> > On 9/27/20 1:09 AM, Bruno Thomsen wrote:
> > > Den tor. 24. sep. 2020 kl. 12.53 skrev Uwe Kleine-König
> > > :
> > >>
> > >> Most boards using the pcf2127 chip (in
On Sat, Sep 26, 2020 at 02:51:43PM +0200, khol...@gmail.com wrote:
> From: AngeloGioacchino Del Regno
>
> Resetting the VBIF before power collapse is done to avoid getting
> bogus FIFO entries during the suspend sequence or subsequent resume,
> but this is doable only on Adreno 510 and Adreno 530
On Mon, Sep 28, 2020 at 09:06:34AM -0700, Joe Perches wrote:
> On Mon, 2020-09-28 at 18:02 +0200, Bartosz Golaszewski wrote:
> > On Mon, Sep 28, 2020 at 5:59 PM Joe Perches wrote:
> > > On Mon, 2020-09-28 at 12:41 +0200, Bartosz Golaszewski wrote:
> > > > From: Bartosz Golaszewski
> > > >
> > >
On Mon, 28 Sep 2020 18:21:59 +0200
Miquel Raynal wrote:
> Hi Boris,
>
> Boris Brezillon wrote on Mon, 28 Sep
> 2020 18:03:43 +0200:
>
> > On Mon, 28 Sep 2020 17:50:05 +0200
> > Miquel Raynal wrote:
> >
> > > > > The way OOB
> > > > > bytes are organized do not seem relevant to me, I think
On Mon, 28 Sep 2020 at 18:15, Ard Biesheuvel wrote:
>
> On Mon, 28 Sep 2020 at 17:52, Jarkko Sakkinen
> wrote:
> >
> > On Mon, Sep 28, 2020 at 10:16:07PM +0800, Kai-Heng Feng wrote:
> > > Hi Jarkko,
> > >
> > > > On Sep 28, 2020, at 22:06, Jarkko Sakkinen
> > > > wrote:
> > > >
> > > > On Mon,
On Mon, Sep 28, 2020 at 3:17 AM Maxime Ripard wrote:
>
> Hi!
>
> On Mon, Sep 28, 2020 at 02:27:35PM +0800, Kevin Tang wrote:
> > From: Kevin Tang
> >
> > The Unisoc DRM master device is a virtual device needed to list all
> > DPU devices or other display interface nodes that comprise the
> > grap
On Mon, Sep 28, 2020 at 06:43:26PM +0800, Biwen Li wrote:
> From: Reinhard Pfau
>
> Add support for SMSC EMC2305, EMC2303, EMC2302, EMC2301 fan controller
> chips.
> The driver primary supports the EMC2305 chip which provides RPM-based
> PWM control and monitoring for up to 5 fans.
>
> According
On Mon, Sep 28, 2020 at 03:13:53PM +, Bedel, Alban wrote:
> On Thu, 2020-09-17 at 22:33 -0700, Guenter Roeck wrote:
> > On 9/17/20 3:18 AM, Alban Bedel wrote:
> > > Add regulator support for boards where the sensor first need to be
> > > powered up before it can be used.
> > >
> > > Signed-off
On Sat, Sep 26, 2020 at 12:40 PM Lakshmi Ramasubramanian
wrote:
>
> Critical data structures of security modules are currently not measured.
> Therefore an attestation service, for instance, would not be able to
> attest whether the security modules are always operating with the policies
> and con
On 2020-09-28 21:41, Jordan Crouse wrote:
On Mon, Sep 28, 2020 at 05:56:55PM +0530, Sai Prakash Ranjan wrote:
Hi Jordan,
On 2020-09-23 20:33, Jordan Crouse wrote:
>On Tue, Sep 22, 2020 at 11:48:17AM +0530, Sai Prakash Ranjan wrote:
>>From: Sharat Masetty
>>
>>The last level system cache can be
On Mon, Sep 28, 2020 at 09:29:49AM -0700, Guenter Roeck wrote:
> >
> > This is handled in lm75_remove() where I added the regulator_disable()
> > call.
>
> lm75_remove() won't be called if the probe function fails.
>
Sorry, I am confused; please ignore this noise.
Guenter
On Sat, 26 Sep 2020 08:57:32 +0200 Dmitry Vyukov wrote:
> On Sat, Sep 26, 2020 at 3:43 AM Jakub Kicinski wrote:
> >
> > Hi!
> >
> > I couldn't find this being reported in a quick search, so let me ask.
> >
> > With 5.9 I'm seeing a lot (well, once a boot) splats like the one below.
> >
> > Is ther
On Fri, Sep 18, 2020 at 11:12:51AM -0700, Kevin Hilman wrote:
> Enable pci-meson to build as a module whenever ARCH_MESON is enabled.
>
> Cc: Yue Wang
> Signed-off-by: Kevin Hilman
> ---
> Tested on Khadas VIM3 and Khadas VIM3 using NVMe SSD devices.
>
> drivers/pci/controller/dwc/Kconfig
From: Tingwei Zhang
Provide name of cpu_debug module in Kconfig help section.
Signed-off-by: Tingwei Zhang
Tested-by: Mike Leach
Reviewed-by: Suzuki K Poulose
Signed-off-by: Mathieu Poirier
---
drivers/hwtracing/coresight/Kconfig | 3 +++
1 file changed, 3 insertions(+)
diff --git a/driver
Good day,
This is the second part we were hoping for, i.e CoreSight modularisation,
and a fix for a copy/paste error in the context save/restore process.
Please consider for the next merge window.
Applies on top of your "char-misc-next" branch.
Thanks,
Mathieu
Kim Phillips (8):
coresight: Use
From: Kim Phillips
Checking for ifdef CONFIG_x fails if CONFIG_x=m. Use IS_ENABLED
that is true for both built-ins and modules, instead. Required
when building coresight components as modules.
Cc: Mathieu Poirier
Cc: Leo Yan
Cc: Alexander Shishkin
Cc: Randy Dunlap
Cc: Suzuki K Poulose
Cc:
From: Kim Phillips
Allow to build coresight-etm3x as a module, for ease of development.
- Kconfig becomes a tristate, to allow =m
- append -core to source file name to allow module to
be called coresight-etm3x by the Makefile
- add an etm_remove function, for module unload
- add a MODULE_DEVIC
From: Kim Phillips
Allow to build coresight-etm4x as a module, for ease of development.
- Kconfig becomes a tristate, to allow =m
- append -core to source file name to allow module to
be called coresight-etm4x by the Makefile
- add an etm4_remove function, for module unload
- add a MODULE_DEVI
From: Tingwei Zhang
Define a MODULE_DEVICE_TABLE for cpu_debug so module can
be auto loaded on boot.
Signed-off-by: Tingwei Zhang
Reviewed-by: Suzuki K Poulose
Signed-off-by: Mathieu Poirier
---
drivers/hwtracing/coresight/coresight-cpu-debug.c | 2 ++
1 file changed, 2 insertions(+)
diff -
From: Mian Yousaf Kaukab
Export symbols used among coresight modules.
Signed-off-by: Mian Yousaf Kaukab
Signed-off-by: Tingwei Zhang
Tested-by: Mike Leach
Reviewed-by: Suzuki K Poulose
Signed-off-by: Mathieu Poirier
---
drivers/hwtracing/coresight/coresight-etm-perf.c | 1 +
drivers/hwtrac
From: Kim Phillips
Allow to build coresight-etb10 as a module, for ease of development.
- Kconfig becomes a tristate, to allow =m
- add an etb_remove function, for module unload
- add a MODULE_DEVICE_TABLE for autoloading on boot
Cc: Mathieu Poirier
Cc: Leo Yan
Cc: Alexander Shishkin
Cc: Ran
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