From: Ira Weiny
The PKRS MSR is not managed by XSAVE. It is already preserved through a
context switch but this support leaves exception handling code open to
memory accesses which the interrupted process has allowed.
Close this hole by preserve the current task's PKRS MSR, reset the PKRS
MSR v
From: Ira Weiny
The pmem driver uses a cached virtual address to access its memory
directly. Because the nvdimm driver is well aware of the special
protections it has mapped memory with, we call dev_access_[en|dis]able()
around the direct pmem->virt_addr (pmem_addr) usage instead of the
unnecess
From: Fenghua Yu
PKS allows kernel users to define domains of page mappings which have
additional protections beyond the paging protections.
Add an API to allocate, use, and free a protection key which identifies
such a domain.
We export 2 new symbols pks_key_alloc() and pks_key_free() while
pk
From: Ira Weiny
Device managed memory exposes itself to the kernel direct map which
allows stray pointers to access these device memories.
Stray pointers to normal memory may result in a crash or other
undesirable behavior which, while unfortunate, are usually recoverable
with a reboot. Stray w
From: Ira Weiny
Future Intel CPUS will support Protection Key Supervisor (PKS).
Update the protection key documentation to cover pkeys on supervisor
pages.
Signed-off-by: Ira Weiny
---
Documentation/core-api/protection-keys.rst | 81 +-
1 file changed, 63 insertions(+), 18
From: Ira Weiny
dax_direct_access() is a special case of accessing pmem via a page
offset and without a struct page.
Because the dax driver is well aware of the special protections it has
mapped memory with, call dev_access_[en|dis]able() directly instead of
the unnecessary overhead of trying to
From: Fenghua Yu
The sysadmin may need to know which PKS keys are currently being used.
Add a debugfs file to show the allocated PKS keys and their names.
Signed-off-by: Fenghua Yu
---
arch/x86/mm/pkeys.c | 40
1 file changed, 40 insertions(+)
diff --
From: Ira Weiny
The addition of PKS protection to dax read lock/unlock will require that
the address returned by dax_direct_access() be protected by this lock.
While not technically necessary for this series, this corrects the
locking by ensuring that the use of kaddr and end_kaddr are covered b
From: Ira Weiny
Passing size to copy_user_dax implies it can copy variable sizes of data
when in fact it calls copy_user_page() which is exactly a page.
We are safe because the only caller uses PAGE_SIZE anyway so just remove
the variable for clarity.
While we are at it change copy_user_dax() t
From: Fenghua Yu
Define a helper, get_new_pkr(), which will be used to support both
Protection Key User (PKU) and the new Protection Key for Supervisor
(PKS) in subsequent patches.
Co-developed-by: Ira Weiny
Signed-off-by: Ira Weiny
Signed-off-by: Fenghua Yu
---
arch/x86/include/asm/pkeys.h
From: Ira Weiny
While reviewing Protection Key Supervisor support it was pointed out
that using a counter to track static branch enable was an anti-pattern
which was better solved using the provided static_branch_{inc,dec}
functions.[1]
Fix up devmap_managed_key to work the same way. Also this
Hello All
I am thinking it doesn't make sense to keep the series
with such a big chunk of patches,
I will divide the series into several small series
Thanks,
Jiada
On 2020/07/08 22:05, Wang, Jiada wrote:
Hello Dmitry
I am working on refining this series,
regarding your comment about drop chan
From: Fenghua Yu
Protection Keys for Supervisor pages (PKS) enables fast, hardware thread
specific, manipulation of permission restrictions on supervisor page
mappings. It uses the same mechanism of Protection Keys as those on
User mappings but applies that mechanism to supervisor mappings using
From: Ira Weiny
Device managed pages may have additional protections. These protections
need to be removed prior to valid use by kernel users.
Check for special treatment of device managed pages in kmap and take
action if needed. We use kmap as an interface for generic kernel code
because unde
On 10/07/2020 22:02, Faiz Abbas wrote:
The following patches add support for SD card node in am654x-evm
Because of fundamental interface issues (see patch 2 for details),
SD card was never enabled for silicon revision 1.0
These issues have been fixed with SR2.0 but boards with SR1.0 are
recomme
From: Ira Weiny
The PKRS MSR is defined as a per-logical-processor register. This
isolates memory access by CPU. Unfortunately, the MSR is not managed
by XSAVE. Therefore, We must preserve the protections for individual
tasks even if they are context switched out and placed on another cpu
late
The non-builtin route for offsetof has a dependency on size_t from
stdlib.h/stdint.h that is undeclared and may break targets.
The offsetof macro in bpf_helpers may disable the same macro in other
headers that have a #ifdef offsetof guard. Rather than add additional
dependencies improve the offseto
From: Ira Weiny
The core PKS functionality provides an interface for kernel users to
reserve keys to their domains set up the page tables with those keys and
control access to those domains when needed.
Define test code which exercises the core functionality of PKS via a
debugfs entry. Basic ch
On 13/07/2020 13:14, Alexander A. Klimov wrote:
Rationale:
Reduces attack surface on kernel devs opening the links for MITM
as HTTPS traffic is much harder to manipulate.
Deterministic algorithm:
For each file:
If not .svg:
For each line:
If doesn't contain `\bxmlns\b`:
F
lied to the wrong git tree, kindly drop us a note.
> And when submitting patch, we suggest to use '--base' as documented in
> https://git-scm.com/docs/git-format-patch]
>
> url:
> https://github.com/0day-ci/linux/commits/Vaibhav-Gupta/pci-use-generic-power-manageme
Looks good,
Reviewed-by: Johannes Thumshirn
On 26/06/2020 21:40, Suman Anna wrote:
On 6/26/20 1:36 PM, Grygorii Strashko wrote:
On 26/06/2020 21:35, Grygorii Strashko wrote:
Rename smmu node to iommu to fix dtbs_check warning:
k3-j721e-common-proc-board.dt.yaml: smmu@3660: $nodename:0:
'smmu@3660' does not match '^iommu@[0-9
2020년 7월 16일 (목) 오후 4:45, Vlastimil Babka 님이 작성:
>
> On 7/16/20 9:27 AM, Joonsoo Kim wrote:
> > 2020년 7월 15일 (수) 오후 5:24, Vlastimil Babka 님이 작성:
> >> > /*
> >> > * get_page_from_freelist goes through the zonelist trying to allocate
> >> > * a page.
> >> > @@ -3706,6 +3714,8 @@ get_page_from_fr
On 26/06/2020 21:34, Grygorii Strashko wrote:
The preferable name for gic-its is msi-controller, so rename it to fix
dtbs_check warning:
k3-j721e-common-proc-board.dt.yaml: interrupt-controller@180:
gic-its@182: False schema does not allow {'compatible':
['arm,gic-v3-its'], 'reg': [[0, 2
commit b326e9560a28 ("hw-breakpoints: Use overflow handler instead of
the event callback") removed '__register_perf_hw_breakpoint' function
usage and replaced it with 'register_perf_hw_breakpoint' function.
Remove the left-over unused '__register_perf_hw_breakpoint' declaration
from 'hw_breakpoint
Please find attached the incremental patch that puts back integer
parts of inst.h. This resolves the conflict with the tip tree.
Uros.
On Fri, Jul 17, 2020 at 8:45 AM Herbert Xu wrote:
>
> On Fri, Jul 17, 2020 at 08:27:27AM +0200, Uros Bizjak wrote:
> >
> > I will prepare a v2 that leaves needed
The 07/16/2020 17:45, Vladimir Oltean wrote:
> Hi Vladimir,
>
> On Thu, Jul 16, 2020 at 10:37:40AM +, Xiaoliang Yang wrote:
> > Hi Joergen,
> >
> >
> > -Original Message-
> > From: Joergen Andreasen
> > Sent: 2020年7月16日 16:51
> >
> > > >> >> Chain 0: The default chain - toda
On Fri, Jul 17, 2020 at 12:26 PM Daniel Lezcano
wrote:
>
> On 14/07/2020 09:13, Frank Lee wrote:
> > From: Yangtao Li
> >
> > For sun50i_h6_ths_calibrate(), the data read from nvmem needs a round of
> > calculation. On the other hand, the newer SOC may store other data in
> > the space other than
With legacy PM, drivers themselves were responsible for managing the
device's power states and takes care of register states.
After upgrading to the generic structure, PCI core will take care of
required tasks and drivers should do only device-specific operations.
Thus, there is no need to call t
Linux Kernel Mentee: Remove Legacy Power Management.
The purpose of this patch series is to upgrade power management in media
drivers. This has been done by upgrading .suspend() and .resume() callbacks.
The upgrade makes sure that the involvement of PCI Core does not change the
order of operation
The .suspend() and .resume() callbacks are not defined for this driver.
Still, their power management structure follows the legacy framework. To
bring it under the generic framework, simply remove the binding of
callbacks from struct "pci_driver".
Compile-tested only.
Signed-off-by: Vaibhav Gupta
With legacy PM, drivers themselves were responsible for managing the
device's power states and takes care of register states.
After upgrading to the generic structure, PCI core will take care of
required tasks and drivers should do only device-specific operations.
The driver was invoking PCI help
The .suspend() and .resume() callbacks are not defined for this driver.
Still, their power management structure follows the legacy framework. To
bring it under the generic framework, simply remove the binding of
callbacks from struct "pci_driver".
Compile-tested only.
Signed-off-by: Vaibhav Gupta
With legacy PM, drivers themselves were responsible for managing the
device's power states and takes care of register states.
After upgrading to the generic structure, PCI core will take care of
required tasks and drivers should do only device-specific operations.
The driver was invoking PCI help
On 29/06/2020 15:52, Roger Quadros wrote:
Hi Tero,
This series adds SERDES PHY support and Type-C USB Super-Speed support
to the J721E EVM.
Please queue this for -next. Thanks.
Queued up for 5.9, thanks.
-Tero
cheers,
-roger
Changelog:
v4:
- Removed redundant patch
- used compaible strin
With legacy PM, drivers themselves were responsible for managing the
device's power states and takes care of register states.
After upgrading to the generic structure, PCI core will take care of
required tasks and drivers should do only device-specific operations.
The driver was invoking PCI help
On Fri, Jul 17, 2020 at 12:28 PM Daniel Lezcano
wrote:
>
> On 14/07/2020 08:55, Frank Lee wrote:
> > From: Yangtao Li
>
> Do you expect me to pick patches 7,8,9 or ack them ?
>
Please pick it.
Thx,
Yangtao
When I cat sysfs file 'enable' below 'sas_phy', it displays as follows.
It's better to add a newline for easy reading.
[root@localhost ~]# cat
/sys/devices/pci:00/:00:0d.0/:0f:00.0/host3/phy-3:2/sas_phy/phy-3:2/enable
1[root@localhost ~]#
Signed-off-by: Xiongfeng Wang
---
drivers/s
Hi!
> > >>> Add support for the LED feature of the NCT6795D chip found on some
> > >>> motherboards, notably MSI ones. The LEDs are typically used using a
> > >>> RGB connector so this driver creates one LED device for each color
> > >>> component.
> > >>
> > >> Ok, let me take a look. What entrie
Hi,
On 11.07.20 13:04, Dafna Hirschfeld wrote:
Hi Laurent,
On 16.08.19 02:13, Laurent Pinchart wrote:
Hello Helen,
Thank you for the patch.
On Tue, Jul 30, 2019 at 03:42:47PM -0300, Helen Koike wrote:
From: Jacob Chen
Add the subdev driver for rockchip isp1.
Signed-off-by: Jacob Chen
S
在 2020/7/17 上午5:12, Alexander Duyck 写道:
> On Fri, Jul 10, 2020 at 5:59 PM Alex Shi wrote:
>>
>> Combine PageLRU check and ClearPageLRU into a function by new
>> introduced func TestClearPageLRU. This function will be used as page
>> isolation precondition to prevent other isolations some where
2020년 7월 15일 (수) 오후 5:24, Michal Hocko 님이 작성:
>
> On Wed 15-07-20 14:05:27, Joonsoo Kim wrote:
> > From: Joonsoo Kim
> >
> > We have well defined scope API to exclude CMA region.
> > Use it rather than manipulating gfp_mask manually. With this change,
> > we can now use __GFP_MOVABLE for gfp_mask
> When nfc_register_device fails in nci_register_device,
> destroy_workqueue() shouled be called to destroy ndev->tx_wq.
Would an other imperative wording be preferred for the commit message?
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/Documentation/process/submitting-p
On Fri, Jul 17, 2020 at 01:38:22AM +0300, Vladimir Oltean wrote:
> On Thu, Jul 16, 2020 at 03:09:25PM -0700, Jakub Kicinski wrote:
> > On Mon, 13 Jul 2020 21:50:26 +0100 Matthew Hagan wrote:
> > > +- qca,sgmii-rxclk-falling-edge: If present, sets receive clock phase to
> > > +
Hello,
syzbot found the following issue on:
HEAD commit:f8456690 Merge tag 'clk-fixes-for-linus' of git://git.kern..
git tree: upstream
console output: https://syzkaller.appspot.com/x/log.txt?x=1153950710
kernel config: https://syzkaller.appspot.com/x/.config?x=e944500a36bc4d55
das
Linux Kernel Mentee: Remove Legacy Power Management.
The purpose of this patch series is to upgrade power management in char
drivers. This has been done by upgrading .suspend() and .resume() callbacks.
The upgrade makes sure that the involvement of PCI Core does not change the
order of operations
Drivers using legacy PM have to manage PCI states and device's PM states
themselves. They also need to take care of configuration registers.
With improved and powerful support of generic PM, PCI Core takes care of
above mentioned, device-independent, jobs.
This driver makes use of PCI helper func
Drivers using legacy PM have to manage PCI states and device's PM states
themselves. They also need to take care of configuration registers.
With improved and powerful support of generic PM, PCI Core takes care of
above mentioned, device-independent, jobs.
This driver makes use of PCI helper func
We add mechanism to set custom IPI operations so that CLINT driver
from drivers directory can provide custom IPI operations.
Signed-off-by: Anup Patel
Tested-by: Emil Renner Berhing
---
arch/riscv/include/asm/clint.h | 25
arch/riscv/include/asm/smp.h | 19 +++
Right now the RISC-V timer driver is convoluted to support:
1. Linux RISC-V S-mode (with MMU) where it will use TIME CSR for
clocksource and SBI timer calls for clockevent device.
2. Linux RISC-V M-mode (without MMU) where it will use CLINT MMIO
counter register for clocksource and CLINT MMIO
The current RISC-V timer driver is convoluted and implements two
distinct timers:
1. S-mode timer: This is for Linux RISC-V S-mode with MMU. The
clocksource is implemented using TIME CSR and clockevent device
is implemented using SBI Timer calls.
2. M-mode timer: This is for Linux RISC-V
We add a separate CLINT timer driver for Linux RISC-V M-mode (i.e.
RISC-V NoMMU kernel).
The CLINT MMIO device provides three things:
1. 64bit free running counter register
2. 64bit per-CPU time compare registers
3. 32bit per-CPU inter-processor interrupt registers
Unlike other timer devices, CLI
Drivers using legacy PM have to manage PCI states and device's PM states
themselves. They also need to take care of configuration registers.
With improved and powerful support of generic PM, PCI Core takes care of
above mentioned, device-independent, jobs.
This driver makes use of PCI helper func
We add DT bindings documentation for CLINT device.
Signed-off-by: Anup Patel
Reviewed-by: Palmer Dabbelt
Tested-by: Emil Renner Berhing
---
.../bindings/timer/sifive,clint.yaml | 58 +++
1 file changed, 58 insertions(+)
create mode 100644 Documentation/devicetree/bind
On 16. 07. 20, 13:51, Jiri Slaby wrote:
> I am currently seeing:
> BUG: kernel NULL pointer dereference, address: 0002
> ...
> Hardware name: UMAX VisionBook 10Wi Pro/CQM1018CWP, BIOS CQ1018.007 09/22/2016
> RIP: 0010:gmin_subdev_add.cold+0x303/0x312 [atomisp_gmin_platform]
> ...
> Call
On 17/07/2020 09:35, Frank Lee wrote:
> On Fri, Jul 17, 2020 at 12:26 PM Daniel Lezcano
> wrote:
>>
>> On 14/07/2020 09:13, Frank Lee wrote:
>>> From: Yangtao Li
>>>
>>> For sun50i_h6_ths_calibrate(), the data read from nvmem needs a round of
>>> calculation. On the other hand, the newer SOC may
On 17/07/2020 08:36, Xiongfeng Wang wrote:
Hi,
I think "scsi: scsi_transport_sas: " would be a better subject prefix,
as this is not libsas code.
When I cat sysfs file 'enable' below 'sas_phy', it displays as follows.
It's better to add a newline for easy reading.
[root@localhost ~]# cat
/
On Fri, Jul 17, 2020 at 09:06:57AM +0200, Daniel Vetter wrote:
> On Fri, Jul 17, 2020 at 8:40 AM james qian wang (Arm Technology China)
> wrote:
> >
> > On Thu, Jul 16, 2020 at 05:03:33PM +0800, Qinglang Miao wrote:
> > > From: Liu Shixin
> > >
> > > Use DEFINE_SHOW_ATTRIBUTE macro to simplify th
在 2020/7/17 15:06, Daniel Vetter 写道:
On Fri, Jul 17, 2020 at 8:40 AM james qian wang (Arm Technology China)
wrote:
On Thu, Jul 16, 2020 at 05:03:33PM +0800, Qinglang Miao wrote:
From: Liu Shixin
Use DEFINE_SHOW_ATTRIBUTE macro to simplify the code.
Signed-off-by: Liu Shixin
---
drive
All the NULL checks are pointless, clk_*() routines already deal with
NULL just fine.
Signed-off-by: Zhang Changzhong
---
drivers/net/can/mscan/mscan.c | 28 ++--
1 file changed, 10 insertions(+), 18 deletions(-)
diff --git a/drivers/net/can/mscan/mscan.c b/drivers/net/c
On Thu, Jul 16, 2020 at 08:12:35AM -0700, Kees Cook wrote:
> On Thu, Jul 16, 2020 at 03:14:04PM +0200, Stefano Garzarella wrote:
> > On Wed, Jul 15, 2020 at 04:07:00PM -0700, Kees Cook wrote:
> > [...]
> >
> > > Speaking to Stefano's proposal[1]:
> > >
> > > - There appear to be three classes of
Hi Greg,
On 2020-07-16 12:58, Greg KH wrote:
On Wed, Jul 15, 2020 at 01:56:11PM +0100, Marc Zyngier wrote:
This is a backport of the series that recently went into 5.8. Note
that the first patch is more a complete rewriting than a backport, as
the vdso implementation in 5.4 doesn't have much in
On 7/17/20 8:23 AM, Christoph Hellwig wrote:
> Just check for a NULL method instead of wiring up
> sock_no_{get,set}sockopt.
>
> Signed-off-by: Christoph Hellwig
> ---
> net/can/bcm.c | 2 --
> net/core/sock.c | 14 --
For the CAN part:
Acked-by: Marc Klei
On 17/07/2020 08:13, Zhou Yanjie wrote:
> Hi Daniel,
>
> 在 2020/7/17 下午12:20, Daniel Lezcano 写道:
>> On 10/07/2020 19:02, 周琰杰 (Zhou Yanjie) wrote:
>>> X1000 and SoCs after X1000 (such as X1500 and X1830) had a separate
>>> OST, it no longer belongs to TCU. This driver will register both a
>>> clock
From: Michael Trimarchi
The current pin muxing scheme muxes GPIO_1 pad for USB_OTG_ID
because of which when card is inserted, usb otg is enumerated
and the card is never detected.
[ 64.492645] cfg80211: failed to load regulatory.db
[ 64.492657] imx-sdma 20ec000.sdma: external firmware not fo
The driver forgets to call clk_disable_unprepare() in error path after
a success calling for clk_prepare_enable().
Fix it by adding a clk_disable_unprepare() in error path.
Signed-off-by: Zhang Changzhong
---
drivers/net/can/ti_hecc.c | 8 +---
1 file changed, 5 insertions(+), 3 deletions(-
When I cat ASPM parameter 'policy' by sysfs, it displays as follows.
It's better to add a newline for easy reading.
[root@localhost ~]# cat /sys/module/pcie_aspm/parameters/policy
[default] performance powersave powersupersave [root@localhost ~]#
Signed-off-by: Xiongfeng Wang
---
drivers/pci/pc
ARM virtual counter supports event stream, it can only trigger an event
when the trigger bit (the value of CNTKCTL_EL1.EVNTI) of CNTVCT_EL0 changes,
so the actual period of event stream is 2^(cntkctl_evnti + 1). For example,
when the trigger bit is 0, then virtual counter trigger an event for every
fw_minibuffer[i].buffer is allocated by kmalloc in sh_css_load_blob_info
and by vmalloc in setup_binary. So use kvfree to decide which of those
allocators to use for freeing.
Also remove the useless cast.
Signed-off-by: Jiri Slaby
Cc: Mauro Carvalho Chehab
---
drivers/staging/media/atomisp/pci
On 17-07-20, 00:52, Alim Akhtar wrote:
> This patch documents Samsung UFS PHY device tree bindings
Applied both, thanks
--
~Vinod
On 7/17/20 6:06 AM, Andrew Morton wrote:
On Thu, 16 Jul 2020 16:32:00 +0800 kernel test robot wrote:
Greetings,
0day kernel testing robot got the below dmesg and the first bad commit is
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git master
commit db57e98d87908b8837352
On 7/17/20 9:29 AM, Joonsoo Kim wrote:
> 2020년 7월 16일 (목) 오후 4:45, Vlastimil Babka 님이 작성:
>>
>> On 7/16/20 9:27 AM, Joonsoo Kim wrote:
>> > 2020년 7월 15일 (수) 오후 5:24, Vlastimil Babka 님이 작성:
>> >> > /*
>> >> > * get_page_from_freelist goes through the zonelist trying to allocate
>> >> > * a page
Drivers using legacy PM have to manage PCI states and device's PM states
themselves. They also need to take care of configuration registers.
With improved and powerful support of generic PM, PCI Core takes care of
above mentioned, device-independent, jobs.
This driver has not defined .resume(), h
Linux Kernel Mentee: Remove Legacy Power Management.
The purpose of this patch series is to upgrade power management in block
drivers. This has been done by upgrading .suspend() and .resume() callbacks.
The upgrade makes sure that the involvement of PCI Core does not change the
order of operati
Drivers using legacy PM have to manage PCI states and device's PM states
themselves. They also need to take care of configuration registers.
With improved and powerful support of generic PM, PCI Core takes care of
above mentioned, device-independent, jobs.
This driver makes use of PCI helper func
Drivers using legacy PM have to manage PCI states and device's PM states
themselves. They also need to take care of configuration registers.
With improved and powerful support of generic PM, PCI Core takes care of
above mentioned, device-independent, jobs.
This driver makes use of PCI helper func
On 7/16/20 8:52 PM, Arnaldo Carvalho de Melo wrote:
> Em Thu, Jul 16, 2020 at 03:12:11PM +0530, Kajol Jain escreveu:
>> Patchset enhance current runtime parameter support. It introduces new
>> fields like "PerChip" and "PerCore" similar to the field "PerPkg" which is
>> used to specify perpkg ev
On Thu, Jul 16, 2020 at 03:20:53PM -0600, Jens Axboe wrote:
> On 7/16/20 2:51 PM, Jens Axboe wrote:
> > On 7/16/20 2:47 PM, Pavel Begunkov wrote:
> >> On 16/07/2020 23:42, Jens Axboe wrote:
> >>> On 7/16/20 2:16 PM, Pavel Begunkov wrote:
> On 16/07/2020 15:48, Stefano Garzarella wrote:
> >
On 15-07-20, 20:08, Serge Semin wrote:
> On Wed, Jul 15, 2020 at 04:43:15PM +0530, Vinod Koul wrote:
> > On 10-07-20, 19:14, Serge Semin wrote:
> > > On Fri, Jul 10, 2020 at 02:51:33PM +0300, Peter Ujfalusi wrote:
> >
> > > > Since we should be able to handle longer lists and this is kind of a
> >
On 7/17/20 10:10 AM, Vlastimil Babka wrote:
> On 7/17/20 9:29 AM, Joonsoo Kim wrote:
>> 2020년 7월 16일 (목) 오후 4:45, Vlastimil Babka 님이 작성:
>>>
>>> On 7/16/20 9:27 AM, Joonsoo Kim wrote:
>>> > 2020년 7월 15일 (수) 오후 5:24, Vlastimil Babka 님이 작성:
>>> >> > /*
>>> >> > * get_page_from_freelist goes throug
Hello Vinod,
> From: Vinod Koul, Sent: Friday, July 17, 2020 3:39 PM
>
> hello Yoshihiro,
>
> On 13-07-20, 21:11, Yoshihiro Shimoda wrote:
>
> Please consider revising patch subject. It tell me you are fixing an
> error but it doesnt tell me what this patch is about :)
>
> Perhpas :move irq re
Use kmemdup rather than duplicating its implementation.
Signed-off-by: YueHaibing
---
sound/usb/line6/podhd.c | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
diff --git a/sound/usb/line6/podhd.c b/sound/usb/line6/podhd.c
index 1557483ec657..eef45f7fef0d 100644
--- a/sound/usb/line6/pod
Hi!
> > - Why aren't the io_uring syscalls in the man-page git? (It seems like
> > they're in liburing, but that's should document the _library_ not the
> > syscalls, yes?)
>
> I imagine because using the syscall requires specific memory barriers
> which we probably don't want most C programs
Hi Laurentiu,
Am Donnerstag, den 09.07.2020, 19:47 +0300 schrieb Laurentiu Palcu:
> From: Laurentiu Palcu
>
> Hi,
>
> This patchset adds initial DCSS support for iMX8MQ chip. Initial support
> includes only graphics plane support (no video planes), no HDR10 capabilities,
> no graphics decompres
On Wed, 2020-07-15 at 14:51 -0600, Rob Herring wrote:
> On Thu, Jul 02, 2020 at 05:37:17PM +0800, Miles Chen wrote:
> > Add a description for mediatek,infracfg. We can check if 4GB mode
> > is enable by reading it instead of checking the unexported
> > symbol "max_pfn".
> >
> > This is a step towa
The driver forgets to call clk_disable_unprepare() in error path after
a success calling for clk_prepare_enable().
Fix to goto err_clk_disable if clk_prepare_enable() is successful.
Signed-off-by: Zhang Changzhong
---
drivers/net/ethernet/broadcom/genet/bcmgenet.c | 6 +++---
1 file changed, 3
axg_card_add_tdm_loopback() misses to call kfree() in an error path. We
can use devm_kasprintf() to fix the issue, also improve maintainability.
So use it instead.
Fixes: c84836d7f650 ("ASoC: meson: axg-card: use modern dai_link style")
Signed-off-by: Jing Xiangfeng
---
sound/soc/meson/axg-card.
Hi Dmitry:
In this "static int elan_i2c_prepare_fw_update(struct i2c_client *client,
u16 ic_type, u8 iap_version)" function
If IC is old_pattern, it must be modified to iap_version
-> u16 type = pattern >= 0x01 ? ic_type : iap_version;
Thanks
-Original Message-
From: Dmitry Torok
On Fri, Jul 17, 2020 at 11:33:46AM +0800, Jin, Yao wrote:
> Hi,
>
> On 7/6/2020 8:55 AM, Jin, Yao wrote:
> > Hi Ian,
> >
> > On 7/6/2020 8:47 AM, Ian Rogers wrote:
> > > On Fri, Jul 3, 2020 at 5:31 PM Jin, Yao wrote:
> > > >
> > > > Hi Jiri,
> > > >
> > > > On 7/3/2020 7:00 PM, Jiri Olsa wrote
On Wed, 2020-07-15 at 23:05 +0200, Matthias Brugger wrote:
>
> On 02/07/2020 11:37, Miles Chen wrote:
> > In previous disscusion [1] and [2], we found that it is risky to
> > use max_pfn or totalram_pages to tell if 4GB mode is enabled.
> >
> > Check 4GB mode by reading infracfg register, remove
On Fri 17-07-20 16:46:38, Joonsoo Kim wrote:
> 2020년 7월 15일 (수) 오후 5:24, Michal Hocko 님이 작성:
> >
> > On Wed 15-07-20 14:05:27, Joonsoo Kim wrote:
> > > From: Joonsoo Kim
> > >
> > > We have well defined scope API to exclude CMA region.
> > > Use it rather than manipulating gfp_mask manually. With
Hi John,
On 2020/7/17 15:54, John Garry wrote:
> On 17/07/2020 08:36, Xiongfeng Wang wrote:
>
> Hi,
>
> I think "scsi: scsi_transport_sas: " would be a better subject prefix, as this
> is not libsas code.
>
>> When I cat sysfs file 'enable' below 'sas_phy', it displays as follows.
>> It's bette
On 7/17/2020 4:24 PM, Jiri Olsa wrote:
On Fri, Jul 17, 2020 at 11:33:46AM +0800, Jin, Yao wrote:
Hi,
On 7/6/2020 8:55 AM, Jin, Yao wrote:
Hi Ian,
On 7/6/2020 8:47 AM, Ian Rogers wrote:
On Fri, Jul 3, 2020 at 5:31 PM Jin, Yao wrote:
Hi Jiri,
On 7/3/2020 7:00 PM, Jiri Olsa wrote:
On Fr
On Fri, Jul 17, 2020 at 12:20:43AM -0700, ira.we...@intel.com wrote:
> diff --git a/arch/x86/kernel/process.c b/arch/x86/kernel/process.c
> index f362ce0d5ac0..d69250a7c1bf 100644
> --- a/arch/x86/kernel/process.c
> +++ b/arch/x86/kernel/process.c
> @@ -42,6 +42,7 @@
> #include
> #include
> #
Hi Dmitry:
1.
In this function elan_get_fwinfo().
+static int elan_get_fwinfo(u16 ic_type, u8 iap_version, u8 pattern,
+ u16 *validpage_count, u32 *signature_address,
+ u16 *page_size)
{
- switch (ic_type) {
+ u16 type = pattern >=
From: js1...@gmail.com
> Sent: 15 July 2020 06:05
> From: Joonsoo Kim
>
> Currently, preventing cma area in page allocation is implemented by using
> current_gfp_context(). However, there are two problems of this
> implementation.
...
> diff --git a/mm/page_alloc.c b/mm/page_alloc.c
> index 6416d
On Thu, Jul 16, 2020 at 11:18:57PM +0800, Zhang Rui wrote:
> This fixes a problem introduced by
> commit 5fb5273a905c ("perf/x86/rapl: Use new MSR detection interface")
> that perf event sysfs attributes for psys RAPL domain are missing.
>
> Fixes: 5fb5273a905c ("perf/x86/rapl: Use new MSR detecti
improve the error message when functions return failure and dump
relevant registers in some exception handling processes
Signed-off-by: Luo bin
---
V0~V1: fix some warning reported by sparse
.../ethernet/huawei/hinic/hinic_hw_api_cmd.c | 27 +++-
.../ethernet/huawei/hinic/hinic_hw_api_cmd.
Hi!
> +On the triviality of replacing words
> +
> +
> +The African slave trade was a brutal system of human misery deployed at
> +global scale. Some word choice decisions in a modern software project
> +does next to nothing to compensate for that legacy. So why
On Fri, Jul 17, 2020 at 03:58:01PM +1000, Daniel Axtens wrote:
> Michal Suchánek writes:
>
> > On Wed, Jul 15, 2020 at 07:52:01AM -0400, Nayna Jain wrote:
> >> The device-tree property to check secure and trusted boot state is
> >> different for guests(pseries) compared to baremetal(powernv).
> >
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