From: Sharat Masetty
Update documentation to list the gpu opp table bindings including the
newly added "opp-peak-kBps" needed for GPU-DDR bandwidth scaling.
Signed-off-by: Sharat Masetty
Acked-by: Rob Herring
Signed-off-by: Akhil P Oommen
---
.../devicetree/bindings/display/msm/gpu.txt
From: Sharat Masetty
Add opp-peak-kBps bindings to the GPU opp table, listing the peak
GPU -> DDR bandwidth requirement for each opp level. This will be
used to scale the DDR bandwidth along with the GPU frequency dynamically.
Signed-off-by: Sharat Masetty
Reviewed-by: Matthias Kaehlcke
Signed
three parts: core, I涎, SPI
> date: 3 months ago
> config: i386-randconfig-c001-20200709 (attached as .config)
> compiler: gcc-9 (Debian 9.3.0-14) 9.3.0
>
> If you fix the issue, kindly add following tag as appropriate
> Reported-by: kernel test robot
>128
On Wed, Jul 8, 2020 at 12:36 PM Nick Desaulniers
wrote:
>
> On Mon, Jun 1, 2020 at 2:00 PM Nick Desaulniers
> wrote:
> >
> > On Sat, May 30, 2020 at 3:11 PM Brian Gerst wrote:
> > >
> > > The core percpu operations already have a switch on the width of the
> > > data type, which resulted in an
Hi,
On Thu, Jul 9, 2020 at 2:18 AM Rakesh Pillai wrote:
>
> The wlan firmware memory is statically mapped in
> the Trusted Firmware, hence the wlan driver does
> not need to map/unmap this region dynamically.
>
> Hence add the property to indicate the wlan driver
> to not map/unamp the firmware m
Fix warning for:
drivers/cpufreq/intel_pstate.c:731 store_energy_performance_preference()
error: uninitialized symbol 'epp'.
This warning is for a case, when energy_performance_preference attribute
matches pre defined strings. In this case the value of raw epp will not
be used to set EPP bits in M
On 7/9/20 4:00 PM, Akhil P Oommen wrote:
Newer targets support changing gpu frequency through HFI. So
use that wherever supported instead of the legacy method.
It was already using HFI on newer targets. Don't break it in one commit
then fix it in the next.
Signed-off-by: Akhil P Oommen
--
From: Colin King
Date: Wed, 8 Jul 2020 19:37:23 +0100
> From: Colin Ian King
>
> Currently the u16 skb->vlan_tci is being right shifted twice by
> VLAN_PRIO_SHIFT, once in the macro skb_vlan_tag_get_pri and explicitly
> by VLAN_PRIO_SHIFT afterwards. The combined shift amount is larger than
>
On Tue, 16 Jun 2020 00:45:47 PDT (-0700), zong...@sifive.com wrote:
Implement the 'devmem_is_allowed()' interface for RISC-V, like some of
other architectures have done. It will be called from range_is_allowed()
when userpsace attempts to access /dev/mem.
In fact, it's exactly the same (down to
From: Palmer Dabbelt
Aside from being inlineable, this is exactly the same as the arm64
version, which I recently copied into lib/ for use by the RISC-V port.
[I haven't even build tested this. The lib/ patch is on riscv/for-next,
which I'm targeting for 5.9, so this won't work alone. See the
From: Palmer Dabbelt
As part of adding support for STRICT_DEVMEM to the RISC-V port, Zong
provided a devmem_is_allowed() implementation that's exactly the same as
all the others I checked. Instead I'm adding a generic version, which
will soon be used.
Signed-off-by: Palmer Dabbelt
---
include
As part of adding STRICT_DEVMEM support to the RISC-V port, Zong provided an
implementation of devmem_is_allowed() that's exactly the same as the version in
a handful of other ports. Rather than duplicate code, I've put a generic
version of this in lib/ and used it for the RISC-V port.
I've put t
From: Palmer Dabbelt
This allows us to enable STRICT_DEVMEM.
Signed-off-by: Palmer Dabbelt
---
arch/riscv/Kconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
index 089293e4ad46..8ff368a65a07 100644
--- a/arch/riscv/Kconfig
+++ b/arch/riscv/Kconfi
From: Palmer Dabbelt
This is exactly the same as the arm64 version, which I recently copied
into lib/ for use by the RISC-V port.
[I haven't even build tested this. The lib/ patch is on riscv/for-next,
which I'm targeting for 5.9, so this won't work alone. See the cover
letter for more details
From: Palmer Dabbelt
I recently copied this into lib/ for use by the RISC-V port.
[I haven't even build tested this. The lib/ patch is on riscv/for-next,
which I'm targeting for 5.9, so this won't work alone. See the cover
letter for more details.]
Signed-off-by: Palmer Dabbelt
---
arch/arm
Rationale:
Reduces attack surface on kernel devs opening the links for MITM
as HTTPS traffic is much harder to manipulate.
Deterministic algorithm:
For each file:
If not .svg:
For each line:
If doesn't contain `\bxmlns\b`:
For each link, `\bhttp://[^# \t\r\n]*(?:\w|/)`:
On Thu, Jul 09, 2020 at 11:43:18AM -0700, Chris Healy wrote:
> Add deb_dbg print statements in both serdes_read and serdes_write
> functions.
Hi Chris
Why is SERDES access special? Why not all accesses? global1, global2,
global3, port, etc.
As David said, tracepoints are better for this. Take a
From: kernel test robot
Date: Fri, 10 Jul 2020 00:06:18 +0800
> From: kernel test robot
>
> drivers/net/phy/mscc/mscc_ptp.c:1496:1-3: WARNING: PTR_ERR_OR_ZERO can be used
>
>
> Use PTR_ERR_OR_ZERO rather than if(IS_ERR(...)) + PTR_ERR
>
> Generated by: scripts/coccinelle/api/ptr_ret.cocci
>
IBM created an implementation of the PCA9552 on a PIC16F
microcontroller. The I2C device addresses are different from the
hardware PCA9552, so add a new compatible string and associated
platform data to be able to probe this device, and document the new
string.
Eddie James (2):
dt-bindings: leds
IBM created an implementation of the PCA9552 on a PIC16F
microcontroller. Document the new compatible string for this device.
Signed-off-by: Eddie James
---
Documentation/devicetree/bindings/leds/leds-pca955x.txt | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindin
IBM created an implementation of the PCA9552 on a PIC16F
microcontroller. The I2C device addresses are different from the
hardware PCA9552, so add a new compatible string and associated
platform data to be able to probe this device.
Signed-off-by: Eddie James
Reviewed-by: Vishwanatha Subbanna
--
On Tue, Jul 07, 2020 at 10:00:16PM -0700, Krishna Reddy wrote:
> Add binding for NVIDIA's Tegra194 SoC SMMU.
>
> Signed-off-by: Krishna Reddy
> ---
> .../devicetree/bindings/iommu/arm,smmu.yaml| 18 ++
> 1 file changed, 18 insertions(+)
>
> diff --git a/Documentation/devicet
On Wed, 01 Jul 2020 15:03:26 +0200, Oleksij Rempel wrote:
> Add Protonic PRTI6Q, WD2, RVT, VT7 boards.
>
> Signed-off-by: Oleksij Rempel
> ---
> Documentation/devicetree/bindings/arm/fsl.yaml | 4
> 1 file changed, 4 insertions(+)
>
Reviewed-by: Rob Herring
On 2020-07-09 10:42, Zi Yan wrote:
...
diff --git a/Documentation/vm/page_migration.rst
b/Documentation/vm/page_migration.rst
index e65d49f3cf86..68883ac485fa 100644
--- a/Documentation/vm/page_migration.rst
+++ b/Documentation/vm/page_migration.rst
@@ -253,24 +253,32 @@ which are function point
The pull request you sent on Wed, 8 Jul 2020 16:16:39 -0700:
> https://git.kernel.org/pub/scm/linux/kernel/git/kees/linux.git
> tags/kallsyms_show_value-v5.8-rc5
has been merged into torvalds/linux.git:
https://git.kernel.org/torvalds/c/ce69fb3b392fbfd6c255aeb0ee371652478c716f
Thank you!
--
D
On Tue, Jun 30, 2020 at 11:45:01AM -0700, Tanmay Shah wrote:
> These patches add Display-Port driver on SnapDragon/msm hardware.
> This series also contains device-tree bindings for msm DP driver.
> It also contains Makefile and Kconfig changes to compile msm DP driver.
>
> The block diagram of DP
On Thu, Jul 09, 2020 at 09:48:01PM +0200, Frank Wunderlich wrote:
> > Gesendet: Donnerstag, 09. Juli 2020 um 15:41 Uhr
> > Von: "Andrew Lunn"
>
> > > + eth->netdev[id]->max_mtu = 1536;
> >
> > I assume this is enough to make the DSA warning go away, but it is the
> > true max? I have a similar pa
On Thu, 09 Jul 2020 17:21:59 +0200, Artur Rojek wrote:
> Introduce support for touchscreen channels found in JZ47xx SoCs.
>
> Signed-off-by: Artur Rojek
> Tested-by: Paul Cercueil
> ---
>
> Changes:
>
> v2-v7: no change
>
> v8: add XN/YN and XD/YD channels
>
> include/dt-bindings/iio/adc
There were two problems affecting clock speeds to the eMMC chip. Firstly, the
AST2600 clock was not muxed correctly to be derived from the MPLL. Secondly,
the SDHCI clock control divider was not calculated correctly. This series
addresses these problems.
Eddie James (2):
clk: AST2600: Add mux fo
On Mon, 15 Jun 2020 22:53:27 +0200, Ansuel Smith wrote:
> Document dwc3 qcom phy hs and ss phy bindings needed to correctly
> inizialize and use usb on ipq806x SoC.
>
> Signed-off-by: Ansuel Smith
> ---
> v7:
> * Drop useless AllOf
> v6:
> * Add maximum value
> v5:
> * Fix dt_binding_check error
On Wed, 17 Jun 2020 12:50:34 +0200, Álvaro Fernández Rojas wrote:
> Add device tree binding documentation for BCM6345 reset controller.
>
> Signed-off-by: Álvaro Fernández Rojas
> Reviewed-by: Florian Fainelli
> ---
> v7: no changes
> v6: no changes
> v5: no changes
> v4: change license and
On Wed, 17 Jun 2020 12:50:37 +0200, Álvaro Fernández Rojas wrote:
> BCM6358 SoCs have a reset controller for certain components.
>
> Signed-off-by: Álvaro Fernández Rojas
> Acked-by: Florian Fainelli
> ---
> v7: no changes.
> v6: no changes.
> v5: no changes.
> v4: no changes.
> v3: add res
On Wed, 17 Jun 2020 12:50:36 +0200, Álvaro Fernández Rojas wrote:
> BCM6328 SoCs have a reset controller for certain components.
>
> Signed-off-by: Álvaro Fernández Rojas
> Acked-by: Florian Fainelli
> ---
> v7: no changes.
> v6: no changes.
> v5: no changes.
> v4: no changes.
> v3: add res
On Wed, 17 Jun 2020 12:50:39 +0200, Álvaro Fernández Rojas wrote:
> BCM6368 SoCs have a reset controller for certain components.
>
> Signed-off-by: Álvaro Fernández Rojas
> Acked-by: Florian Fainelli
> ---
> v7: no changes.
> v6: no changes.
> v5: no changes.
> v4: no changes.
> v3: add res
On Wed, 17 Jun 2020 12:50:40 +0200, Álvaro Fernández Rojas wrote:
> BCM63268 SoCs have a reset controller for certain components.
>
> Signed-off-by: Álvaro Fernández Rojas
> Acked-by: Florian Fainelli
> ---
> v7: no changes.
> v6: no changes.
> v5: no changes.
> v4: no changes.
> v3: add ne
On Wed, 17 Jun 2020 12:50:38 +0200, Álvaro Fernández Rojas wrote:
> BCM6362 SoCs have a reset controller for certain components.
>
> Signed-off-by: Álvaro Fernández Rojas
> Acked-by: Florian Fainelli
> ---
> v7: no changes.
> v6: no changes.
> v5: no changes.
> v4: no changes.
> v3: add res
On Wed, 17 Jun 2020 12:50:41 +0200, Álvaro Fernández Rojas wrote:
> BCM6318 SoCs have a reset controller for certain components.
>
> Signed-off-by: Álvaro Fernández Rojas
> Acked-by: Florian Fainelli
> ---
> v7: no changes.
> v6: fix BCM6318_RST_HOSTMIPS value (12 vs 11).
> v5: no changes.
>
Rationale:
Reduces attack surface on kernel devs opening the links for MITM
as HTTPS traffic is much harder to manipulate.
Deterministic algorithm:
For each file:
If not .svg:
For each line:
If doesn't contain `\bxmlns\b`:
For each link, `\bhttp://[^# \t\r\n]*(?:\w|/)`:
On Wed, 17 Jun 2020 13:20:18 -0500, Dan Murphy wrote:
> Add a dt binding for the TI dp83822 ethernet phy device.
>
> Signed-off-by: Dan Murphy
> ---
> .../devicetree/bindings/net/ti,dp83822.yaml | 51 +++
> 1 file changed, 51 insertions(+)
> create mode 100644 Documentation/de
On Thu, Jul 09, 2020 at 03:41:15PM +0200, Andrew Lunn wrote:
> On Thu, Jul 09, 2020 at 07:57:42AM +0200, Frank Wunderlich wrote:
> > From: René van Dorst
> >
> > in recent Kernel-Versions there are warnings about incorrect MTU-Size
> > like these:
> >
> > mt7530 mdio-bus:00: nonfatal error -95 s
This patch series moves the coredump functionality to a separate
file and adds "inline" coredump feature. Inline coredump directly
copies segments from device memory during coredump to userspace.
This avoids extra memory usage at the cost of speed. Recovery is
stalled until all data is read by user
From: Sibi Sankar
In order to land inline coredump support for mss, the dump_segment
function would need to support granularities less than the segment
size. This is achieved by replacing mask based tracking with size.
Signed-off-by: Sibi Sankar
Signed-off-by: Rishabh Bhatnagar
---
drivers/re
Add coredump debugfs entry to configure the type of dump that will
be collected during recovery. User can select between default or
inline coredump functionality. Also coredump collection can be
disabled through this interface.
This functionality can be configured differently for different
remote p
The current coredump implementation uses vmalloc area to copy
all the segments. But this might put strain on low memory targets
as the firmware size sometimes is in tens of MBs. The situation
becomes worse if there are multiple remote processors undergoing
recovery at the same time. This patch adds
Move all coredump functionality to an individual file. This is
being done so that the current functionality can be extended
in future patchsets.
Signed-off-by: Rishabh Bhatnagar
Reviewed-by: Bjorn Andersson
Reviewed-by: Mathieu Poirier
Reviewed-by: Sibi Sankar
Tested-by: Sibi Sankar
---
driv
Adding an msm_gem_object object to the inactive_list before completing
its initialization is a bad idea because shrinker may pick it up from the
inactive_list. Fix this by making sure that the initialization is complete
before moving the msm_obj object to the inactive list.
This patch fixes the be
On Wed, Jul 01, 2020 at 03:01:27PM +0200, Benjamin Gaignard wrote:
> Document st,stm32-dcmi-min-frequency property which is used to
> request CPUs minimum frequency when streaming frames.
>
> Signed-off-by: Benjamin Gaignard
> ---
> Documentation/devicetree/bindings/media/st,stm32-dcmi.yaml | 8
On 7/9/20 9:42 PM, Alexander A. Klimov wrote:
Rationale:
Documentation/arm/ixp4xx.rst contains "xdp" as part of "ixdp465"
which has nothing to do with XDP.
Signed-off-by: Alexander A. Klimov
---
See also: https://lore.kernel.org/lkml/20200709132607.7fb42415@carbon/
MAINTAINERS | 4 ++--
1
Am 9. Juli 2020 22:31:34 MESZ schrieb Russell King - ARM Linux admin
:
>Are there any plans to solve these warnings for Marvell 88e6xxx DSA
>ports?
Maybe it's a better idea to restore previous condition?
if (ret && ret != -EOPNOTSUPP)
Or use another loglevel (dev_dbg)
regards Frank
The EMMC clock can be derived from either the HPLL or the MPLL. Register
a clock mux so that the rate is calculated correctly based upon the
parent.
Signed-off-by: Eddie James
Reviewed-by: Andrew Jeffery
---
drivers/clk/clk-ast2600.c | 49 ---
1 file changed,
When calculating the clock divider, start dividing at 2 instead of 1.
The divider is divided by two at the end of the calculation, so starting
at 1 may result in a divider of 0, which shouldn't happen.
Signed-off-by: Eddie James
---
drivers/mmc/host/sdhci-of-aspeed.c | 2 +-
1 file changed, 1 in
On Sat, 04 Jul 2020 14:54:39 +0530, Vinay Simha BN wrote:
> - converted from .txt to .yaml
> - dual-link lvds port added and implemented
> - dsi data-lanes property removed, it will be picked
> from dsi0 ports
> - VESA/JEIDA formats picked from panel-lvds dts
> - proper indentation
> - single-lin
On Thu, Jul 09, 2020 at 11:11:30AM -0700, Kees Cook wrote:
> The security contact list gets regular reports contained in archive
> attachments. This tends to add some back-and-forth delay in dealing with
> security reports since we have to ask for plain text, etc.
>
> Signed-off-by: Kees Cook
> -
> Are there any plans to solve these warnings for Marvell 88e6xxx DSA ports?
Hi Russell
I have patches for FEC + mv88e6xxx. I should post them.
Andrew
On Mon, 06 Jul 2020 01:15:42 PDT (-0700), sch...@suse.de wrote:
On Jul 03 2020, Yash Shah wrote:
Yes, you are right. The userspace governor is the only one supported.
That doesn't make sense to me. How is the userspace governor different
from any other governor?
It's not.
The issue here i
Rationale:
Reduces attack surface on kernel devs opening the links for MITM
as HTTPS traffic is much harder to manipulate.
Deterministic algorithm:
For each file:
If not .svg:
For each line:
If doesn't contain `\bxmlns\b`:
For each link, `\bhttp://[^# \t\r\n]*(?:\w|/)`:
Hi Palmer,
On Thu, Jul 09, 2020 at 01:05:48PM -0700, Palmer Dabbelt wrote:
> From: Palmer Dabbelt
>
> As part of adding support for STRICT_DEVMEM to the RISC-V port, Zong
> provided a devmem_is_allowed() implementation that's exactly the same as
> all the others I checked. Instead I'm adding a
On Thu, 02 Jul 2020 08:09:33 +0800, Wan Ahmad Zainie wrote:
> Binding description for Intel Keem Bay eMMC PHY.
>
> Signed-off-by: Wan Ahmad Zainie
> ---
> .../bindings/phy/intel,keembay-emmc-phy.yaml | 44 +++
> 1 file changed, 44 insertions(+)
> create mode 100644
> Documenta
On Thu, Jul 9, 2020 at 11:16 PM Eddie James wrote:
>
> IBM created an implementation of the PCA9552 on a PIC16F
> microcontroller. The I2C device addresses are different from the
> hardware PCA9552, so add a new compatible string and associated
> platform data to be able to probe this device.
Thi
Hi Nick,
On Thu, Jul 9, 2020 at 8:42 PM Nick Desaulniers wrote:
>
> Hello folks,
> I'm working on putting together an LLVM "Micro Conference" for the
> upcoming Linux Plumbers Conf
> (https://www.linuxplumbersconf.org/event/7/page/47-attend). It's not
> solidified yet, but I would really like to
Hi Tom,
On 7/9/20 3:01 PM, Tom Rix wrote:
Mostly fine, see inline question.
On 7/7/20 9:14 AM, richard.g...@linux.intel.com wrote:
From: Richard Gong
When CTRL+C occurs during the process of FPGA reconfiguration, the FPGA
reconfiguration process stops and the user can't perform a new FPGA
re
On Thu, 09 Jul 2020 13:49:21 PDT (-0700), r...@linux.ibm.com wrote:
Hi Palmer,
On Thu, Jul 09, 2020 at 01:05:48PM -0700, Palmer Dabbelt wrote:
From: Palmer Dabbelt
As part of adding support for STRICT_DEVMEM to the RISC-V port, Zong
provided a devmem_is_allowed() implementation that's exactly
>>> + mempool_destroy(virtscsi_cmd_pool);
>>> + virtscsi_cmd_pool = NULL;
>>> + kmem_cache_destroy(virtscsi_cmd_cache);
>>> + virtscsi_cmd_cache = NULL;
>>> return ret;
>>> }
>>
>> How do you think about to add a jump target so that the execution
>> of a few statements can be avoided a
On Thu, 9 Jul 2020 at 08:30, Alexander A. Klimov
wrote:
> Rationale:
> Reduces attack surface on kernel devs opening the links for MITM
> as HTTPS traffic is much harder to manipulate.
>
> Deterministic algorithm:
> For each file:
> If not .svg:
> For each line:
> If doesn't contain `\
This is the call for proposals for the Kernel Dependability & Assurance
Micro Conference at the Linux Plumbers Conference 2020. It will take
place online during the Linux Plumbers Conference on August 24th-28th,
2020.
The Kernel Dependability & Assurance Micro Conference is intended to
bring the
On Thu, Jul 02, 2020 at 03:06:01PM +0800, EastL Lee wrote:
> Document the devicetree bindings for MediaTek Command-Queue DMA controller
> which could be found on MT6779 SoC or other similar Mediatek SoCs.
>
> Signed-off-by: EastL Lee
> ---
> .../devicetree/bindings/dma/mtk-cqdma.yaml | 1
> -Original Message-
> From: iommu On Behalf Of Koba Ko
> Sent: Sunday, June 14, 2020 10:47 PM
> To: David Woodhouse; Lu Baolu; Joerg Roedel
> Cc: io...@lists.linux-foundation.org; Kai Heng Feng; Linux Kernel Mailing
> List
> Subject: [Issue]platform/x86: iommu: System can't shutdown becau
Hi Rafael,
As you may or may not recall, I am attempting to untangle
and separate multiple compounding issues around the
intel_pstate driver and HWP (or not).
Until everything is figured out, I am using the following rules:
. never use x86_energy_perf_policy.
. For HWP disabled: never change fro
On Thu, Jul 02, 2020 at 06:37:19PM +0200, Sylwester Nawrocki wrote:
> Add documentation for new optional properties in the exynos bus nodes:
> samsung,interconnect-parent, #interconnect-cells, bus-width.
> These properties allow to specify the SoC interconnect structure which
> then allows the inte
On Thu, Jul 09, 2020 at 03:28:28PM +0800, Yi Wang wrote:
> From: Liao Pingfang
>
> Use kzalloc instead of kmalloc in the comment/message according to
> the previous kzalloc() call.
>
> Signed-off-by: Liao Pingfang
> Signed-off-by: Yi Wang
I applied the setup-bus.c change to pci/misc for v5.9,
Rationale:
Reduces attack surface on kernel devs opening the links for MITM
as HTTPS traffic is much harder to manipulate.
Deterministic algorithm:
For each file:
If not .svg:
For each line:
If doesn't contain `\bxmlns\b`:
For each link, `\bhttp://[^# \t\r\n]*(?:\w|/)`:
On Thu, Jul 09, 2020 at 12:24:40PM -0700, Sean Christopherson wrote:
> On Thu, Jul 09, 2020 at 02:22:20PM -0400, Peter Xu wrote:
> > On Tue, Jun 30, 2020 at 08:47:26AM -0700, Sean Christopherson wrote:
> > > On Sat, Jun 27, 2020 at 04:24:34PM +0200, Paolo Bonzini wrote:
> > > > On 26/06/20 20:18, S
On Wed, Jul 08, 2020 at 06:08:24PM +0200, Paolo Bonzini wrote:
> On 03/07/20 04:50, Sean Christopherson wrote:
> > Introduce a new capability, KVM_CAP_MEMSLOT_ZAP_CONTROL, to allow
> > userspace to control the memslot zapping behavior on a per-VM basis.
> > x86's default behavior is to zap all SPTE
On Thu, Jul 09, 2020 at 10:00:42PM +0200, Jann Horn wrote:
> On Thu, Jul 9, 2020 at 8:26 PM Kees Cook wrote:
> > The sock counting (sock_update_netprioidx() and sock_update_classid())
> > was missing from pidfd's implementation of received fd installation. Add
> > a call to the new __receive_sock(
As part of adding STRICT_DEVMEM support to the RISC-V port, Zong provided an
implementation of devmem_is_allowed() that's exactly the same as the version in
a handful of other ports. Rather than duplicate code, I've put a generic
version of this in lib/ and used it for the RISC-V port.
I've put t
From: Palmer Dabbelt
This allows us to enable STRICT_DEVMEM.
Signed-off-by: Palmer Dabbelt
---
arch/riscv/Kconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
index 089293e4ad46..8ff368a65a07 100644
--- a/arch/riscv/Kconfig
+++ b/arch/riscv/Kconfi
From: Palmer Dabbelt
As part of adding support for STRICT_DEVMEM to the RISC-V port, Zong
provided a devmem_is_allowed() implementation that's exactly the same as
all the others I checked. Instead I'm adding a generic version, which
will soon be used.
Signed-off-by: Palmer Dabbelt
---
include
From: Palmer Dabbelt
Aside from being inlineable, this is exactly the same as the arm64
version, which I recently copied into lib/ for use by the RISC-V port.
[I haven't even build tested this. The lib/ patch is on riscv/for-next,
which I'm targeting for 5.9, so this won't work alone. See the
From: Palmer Dabbelt
This is exactly the same as the arm64 version, which I recently copied
into lib/ for use by the RISC-V port.
[I haven't even build tested this. The lib/ patch is on riscv/for-next,
which I'm targeting for 5.9, so this won't work alone. See the cover
letter for more details
From: Palmer Dabbelt
I recently copied this into lib/ for use by the RISC-V port.
[I haven't even build tested this. The lib/ patch is on riscv/for-next,
which I'm targeting for 5.9, so this won't work alone. See the cover
letter for more details.]
Signed-off-by: Palmer Dabbelt
---
arch/arm
From: Veera Vegivada
Currently driver is suppressing the negative temperature
readings from the vadc. Consumers of the thermal zones need
to read the negative temperature too. Don't suppress the
readings.
Signed-off-by: Veera Vegivada
Signed-off-by: Guru Das Srinagesh
---
drivers/thermal/qcom
From: David Collins
Add support for TEMP_ALARM GEN2 PMIC peripherals with digital
major revision 1. This revision utilizes a different temperature
threshold mapping than earlier revisions.
Signed-off-by: David Collins
Signed-off-by: Guru Das Srinagesh
---
drivers/thermal/qcom/qcom-spmi-temp-
On 7/9/20 10:42 AM, Zi Yan wrote:
>
> I agree. The patch does not apply to mmotm. Can you try the incremental
> patch below? It should apply to mmotm.
>
>
> Hi Andrew and Anshuman,
>
> Should Anshuman resend the incremental patch or Andrew can fold it along
> with the two patches in mmotm into
On Thu, Jul 09, 2020 at 05:09:19PM -0400, Peter Xu wrote:
> Again, using host_initiated or not should be a different issue? Frankly
> speaking, I don't know whether it's an issue or not, but it's different from
> what this series wants to do, because it'll be the same before/after this
> series. A
On Wed, Jul 8, 2020 at 2:37 PM Will Chen wrote:
>
> Direct stderr to subprocess.STDOUT so error messages get included in the
> subprocess.CalledProcessError exceptions output field. This results in
> more meaningful error messages for the user.
>
> This is already being done in the make_allyesconf
Rationale:
Reduces attack surface on kernel devs opening the links for MITM
as HTTPS traffic is much harder to manipulate.
Deterministic algorithm:
For each file:
If not .svg:
For each line:
If doesn't contain `\bxmlns\b`:
For each link, `\bhttp://[^# \t\r\n]*(?:\w|/)`:
The constants are taken from the USXGMII Singleport Copper Interface
specification. The naming are based on the SGMII ones, but with an MDIO_
prefix.
Signed-off-by: Michael Walle
---
include/uapi/linux/mdio.h | 26 ++
1 file changed, 26 insertions(+)
diff --git a/include
Now that there are USXGMII constants available, drop the old definitions
and reuse the generic ones.
Signed-off-by: Michael Walle
---
drivers/net/dsa/ocelot/felix_vsc9959.c | 45 +++---
1 file changed, 12 insertions(+), 33 deletions(-)
diff --git a/drivers/net/dsa/ocelot/fel
This is a resend [now a new v6] of the series because the conversion to the
phylink interface will likely take longer:
https://lore.kernel.org/netdev/CA+h21hpBodyY8CtNH2ktRdc2FqPi=Fjp94=vvzvzsvbnvnf...@mail.gmail.com/
Also the discussion in the v3 resend doesn't look like it will be resolved
soon :
ENETC has ethernet MACs capable of SGMII, 2500BaseX and USXGMII. But in
order to use these protocols some SerDes configurations need to be
performed. The SerDes is configurable via an internal PCS PHY which is
connected to an internal MDIO bus at address 0.
This patch basically removes the depende
The 07/09/2020 15:26, Nikolay Aleksandrov wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you know the
> content is safe
>
> On 09/07/2020 13:00, Horatiu Vultur wrote:
> > Thie patch adds support for MRP Interconnect. Similar with the MRP ring,
> > if the HW can't generate
An early preview release Git v2.28.0-rc0 is now available for
testing at the usual places. It is comprised of 284 non-merge
commits since v2.27.0, contributed by 42 people, 9 of which are
new faces.
The tarballs are found at:
https://www.kernel.org/pub/software/scm/git/testing/
The followin
On Fri, 3 Jul 2020 15:44:27 +0100
Alan Maguire wrote:
> The bpf helper bpf_trace_printk() uses trace_printk() under the hood.
> This leads to an alarming warning message originating from trace
> buffer allocation which occurs the first time a program using
> bpf_trace_printk() is loaded.
>
> We
On 7/9/20 1:51 PM, Lorenz Bauer wrote:
Fix sockmap tests which rely on old bpf_prog_dispatch behaviour.
In the first case, the tests check that detaching without giving
a program succeeds. Since these are not the desired semantics,
invert the condition. In the second case, the clean up code doesn
From: Alex Marginean
Use DT information rather than in-band information from bootloader to
set up MAC for XGMII. For RGMII use the DT indication in addition to
RGMII defaults in hardware.
However, this implies that PHY connection information needs to be
extracted before netdevice creation, when t
On Wed, Jul 08, 2020 at 03:00:12PM +0530, Kishon Vijay Abraham I wrote:
> Commit 1b79c5284439 ("PCI: cadence: Add host driver for Cadence PCIe
> controller") in order to update Vendor ID, directly wrote to
> PCI_VENDOR_ID register. However PCI_VENDOR_ID in root port configuration
> space is read-on
On Wed, 8 Jul 2020, Nicolas Saenz Julienne wrote:
> There is no guarantee to CMA's placement, so allocating a zone specific
> atomic pool from CMA might return memory from a completely different
> memory zone. So stop using it.
>
> Fixes: c84dc6e68a1d ("dma-pool: add additional coherent pools to
On Thu, Jul 09, 2020 at 11:53:06AM +0200, Thomas Gleixner wrote:
> Quite some non OF/ACPI users of irqdomains allocate firmware nodes of type
> IRQCHIP_FWNODE_NAMED or IRQCHIP_FWNODE_NAMED_ID and free them right after
> creating the irqdomain. The only purpose of these FW nodes is to convey
> name
On Wed, 8 Jul 2020, Christoph Hellwig wrote:
> On Wed, Jul 08, 2020 at 06:00:35PM +0200, Nicolas Saenz Julienne wrote:
> > On Wed, 2020-07-08 at 17:35 +0200, Christoph Hellwig wrote:
> > > On Tue, Jul 07, 2020 at 02:28:04PM +0200, Nicolas Saenz Julienne wrote:
> > > > When allocating atomic DMA me
On Thu, Jul 09, 2020 at 02:26:52PM -0700, Sean Christopherson wrote:
> On Thu, Jul 09, 2020 at 05:09:19PM -0400, Peter Xu wrote:
> > Again, using host_initiated or not should be a different issue? Frankly
> > speaking, I don't know whether it's an issue or not, but it's different from
> > what thi
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