The USB core has a quirk flag to ignore specific endpoints, so rename it
to be more obvious what this quirk does.
Cc: Johan Hovold
Cc: Alan Stern
Cc: Richard Dodd
Cc: Hans de Goede
Cc: Jonathan Cox
Cc: Bastien Nocera
Cc: "Thiébaud Weksteen"
Cc: Nishad Kamdar
Signed-off-by: Greg Kroah-Hartm
The sierra driver had two different functions for trying to determine
different quirks that did the same exact thing. Remove one and rename
things to make it more obvious exactly what the different lists do.
Cc: Johan Hovold
Signed-off-by: Greg Kroah-Hartman
---
drivers/usb/serial/sierra.c | 5
This comment has been present since the start of git. Since no one is
going to do anything about it, and all seems to work well, just drop the
thing entirely.
Cc: Alan Stern
Signed-off-by: Greg Kroah-Hartman
---
drivers/usb/host/ohci-pci.c | 4
1 file changed, 4 deletions(-)
diff --git a
Rename the list of specific devices that an OTG device could support to
make it more obvious as to what this list is for and what it is doing.
Also rename the configuration option to make it more obvious as well.
Cc: Thomas Bogendoerfer
Cc: Paul Burton
Cc: "Diego Elio Pettenò"
Cc: "Martin K. Pe
There are a number of places in the USB kernel code where terms that are
"loaded" are used. Fix this up to be more specific and inclusive as
there is no need for us to use these terms at all.
In one case, this ends up saving code, a nice side affect.
Greg Kroah-Hartman (8):
USB: rename USB qui
Fix up the wording in a comment for the scsi driver saying what it does
using better terminology.
Cc: Alan Stern
Signed-off-by: Greg Kroah-Hartman
---
drivers/usb/storage/scsiglue.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/usb/storage/scsiglue.c b/drivers/usb/
Make it obvious that the UAS driver is being ignored for a specific
device by fixing up the wording to be more clear.
Cc: Alan Stern
Signed-off-by: Greg Kroah-Hartman
---
drivers/usb/storage/uas-detect.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/usb/storage/uas
Better describe what is happening with a list of devices that are being
ignored by the driver.
Cc: Johan Hovold
Signed-off-by: Greg Kroah-Hartman
---
drivers/usb/serial/qcserial.c | 5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
diff --git a/drivers/usb/serial/qcserial.c b/drivers/us
The USB OTG code has the ability to disable external hubs, but the
configuration option for it is oddly named. Rename it to be more
obvious as to what it does.
Cc: Thomas Bogendoerfer
Cc: Bin Liu
Cc: Paul Cercueil
Cc: Alan Stern
Cc: Eugeniu Rosca
Cc: Kai-Heng Feng
Cc: David Heinzelmann
Cc:
On Thu, Jun 18, 2020 at 09:52:28AM +0100, Kieran Bingham wrote:
> Hi Greg,
>
> On 18/06/2020 09:21, Greg Kroah-Hartman wrote:
> > On Tue, Jun 09, 2020 at 01:46:00PM +0100, Kieran Bingham wrote:
> >> The word 'descriptor' is misspelled throughout the tree.
> >>
> >> Fix it up accordingly:
> >>
The following commit has been merged into the x86/urgent branch of tip:
Commit-ID: a13b9d0b97211579ea63b96c606de79b963c0f47
Gitweb:
https://git.kernel.org/tip/a13b9d0b97211579ea63b96c606de79b963c0f47
Author:Kees Cook
AuthorDate:Mon, 08 Jun 2020 20:15:09 -07:00
Committer:
On 2020-06-03 08:54, Neal Liu wrote:
Hi Neal,
Do you know which ARM expert could edict this standard?
Or is there any chance that we can make one? And be reviewed by
maintainers?
It appears that ARM just released a beta version of the spec at [1].
I'd encourage you (and anyone else) to have
On Thu, 2020-06-18 at 09:09 +0100, Lee Jones wrote:
> On Thu, 18 Jun 2020, Matti Vaittinen wrote:
>
> > Add entry for maintaining power management IC drivers for ROHM
> > BD71837, BD71847, BD71850, BD71828, BD71878, BD70528 and BD99954.
> >
> > Signed-off-by: Matti Vaittinen
> > Acked-by: Sebas
On 17/06/2020 20:52, Mauro Carvalho Chehab wrote:
> For the zigzag to work, the core needs to have a frequency
> shift. Without that, the zigzag code will just try re-tuning
> several times at the very same frequency, with seems wrong.
s/with/which
Suggest: "the core requires a frequency shift v
Add enabled spicc0 controller node with annotations describing the
physical SPI0 pin number based on the 40 pin header on the Odroid
board.
Signed-off-by: Hyeonki Hong
---
.../boot/dts/amlogic/meson-g12b-odroid-n2.dts | 26 +--
.../boot/dts/amlogic/meson-sm1-odroid-c4.dts | 24 +
Hi Souza,
On 06/17/20 at 05:34pm, Souza, Jose wrote:
> Hi Dave
>
> Will take care of this, looks like PSR2 was left enabled by UEFI/BIOS then
> i915 enables PSR1.Are you affected by any visual glitches or other issues?
Thanks you. I do not see visual glitches and other issues other than
the war
On 17-06-20, 10:43, Nicola Mazzucato wrote:
> Currently the fast_switch_possible flag is set unconditionally
> to true. Based on this, schedutil does not create a
> thread for frequency switching and would always use the
> fast switch path.
> However, if the platform does not support frequency
> fa
Hi Sasha/Alan
On 06/17/20 21:05, Sasha Levin wrote:
[...]
> diff --git a/drivers/usb/host/ohci-platform.c
> b/drivers/usb/host/ohci-platform.c
> index 7addfc2cbadc..4a8456f12a73 100644
> --- a/drivers/usb/host/ohci-platform.c
> +++ b/drivers/usb/host/ohci-platform.c
> @@ -299,6 +299,11 @@ stati
在 2020年06月18日 03:37, Andrew Morton 写道:
> On Tue, 2 Jun 2020 12:59:52 +0800 Lianbo Jiang wrote:
>
>> Signature verification is an important security feature, to protect
>> system from being attacked with a kernel of unknown origin. Kexec
>> rebooting is a way to replace the running kernel, hence
On 6/17/2020 11:13 PM, Ruhl, Michael J wrote:
>> -Original Message-
>> From: charante=codeaurora@mg.codeaurora.org
>> On Behalf Of Charan Teja
>> Kalla
>> Sent: Wednesday, June 17, 2020 2:29 AM
>> To: Ruhl, Michael J ; Sumit Semwal
>> ; open list:DMA BUFFER SHARING FRAMEWORK
>> ; DR
>-Original Message-
>From: Gustavo A. R. Silva
>Sent: Wednesday, June 17, 2020 9:53 PM
[...]
>Subject: [PATCH][next] enetc: Use struct_size() helper in kzalloc()
>
>Make use of the struct_size() helper instead of an open-coded version
>in order to avoid any potential type mistakes.
>
>This
Hi,
On 6/16/2020 5:27 PM, Stephen Boyd wrote:
Quoting Maulik Shah (2020-06-01 04:38:25)
On 5/31/2020 12:56 AM, Stephen Boyd wrote:
Quoting Maulik Shah (2020-05-29 02:20:32)
On 5/27/2020 3:45 PM, Stephen Boyd wrote:
Quoting Maulik Shah (2020-05-23 10:11:13)
@@ -118,6 +120,7 @@ static void qc
From: Colin Ian King
Shifting the integer value 1 is evaluated using 32-bit arithmetic
and then used in an expression that expects a long value leads to
a potential integer overflow. Fix this by using the BIT macro to
perform the shift to avoid the overflow.
Addresses-Coverity: ("Unintentional i
On Thu, 18 Jun 2020, Arnd Bergmann wrote:
> On Thu, Jun 18, 2020 at 10:03 AM Lee Jones wrote:
> >
> > The existing SYSCON implementation only supports MMIO (memory mapped)
> > accesses, facilitated by Regmap. This extends support for registers
> > held behind I2C busses.
> >
> > Signed-off-by: L
Rock Pi N8 is a Rockchip RK3288 based SBC, which has
- VMARC RK3288 SOM (as per SMARC standard) from Vamrs.
- Compatible carrier board from Radxa.
VMARC RK3288 SOM need to mount on top of dalang carrier
board for making Rock PI N8 SBC.
Any inputs?
Jagan.
Jagan Teki (4):
ARM: dts: rockchip: ra
Radxa dalang carrier boards are used to mount vmarc SoM's
of rk3399pro and rk3288 to make complete SBC.
Among these combinations, card detection gpio, max-frequency
properties are used with rk3399pro SoM but not required for
rk3288 SoM based on the hardware schematics.
So, let's move these sdmmc
Rock Pi N8 is a Rockchip RK3288 based SBC, which has
- VMARC RK3288 SOM (as per SMARC standard) from Vamrs.
- Compatible carrier board from Radxa.
VMARC RK3288 SOM need to mount on top of dalang carrier
board for making Rock PI N8 SBC.
Add dt-bindings for it.
Signed-off-by: Jagan Teki
---
Docu
VMARC RK3288 SOM is a standard SMARC SOM design with
Rockchip RK3288 SoC, which is designed by Vamrs.
Specification:
- Rockchip RK3288
- PMIC: RK808
- eMMC: 16GB/32GB/64GB
- SD slot
- 2xUSB-2.0, 1xUSB3.0
- USB-C for power supply
- Ethernet, PCIe
- HDMI, MIPI-DSI/CSI, eDP
Add initial support for V
Rock Pi N8 is a Rockchip RK3288 based SBC, which has
- VMARC RK3288 SOM (as per SMARC standard) from Vamrs.
- Compatible carrier board from Radxa.
VAMRC RK3288 SOM need to mount on top of radxa dalang
carrier board for making Rock Pi N8 SBC.
So, add initial support for Rock Pi N8 by including rk3
+Adding SBoyd.
On 17/06/2020 18:22, Doug Anderson wrote:
Hi,
On Wed, Jun 17, 2020 at 8:19 AM Srinivas Kandagatla
wrote:
On 17/06/2020 15:51, Douglas Anderson wrote:
From: Ravi Kumar Bokka
On some systems it's possible to actually blow the fuses in the qfprom
from the kernel. Add proper
On 6/17/20 7:49 PM, Kees Cook wrote:
> On Wed, Jun 10, 2020 at 06:31:35PM +0200, Vlastimil Babka wrote:
>> The function cache_from_obj() was added by commit b9ce5ef49f00 ("sl[au]b:
>> always get the cache from its page in kmem_cache_free()") to support kmemcg,
>> where per-memcg cache can be diff
Hi Roman, Sakari
On Tue, May 19, 2020 at 02:57:07PM +0300, Sakari Ailus wrote:
> Hi Roman,
>
> On Tue, May 19, 2020 at 04:16:18AM +0300, Roman Kovalivskyi wrote:
> > From: Dave Stevenson
> >
> > The driver was only supporting continuous clock mode
> > although this was not stated anywhere.
> > No
From: Colin Ian King
The variable ret is being assigned with a value that is never read
and it is being updated later with a new value. The assignment is
redundant and can be removed.
Addresses-Coverity: ("Unused value")
Signed-off-by: Colin Ian King
---
drivers/crypto/ccp/ccp-ops.c | 1 -
1
The max17040 fuel gauge is part of a family of 8 chips that have very
similar mode of operations and registers.
This change adds:
- compatible strings for all supported devices and handles the minor
differences between them;
- handling for devices reporting double capacity via maxim,double-soc;
Maxim max17040 is a fuel gauge from a larger family utilising the Model
Gauge technology. Document all different compatible strings that the
max17040 driver recognizes.
Some devices in the wild report double the capacity. The
maxim,double-soc (from State-Of-Charge) property fixes that.
Complete d
On Fri, 17 Apr 2020, Adam Thomson wrote:
> The current implementation performs checking in the i2c_probe()
> function of the variant_code but does this immediately after the
> containing struct has been initialised as all zero. This means the
> check for variant code will always default to using t
From: Colin Ian King
The variable err is being initialized with a value that is never read
and it is being updated later with a new value. The initialization is
redundant and can be removed.
Addresses-Coverity: ("Unused value")
Signed-off-by: Colin Ian King
---
drivers/crypto/img-hash.c | 2 +
> On Jun 18, 2020, at 15:32, Takashi Iwai wrote:
>
> On Thu, 18 Jun 2020 07:15:21 +0200,
> Kai-Heng Feng wrote:
>>
>>
>>
>>> On Jun 17, 2020, at 23:50, Takashi Iwai wrote:
>>>
>>> On Wed, 17 Jun 2020 17:24:30 +0200,
>>> Kai-Heng Feng wrote:
> On Jun 17, 2020, at 19:5
From: Cixi Geng
Introduce new configuration option GCOV_PROFILE_PREREQS that can be
used to check whether the prerequisites for enabling gcov profiling
for specific files and directories are met.
Only add SERIAL_GCOV for an example.
Signed-off-by: Cixi Geng
---
drivers/tty/serial/Kconfig |
Hi Steven,
Thank you for the patch! Perhaps something to improve:
[auto build test WARNING on linux/master]
[also build test WARNING on tip/perf/core linus/master v5.8-rc1 next-20200618]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest
x86 CPUs can suffer severe performance drops if a tight loop, such as
the ones in __clear_user(), straddles a 16-byte instruction fetch
window, or worse, a 64-byte cacheline. This issues was discovered in the
SUSE kernel with the following commit,
1153933703d9 ("x86/asm/64: Micro-optimize __clea
All but the ARM patches, which should be routed via Arm-SoC.
Enjoy!
The following changes since commit b3a9e3b9622ae10064826dccb4f7a52bd88c7407:
Linux 5.8-rc1 (2020-06-14 12:45:04 -0700)
are available in the Git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd.git
ib-m
> +static void ufshpb_run_active_subregion_list(struct ufshpb_lu *hpb)
> +{
> + struct ufshpb_region *rgn;
> + struct ufshpb_subregion *srgn;
> + struct ufshpb_map_ctx *mctx;
mctx doesn't really do anything here
> + unsigned long flags;
> + int ret = 0;
> +
> +
On Wed, Jun 17, 2020 at 02:32:39AM +0300, Ilkka Prusi wrote:
> Hi,
>
> Yesterday my computer with kernel version 5.7.2 was frozen badly enough that
> hard reset was necessary (did not react to SysRq keys). Upon checking logs I
> found following warning and information from the time just before res
Detect an opencoded expression that is used before or after
array_size()/array3_size()/struct_size() to compute the same size.
Cc: Gustavo A. R. Silva
Cc: Kees Cook
Signed-off-by: Denis Efremov
---
Changes in v2:
- python rules moved next to SmPL patterns
- assignment operator used
- struct_
Hi Luc,
I love your patch! Perhaps something to improve:
[auto build test WARNING on linux/master]
[also build test WARNING on linus/master v5.8-rc1 next-20200618]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use as documented
From: Colin Ian King
The variable ret is being initialized with a value that is never read
and it is being updated later with a new value. The initialization is
redundant and can be removed.
Addresses-Coverity: ("Unused value")
Signed-off-by: Colin Ian King
---
drivers/gpu/drm/amd/amdgpu/amdg
Hi,
On 16.06.2020 15:35, Miklos Szeredi wrote:
> On Mon, Jun 15, 2020 at 7:59 AM Vasily Averin wrote:
>>
>> On 6/15/20 3:50 AM, kernel test robot wrote:
>>> FYI, we noticed the following commit (built with gcc-9):
>>>
>>> commit: 6b2fb79963fbed7db3ef850926d913518fd5c62f ("fuse: optimize
>>> writ
hsfreqrange should be chosen based on the calculated mbps which
is closer to the default bit rate and within the range as per
table[1]. But current calculation always selects first value which
is greater than or equal to the calculated mbps which may lead
to chosing a wrong range in some cases.
F
Add a warning message when the selected PHY speed is less
than supported minimum PHY speed given in the hsfreq table[1].
For raspberry pi camera capture on Kingfisher board with resolution
640x480, the calculated PHY speed is 48 mbps which is less than
the minimum PHY speed 80 Mbps from the table[
PHTW register is selected based on default bit rate from Table[1].
for the bit rates less than or equal to 250. Currently first
value of default bit rate which is greater than or equal to
the caculated mbps is selected.This selection can be further
improved by selecting the default bit rate which i
On Thu, Jun 18, 2020 at 10:55:58AM +0200, David Hildenbrand wrote:
> On 18.06.20 08:43, Christoph Hellwig wrote:
> > Use PAGE_KERNEL_ROX directly instead of allocating RWX and setting the
> > page read-only just after the allocation.
> >
> > Signed-off-by: Christoph Hellwig
> > ---
> > arch/arm6
On Wed, 17 Jun 2020 16:34:07 -0500, Gustavo A. R. Silva wrote:
> Make use of the struct_size() helper instead of an open-coded version
> in order to avoid any potential type mistakes.
>
> This code was detected with the help of Coccinelle and, audited and
> fixed manually.
Applied to arm64 (for-n
On Wed, Jun 17, 2020 at 04:59:59PM +0100, Colin King wrote:
> From: Colin Ian King
>
> Function get_insert_time can return error values that are cast
> to a u64. The checks of insert_time1 and insert_time2 check for
> the errors but because they are u64 variables the check for less
> than zero ca
On Thu, 18 Jun 2020 09:58:28 +1200, Barry Song wrote:
> hugetlb_cma_reserve() is called at the wrong place. numa_init has not been
> done yet. so all reserved memory will be located at node0.
Applied to arm64 (for-next/fixes), thanks!
[1/1] arm64: mm: reserve hugetlb CMA after numa_init
htt
On 6/18/2020 10:58 AM, Herbert Xu wrote:
> On Thu, Jun 11, 2020 at 04:39:34PM +0100, Colin King wrote:
>> From: Colin Ian King
>>
>> The variable ret is being assigned a value that is never read, the
>> error exit path via label 'unmap' returns -ENOMEM anyhow, so assigning
>> ret with -ENOMEM is r
On Tue, 2020-06-09 at 14:18 -0700, Stephen Boyd wrote:
> These aren't used and the macros that reference them aren't used either.
> Remove the dead code to avoid compile warnings.
>
> Cc: Owen Chen
> Cc: Mars Cheng
> Cc: Macpaul Lin
> Fixes: 1aca9939bf72 ("clk: mediatek: Add MT6765 clock suppor
On 17/06/2020 15:05, Catalin Marinas wrote:
On Wed, Jun 17, 2020 at 01:38:43PM +0100, Steven Price wrote:
diff --git a/arch/arm64/kvm/hyp/sysreg-sr.c b/arch/arm64/kvm/hyp/sysreg-sr.c
index 75b1925763f1..6ecee1528566 100644
--- a/arch/arm64/kvm/hyp/sysreg-sr.c
+++ b/arch/arm64/kvm/hyp/sysreg-sr.c
On Thu, Jun 18, 2020 at 01:40:55PM +0300, Horia Geantă wrote:
> On 6/18/2020 10:58 AM, Herbert Xu wrote:
> > On Thu, Jun 11, 2020 at 04:39:34PM +0100, Colin King wrote:
> >> From: Colin Ian King
> >>
> >> The variable ret is being assigned a value that is never read, the
> >> error exit path via l
From: Matt Fleming
> Sent: 18 June 2020 11:20
> x86 CPUs can suffer severe performance drops if a tight loop, such as
> the ones in __clear_user(), straddles a 16-byte instruction fetch
> window, or worse, a 64-byte cacheline. This issues was discovered in the
> SUSE kernel with the following commi
On Wed, Jun 17, 2020 at 04:14:11PM -0600, Rob Herring wrote:
> On Tue, Jun 09, 2020 at 11:02:32PM -0700, Sowjanya Komatineni wrote:
> > This patch documents Tegra VI and CSI port and endpoint nodes along
> > with the other required properties.
> >
> > Signed-off-by: Sowjanya Komatineni
> > ---
>
Hi,
On 6/17/20 9:17 PM, Stephen Boyd wrote:
> Quoting Alexandru Elisei (2020-06-17 04:38:47)
>> From: Julien Thierry
>>
>> The PMU is disabled and enabled, and the counters are programmed from
>> contexts where interrupts or preemption is disabled.
>>
>> The functions to toggle the PMU and to pro
Hi Stephen,
Thank you very much for taking the time to review the patches!
Comments below.
On 6/17/20 9:01 PM, Stephen Boyd wrote:
> Quoting Alexandru Elisei (2020-06-17 04:38:45)
>> Writes to the PMXEVTYPER_EL0 register are not self-synchronising. In
>> armv8pmu_enable_event(), the PE can reord
Hello,
On 6/17/20 9:11 PM, Stephen Boyd wrote:
> Quoting Alexandru Elisei (2020-06-17 04:38:46)
>> From: Mark Rutland
>>
>> Currently we access the counter registers and their respective type
>> registers indirectly. This requires us to write to PMSELR, issue an ISB,
>> then access the relevant P
On Tue, Jun 16, 2020 at 9:13 AM, Oded Gabbay wrote:
> We no longer need to initialize the rate limiters in GAUDI A1.
>
> Signed-off-by: Oded Gabbay
Reviewed-by: Omer Shpigelman
Hi,
On 6/17/20 9:23 PM, Stephen Boyd wrote:
> Quoting Alexandru Elisei (2020-06-17 04:38:50)
>> diff --git a/drivers/perf/arm_pmu.c b/drivers/perf/arm_pmu.c
>> index df352b334ea7..17e5952d21e4 100644
>> --- a/drivers/perf/arm_pmu.c
>> +++ b/drivers/perf/arm_pmu.c
>> @@ -26,8 +26,46 @@
>>
>> #in
On Thu, Jun 18, 2020 at 12:59:57AM +0530, Souptick Joarder wrote:
> On Wed, Jun 17, 2020 at 11:29 PM Dan Carpenter
> wrote:
> >
> > On Wed, Jun 17, 2020 at 11:13:32PM +0530, Souptick Joarder wrote:
> > > On Wed, Jun 17, 2020 at 4:43 PM Dan Carpenter
> > > wrote:
> > > >
> > > > On Wed, Jun 17,
On Tue, Jun 16, 2020 at 09:13 AM, Oded Gabbay wrote:
> MAP/UNMAP are done also for device memory.
>
> Signed-off-by: Oded Gabbay
Reviewed-by: Omer Shpigelman
On 6/11/2020 6:39 PM, Colin King wrote:
> From: Colin Ian King
>
> The variable ret is being assigned a value that is never read, the
> error exit path via label 'unmap' returns -ENOMEM anyhow, so assigning
> ret with -ENOMEM is redundamt.
>
> Addresses-Coverity: ("Unused value")
> Signed-off-by
Function set_pmd_at is to set pmd entry, if tlb entry need to
be flushed, there exists pmdp_huge_clear_flush alike function
before set_pmd_at is called. So it is not necessary to call
flush_tlb_all in this function.
In these scenarios, tlb for the pmd range needs to be flushed:
1. privilege degrad
pm_runtime_get_sync() increments the runtime PM usage counter even
when it returns an error code. Thus a pairing decrement is needed on
the error handling path to keep the counter balanced.
Signed-off-by: Dinghao Liu
---
Changelog:
v2: - Merge two patches that fix runtime PM imbalance in
On 18 June 2020 11:15, Lee Jones wrote:
> > The current implementation performs checking in the i2c_probe()
> > function of the variant_code but does this immediately after the
> > containing struct has been initialised as all zero. This means the
> > check for variant code will always default to
On Wed, Jun 17, 2020 at 04:04:59PM -0600, Rob Herring wrote:
> Given bus numbering may not be constant, that seems like not the best
> way to match up devices. I'd assume that userspace needs some way to
> identify which instance is which already, so maybe there's other data
> you can use alrea
On Tue, Jun 13, 2020 at 09:13 AM, Oded Gabbay wrote:
> Once there is a 64-bit field in a structure, GCC compiler for ARM aligns the
> structure to 8 bytes. In order to avoid confusion when these structures are
> being passed between CPUs from different architectures, we explicitly align
> the stru
On Wed, Jun 17, 2020 at 09:01:41PM -0400, Sasha Levin wrote:
> From: Dmitry Osipenko
>
> [ Upstream commit 3ef9d5073b552d56bd6daf2af1e89b7e8d4df183 ]
>
> The microphone-jack state needs to be masked in a case of a 4-pin jack
> when microphone and ground pins are shorted. Presence of nvidia,heads
On Thu, Jun 18, 2020 at 01:54:55PM +0300, Horia Geantă wrote:
>
> The proper fix would be updating the ahash_finup_no_ctx() function
> to return the specific error code:
> return ret;
> instead of returning -ENOMEM for all error cases.
>
> For example error code returned by dpaa2_caam_enqueu
> On 2020/6/18 11:28, Zac wrote:
> >> On 2020/6/18 10:39, Zac wrote:
> >>>
> On 2020/6/17 17:04, zhaowu...@wingtech.com wrote:
> > From: Wuyun Zhao
> >
> > Under some condition, the __write_node_page will submit a page
> which
> >> is
> not
> > f2fs_in_warm_node_list and
On Wed, Jun 17, 2020 at 09:02:32PM -0400, Sasha Levin wrote:
> From: Daniel Baluta
>
> [ Upstream commit c26fde3b15ed41f5f452f1da727795f787833287 ]
>
> This provides a better separation between runtime and PM sleep
> callbacks.
>
> Only do nothing if given runtime flag is set and calback is not
On Thu, 18 Jun 2020 12:16:15 +0200,
Kai-Heng Feng wrote:
>
>
>
> > On Jun 18, 2020, at 15:32, Takashi Iwai wrote:
> >
> > On Thu, 18 Jun 2020 07:15:21 +0200,
> > Kai-Heng Feng wrote:
> >>
> >>
> >>
> >>> On Jun 17, 2020, at 23:50, Takashi Iwai wrote:
> >>>
> >>> On Wed, 17 Jun 2020 17:24:
On Wed, Jun 17, 2020 at 09:03:47PM -0400, Sasha Levin wrote:
> From: Wei Li
>
> [ Upstream commit c1c050ee74d67aeb879fd38e3a07139d7fdb79f4 ]
>
> As these two drivers support I2C and SPI, we should add the
> SND_SOC_I2C_AND_SPI
> dependency instead.
This is purely about build testing, are you s
The typical error of all times, is being wrong about The Divine ofcourse.
I now also have a little homepage up: https://i-t-shed-studio.eu/
Serene Greetings.
Ywe Cærlyn
Build error on s390:
arch/s390/kernel/entry.o: in function `sys_call_table_emu':
>> (.rodata+0x1288): undefined reference to `__s390_'
In commit ("All arch: remove system call sys_sysctl")
148 commonfdatasync sys_fdatasync
sys_fdatasync
-149
On Fri, 2020-02-21 at 18:12 +0800, Macpaul Lin wrote:
> This patch adds basic SoC support for Mediatek's new 8-core SoC,
> MT6765, which is mainly for smartphone application.
>
> Changes in V8:
> 1. Origin V7 patchset:
>https://patchwork.kernel.org/cover/11370105/
>Split origin V7 patchset
Paolo Bonzini writes:
> On 17/06/20 13:38, Vitaly Kuznetsov wrote:
>>
>> For KVM_GET_MSR_INDEX_LIST, the promise is "guest msrs that are
>> supported" and I'm not exactly sure what this means. Personally, I see
>> no point in returning MSRs which can't be read with KVM_GET_MSRS (as
>> this also
On Thu, Jun 18, 2020 at 11:07:04AM +0100, Lee Jones wrote:
> Does Regmap let you register/initialise an I2C address more than once?
> When I attempt it, I get:
> [0.522988] i2c i2c-0: Failed to register i2c client tmp105 at 0x32 (-16)
That's not regmap, that's the I2C core.
signature.asc
state_test/smm_test selftests are failing on AMD with:
"Unexpected result from KVM_GET_MSRS, r: 51 (failed MSR was 0x345)"
MSR_IA32_PERF_CAPABILITIES is an emulated MSR on Intel but it is not
known to AMD code, emulate it there too (by returning 0 and allowing
userspace to write 0). This way the c
On Thu, 18 Jun 2020, Adam Thomson wrote:
> On 18 June 2020 11:15, Lee Jones wrote:
>
> > > The current implementation performs checking in the i2c_probe()
> > > function of the variant_code but does this immediately after the
> > > containing struct has been initialised as all zero. This means th
> Hello, Lorenzo et al.
Hi Oleksandr,
>
> I'm using MT7612 mini-PCIE cards as both AP in a home server and as a client
> in
> a laptop. The AP works perfectly (after some fixing from your side; thanks for
> that!), and so does the client modulo it has issues during system resume.
>
[...]
>
From: Gao Xiang
Hongyu reported "id != index" in z_erofs_onlinepage_fixup() with
specific aarch64 environment easily, which wasn't shown before.
After digging into that, I found that high 32 bits of page->private
was set to 0x rather than 0 (due to z_erofs_onlinepage_init
behavior with s
From: Leon Romanovsky
Hi,
The following two fixes are user-visible one. The first patch is needed
to continue to use RAW_PACKET QPs after PR [1] is merged and new FW will
be released. The second patch fixes wrongly reported GID.
Thanks
[1] https://github.com/linux-rdma/rdma-core/pull/745
Leon
On Thu, Jun 18, 2020 at 07:03:20PM +0800, Xiaoming Ni wrote:
> Build error on s390:
> arch/s390/kernel/entry.o: in function `sys_call_table_emu':
> >> (.rodata+0x1288): undefined reference to `__s390_'
>
> In commit ("All arch: remove system call sys_sysctl")
> 148 common fdatasync
On Thu, Jun 18, 2020 at 12:56:52PM +0530, Ravulapati Vishnu vardhan rao wrote:
> The steps to reproduce:
>
> Record from the internal mic :
> (arecord -D hw:1,2 -f dat /dev/null -V stereos)
>
> Record from the headphone mic:
> (arecord -D hw:1,0 -f dat /dev/null -V stereos)
>
> Kill the recordin
Guenter Roeck writes:
> On 6/16/20 1:25 AM, Lars Povlsen wrote:
>> This patch adds a temperature sensor driver to the Sparx5 SoC.
>>
>> Signed-off-by: Lars Povlsen
>> ---
>> drivers/hwmon/Kconfig | 10 +++
>> drivers/hwmon/Makefile | 1 +
>> drivers/hwmon/sparx5-temp.c | 136
On Thu, 18 Jun 2020 at 10:52, Jisheng Zhang wrote:
>
> A ";" is missing in the pwrseq dt examples, fix them.
Rather than fixing old docs, how about converting them to the yaml format?
Kind regards
Uffe
>
> Signed-off-by: Jisheng Zhang
> ---
> Documentation/devicetree/bindings/mmc/mmc-pwrseq-e
From: Andy Teng
Add devicetree bindings for MediaTek MT6779 pinctrl driver.
Signed-off-by: Andy Teng
---
.../bindings/pinctrl/mediatek,mt6779-pinctrl.yaml | 210
1 file changed, 210 insertions(+)
create mode 100644
Documentation/devicetree/bindings/pinctrl/mediatek,mt6
Add devicetree bindings for Mediatek mt6779 SoC Pin Controller.
Acked-by: Sean Wang
Signed-off-by: Hanks Chen
Signed-off-by: Mars Cheng
Signed-off-by: Andy Teng
---
include/dt-bindings/pinctrl/mt6779-pinfunc.h | 1242 ++
1 file changed, 1242 insertions(+)
create mode
for virtual gpios, they should not do reg setting and
should behave as expected for eint function.
Signed-off-by: Hanks Chen
Signed-off-by: Mars Cheng
---
drivers/pinctrl/mediatek/pinctrl-mtk-common-v2.c | 25 ++
drivers/pinctrl/mediatek/pinctrl-mtk-common-v2.h |1 +
d
This patch add basic SoC Support for Mediatek MT6779 SoC
Change since v6:
Commit "dt-bindings: pinctrl: add bindings for MediaTek"
-- fix format of bindings and add interrupt definition.
Commit "pinctrl: mediatek: update pinmux definitions for"
-- use the standard include path
Commit "pinctrl: med
this adds initial MT6779 dts settings for board support,
including cpu, gic, timer, ccf, pinctrl, uart, sysirq...etc.
Signed-off-by: Hanks Chen
---
arch/arm64/boot/dts/mediatek/Makefile |1 +
arch/arm64/boot/dts/mediatek/mt6779-evb.dts | 31
arch/arm64/boot/dts/mediatek/mt6779.d
Add MT6779 UART0 clock support.
Signed-off-by: Hanks Chen
Signed-off-by: mtk01761
---
drivers/clk/mediatek/clk-mt6779.c |2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/clk/mediatek/clk-mt6779.c
b/drivers/clk/mediatek/clk-mt6779.c
index 9766ccc..6e0d3a1 100644
--- a/drivers/clk
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