The adm1278 temperature sysfs attribute need it for one of the openbmc platform
.
This functionality is not enabled by default, so PMON_CONFIG needs to be
modified in order to enable it.
Signed-off-by : Manikandan Elumalai
v2:
- Add Signed-off-by.
- Removed ADM1278_TEMP1_EN check.
---
On 29/05/2020 13:35, Clément Péron wrote:
Hi Robin,
On Fri, 29 May 2020 at 14:20, Robin Murphy wrote:
On 2020-05-10 17:55, Clément Péron wrote:
Convert busy_count to a simple int protected by spinlock.
A little more reasoning might be nice.
I have follow the modification requested for li
Hi!
> MA USB protocol used by MA USB Host driver has been implemented in
> accordance with MA USB Specification Release 1.0b.
> >>>
> >>> Is that a USB-released spec?
> >> Correct, document is being maintained by USB IF and is publicly available.
> >> However, I just noticed a typo, corr
On Wed, May 27, 2020 at 11:19 PM Lad Prabhakar
wrote:
> Add thermal sensor support for r8a7742 SoC. The Renesas RZ/G1H
> (r8a7742) thermal sensor module is identical to the R-Car Gen2 family.
>
> No driver change is needed due to the fallback compatible value
> "renesas,rcar-gen2-thermal".
>
> Sig
Hi!
This patchset is another attempt to fix the regulator coupling on
Exynos5800/5422 SoCs. Here are links to the previous attempts:
https://lore.kernel.org/linux-samsung-soc/20191008101709.qVNy8eijBi0LynOteWFMnTg4GUwKG599n6OyYoX1Abs@z/
https://lore.kernel.org/lkml/20191017102758.8104-1-m.szyprow
On Thu, May 28, 2020 at 07:45:23PM +0530, Manikandan Elumalai wrote:
Hi Manikandan,
Adding the PMBus maintainers...
>
> The adm1278 temperature sysfs attribute need it for one of the our openbmc
> platform .
> This functionality is not enabled by default, so PMON_CONFIG needs to be
> modifie
Add custom voltage regulator coupler for Exynos5800 SoCs, which require
coupling between "vdd_arm" and "vdd_int" regulators. This coupler ensures
that coupled regulators voltage balancing is done only when clients for
each regulator (cpufreq for "vdd_arm" and devfreq for "vdd_int") apply
their cons
Move the coupled regulators voltage balancing code to the separate
function and allow to call it from the custom regulator couplers.
Signed-off-by: Marek Szyprowski
---
drivers/regulator/core.c | 49 ++-
include/linux/regulator/coupler.h | 8 +
2 files c
Luis Chamberlain writes:
> This simplifies the code considerably. The following coccinelle
With register_sysctl the code would read:
cdrom_sysctl_header = register_sysctl("dev/cdrom", cdrom_table);
Please go that direction. Thank you.
Eric
Hi Prabhakar,
On Wed, May 27, 2020 at 11:19 PM Lad Prabhakar
wrote:
> Document SoC specific compatible strings for r8a7742. No driver change
> is needed as the fallback strings will activate the right code.
>
> Signed-off-by: Lad Prabhakar
> Reviewed-by: Marian-Cristian Rotariu
>
Reviewed-by:
Hi Moritz,
Sorry for asking.
When you get chance, can you review my version 2 patch submitted on
05/15/20?
Regards,
Richard
On 5/15/20 9:35 AM, richard.g...@linux.intel.com wrote:
From: Richard Gong
The reconfiguration mode is pre-set by driver as the full reconfiguration.
As a result, us
On Fri, May 22, 2020 at 08:15:17PM +0300, Kirill A. Shutemov wrote:
> On Fri, May 15, 2020 at 06:16:26AM -0700, Matthew Wilcox wrote:
> > +#define offset_in_thp(page, p) ((unsigned long)(p) & (thp_size(page) -
> > 1))
>
> Looks like thp_mask() would be handy here.
It's not the only place we
On Thu, May 28, 2020 at 12:06:10PM -0700, Saravana Kannan wrote:
> When a regulator is left on by the bootloader or anything else before
> the kernel starts (let's call this a "boot on" regulator), we need to
> keep it on till all the consumers of the regulator have probed. This is
We we don't in
On Tue, May 26, 2020 at 06:11:01PM +0200, Peter Zijlstra wrote:
> +void flush_smp_call_function_from_idle(void)
> +{
> + unsigned long flags;
> +
> + if (llist_empty(this_cpu_ptr(&call_single_queue)))
> + return;
Now it seems weird that sched_ttwu_pending() didn't have that
lli
On Wed, May 27, 2020 at 03:41:10PM -0500, Dinh Nguyen wrote:
> Add optional reset property.
This doesn't apply against current code, please check and resend.
signature.asc
Description: PGP signature
Introduce a driver for the camera interface on some Rockchip platforms.
This controller supports CSI2, Parallel and BT656 interfaces, but for
now only the parallel interface could be tested, hence it's the only one
that's supported in the first version of this driver.
This controller can be fond
Add a documentation for the Rockchip Camera Interface controller
binding.
This controller can be found on platforms such as the PX30 or the
RK3288, the PX30 being the only platform supported so far.
Signed-off-by: Maxime Chevallier
---
Changes since V1
- Updated the clock and reset names
- A
The PX30 has a camera interface, supporting CSI2, BT656 and Parallel
modes. Add a DT description for this interface.
Signed-off-by: Maxime Chevallier
---
Changes since V1:
- Updated the clock and reset names
- Reordered the properties to have clocks and resets bundled together
arch/arm64/bo
On Tue, May 26, 2020 at 06:11:00PM +0200, Peter Zijlstra wrote:
> This ensures flush_smp_call_function_queue() is strictly about
> call_single_queue.
>
> Signed-off-by: Peter Zijlstra (Intel)
> ---
> kernel/smp.c | 17 +
> 1 file changed, 9 insertions(+), 8 deletions(-)
>
> --
Hello everyone,
Here's a V2 of the series adding very basic support for the camera interface on
the Rockchip PX30 SoC.
Thanks to everyone that commented on the first series, your reviews were
very helpful :)
This Camera Interface is also supported on other Rockchip SoC such as
the RK1808, RK3128
On Fri, May 29, 2020 at 07:22:43PM +0800, Tzung-Bi Shih wrote:
> On Fri, May 29, 2020 at 7:09 PM Mark Brown wrote:
> > What is DMIC one wire mode? This doesn't sound like something I'd
> > expect to vary at runtime.
> It means: 1 PDM data wire carries 2 channel data (rising edge for left
> and
On Thu, May 28, 2020 at 07:03:45PM -0700, Joe Perches wrote:
> On Fri, 2020-05-29 at 09:00 +0800, Yi Wang wrote:
> > From: Liao Pingfang
> >
> > Use kzalloc instead of kmalloc in the error message according to
> > the previous kzalloc() call.
> []
> > diff --git a/fs/btrfs/check-integrity.c b/fs/
From: Alexandru Tachici
Add bindings for the Analog Devices ADM1266 sequencer.
Signed-off-by: Alexandru Tachici
---
.../bindings/hwmon/adi,adm1266.yaml | 56 +++
1 file changed, 56 insertions(+)
create mode 100644 Documentation/devicetree/bindings/hwmon/adi,adm1266.y
From: Alexandru Tachici
Add debugfs files for go_command and read_state.
Signed-off-by: Alexandru Tachici
---
drivers/hwmon/pmbus/adm1266.c | 47 +++
1 file changed, 47 insertions(+)
diff --git a/drivers/hwmon/pmbus/adm1266.c b/drivers/hwmon/pmbus/adm1266.c
ind
From: Alexandru Tachici
Adm1266 exposes 9 GPIOs and 16 PDIOs which are currently read-only. They
are controlled by the internal sequencing engine.
This patch makes adm1266 driver expose GPIOs and PDIOs to user-space
using GPIO provider kernel api.
Signed-off-by: Alexandru Tachici
---
drivers/
From: Alexandru Tachici
PmBus devices support Block Write-Block Read Process
Call described in SMBus specification v 2.0 with the
exception that Block writes and reads are permitted to
have up 255 data bytes instead of max 32 bytes (SMBus).
This patch adds Block WR process call support for PMBus
From: Alexandru Tachici
Use the nvmem kernel api to expose the black box
chip functionality to userspace.
Signed-off-by: Alexandru Tachici
---
drivers/hwmon/pmbus/adm1266.c | 160 ++
1 file changed, 160 insertions(+)
diff --git a/drivers/hwmon/pmbus/adm1266.c b
On Fri, May 29, 2020 at 09:46:13AM +0200, Vitaly Kuznetsov wrote:
> Sean Christopherson writes:
>
> > I'll looking into writing a script to run all selftests with a single
> > command, unless someone already has one laying around?
>
> Is 'make run_tests' in tools/testing/selftests/kvm/ what you
From: Alexandru Tachici
Add PMBus probing driver for the adm1266 Cascadable
Super Sequencer with Margin Control and Fault Recording.
Driver is using the pmbus_core, creating sysfs files
under hwmon for inputs: vh1->vh4 and vp1->vp13.
1. Add PMBus probing driver for inputs vh1->vh4
and vp1->vp13.
From: Alexandru Tachici
Add pmbus probing driver for the adm1266 Cascadable
Super Sequencer with Margin Control and Fault Recording.
Driver is using the pmbus_core, creating sysfs files
under hwmon for inputs: vh1->vh4 and vp1->vp13.
Signed-off-by: Alexandru Tachici
---
Documentation/hwmon/adm
Luis Chamberlain writes:
> The way to create a subdirectory from the base set of directories
> is a bit obscure, so provide a helper which makes this clear, and
> also helps remove boiler plate code required to do this work.
I agreee calling:
register_sysctl("fs/binfmt_misc", sysctl_mount_point)
From: Casey Schaufler
> Sent: 28 May 2020 22:21
> It's true, nobody uses a TTY33 anymore. Those of us who have done so
> understand how "{" is preferable to "BEGIN" and why tabs are better than
> multiple spaces. A narrow "terminal" requires less neck and mouse movement.
> Any width limit is arbitr
On Fri, May 29, 2020 at 07:15:13PM +0700, Suravee Suthikulpanit wrote:
> Thank you for cleaning up.
>
> Reviewed-by: Suravee Suthikulpanit
Thanks for you review, Suravee. Patches are now applied.
On Thu, May 28, 2020 at 12:06:08PM -0700, Saravana Kannan wrote:
> The simplified explanation of the problem is, for regulators left on by
> the bootloader, we want to keep them on until all the consumers are
> probed. This is because we need to protect consumer-A from turning off a
> shared regul
Hi Florian,
Am 28.05.20 um 21:21 schrieb Florian Fainelli:
> The BCM7211 SoC uses the same pinconf_ops as the ones defined for the
> BCM2711 SoC, match the compatible string and use the correct set of
> options.
>
> Signed-off-by: Florian Fainelli
> ---
> drivers/pinctrl/bcm/pinctrl-bcm2835.c |
Each channel of DMA controller may have a limited length of burst
transaction (number of IO operations performed at ones in a single
DMA client request). This parameter can be used to setup the most
optimal DMA Tx/Rx data level values. In order to avoid the Tx buffer
overrun we can set the DMA Tx l
In general each DMA-based SPI transfer can be split up into two stages:
DMA data transmission/reception and SPI-bus transmission/reception. DMA
asynchronous transactions completion can be tracked by means of the
DMA async Tx-descriptor completion callback. But that callback being
called indicates t
Generic DMA support is going to be part of the DW APB SSI core object.
In order to preserve the kernel loadable module name as spi-dw.ko, let's
add the "-core" suffix to the object with generic DW APB SSI code and
build it into the target spi-dw.ko driver.
Signed-off-by: Serge Semin
Suggested-by:
Seeing DW APB SSI controller doesn't support setting the exactly
requested SPI bus frequency, but only a rounded frequency determined
by means of the odd-numbered half-worded reference clock divider,
it would be good to tune the SPI core up and initialize the current
transfer effective_speed_hz. By
Having any data left in the Rx FIFO after the DMA engine claimed it has
finished all DMA transactions is an abnormal situation, since the DW SPI
controller driver expects to have all the data being fetched and placed
into the SPI Rx buffer at that moment. In case if that has happened we
hopefully a
This is a preparation patch before adding the DW DMA support into the
DW SPI MMIO driver. We need to unpin the Non-DMA-specific code from the
intended to be generic DW APB SSI DMA code. This isn't that hard,
since the most part of the spi-dw-mid.c driver in fact implements a
generic DMA interface f
Since the common code in the spi-dw-dma.c driver is ready to be used
by the MMIO driver and now provides a method to generically (on any
DT or ACPI-based platforms) retrieve the Tx/Rx DMA channel handlers,
we can use it and a set of the common DW SPI DMA callbacks to enable
DMA at least for generic
Seeing all of the DW SPI driver components like DW SPI DMA/PCI/MMIO
depend on the DW SPI core code it's better to use the if-endif
conditional kernel config statement to signify that common dependency.
Co-developed-by: Georgy Vlasov
Signed-off-by: Georgy Vlasov
Co-developed-by: Ramil Zaripov
Si
Since DMA transfers are performed asynchronously with actual SPI bus
transfers, then even if DMA transactions are finished it doesn't mean
all data is actually pushed to the SPI bus. Some data might still be
in the controller FIFO. This is specifically true for Tx-only transfers.
In this case if th
DW APB SSI DMA-part of the driver may need to perform the requested
SPI-transfer synchronously. In that case the dma_transfer() callback
will return 0 as a marker of the SPI transfer being finished so the
SPI core doesn't need to wait and may proceed with the SPI message
trasnfers pumping procedure
Modern device tree bindings are supposed to be created as YAML-files
in accordance with dt-schema. This commit replaces two DW SPI legacy
bare text bindings with YAML file. As before the bindings file states
that the corresponding dts node is supposed to be compatible either
with generic DW APB SSI
It isn't good to have numeric literals in the code especially if there
are multiple of them and they are related. Let's replace the Tx and Rx
burst level literals with the corresponding constants.
Co-developed-by: Georgy Vlasov
Signed-off-by: Georgy Vlasov
Co-developed-by: Ramil Zaripov
Signed-
Since from now the former Intel MID platform layer is used as a generic
DW SPI DMA module, let's alter the internal methods naming to be
DMA-related instead of having the "mid_" prefix.
Co-developed-by: Georgy Vlasov
Signed-off-by: Georgy Vlasov
Co-developed-by: Ramil Zaripov
Signed-off-by: Ram
Since there is a generic method available to initialize the DW SPI DMA
interface on any DT and ACPI-based platforms, which in general can be
designed with not only DW DMAC but with any DMA engine on board, we can
freely remove the CONFIG_DW_DMAC_PCI config from dependency list of
CONFIG_SPI_DW_DMA.
DebugFS kernel interface provides a dedicated method to create the
registers dump file. Use it instead of creating a generic DebugFS
file with manually written read callback function.
Signed-off-by: Serge Semin
Reviewed-by: Andy Shevchenko
Cc: Georgy Vlasov
Cc: Ramil Zaripov
Cc: Alexey Malahov
Baikal-T1 SoC provides a DW DMA controller to perform low-speed peripherals
Mem-to-Dev and Dev-to-Mem transaction. This is also applicable to the DW
APB SSI devices embedded into the SoC. Currently the DMA-based transfers
are supported by the DW APB SPI driver only as a middle layer code for
Intel
Tx-only DMA transfers are working perfectly fine since in this case
the code just ignores the Rx FIFO overflow interrupts. But it turns
out the SPI Rx-only transfers are broken since nothing pushing any
data to the shift registers, so the Rx FIFO is left empty and the
SPI core subsystems just retur
Hello,
syzbot found the following crash on:
HEAD commit:7b4cb0a4 Add linux-next specific files for 20200525
git tree: linux-next
console output: https://syzkaller.appspot.com/x/log.txt?x=15dc34ba10
kernel config: https://syzkaller.appspot.com/x/.config?x=47b0740d89299c10
dashboard
On 2020-05-04 11:40:08 [+0200], Mark Marshall wrote:
> The easiest way we have found to reproduce the crash is to repeatedly
> insert and then remove a module. The crash then appears to be related
> to either paging in the module or in exiting the mdev process. (The
> crash does also happen at ot
Applied, thanks.
On Thu, May 28, 2020 at 11:03:51AM -0700, Jacob Pan wrote:
> Make intel_svm_unbind_mm() a static function.
>
> Fixes: 064a57d7ddfc ("iommu/vt-d: Replace intel SVM APIs with generic
> SVA APIs")
Please make sure the fixes tags (or any other tags) are not line-wrapped
in future pa
On Wed, May 27, 2020 at 11:19 PM Lad Prabhakar
wrote:
> This patch instantiates the thermal sensor module with thermal-zone
> support.
>
> Signed-off-by: Lad Prabhakar
> Reviewed-by: Marian-Cristian Rotariu
>
Reviewed-by: Geert Uytterhoeven
i.e. will queue in renesas-devel for v5.9.
Gr{oetje
On Fri, May 29, 2020 at 3:14 PM syzbot
wrote:
>
> Hello,
>
> syzbot found the following crash on:
>
> HEAD commit:7b4cb0a4 Add linux-next specific files for 20200525
> git tree: linux-next
> console output: https://syzkaller.appspot.com/x/log.txt?x=15dc34ba10
> kernel config: https:
On Wed, Apr 29, 2020 at 04:48:47PM +0100, Colin King wrote:
> From: Colin Ian King
>
> The variable ret is being assigned with a value that is never read
> and it is being updated later with a new value. The initialization is
> redundant and can be removed.
>
> Addresses-Coverity: ("Unused value
Hi,
On 29/05/2020 12:13:14+0200, Sebastian Andrzej Siewior wrote:
> Rob, could you please bless the DT parts of this series? Daniel Lezcano
> asked for the blessing in:
> https://lkml.kernel.org/r/f0feb409-11fb-08de-cc06-216a16de9...@linaro.org
>
There is actually one comment I need to address
Hi Luc,
On 29/5/20 6:25 am, Luc Van Oostenryck wrote:
The assembly for __get_user_asm() & __put_user_asm() uses memcpy()
when the size is 8.
However, the pointer is always a __user one while memcpy() expect
a plan one and so this cast creates a lot of warnings when using
Did you mean
On Sat 2020-05-16 15:20:02, William Breathitt Gray wrote:
> This patch adds high-level documentation about the Counter subsystem
> character device interface.
>
> Signed-off-by: William Breathitt Gray
> ---
> Documentation/driver-api/generic-counter.rst | 112 +--
> 1 file change
Hello, Dmitry.
Linus is asking me to avoid build-time switching based on kernel config options,
and is suggesting me to use boot-time switching based on boot-config file
feature
(which is available since 5.6). I have several concerns about use of
boot-config file
feature in syzkaller.
(1) To us
On Fri, May 29, 2020 at 04:11:49PM +0300, Serge Semin wrote:
> Baikal-T1 SoC provides a DW DMA controller to perform low-speed peripherals
> Mem-to-Dev and Dev-to-Mem transaction. This is also applicable to the DW
> APB SSI devices embedded into the SoC. Currently the DMA-based transfers
> are supp
On Wed, May 27, 2020 at 04:00:19PM -0500, wu000...@umn.edu wrote:
> From: Qiushi Wu
>
> kobject_init_and_add() takes reference even when it fails.
> Thus, when kobject_init_and_add() returns an error,
> kobject_put() must be called to properly clean up the kobject.
>
> Fixes: d72e31c93746 ("iomm
On Fri, May 29, 2020 at 04:31:26PM +0800, Hillf Danton wrote:
> Hold another grab to dev to prevent it from going home before work gets
> done with it.
>
> +++ b/drivers/infiniband/core/uverbs_main.c
> @@ -1152,6 +1152,8 @@ static int ib_uverbs_add_one(struct ib_d
> device->ops.mma
On Fri, May 29, 2020 at 12:41:51AM -0700, Kees Cook wrote:
> On Thu, May 28, 2020 at 04:08:58AM -0700, Sargun Dhillon wrote:
> > + EXPECT_EQ(ioctl(listener, SECCOMP_IOCTL_NOTIF_SEND, &resp), 0);
> > +
> > + nextid = req.id + 1;
> > +
> > + /* Wait for getppid to be called for the second time
On Thu, May 28, 2020 at 04:08:55AM -0700, Sargun Dhillon wrote:
> This adds the capability for seccomp notifier listeners to add file
> descriptors
Modulo the changes suggested by others, you can consider this series:
Reviewed-by: Tycho Andersen
On Thu, May 28, 2020 at 01:57:17PM +1000, Stephen Rothwell wrote:
> Hi all,
>
> After merging the sound-asoc tree, today's linux-next build (x86_64
> allmodconfig) produced this warning:
>
> sound/soc/sof/intel/byt.c:464:12: warning: 'byt_remove' defined but not used
> [-Wunused-function]
> 46
On 2020-05-29 10:08:01 [+0200], Michael Nazzareno Trimarchi wrote:
> Hi all
Hi,
> I get this stack trace
> echo 3 > /proc/sys/vm/drop_caches chrt -f 99 sysbench --test=cpu
> --num-threads=2
>
> First of all, I need to know that if it is a valid use case because
> was raised by the testing team a
On Fri, May 29, 2020 at 12:32:55PM +0200, Christian Brauner wrote:
> On Thu, May 28, 2020 at 04:08:57AM -0700, Sargun Dhillon wrote:
> > This adds a seccomp notifier ioctl which allows for the listener to "add"
> > file descriptors to a process which originated a seccomp user
> > notification. This
acpi_dev_get_resources() does perform the NULL pointer check against
ACPI companion device which is given as function parameter. Thus,
there is no need to duplicate this check in the caller.
Signed-off-by: Andy Shevchenko
---
drivers/hwtracing/coresight/coresight-stm.c | 2 --
1 file changed, 2
When client tries to connect(SOCK_STREAM) the server in the guest with NONBLOCK
mode, there will be a panic on a ThunderX2 (armv8a server):
[ 463.718844][ T5040] Unable to handle kernel NULL pointer dereference at
virtual address
[ 463.718848][ T5040] Mem abort info:
[ 463.7188
On 5/28/20 11:37 PM, Dexuan Cui wrote:
> parse_apic() allows the user to try a different apic driver than the
> default one that's automatically chosen. It works for x86_32, but
> doesn't work for x86_64 becauase it was removed in 2009 for x86_64 by:
> commit 7b38725318f4 ("x86: remove subarchitect
Hi!
> AK09911 has a reset gpio to handle register's reset. If reset gpio is
> set to low it will trigger the reset. AK09911 datasheed says that if not
> used reset pin should be connected to VID and this patch emulates this
> situation
>
> Signed-off-by: Jonathan Albrieux
> ---
> drivers/iio/ma
On Fri, May 29, 2020 at 12:15:27PM +1000, Dave Airlie wrote:
> On Fri, 29 May 2020 at 12:02, Dave Airlie wrote:
> >
> > On Fri, 29 May 2020 at 11:49, Linus Torvalds
> > wrote:
> > >
> > > On Thu, May 28, 2020 at 5:21 PM Dave Airlie wrote:
> > > >
> > > > Seems to have wound down nicely, a couple
On 2020-05-29 15:21:18 [+0200], Alexandre Belloni wrote:
> There is actually one comment I need to address that Rob made on another
> series that was also including this patch. I'll send a new version
> today.
Ah, okay. Thanks for the info, that thread looked dead.
Sebastian
On Fri, May 29, 2020 at 01:40:32AM +0200, Frederic Weisbecker wrote:
> On Tue, May 26, 2020 at 06:11:02PM +0200, Peter Zijlstra wrote:
> > +/*
> > + * structure shares layout with single_call_data_t.
> > + */
> > struct irq_work {
> > - atomic_t flags;
> > struct llist_node llnode;
> > +
On Fri, May 29, 2020 at 07:57:36AM +0200, Christoph Hellwig wrote:
> On Thu, May 28, 2020 at 08:00:52PM +0100, Al Viro wrote:
> > On Thu, May 28, 2020 at 07:40:38AM +0200, Christoph Hellwig wrote:
> > > If we write to a file that implements ->write_iter there is no need
> > > to change the address
On Wed, May 27, 2020 at 11:19 PM Lad Prabhakar
wrote:
> Add CMT[01] support to r8a7742 SoC DT.
>
> Signed-off-by: Lad Prabhakar
> Reviewed-by: Marian-Cristian Rotariu
>
Reviewed-by: Geert Uytterhoeven
i.e. will queue in renesas-devel for v5.9.
Gr{oetje,eeting}s,
Geer
On 5/29/2020 4:05 PM, Ulf Hansson wrote:
On Thu, 28 May 2020 at 17:14, Veerabhadrarao Badiganti
wrote:
Clear tuning_done flag while executing tuning to ensure vendor
specific HS400 settings are applied properly when the controller
is re-initialized in HS400 mode.
Without this, re-initializat
From: Sandeep Singh
Add Maintainers for AMD SFH(SENSOR FUSION HUB) Solution and work flow
document.
Signed-off-by: Sandeep Singh
Signed-off-by: Nehal Shah
---
Documentation/hid/amd-sfh-hid.rst | 160 ++
MAINTAINERS | 8 ++
2 files ch
From: Sandeep Singh
AMD SFH uses HID over PCIe bus.SFH fw is part of MP2
processor (MP2 which is an ARM® Cortex-M4 core based
co-processor to x86) and it runs on MP2 where in driver resides
on X86. This part of module will communicate with MP2 FW and
provide that data into DRAM
Signed-off-by: Sa
From: Sandeep Singh
AMD SFH(Sensor Fusion Hub) is HID based driver.SFH FW
is part of MP2 processor (MP2 which is an ARM® Cortex-M4
core based co-processor to x86) and it runs on MP2 where
in driver resides on X86.The driver functionalities are
divided into three parts:-
1: amd-mp2-pcie:-
From: Sandeep Singh
This part of module will provide the interaction between HID framework
and client driver.This modules will registered client driver with
HID framework.
Signed-off-by: Sandeep Singh
Signed-off-by: Nehal Shah
Reported-by: kbuild test robot
Reported-by: Dan Carpenter
---
dr
From: Sandeep Singh
This part of module will define the data into HID reports.
Get data from PCIe driver and populate that data into
reports. HID core communication between devices and
HID core is mostly done via HID reports.
Signed-off-by: Nehal Shah
Signed-off-by: Sandeep Singh
---
.../hid_
[ Trimming CC to something more reasonable... ]
On Fri, May 29, 2020 at 11:08:38AM +, Ardelean, Alexandru wrote:
> On Fri, 2020-05-29 at 12:16 +0200, Johan Hovold wrote:
> > On Fri, May 22, 2020 at 11:22:07AM +0300, Alexandru Ardelean wrote:
> > > This assignment is the more peculiar of the bu
Hi
On Fri, May 29, 2020 at 3:31 PM Sebastian Andrzej Siewior
wrote:
>
> On 2020-05-29 10:08:01 [+0200], Michael Nazzareno Trimarchi wrote:
> > Hi all
> Hi,
>
> > I get this stack trace
> > echo 3 > /proc/sys/vm/drop_caches chrt -f 99 sysbench --test=cpu
> > --num-threads=2
> >
> > First of all,
On Fri, May 29, 2020 at 08:10:40AM +, Peter Chen wrote:
> On 20-05-28 20:30:28, Michał Mirosław wrote:
> > Make debugging real problems easier by not trying to disable an EP that
> > was not yet enabled.
> >
> > Fixes: 4aab757ca44a ("usb: gadget: f_acm: eliminate abuse of ep->driver
> > data"
On Thu, 28 May 2020 22:56:59 -0700
Kees Cook wrote:
> On Thu, May 28, 2020 at 11:52:06PM +0900, Masami Hiramatsu wrote:
> > Make prime number generator independently selectable from
> > kconfig. This allows us to enable CONFIG_PRIME_NUMBERS=m
> > and run the tools/testing/selftests/lib/prime_numb
On Fri, May 29, 2020 at 12:16:31AM -0400, Valdis Klētnieks wrote:
> commit 9088b449814f788d24f35a5840b6b2c2a23cd32a
> Author: Paul E. McKenney
> Date: Mon May 25 17:22:24 2020 -0700
>
> refperf: Provide module parameter to specify number of experiments
>
> changes this line of code (line 3
On 5/29/20 8:30 AM, Mark Brown wrote:
On Thu, May 28, 2020 at 01:57:17PM +1000, Stephen Rothwell wrote:
Hi all,
After merging the sound-asoc tree, today's linux-next build (x86_64
allmodconfig) produced this warning:
sound/soc/sof/intel/byt.c:464:12: warning: 'byt_remove' defined but not us
Hi Linus,
please pull a kernel panic fix for the parisc architecture for kernel 5.7 from:
git://git.kernel.org/pub/scm/linux/kernel/git/deller/parisc-linux.git
parisc-5.7-2
Fix a kernel panic at boot time for some HP-PARISC machines.
Thanks,
Helge
---
Warm reboot can not reset controller qca6390 due to
lack of controllable power supply, so causes firmware
download failure during enable.
Fixed by sending VSC EDL_SOC_RESET to reset qca6390
within added device shutdown implementation.
Signed-off-by: Zijun Hu
Tested-by: Zijun Hu
---
Changes in v
On Thu, May 28, 2020 at 07:20:05PM +0200, Peter Zijlstra wrote:
> > on x86_64:
> >
> > arch/x86/lib/csum-wrappers_64.o: warning: objtool:
> > csum_and_copy_from_user()+0x2a4: call to memset() with UACCESS enabled
> > arch/x86/lib/csum-wrappers_64.o: warning: objtool:
> > csum_and_copy_to_user()+
Hello,
syzbot found the following crash on:
HEAD commit:b0c3ba31 Merge tag 'fsnotify_for_v5.7-rc8' of git://git.ke..
git tree: upstream
console output: https://syzkaller.appspot.com/x/log.txt?x=13ebe5e210
kernel config: https://syzkaller.appspot.com/x/.config?x=cca7550d53ffa599
das
On 5/29/2020 7:45 PM, Marcel Holtmann wrote:
> Hi Zijun,
>
>> On May 29, 2020, at 04:29, Zijun Hu wrote:
>>
>> Warm reboot can not reset controller qca6390 due to
>> lack of controllable power supply, so causes firmware
>> download failure during enable.
>>
>> Fixed by sending VSC EDL_SOC_RESE
On Fri, May 29, 2020 at 01:24:39AM -0400, Valdis Klētnieks wrote:
> On Thu, 28 May 2020 21:48:18 -0700, Randy Dunlap said:
>
> > > ERROR: modpost: "__aeabi_uldivmod" [kernel/rcu/refperf.ko] undefined!
>
> Gaah. And the reason I didn't spot Paul's post while grepping my linux-kernel
> mailbox is
Stephen Boyd writes:
> Quoting Lars Povlsen (2020-05-13 05:55:28)
>> diff --git
>> a/Documentation/devicetree/bindings/clock/microchip,sparx5-dpll.yaml
>> b/Documentation/devicetree/bindings/clock/microchip,sparx5-dpll.yaml
>> new file mode 100644
>> index 0..594007d8fc59a
>> --- /
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On Fri, May 29, 2020 at 4:42 PM Sandeep Singh wrote:
>
> From: Sandeep Singh
>
> AMD SFH uses HID over PCIe bus.SFH fw is part of MP2
> processor (MP2 which is an ARM® Cortex-M4 core based
> co-processor to x86) and it runs on MP2 where in driver resides
> on X86. This part of module will communi
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