On Wed, 27 May, at 12:25:33PM, Jiri Olsa wrote:
> On Tue, May 26, 2020 at 02:59:28PM +0100, Matt Fleming wrote:
> > +/*
> > + * Allocate a new event object from the free event cache.
> > + *
> > + * Find the first address range in the cache and carve out enough bytes
> > + * for an ordered_event ob
On Thu, 28 May 2020 at 01:23, Russell King - ARM Linux admin
wrote:
>
> Ard,
>
> Please take a look. Obviously, whatever the resolution is going to be
> needed when Linus opens the merge window.
>
Sorry for that.
I have pushed the signed tag below to resolve it. Those changes were
already in v5
* Al Viro wrote:
> xstate note on boxes with xsaves support can leak uninitialized data
> into coredumps
>
> The following changes since commit 4e89b7210403fa4a8acafe7c602b6212b7af6c3b:
>
> fix multiplication overflow in copy_fdtable() (2020-05-19 18:29:36 -0400)
>
> are available in
tree/branch: https://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git
x86/cleanups
branch HEAD: e027a2bc934fd05d52ec5b77d159efdfc485b5b3 x86/apb_timer: Drop
unused declaration and macro
elapsed time: 1174m
configs tested: 99
configs skipped: 3
The following configs have been built success
On Wed, 27 May 2020 21:01:09 -0500
wu000...@umn.edu wrote:
> From: Qiushi Wu
>
> kobject_init_and_add() takes reference even when it fails.
> If this function returns an error, kobject_put() must be called to
> properly clean up the memory associated with the object. Thus,
> replace kfree() by k
Hi,
On Tue, May 26, 2020 at 04:50:59PM +0300, Serge Semin wrote:
> This is a small patchset about tuning the syscon infrastructure a bit.
> As it's going to be general in the framework of the Baikal-T1 SoC support
> integration into the kernel, we suggest to replace the legacy text-based
> syscon-
On 2020-05-28 07:14, Gavin Shan wrote:
Hi Paolo,
On 5/27/20 4:48 PM, Paolo Bonzini wrote:
I definitely appreciate the work, but this is repeating most of the
mistakes done in the x86 implementation. In particular:
- the page ready signal can be done as an interrupt, rather than an
exception.
On Thu, May 28, 2020 at 5:26 AM kbuild test robot wrote:
> tree: https://git.kernel.org/pub/scm/linux/kernel/git/paulmck/linux-rcu.git
> dev.2020.05.26a
> head: 63fdce1252f16032c9e1eb7244bb674ba4f84855
> commit: bd5b16d6c88da451a46d068a25fafad8e83d14a6 [56/72] refperf: Allow
> decimal nanose
On Thu, May 28, 2020 at 09:02:55AM +0200, Ingo Molnar wrote:
> Looks good to me.
>
> I'm wondering, shouldn't we also zero-initialize the dump data to
> begin with? See the patch below (untested).
Note that this hides the bug from KASAN, though ;-) And the bug
is not just infoleak - not all co
Hi Andrew-sh.Cheng,
The exynos-bus.c used the passive governor.
Even if don't make the problem because DEVFREQ_PARENT_DEV is zero,
you need to initialize the parent_type with DEVFREQ_PARENT_DEV as following:
diff --git a/drivers/devfreq/exynos-bus.c b/drivers/devfreq/exynos-bus.c
index 8fa8eb5413
Hi,
Thanks for taking care of it Lee, merged!
-- Sebastian
On Tue, May 26, 2020 at 10:47:02AM +0100, Lee Jones wrote:
> Enjoy!
>
> The following changes since commit 8f3d9f354286745c751374f5f1fcafee6b3f3136:
>
> Linux 5.7-rc1 (2020-04-12 12:35:55 -0700)
>
> are available in the Git reposito
On 27. 05. 20 16:26, Dejin Zheng wrote:
> Use devm_platform_request_irq() to simplify code, and it contains
> platform_get_irq() and devm_request_irq().
>
> Cc: Michal Simek
> Cc: Wolfram Sang
> Signed-off-by: Dejin Zheng
> Acked-by: Linus Walleij
> ---
> v2 -> v3:
> - no changed and Tha
On 5/22/2020 10:34 PM, Bjorn Andersson wrote:
On Fri 22 May 06:27 PDT 2020, Veerabhadrarao Badiganti wrote:
Hi Bjorn,
On 5/22/2020 12:37 AM, Bjorn Andersson wrote:
On Thu 21 May 08:23 PDT 2020, Veerabhadrarao Badiganti wrote:
On qcom SD host controllers voltage switching be done after the
> On Wed, May 20, 2020 at 12:45:56PM -0400, st...@rowland.harvard.edu wrote:
> > On Wed, May 20, 2020 at 03:42:17PM +, Sverdlin, Alexander (Nokia -
> > DE/Ulm) wrote:
> > > Hello Dinghao,
> > >
> > > On Wed, 2020-05-20 at 21:29 +0800, Dinghao Liu wrote:
> > > > pm_runtime_get_sync() increment
Hi Stephen,
Stephen Rothwell wrote on Thu, 28 May 2020
14:52:05 +1000:
> Hi all,
>
> Today's linux-next merge of the devicetree tree got a conflict in:
>
> Documentation/devicetree/bindings/mtd/nand-controller.yaml
>
> between commit:
>
> 1777341d9335 ("dt-bindings: mtd: Deprecate OOB_FI
2020년 5월 27일 (수) 오후 10:43, Johannes Weiner 님이 작성:
>
> On Wed, May 27, 2020 at 11:06:47AM +0900, Joonsoo Kim wrote:
> > 2020년 5월 21일 (목) 오전 8:26, Johannes Weiner 님이 작성:
> > >
> > > We activate cache refaults with reuse distances in pages smaller than
> > > the size of the total cache. This allows ne
dtc does a sanity check on reg properties that they are within the 10
bit address range for i2c slave addresses. In the case of multi-master
buses or devices that act as a slave, the binding may describe an
address that the bus will listen on as a device. Do not warn when this
flag is set.
See Doc
The i2c bindings in the kernel tree describe support for 10 bit
addressing, which must be indicated with the I2C_TEN_BIT_ADDRESS flag.
When this is set the address can be up to 10 bits. When it is not set
the address is a maximum of 7 bits.
See Documentation/devicetree/bindings/i2c/i2c.txt.
Take
On Wed, May 27, 2020 at 11:17:33AM -0700, Nick Desaulniers wrote:
> On Wed, May 27, 2020 at 11:08 AM Will Deacon wrote:
> >
> > On Wed, May 27, 2020 at 10:55:24AM -0700, Nick Desaulniers wrote:
> > > On Wed, May 27, 2020 at 6:45 AM Robin Murphy wrote:
> > > >
> > > > On 2020-05-26 18:31, Nick Des
This is to fix a build warning in the Linux kernel caused by dtc
incorrectly warning about I2C_OWN_SLAVE_ADDRESS.
v2 contains a second patch to check for 10 bit vs 7 bit addresses.
Joel Stanley (2):
checks: Remove warning for I2C_OWN_SLAVE_ADDRESS
checks: Improve i2c reg property checking
c
pm_runtime_get_sync() increments the runtime PM usage counter even
the call returns an error code. Thus a pairing decrement is needed
on the error handling path to keep the counter balanced.
Signed-off-by: Dinghao Liu
---
Changelog:
v2: - Use pm_runtime_put_noidle() instead of pm_runtime_put_sy
Hi,
On 5/27/20 7:30 PM, Robin Murphy wrote:
> On 2020-05-27 17:03, Srinath Mannam wrote:
>> This patch gives the provision to change default value of MSI IOVA base
>> to platform's suitable IOVA using module parameter. The present
>> hardcoded MSI IOVA base may not be the accessible IOVA ranges of
On Thu, 28 May 2020 at 06:09, Joel Stanley wrote:
>
> On Fri, 22 May 2020 at 08:16, Arnd Bergmann wrote:
> >
> > On Fri, May 22, 2020 at 2:16 AM Stephen Rothwell
> > wrote:
> > > On Wed, 20 May 2020 07:56:36 + Joel Stanley wrote:
> > > > I've sent the patch so it applies to the dtc tree. I
On Thu, May 28, 2020 at 10:45:14AM +0530, Srinath Mannam wrote:
> On Wed, May 27, 2020 at 11:00 PM Robin Murphy wrote:
> >
> Thanks Robin for your quick response.
> > On 2020-05-27 17:03, Srinath Mannam wrote:
> > > This patch gives the provision to change default value of MSI IOVA base
> > > to p
Hi Laurent,
> -Original Message-
> From: Laurent Pinchart
> Sent: Wednesday, May 27, 2020 9:42 PM
> To: Vishal Sagar
> Cc: Hyun Kwon ; mche...@kernel.org;
> robh...@kernel.org; mark.rutl...@arm.com; Michal Simek
> ; linux-me...@vger.kernel.org;
> devicet...@vger.kernel.org; hans.verk...@
Hi Andrew-sh.Cheng,
On 5/20/20 12:43 PM, Andrew-sh.Cheng wrote:
> This adds a devfreq driver for the Cache Coherent Interconnect (CCI)
> of the Mediatek MT8183.
>
> On the MT8183 the CCI is supplied by the same regulator as the LITTLE
> cores. The driver is notified when the regulator voltage cha
tree: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
master
head: b0c3ba31be3e45a130e13b278cf3b90f69bda6f6
commit: 57d563c8292569f2849569853e846bf740df5032 x86: ia32_setup_rt_frame():
consolidate uaccess areas
date: 9 weeks ago
config: x86_64-randconfig-s022-20200528
* Ingo Molnar wrote:
>
> * Al Viro wrote:
>
> > xstate note on boxes with xsaves support can leak uninitialized data
> > into coredumps
> >
> > The following changes since commit 4e89b7210403fa4a8acafe7c602b6212b7af6c3b:
> >
> > fix multiplication overflow in copy_fdtable() (2020-05-
On Wed, May 27, 2020 at 9:39 PM Nick Gasson wrote:
>
> On 05/28/20 02:08 AM, Ian Rogers wrote:
> >>
> >> I noticed it loses information when the Hotspot code cache is
> >> resized. I've been working around that by setting
> >> -XX:InitialCodeCacheSize and -XX:ReservedCodeCacheSize to large
> >> va
Hi Daniel,
On Wed, May 27, 2020 at 05:15:12PM +0800, Daniel Drake wrote:
> On Wed, May 27, 2020 at 5:13 PM Maxime Ripard wrote:
> > I'm about to send a v3 today or tomorrow, I can Cc you (and Jian-Hong) if
> > you
> > want.
>
> That would be great, although given the potentially inconsistent
>
> -Original Message-
> From: Greg KH
> Sent: Wednesday, May 27, 2020 9:02 PM
> To: Ashwin H
> Cc: x...@kernel.org; dri-de...@lists.freedesktop.org; intel-
> g...@lists.freedesktop.org; linux-kernel@vger.kernel.org; sta...@kernel.org;
> Srivatsa Bhat ; sriva...@csail.mit.edu;
> rost...@
On Wed, May 27, 2020 at 10:41 PM Nick Gasson wrote:
>
> For each PC/BCI pair in the JVMTI compiler inlining record table, the
> jitdump plugin emits debug line table entries for every source line in
> the method preceding that BCI. Instead only emit one source line per
> PC/BCI pair. Reported by I
From: Xiaoming Gao
when kernel crash, and kexec into kdump kernel, megaraid_sas will hung and
print follow error logs
24.1485901 sd 0:0:G:0: [sda 1 tag809 BRCfl Debug mfi stat 0x2(1, data len
requested/conpleted 0X100
0/0x0)]
24.1867171 sd 0:0:G :9: [sda I tag861 BRCfl Debug mfft stat 0x2d, dat
Hi,
On 5/20/20 12:43 PM, Andrew-sh.Cheng wrote:
> This adds dt-binding documentation of cci devfreq
> for Mediatek MT8183 SoC platform.
>
> Signed-off-by: Andrew-sh.Cheng
> ---
> .../devicetree/bindings/devfreq/mt8183-cci.yaml| 51
> ++
> 1 file changed, 51 insertions(+
On Wed, May 27, 2020 at 01:18:42PM -0500, Bjorn Helgaas wrote:
> Is this slowdown significant? We already iterate over every device
> when applying PCI_FIXUP_FINAL quirks, so if we used the existing
> PCI_FIXUP_FINAL, we wouldn't be adding a new loop. We would only be
> adding two more iterations
On Tue, May 19, 2020 at 10:36:54PM +0200, Christophe JAILLET wrote:
> s/NITORX/NITROX/
>
> Signed-off-by: Christophe JAILLET
> ---
> drivers/crypto/cavium/nitrox/nitrox_main.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
Patch applied. Thanks.
--
Email: Herbert Xu
Home Page: http:
On Wed, May 20, 2020 at 01:17:25AM +0300, Iuliana Prodan wrote:
> Now, in crypto-engine, if hardware queue is full (-ENOSPC),
> requeue request regardless of MAY_BACKLOG flag.
> If hardware throws any other error code (like -EIO, -EINVAL,
> -ENOMEM, etc.) only MAY_BACKLOG requests are enqueued back
On Wed, May 27, 2020 at 10:35:09PM +0200, Borislav Petkov wrote:
> > One idea would be to provide a Kconfig a la NR_CPUS or NODES_SHIFT. I.e.
> > carve out the bits in sgx_epc_page_desc to allow up to N sections, but let
> > the user limit the number of sections to recoup the unused memory.
>
>
Convert the i.MX27 clock binding to DT schema format using json-schema.
Signed-off-by: Anson Huang
---
.../devicetree/bindings/clock/imx27-clock.txt | 27 ---
.../devicetree/bindings/clock/imx27-clock.yaml | 53 ++
2 files changed, 53 insertions(+), 27 deleti
The patch series converts i.MX legacy platforms clock binding to
json-schema, including i.MX1, i.MX21, i.MX23, i.MX25, i.MX27, i.MX28,
i.MX31, i.MX35 and i.MX5.
On i.MX21, the CCM has no interrupt at all, so remove the interrupts
property from original binding doc.
Anson Huang (9):
dt-bindings:
Convert the i.MX25 clock binding to DT schema format using json-schema.
Signed-off-by: Anson Huang
---
.../devicetree/bindings/clock/imx25-clock.txt | 160 --
.../devicetree/bindings/clock/imx25-clock.yaml | 184 +
2 files changed, 184 insertions(+),
Convert the i.MX35 clock binding to DT schema format using json-schema.
Signed-off-by: Anson Huang
---
.../devicetree/bindings/clock/imx35-clock.txt | 114 -
.../devicetree/bindings/clock/imx35-clock.yaml | 137 +
2 files changed, 137 insertions(+), 1
Convert the i.MX21 clock binding to DT schema format using json-schema,
can NOT find any CCM interrupt info from reference manual and DT file,
so interrupts property is removed from original binding doc.
Signed-off-by: Anson Huang
---
.../devicetree/bindings/clock/imx21-clock.txt | 27 -
Convert the i.MX31 clock binding to DT schema format using json-schema.
Signed-off-by: Anson Huang
---
.../devicetree/bindings/clock/imx31-clock.txt | 90
.../devicetree/bindings/clock/imx31-clock.yaml | 118 +
2 files changed, 118 insertions(+), 90
Convert the i.MX28 clock binding to DT schema format using json-schema.
Signed-off-by: Anson Huang
---
.../devicetree/bindings/clock/imx28-clock.txt | 93 -
.../devicetree/bindings/clock/imx28-clock.yaml | 113 +
2 files changed, 113 insertions(+), 9
Convert the i.MX5 clock binding to DT schema format using json-schema.
Signed-off-by: Anson Huang
---
.../devicetree/bindings/clock/imx5-clock.txt | 28 --
.../devicetree/bindings/clock/imx5-clock.yaml | 63 ++
2 files changed, 63 insertions(+), 28 deletion
Update uart4 pin configuration for low power in pinctrl, and for ed/ev
and dkx boards.
Erwan Le Ray (3):
ARM: dts: stm32: update uart4 pin configuration for low power on
stm32mp157
ARM: dts: stm32: Update pin states for uart4 on stm32mp157c-ed1
ARM: dts: stm32: Update UART4 pin states on
Convert the i.MX1 clock binding to DT schema format using json-schema.
Signed-off-by: Anson Huang
---
.../devicetree/bindings/clock/imx1-clock.txt | 26
.../devicetree/bindings/clock/imx1-clock.yaml | 49 ++
2 files changed, 49 insertions(+), 26 deleti
Convert the i.MX23 clock binding to DT schema format using json-schema.
Signed-off-by: Anson Huang
---
.../devicetree/bindings/clock/imx23-clock.txt | 70 -
.../devicetree/bindings/clock/imx23-clock.yaml | 90 ++
2 files changed, 90 insertions(+), 70
Sleep pin configuration is refined for low power modes:
- "sleep" (no wakeup & console suspend enabled): put pins in analog state
to optimize power
- "idle" (wakeup capability): keep Rx pin in alternate function
Signed-off-by: Bich Hemon
Signed-off-by: Erwan Le Ray
diff --git a/arch/arm/boot/
Add sleep and idle states to uart4 pin configuration.
Signed-off-by: Erwan Le Ray
diff --git a/arch/arm/boot/dts/stm32mp15xx-dkx.dtsi
b/arch/arm/boot/dts/stm32mp15xx-dkx.dtsi
index 70db923a45f7..e5fdbc149bf4 100644
--- a/arch/arm/boot/dts/stm32mp15xx-dkx.dtsi
+++ b/arch/arm/boot/dts/stm32mp15xx
Add sleep and idle states to uart4 pin configuration.
Signed-off-by: Erwan Le Ray
diff --git a/arch/arm/boot/dts/stm32mp157c-ed1.dts
b/arch/arm/boot/dts/stm32mp157c-ed1.dts
index 32ccd50b4144..ca109dc18238 100644
--- a/arch/arm/boot/dts/stm32mp157c-ed1.dts
+++ b/arch/arm/boot/dts/stm32mp157c-ed
Adds usart3 node to stm32mp15xx-dkx and usart3 alias to stm32mp157a-dk1
and stm32mp157c-dk2 boards. usart3 pins are connected to GPIO Expansion
connector. usart3 is disabled by default.
Signed-off-by: Erwan Le Ray
diff --git a/arch/arm/boot/dts/stm32mp157a-dk1.dts
b/arch/arm/boot/dts/stm32mp157
Adds the usart2 node to stm32mp157c-dk2 board. usart2 pins are connected
to Bluetooth component. usart2 is disabled by default.
Signed-off-by: Erwan Le Ray
diff --git a/arch/arm/boot/dts/stm32mp157c-dk2.dts
b/arch/arm/boot/dts/stm32mp157c-dk2.dts
index ffbae4a8753d..045636555ddd 100644
--- a/ar
Fix uart7_pins_a comments to indicate UART7 pins instead of UART4 pins.
Fixes: bf4b5f379fed ("ARM: dts: stm32: Add missing pinctrl definitions for
STM32MP157")
Signed-off-by: Erwan Le Ray
diff --git a/arch/arm/boot/dts/stm32mp15-pinctrl.dtsi
b/arch/arm/boot/dts/stm32mp15-pinctrl.dtsi
index 5f
Add the support of uart instances available on STM32MP157 boards:
- usart3 on stm32mp157c-ev1, stm32mp157a-dk1, and stm32mp157c-dk2
- uart7 on stm32mp157a-dk1 and stm32mp157c-dk2
- usart2 on stm32mp157c-dk2
The aliases are following this order.
Erwan Le Ray (5):
ARM: dts: stm32: add usart2, usa
Fix uart nodes ordering and uart7_pins_a comments in stm32mp15-pinctrl.
Erwan Le Ray (2):
ARM: dts: stm32: fix uart nodes ordering in stm32mp15-pinctrl
ARM: dts: stm32: fix uart7_pins_a comments in stm32mp15-pinctrl
arch/arm/boot/dts/stm32mp15-pinctrl.dtsi | 130 +++
1 fi
* Ingo Molnar wrote:
> > diff --git a/fs/binfmt_elf.c b/fs/binfmt_elf.c
> > index 13f25e241ac4..25d489bc9453 100644
> > --- a/fs/binfmt_elf.c
> > +++ b/fs/binfmt_elf.c
> > @@ -1733,7 +1733,7 @@ static int fill_thread_core_info(struct
> > elf_thread_core_info *t,
> > (!regset->a
Adds usart2_pins_c, usart3_pins_b, usart3_pins_c and uart7_pins_c pins
configurations in stm32mp15-pinctrl.
- usart2_pins_c pins are connected to Bluetooth chip on dk2 board.
- usart3_pins_b pins are connected to GPIO expansion connector on evx board.
- usart3_pins_c pins are connected to GPIO expa
Fix usart and uart nodes ordering. Several usart nodes didn't respect
expecting ordering.
Fixes: 077e0638fc83 ("ARM: dts: stm32: Add alternate pinmux for USART2 pins on
stm32mp15")
Signed-off-by: Erwan Le Ray
diff --git a/arch/arm/boot/dts/stm32mp15-pinctrl.dtsi
b/arch/arm/boot/dts/stm32mp15-
Adds the usart3 node to stm32mp157c-ev1 board. usart3 pins are connected to
GPIO Expansion connector. usart3 is disabled by default.
Signed-off-by: Erwan Le Ray
diff --git a/arch/arm/boot/dts/stm32mp157c-ev1.dts
b/arch/arm/boot/dts/stm32mp157c-ev1.dts
index b19056557ef0..e56dde8d20f8 100644
---
Adds uart7 node to stm32mp15xx-dkx and uart7 alias to stm32mp157a-dk1 and
stm32mp157c-dk2 boards. uart7 pins are connected to Arduino connector.
uart7 is disabled by default.
Signed-off-by: Erwan Le Ray
diff --git a/arch/arm/boot/dts/stm32mp157a-dk1.dts
b/arch/arm/boot/dts/stm32mp157a-dk1.dts
i
On Wed, 27 May 2020 at 19:56, Daniel Thompson
wrote:
>
> On Wed, May 27, 2020 at 11:55:58AM +0530, Sumit Garg wrote:
> > While rounding up CPUs via NMIs, its possible that a rounded up CPU
>
> This problem does not just impact NMI roundup (breakpoints,
I guess here via breakpoints you meant if we
Hi,
On 5/28/20 9:23 AM, Jean-Philippe Brucker wrote:
> On Thu, May 28, 2020 at 10:45:14AM +0530, Srinath Mannam wrote:
>> On Wed, May 27, 2020 at 11:00 PM Robin Murphy wrote:
>>>
>> Thanks Robin for your quick response.
>>> On 2020-05-27 17:03, Srinath Mannam wrote:
This patch gives the prov
On Wed, May 27, 2020 at 10:19 PM Nick Gasson wrote:
>
> Fix an issue where addresses in the DWARF line table are offset by
> -0x40 (GEN_ELF_TEXT_OFFSET). This can be seen with `objdump -S` on the
> ELF files after perf inject.
Without too much knowledge this looks good to me. The original code
ca
* Al Viro wrote:
> On Thu, May 28, 2020 at 09:02:55AM +0200, Ingo Molnar wrote:
>
> > Looks good to me.
> >
> > I'm wondering, shouldn't we also zero-initialize the dump data to
> > begin with? See the patch below (untested).
>
> Note that this hides the bug from KASAN, though ;-) And the
On Thu, May 28, 2020 at 09:59:01AM +0800, Tiezhu Yang wrote:
> If CONFIG_MIPS_MALTA is not set but CONFIG_LEGACY_BOARD_SEAD3 is set,
> the subdir arch/mips/boot/dts/mti will not be built, so the sead3.dts
> which depends on CONFIG_LEGACY_BOARD_SEAD3 in this subdir is also not
> built, and then ther
On Wed, May 27, 2020 at 09:17:21PM +0800, Jiaxun Yang wrote:
> PCI_IOBASE is used to create VM maps for PCI I/O ports, it is
> required by generic PCI drivers to make memory mapped I/O range
> work.
>
> To deal with legacy drivers that have fixed I/O ports range we
> reserved 0x1 in PCI_IOBASE
On Wed, 27 May 2020 at 16:36, Arvind Sankar wrote:
>
> On Sat, May 23, 2020 at 02:00:20PM +0200, Ard Biesheuvel wrote:
> > Eliminate all GOT entries in the decompressor binary, by forcing hidden
> > visibility for all symbol references, which informs the compiler that
> > such references will be r
On 05/27/2020 05:55 PM, Will Deacon wrote:
> On Wed, 27 May 2020 15:34:36 +0530, Anshuman Khandual wrote:
>> There is no way to proceed when requested register could not be searched in
>> arm64_ftr_reg[]. Requesting for a non present register would be an error as
>> well. Hence lets just WARN_ON
Hi Andrew-sh.Cheng,
On 5/28/20 4:35 PM, Chanwoo Choi wrote:
> Hi Andrew-sh.Cheng,
>
> On 5/20/20 12:43 PM, Andrew-sh.Cheng wrote:
>> This adds a devfreq driver for the Cache Coherent Interconnect (CCI)
>> of the Mediatek MT8183.
>>
>> On the MT8183 the CCI is supplied by the same regulator as the
tree: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
master
head: b0c3ba31be3e45a130e13b278cf3b90f69bda6f6
commit: c780e86dd48ef6467a1146cf7d0fe1e05a635039 blktrace: Protect q->blk_trace
with RCU
date: 3 months ago
config: x86_64-randconfig-s021-20200528 (attached
On Thu, May 28, 2020 at 09:06:07AM +0800, Jiping Ma wrote:
> On 05/27/2020 11:19 PM, Mark Rutland wrote:
> > On Wed, May 27, 2020 at 09:33:00AM +0800, Jiping Ma wrote:
> > > On 05/26/2020 06:26 PM, Mark Rutland wrote:
> > > > On Mon, May 11, 2020 at 10:52:07AM +0800, Jiping Ma wrote:
> > > This mod
In DMA pointer the initialzation of instance is of no use.
In fact it will reinitialize the instance variable which is already
opened and functional.
Signed-off-by: Ravulapati Vishnu vardhan rao
---
sound/soc/amd/raven/acp3x-pcm-dma.c | 8
1 file changed, 8 deletions(-)
diff --git a/s
Dear Friend,
I am glad to know you, but God knows you better and he knows why he
has directed me to you at this point in time so do not be surprise at
all. My names are Mrs. Donna Louise McInnes a widow, i have been
suffering from ovarian cancer disease. At this moment i am about to
end the race
From: Pratyush Yadav
In xSPI mode, flashes expect 2-byte opcodes. The second byte is called
the "command extension". There can be 3 types of extensions in xSPI:
repeat, invert, and hex. When the extension type is "repeat", the same
opcode is sent twice. When it is "invert", the second byte is the
From: Pratyush Yadav
Each phase is given a separate 'dtr' field so mixed protocols like
4S-4D-4D can be supported.
Signed-off-by: Pratyush Yadav
---
drivers/spi/spi-mem.c | 3 +++
include/linux/spi/spi-mem.h | 8
2 files changed, 11 insertions(+)
diff --git a/drivers/spi/spi-me
From: Pratyush Yadav
Double Transfer Rate (DTR) is SPI protocol in which data is transferred
on each clock edge as opposed to on each clock cycle. Make
framework-level changes to allow supporting flashes in DTR mode.
Right now, mixed DTR modes are not supported. So, for example a mode
like 4S-4D
Get maximum operation speed of device in octal mode from
BFPT 20th DWORD.
Signed-off-by: Mason Yang
---
drivers/mtd/spi-nor/core.h | 2 ++
drivers/mtd/spi-nor/sfdp.c | 36
drivers/mtd/spi-nor/sfdp.h | 4
3 files changed, 42 insertions(+)
diff --git a/
Hello,
JESD216C has defined specification for Octal 8S-8S-8S and 8D-8D-8D.
Based on JEDEC216C Basic Flash Parameter Table (BFPT) driver extract
DWORD-18: command and command extension type.
DWORD-20: Maximum operation speed of device in Octal mode.
xSPI profile 1.0 table:
DWORD-1: Read Fast comma
JESD251, xSPI profile 1.0 table supports octal DTR mode.
Extract information like the fast read opcode, dummy cycles for various
frequencies, the number of dummy cycles needed for a Read Status
Register command, the number of address bytes needed for a Read
Status Register command, read volatile re
Configuration register 2 is to set the device operation condition like
STR or DTR mode at address offset 0 and DQS mode at address offset 0x200.
Each device has various address offset for it's specific operatoin
setting.
Signed-off-by: Mason Yang
---
drivers/mtd/spi-nor/core.c | 78
From: Pratyush Yadav
JESD216 rev D makes BFPT 20 DWORDs. Update the BFPT size define to
reflect that.
The check for rev A or later compared the BFPT header length with the
maximum BFPT length, BFPT_DWORD_MAX. Since BFPT_DWORD_MAX was 16, and so
was the BFPT length for both rev A and B, this chec
On Thu, 28 May 2020, Borislav Petkov wrote:
> On Thu, May 28, 2020 at 07:39:31AM +0800, kbuild test robot wrote:
> > tree: https://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git
> > locking/kcsan
> > head: a5dead405f6be1fb80555bdcb77c406bf133fdc8
> > commit: a5dead405f6be1fb80555bdcb77c4
From: Pratyush Yadav
Some devices in DTR mode expect an extra command byte called the
extension. The extension can either be same as the opcode, bitwise
inverse of the opcode, or another additional byte forming a 16-byte
opcode. Get the extension type from the BFPT. For now, only flashes with
"re
A set of simple command sequences is provided which can be executed
directly by the host controller to enable octal DTR mode.
Each command sequence is 8 per byte for single SPI mode.
Signed-off-by: Mason Yang
---
drivers/mtd/spi-nor/core.h | 18
drivers/mtd/spi-nor/sfdp.c | 103 ++
On 27/05/20 8:20 pm, Peter Zijlstra wrote:
> On Wed, May 27, 2020 at 06:17:32PM +0200, Peter Zijlstra wrote:
>> On Tue, May 12, 2020 at 03:19:11PM +0300, Adrian Hunter wrote:
>>> @@ -202,6 +207,13 @@ static int collect_one_slot(struct kprobe_insn_page
>>> *kip, int idx)
>>> * next tim
Hi,
On Fri, May 22, 2020 at 12:24:48PM +0200, Marek Szyprowski wrote:
> Add device tree compatible strings and create proper modalias structures
> to let this driver load automatically if compiled as module, because
> max14577 MFD driver creates MFD cells with such compatible strings.
>
> Signed-
From: Pratyush Yadav
The xSPI Profile 1.0 table specifies how many dummy cycles and address
bytes are needed for the Read Status Register command in octal DTR mode.
Use that information to send the correct Read SR command.
Signed-off-by: Pratyush Yadav
---
drivers/mtd/spi-nor/core.c | 23 +
Driver patch for octal 8D-8D-8D mode support.
Signed-off-by: Mason Yang
---
drivers/spi/spi-mxic.c | 101 +
1 file changed, 69 insertions(+), 32 deletions(-)
diff --git a/drivers/spi/spi-mxic.c b/drivers/spi/spi-mxic.c
index 69491f3..c83c8c2 10064
From: Pratyush Yadav
Allow flashes to specify a hook to enable octal DTR mode. Use this hook
whenever possible to get optimal transfer speeds.
Signed-off-by: Pratyush Yadav
---
drivers/mtd/spi-nor/core.c | 35 +++
drivers/mtd/spi-nor/core.h | 2 ++
2 files chan
Macronix mx25uw51245g is a SPI NOR that supports 1-1-1/8-8-8 mode.
Correct the dummy cycles to device for various frequencies
after xSPI profile 1.0 table parsed.
Enable mx25uw51245g to Octal DTR mode by executing the command sequences
to change to octal DTR mode.
Signed-off-by: Mason Yang
---
Execute command sequences to change octal DTR mode.
Signed-off-by: Mason Yang
---
drivers/mtd/spi-nor/core.c | 71 ++
drivers/mtd/spi-nor/core.h | 3 ++
2 files changed, 74 insertions(+)
diff --git a/drivers/mtd/spi-nor/core.c b/drivers/mtd/spi-nor/c
On Thu, May 28, 2020 at 01:54:42AM +0200, Borislav Petkov wrote:
> On Thu, May 28, 2020 at 07:39:31AM +0800, kbuild test robot wrote:
> > tree: https://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git
> > locking/kcsan
> > head: a5dead405f6be1fb80555bdcb77c406bf133fdc8
> > commit: a5dead405
Since debugfs include sensitive information it need to be treated
carefully. But it also has many very useful debug functions for userspace.
With this option we can have same configuration for system with
need of debugfs and a way to turn it off. It is needed new
kernel command line parameter to be
On 27/05/20 8:43 pm, Peter Zijlstra wrote:
> On Tue, May 12, 2020 at 03:19:10PM +0300, Adrian Hunter wrote:
>> @@ -2179,6 +2181,49 @@ int kprobe_add_area_blacklist(unsigned long start,
>> unsigned long end)
>> return 0;
>> }
>>
>> +int kprobe_cache_get_kallsym(struct kprobe_insn_cache *c,
Symbols are needed for tools to describe instruction addresses. Pages
allocated for kprobe's purposes need symbols to be created for them.
Add such symbols to be visible via /proc/kallsyms.
Note: kprobe insn pages are not used if ftrace is configured. To see the
effect of this patch, the kernel mu
tree: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
master
head: b0c3ba31be3e45a130e13b278cf3b90f69bda6f6
commit: 913292c97d750fe4188b4f5aa770e5e0ca1e5a91 sched.h: Annotate
sighand_struct with __rcu
date: 4 months ago
config: x86_64-randconfig-s022-20200528 (attached
> From: Nick Desaulniers
> Sent: 27 May 2020 21:31
> To: Robin Murphy
> Cc: Catalin Marinas; Will Deacon; Naohiro Aota; Stephen Boyd; Masahiro
> Yamada; LKML; Manoj Gupta; Luis Lozano; Nathan Chancellor; Vincenzo Frascino;
> Linux ARM; Kristof Beyls; Victor Campos; david.spick...@linaro.org; Arn
> Thus delete this function call which became unnecessary with the referenced
> software update.
…
> Co-developed-by: Markus Elfring
I guess that this tag should usually trigger another consequence like the
following.
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/Docume
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